sys/dev/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  *
  31  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
  32  */
  33
  34 #include <drm/drmP.h>
  35 #include <uapi_drm/radeon_drm.h>
  36 #include "radeon_drv.h"
  37 #include "radeon_gem.h"
  38 #include "radeon_kms.h"
  39 #include "radeon_irq_kms.h"
  40
  41 #include <drm/drm_pciids.h>
  42 #include <linux/module.h>
  43 #ifdef PM_TODO
  44 #include <linux/pm_runtime.h>
  45 #include <linux/vga_switcheroo.h>
  46 #endif
  47
  48 #include <drm/drm_gem.h>
  49
  50 #include "drm/drm_crtc_helper.h"
  51 /*
  52  * KMS wrapper.
  53  * - 2.0.0 - initial interface
  54  * - 2.1.0 - add square tiling interface
  55  * - 2.2.0 - add r6xx/r7xx const buffer support
  56  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  57  * - 2.4.0 - add crtc id query
  58  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  59  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  60  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  61  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  62  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  63  *   2.10.0 - fusion 2D tiling
  64  *   2.11.0 - backend map, initial compute support for the CS checker
  65  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  66  *   2.13.0 - virtual memory support, streamout
  67  *   2.14.0 - add evergreen tiling informations
  68  *   2.15.0 - add max_pipes query
  69  *   2.16.0 - fix evergreen 2D tiled surface calculation
  70  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  71  *   2.18.0 - r600-eg: allow "invalid" DB formats
  72  *   2.19.0 - r600-eg: MSAA textures
  73  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  74  *   2.21.0 - r600-r700: FMASK and CMASK
  75  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  76  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  77  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  78  *   2.25.0 - eg+: new info request for num SE and num SH
  79  *   2.26.0 - r600-eg: fix htile size computation
  80  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  81  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  82  *   2.29.0 - R500 FP16 color clear registers
  83  *   2.30.0 - fix for FMASK texturing
  84  *   2.31.0 - Add fastfb support for rs690
  85  *   2.32.0 - new info request for rings working
  86  *   2.33.0 - Add SI tiling mode array query
  87  *   2.34.0 - Add CIK tiling mode array query
  88  *   2.35.0 - Add CIK macrotile mode array query
  89  *   2.36.0 - Fix CIK DCE tiling setup
  90  *   2.37.0 - allow GS ring setup on r6xx/r7xx
  91  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
  92  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  93  *   2.39.0 - Add INFO query for number of active CUs
  94  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
  95  *            CS to GPU on >= r600
  96  */
  97 #define KMS_DRIVER_MAJOR        2
  98 #define KMS_DRIVER_MINOR        40
  99 #define KMS_DRIVER_PATCHLEVEL   0
 100 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
 101 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 102 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
 103 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 104 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 105 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
 106                                     int *max_error,
 107                                     struct timeval *vblank_time,
 108                                     unsigned flags);
 109 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
 110                                       unsigned int flags, int *vpos, int *hpos,
 111                                       ktime_t *stime, ktime_t *etime,
 112                                       const struct drm_display_mode *mode);
 113 extern bool radeon_is_px(struct drm_device *dev);
 114 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 115 extern int radeon_max_kms_ioctl;
 116 #ifdef DUMBBELL_WIP
 117 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 118 #endif /* DUMBBELL_WIP */
 119 int radeon_mode_dumb_mmap(struct drm_file *filp,
 120                           struct drm_device *dev,
 121                           uint32_t handle, uint64_t *offset_p);
 122 int radeon_mode_dumb_create(struct drm_file *file_priv,
 123                             struct drm_device *dev,
 124                             struct drm_mode_create_dumb *args);
 125 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
 126 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
 127                                                         struct dma_buf_attachment *,
 128                                                         struct sg_table *sg);
 129 int radeon_gem_prime_pin(struct drm_gem_object *obj);
 130 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
 131 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
 132 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 133
 134 #if defined(CONFIG_DEBUG_FS)
 135 int radeon_debugfs_init(struct drm_minor *minor);
 136 void radeon_debugfs_cleanup(struct drm_minor *minor);
 137 #endif
 138
 139 /* atpx handler */
 140 #if defined(CONFIG_VGA_SWITCHEROO)
 141 void radeon_register_atpx_handler(void);
 142 void radeon_unregister_atpx_handler(void);
 143 #else
 144 static inline void radeon_register_atpx_handler(void) {}
 145 static inline void radeon_unregister_atpx_handler(void) {}
 146 #endif
 147
 148 int radeon_no_wb;
 149 int radeon_modeset = 1;
 150 int radeon_dynclks = -1;
 151 int radeon_r4xx_atom = 0;
 152 int radeon_agpmode = 0;
 153 int radeon_vram_limit = 0;
 154 int radeon_gart_size = -1; /* auto */
 155 int radeon_benchmarking = 0;
 156 int radeon_testing = 0;
 157 int radeon_connector_table = 0;
 158 int radeon_tv = 1;
 159 int radeon_audio = -1;
 160 int radeon_disp_priority = 0;
 161 int radeon_hw_i2c = 0;
 162 int radeon_pcie_gen2 = -1;
 163 int radeon_msi = -1;
 164 int radeon_lockup_timeout = 10000;
 165 int radeon_fastfb = 0;
 166 int radeon_dpm = -1;
 167 int radeon_aspm = -1;
 168 int radeon_runtime_pm = -1;
 169 int radeon_hard_reset = 0;
 170 int radeon_vm_size = 8;
 171 int radeon_vm_block_size = -1;
 172 int radeon_deep_color = 0;
 173 int radeon_use_pflipirq = 2;
 174 int radeon_bapm = -1;
 175 int radeon_backlight = -1;
 176
 177 TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
 178 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 179 module_param_named(no_wb, radeon_no_wb, int, 0444);
 180
 181 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 182 module_param_named(modeset, radeon_modeset, int, 0400);
 183
 184 TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
 185 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 186 module_param_named(dynclks, radeon_dynclks, int, 0444);
 187
 188 TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
 189 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 190 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 191
 192 TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
 193 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 194 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 195
 196 TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
 197 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 198 module_param_named(agpmode, radeon_agpmode, int, 0444);
 199
 200 TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
 201 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 202 module_param_named(gartsize, radeon_gart_size, int, 0600);
 203
 204 TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
 205 MODULE_PARM_DESC(benchmark, "Run benchmark");
 206 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 207
 208 TUNABLE_INT("drm.radeon.testing", &radeon_testing);
 209 MODULE_PARM_DESC(test, "Run tests");
 210 module_param_named(test, radeon_testing, int, 0444);
 211
 212 TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
 213 MODULE_PARM_DESC(connector_table, "Force connector table");
 214 module_param_named(connector_table, radeon_connector_table, int, 0444);
 215
 216 TUNABLE_INT("drm.radeon.tv", &radeon_tv);
 217 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 218 module_param_named(tv, radeon_tv, int, 0444);
 219
 220 TUNABLE_INT("drm.radeon.audio", &radeon_audio);
 221 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
 222 module_param_named(audio, radeon_audio, int, 0444);
 223
 224 TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
 225 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 226 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 227
 228 TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
 229 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 230 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 231
 232 TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
 233 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 234 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 235
 236 TUNABLE_INT("drm.radeon.msi", &radeon_msi);
 237 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 238 module_param_named(msi, radeon_msi, int, 0444);
 239
 240 TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
 241 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
 242 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 243
 244 TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
 245 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
 246 module_param_named(fastfb, radeon_fastfb, int, 0444);
 247
 248 TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
 249 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
 250 module_param_named(dpm, radeon_dpm, int, 0444);
 251
 252 TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
 253 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
 254 module_param_named(aspm, radeon_aspm, int, 0444);
 255
 256 TUNABLE_INT("drm.radeon.runtime_pm", &radeon_runtime_pm);       /* careful with this */
 257 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
 258 module_param_named(runpm, radeon_runtime_pm, int, 0444);
 259
 260 TUNABLE_INT("drm.radeon.hard_reset", &radeon_hard_reset);       /* very careful with this */
 261 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
 262 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
 263
 264 TUNABLE_INT("drm.radeon.vm_size", &radeon_vm_size);
 265 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
 266 module_param_named(vm_size, radeon_vm_size, int, 0444);
 267
 268 TUNABLE_INT("drm.radeon.vm_block_size", &radeon_vm_block_size);
 269 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
 270 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
 271
 272 TUNABLE_INT("drm.radeon.deep_color", &radeon_deep_color);
 273 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
 274 module_param_named(deep_color, radeon_deep_color, int, 0444);
 275
 276 TUNABLE_INT("drm.radeon.use_pflipirq", &radeon_use_pflipirq);
 277 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
 278 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 279
 280 TUNABLE_INT("drm.radeon.bapm", &radeon_bapm);
 281 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 282 module_param_named(bapm, radeon_bapm, int, 0444);
 283
 284 TUNABLE_INT("drm.radeon.backlight", &radeon_backlight);
 285 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
 286 module_param_named(backlight, radeon_backlight, int, 0444);
 287
 288 static drm_pci_id_list_t pciidlist[] = {
 289         radeon_PCI_IDS
 290 };
 291
 292 static struct drm_driver kms_driver;
 293
 294 #ifdef DUMBBELL_WIP
 295 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
 296 {
 297         struct apertures_struct *ap;
 298         bool primary = false;
 299
 300         ap = alloc_apertures(1);
 301         if (!ap)
 302                 return -ENOMEM;
 303
 304         ap->ranges[0].base = pci_resource_start(pdev, 0);
 305         ap->ranges[0].size = pci_resource_len(pdev, 0);
 306
 307 #ifdef CONFIG_X86
 308         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 309 #endif
 310         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
 311         kfree(ap);
 312
 313         return 0;
 314 }
 315
 316 static int radeon_pci_probe(struct pci_dev *pdev,
 317                             const struct pci_device_id *ent)
 318 {
 319         int ret;
 320
 321         /* Get rid of things like offb */
 322         ret = radeon_kick_out_firmware_fb(pdev);
 323         if (ret)
 324                 return ret;
 325
 326         return drm_get_pci_dev(pdev, ent, &kms_driver);
 327 }
 328
 329 static void
 330 radeon_pci_remove(struct pci_dev *pdev)
 331 {
 332         struct drm_device *dev = pci_get_drvdata(pdev);
 333
 334         drm_put_dev(dev);
 335 }
 336
 337 static int radeon_pmops_suspend(struct device *dev)
 338 {
 339         struct pci_dev *pdev = to_pci_dev(dev);
 340         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 341         return radeon_suspend_kms(drm_dev, true, true);
 342 }
 343
 344 static int radeon_pmops_resume(struct device *dev)
 345 {
 346         struct pci_dev *pdev = to_pci_dev(dev);
 347         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 348         return radeon_resume_kms(drm_dev, true, true);
 349 }
 350
 351 static int radeon_pmops_freeze(struct device *dev)
 352 {
 353         struct pci_dev *pdev = to_pci_dev(dev);
 354         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 355         return radeon_suspend_kms(drm_dev, false, true);
 356 }
 357
 358 static int radeon_pmops_thaw(struct device *dev)
 359 {
 360         struct pci_dev *pdev = to_pci_dev(dev);
 361         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 362         return radeon_resume_kms(drm_dev, false, true);
 363 }
 364
 365 static int radeon_pmops_runtime_suspend(struct device *dev)
 366 {
 367         struct pci_dev *pdev = to_pci_dev(dev);
 368         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 369         int ret;
 370
 371         if (!radeon_is_px(drm_dev)) {
 372 #ifdef PM_TODO
 373                 pm_runtime_forbid(dev);
 374 #endif
 375                 return -EBUSY;
 376         }
 377
 378         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 379         drm_kms_helper_poll_disable(drm_dev);
 380         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
 381
 382         ret = radeon_suspend_kms(drm_dev, false, false);
 383         pci_save_state(pdev);
 384         pci_disable_device(pdev);
 385         pci_set_power_state(pdev, PCI_D3cold);
 386         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 387
 388         return 0;
 389 }
 390
 391 static int radeon_pmops_runtime_resume(struct device *dev)
 392 {
 393         struct pci_dev *pdev = to_pci_dev(dev);
 394         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 395         int ret;
 396
 397         if (!radeon_is_px(drm_dev))
 398                 return -EINVAL;
 399
 400         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 401
 402         pci_set_power_state(pdev, PCI_D0);
 403         pci_restore_state(pdev);
 404         ret = pci_enable_device(pdev);
 405         if (ret)
 406                 return ret;
 407         pci_set_master(pdev);
 408
 409         ret = radeon_resume_kms(drm_dev, false, false);
 410         drm_kms_helper_poll_enable(drm_dev);
 411         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
 412         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
 413         return 0;
 414 }
 415
 416 static int radeon_pmops_runtime_idle(struct device *dev)
 417 {
 418         struct pci_dev *pdev = to_pci_dev(dev);
 419         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 420         struct drm_crtc *crtc;
 421
 422         if (!radeon_is_px(drm_dev)) {
 423 #ifdef PM_TODO
 424                 pm_runtime_forbid(dev);
 425 #endif
 426                 return -EBUSY;
 427         }
 428
 429         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
 430                 if (crtc->enabled) {
 431                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
 432                         return -EBUSY;
 433                 }
 434         }
 435
 436         pm_runtime_mark_last_busy(dev);
 437         pm_runtime_autosuspend(dev);
 438         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
 439         return 1;
 440 }
 441
 442 long radeon_drm_ioctl(struct file *filp,
 443                       unsigned int cmd, unsigned long arg)
 444 {
 445         struct drm_file *file_priv = filp->private_data;
 446         struct drm_device *dev;
 447         long ret;
 448         dev = file_priv->minor->dev;
 449         ret = pm_runtime_get_sync(dev->dev);
 450         if (ret < 0)
 451                 return ret;
 452
 453         ret = drm_ioctl(filp, cmd, arg);
 454
 455         pm_runtime_mark_last_busy(dev->dev);
 456         pm_runtime_put_autosuspend(dev->dev);
 457         return ret;
 458 }
 459
 460 static const struct dev_pm_ops radeon_pm_ops = {
 461         .suspend = radeon_pmops_suspend,
 462         .resume = radeon_pmops_resume,
 463         .freeze = radeon_pmops_freeze,
 464         .thaw = radeon_pmops_thaw,
 465         .poweroff = radeon_pmops_freeze,
 466         .restore = radeon_pmops_resume,
 467         .runtime_suspend = radeon_pmops_runtime_suspend,
 468         .runtime_resume = radeon_pmops_runtime_resume,
 469         .runtime_idle = radeon_pmops_runtime_idle,
 470 };
 471
 472 static const struct file_operations radeon_driver_kms_fops = {
 473         .owner = THIS_MODULE,
 474         .open = drm_open,
 475         .release = drm_release,
 476         .unlocked_ioctl = radeon_drm_ioctl,
 477         .mmap = radeon_mmap,
 478         .poll = drm_poll,
 479         .read = drm_read,
 480 #ifdef CONFIG_COMPAT
 481         .compat_ioctl = radeon_kms_compat_ioctl,
 482 #endif
 483 };
 484 #endif /* DUMBBELL_WIP */
 485
 486 static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx,
 487                               struct sysctl_oid *top)
 488 {
 489         return drm_add_busid_modesetting(dev, ctx, top);
 490 }
 491
 492 static struct drm_driver kms_driver = {
 493         .driver_features =
 494             DRIVER_USE_AGP |
 495             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 496             DRIVER_PRIME | DRIVER_RENDER,
 497         .load = radeon_driver_load_kms,
 498         .open = radeon_driver_open_kms,
 499         .preclose = radeon_driver_preclose_kms,
 500         .postclose = radeon_driver_postclose_kms,
 501         .lastclose = radeon_driver_lastclose_kms,
 502         .unload = radeon_driver_unload_kms,
 503         .get_vblank_counter = radeon_get_vblank_counter_kms,
 504         .enable_vblank = radeon_enable_vblank_kms,
 505         .disable_vblank = radeon_disable_vblank_kms,
 506         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
 507         .get_scanout_position = radeon_get_crtc_scanoutpos,
 508         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 509         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 510         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 511         .irq_handler = radeon_driver_irq_handler_kms,
 512         .sysctl_init = radeon_sysctl_init,
 513         .ioctls = radeon_ioctls_kms,
 514         .gem_free_object = radeon_gem_object_free,
 515         .gem_open_object = radeon_gem_object_open,
 516         .gem_close_object = radeon_gem_object_close,
 517         .dumb_create = radeon_mode_dumb_create,
 518         .dumb_map_offset = radeon_mode_dumb_mmap,
 519         .dumb_destroy = drm_gem_dumb_destroy,
 520 #ifdef DUMBBELL_WIP
 521         .fops = &radeon_driver_kms_fops,
 522 #endif /* DUMBBELL_WIP */
 523
 524 #ifdef DUMBBELL_WIP
 525         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 526         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 527         .gem_prime_export = drm_gem_prime_export,
 528         .gem_prime_import = drm_gem_prime_import,
 529         .gem_prime_pin = radeon_gem_prime_pin,
 530         .gem_prime_unpin = radeon_gem_prime_unpin,
 531         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
 532         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
 533         .gem_prime_vmap = radeon_gem_prime_vmap,
 534         .gem_prime_vunmap = radeon_gem_prime_vunmap,
 535 #endif /* DUMBBELL_WIP */
 536
 537         .name = DRIVER_NAME,
 538         .desc = DRIVER_DESC,
 539         .date = DRIVER_DATE,
 540         .major = KMS_DRIVER_MAJOR,
 541         .minor = KMS_DRIVER_MINOR,
 542         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 543 };
 544
 545 #ifdef DUMBBELL_WIP
 546 static struct drm_driver *driver;
 547 static struct pci_driver *pdriver;
 548
 549 static struct pci_driver radeon_kms_pci_driver = {
 550         .name = DRIVER_NAME,
 551         .id_table = pciidlist,
 552         .probe = radeon_pci_probe,
 553         .remove = radeon_pci_remove,
 554         .driver.pm = &radeon_pm_ops,
 555 };
 556
 557 static int __init radeon_init(void)
 558 {
 559         if (radeon_modeset == 1) {
 560                 DRM_INFO("radeon kernel modesetting enabled.\n");
 561                 driver = &kms_driver;
 562                 pdriver = &radeon_kms_pci_driver;
 563                 driver->driver_features |= DRIVER_MODESET;
 564                 driver->num_ioctls = radeon_max_kms_ioctl;
 565                 radeon_register_atpx_handler();
 566
 567         } else {
 568                 DRM_ERROR("No UMS support in radeon module!\n");
 569                 return -EINVAL;
 570         }
 571
 572         /* let modprobe override vga console setting */
 573         return drm_pci_init(driver, pdriver);
 574 }
 575
 576 static void __exit radeon_exit(void)
 577 {
 578         drm_pci_exit(driver, pdriver);
 579         radeon_unregister_atpx_handler();
 580 }
 581 #endif /* DUMBBELL_WIP */
 582
 583 /* =================================================================== */
 584
 585 static int
 586 radeon_probe(device_t kdev)
 587 {
 588
 589         return drm_probe(kdev, pciidlist);
 590 }
 591
 592 static int
 593 radeon_attach(device_t kdev)
 594 {
 595         struct drm_device *dev;
 596
 597         dev = device_get_softc(kdev);
 598         if (radeon_modeset == 1) {
 599                 kms_driver.driver_features |= DRIVER_MODESET;
 600                 kms_driver.num_ioctls = radeon_max_kms_ioctl;
 601                 radeon_register_atpx_handler();
 602         }
 603         dev->driver = &kms_driver;
 604         return (drm_attach(kdev, pciidlist));
 605 }
 606
 607 static int
 608 radeon_suspend(device_t kdev)
 609 {
 610         struct drm_device *dev;
 611         int ret;
 612
 613         dev = device_get_softc(kdev);
 614         ret = radeon_suspend_kms(dev, true, true);
 615
 616         return (-ret);
 617 }
 618
 619 static int
 620 radeon_resume(device_t kdev)
 621 {
 622         struct drm_device *dev;
 623         int ret;
 624
 625         dev = device_get_softc(kdev);
 626         ret = radeon_resume_kms(dev, true, true);
 627
 628         return (-ret);
 629 }
 630
 631 static device_method_t radeon_methods[] = {
 632         /* Device interface */
 633         DEVMETHOD(device_probe,         radeon_probe),
 634         DEVMETHOD(device_attach,        radeon_attach),
 635         DEVMETHOD(device_suspend,       radeon_suspend),
 636         DEVMETHOD(device_resume,        radeon_resume),
 637         DEVMETHOD(device_detach,        drm_release),
 638         DEVMETHOD_END
 639 };
 640
 641 static driver_t radeon_driver = {
 642         "drm",
 643         radeon_methods,
 644         sizeof(struct drm_device)
 645 };
 646
 647 extern devclass_t drm_devclass;
 648 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
 649     NULL, NULL, SI_ORDER_ANY);
 650 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
 651 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
 652 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
 653 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
 654 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);
 655 #ifdef CONFIG_ACPI
 656 MODULE_DEPEND(radeonkms, acpi, 1, 1, 1);
 657 #endif