kernel: Replace struct device* by device_t
[dragonfly.git] / sys / dev / netif / ix / ixgbe_osdep.h
blobe6d231504affbbe3f78bc03367d3ea69d944cc73
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32 ******************************************************************************/
33 /*$FreeBSD$*/
36 #ifndef _IXGBE_OS_H_
37 #define _IXGBE_OS_H_
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/endian.h>
42 #include <sys/systm.h>
43 #include <sys/mbuf.h>
44 #include <sys/protosw.h>
45 #include <sys/socket.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/bus.h>
49 #include <sys/rman.h>
50 #include <vm/vm.h>
51 #include <vm/pmap.h>
52 #include <machine/clock.h>
53 #include <bus/pci/pcivar.h>
54 #include <bus/pci/pcireg.h>
56 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
57 #define EWARN(H, W, S) kprintf(W)
59 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
60 #define usec_delay(x) DELAY(x)
61 #define msec_delay(x) DELAY(1000*(x))
63 #define DBG 0
64 #define MSGOUT(S, A, B) kprintf(S "\n", A, B)
65 #define DEBUGFUNC(F) DEBUGOUT(F);
66 #if DBG
67 #define DEBUGOUT(S) kprintf(S "\n")
68 #define DEBUGOUT1(S,A) kprintf(S "\n",A)
69 #define DEBUGOUT2(S,A,B) kprintf(S "\n",A,B)
70 #define DEBUGOUT3(S,A,B,C) kprintf(S "\n",A,B,C)
71 #define DEBUGOUT4(S,A,B,C,D) kprintf(S "\n",A,B,C,D)
72 #define DEBUGOUT5(S,A,B,C,D,E) kprintf(S "\n",A,B,C,D,E)
73 #define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F)
74 #define DEBUGOUT7(S,A,B,C,D,E,F,G) kprintf(S "\n",A,B,C,D,E,F,G)
75 #define ERROR_REPORT1(S,A) kprintf(S "\n",A)
76 #define ERROR_REPORT2(S,A,B) kprintf(S "\n",A,B)
77 #define ERROR_REPORT3(S,A,B,C) kprintf(S "\n",A,B,C)
78 #else
79 #define DEBUGOUT(S)
80 #define DEBUGOUT1(S,A)
81 #define DEBUGOUT2(S,A,B)
82 #define DEBUGOUT3(S,A,B,C)
83 #define DEBUGOUT4(S,A,B,C,D)
84 #define DEBUGOUT5(S,A,B,C,D,E)
85 #define DEBUGOUT6(S,A,B,C,D,E,F)
86 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
88 #define ERROR_REPORT1(S,A)
89 #define ERROR_REPORT2(S,A,B)
90 #define ERROR_REPORT3(S,A,B,C)
91 #endif
93 #define FALSE 0
94 #define false 0 /* shared code requires this */
95 #define TRUE 1
96 #define true 1
97 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
98 #define PCI_COMMAND_REGISTER PCIR_COMMAND
100 /* Shared code dropped this define.. */
101 #define IXGBE_INTEL_VENDOR_ID 0x8086
103 /* Bunch of defines for shared code bogosity */
104 #define UNREFERENCED_PARAMETER(_p)
105 #define UNREFERENCED_1PARAMETER(_p)
106 #define UNREFERENCED_2PARAMETER(_p, _q)
107 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
108 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
110 #define IXGBE_NTOHL(_i) ntohl(_i)
111 #define IXGBE_NTOHS(_i) ntohs(_i)
113 /* XXX these need to be revisited */
114 #define IXGBE_CPU_TO_LE32 htole32
115 #define IXGBE_LE32_TO_CPUS(x)
116 #define IXGBE_CPU_TO_BE16 htobe16
117 #define IXGBE_CPU_TO_BE32 htobe32
119 typedef uint8_t u8;
120 typedef int8_t s8;
121 typedef uint16_t u16;
122 typedef int16_t s16;
123 typedef uint32_t u32;
124 typedef int32_t s32;
125 typedef uint64_t u64;
127 /* shared code requires this */
128 #define __le16 u16
129 #define __le32 u32
130 #define __le64 u64
131 #define __be16 u16
132 #define __be32 u32
133 #define __be64 u64
135 #define le16_to_cpu
137 #if defined(__i386__) || defined(__x86_64__)
138 #define mb() __asm volatile("mfence" ::: "memory")
139 #define wmb() __asm volatile("sfence" ::: "memory")
140 #define rmb() __asm volatile("lfence" ::: "memory")
141 #else
142 #define mb()
143 #define rmb()
144 #define wmb()
145 #endif
147 #if defined(__i386__) || defined(__x86_64__)
148 static __inline
149 void prefetch(void *x)
151 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
153 #else
154 #define prefetch(x)
155 #endif
158 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes
159 * non-overlapping regions and 32-byte padding on both src and dst.
161 static __inline int
162 ixgbe_bcopy(void *_src, void *_dst, int l)
164 uint64_t *src = _src;
165 uint64_t *dst = _dst;
167 for (; l > 0; l -= 32) {
168 *dst++ = *src++;
169 *dst++ = *src++;
170 *dst++ = *src++;
171 *dst++ = *src++;
173 return (0);
176 struct ixgbe_osdep
178 bus_space_tag_t mem_bus_space_tag;
179 bus_space_handle_t mem_bus_space_handle;
180 device_t dev;
183 /* These routines are needed by the shared code */
184 struct ixgbe_hw;
185 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
186 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
188 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
189 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
191 static __inline uint32_t
192 ixgbe_read_reg_osdep(struct ixgbe_osdep *osdep, uint32_t reg)
194 uint32_t value;
195 int count = 0;
197 do {
198 value = bus_space_read_4(osdep->mem_bus_space_tag,
199 osdep->mem_bus_space_handle, reg);
200 } while (value == 0xdeadbeef && ++count < 10);
202 if (count > 1)
203 device_printf(osdep->dev, "%d register reads @ 0x%8x\n",
204 count, reg);
206 return value;
209 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg_osdep((a)->back, reg)
211 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
213 #define IXGBE_WRITE_REG(a, reg, value) (\
214 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
215 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
216 reg, value))
219 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
220 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
221 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
222 (reg + ((offset) << 2))))
224 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
225 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
226 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
227 (reg + ((offset) << 2)), value))
230 #endif /* _IXGBE_OS_H_ */