sys/platform/pc32/icu/icu_ipl.h

   1 /*-
   2  * Copyright (c) 1997 Bruce Evans.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/i386/isa/icu_ipl.h,v 1.3 1999/08/28 00:44:42 peter Exp $
  27  * $DragonFly: src/sys/platform/pc32/icu/icu_ipl.h,v 1.6 2006/10/23 21:50:30 dillon Exp $
  28  */
  29
  30 #ifndef _ARCH_ICU_ICU_IPL_H_
  31 #define _ARCH_ICU_ICU_IPL_H_
  32
  33 #include <machine_base/isa/isa_intr.h>
  34
  35 #define ICU_HWI_VECTORS ISA_IRQ_CNT
  36 #define ICU_HWI_MASK    ((1 << ICU_HWI_VECTORS) - 1)
  37
  38 #ifdef LOCORE
  39
  40 /*
  41  * SMP interrupt mask protection.  The first version is used
  42  * when interrupts might not be disabled, the second version is
  43  * used when interrupts are disabled.
  44  */
  45
  46 #define ICU_IMASK_LOCK                                                  \
  47         SPIN_LOCK(imen_spinlock) ;                                      \
  48
  49 #define ICU_IMASK_UNLOCK                                                \
  50         SPIN_UNLOCK(imen_spinlock) ;                                    \
  51
  52 #endif  /* LOCORE */
  53
  54 #endif /* !_ARCH_ICU_ICU_IPL_H_ */