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Sync nv with FreeBSD and update the binary driver to 1.0-0310.
[dragonfly.git] / sys / dev / netif / nv / if_nv.c
blob4e8262bf415d8d23faa832c75d55cb811f7e1277
1 /*-
2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $Id: if_nv.c,v 1.20 2005/03/12 01:11:00 q Exp $
28 * $FreeBSD: src/sys/dev/nve/if_nve.c,v 1.20 2005/12/12 06:23:43 bz Exp $
29 * $DragonFly: src/sys/dev/netif/nv/Attic/if_nv.c,v 1.27 2006/01/29 22:10:11 corecode Exp $
30 */
31
32 /*
33 * NVIDIA nForce MCP Networking Adapter driver
34 *
35 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA
36 * through their web site.
37 *
38 * All mainstream nForce and nForce2 motherboards are supported. This module
39 * is as stable, sometimes more stable, than the linux version. (Recent
40 * Linux stability issues seem to be related to some issues with newer
41 * distributions using GCC 3.x, however this don't appear to effect FreeBSD
42 * 5.x).
43 *
44 * In accordance with the NVIDIA distribution license it is necessary to
45 * link this module against the nvlibnet.o binary object included in the
46 * Linux driver source distribution. The binary component is not modified in
47 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c
48 * linux kernel module "wrapper".
49 *
50 * The Linux driver uses a common code API that is shared between Win32 and
51 * i386 Linux. This abstracts the low level driver functions and uses
52 * callbacks and hooks to access the underlying hardware device. By using
53 * this same API in a FreeBSD kernel module it is possible to support the
54 * hardware without breaching the Linux source distributions licensing
55 * requirements, or obtaining the hardware programming specifications.
56 *
57 * Although not conventional, it works, and given the relatively small
58 * amount of hardware centric code, it's hopefully no more buggy than its
59 * linux counterpart.
60 *
61 * NVIDIA now support the nForce3 AMD64 platform, however I have been
62 * unable to access such a system to verify support. However, the code is
63 * reported to work with little modification when compiled with the AMD64
64 * version of the NVIDIA Linux library. All that should be necessary to make
65 * the driver work is to link it directly into the kernel, instead of as a
66 * module, and apply the docs/amd64.diff patch in this source distribution to
67 * the NVIDIA Linux driver source.
68 *
69 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well
70 * as recent versions of DragonFly.
71 *
72 * Written by Quinton Dolan <q@onthenet.com.au>
73 * Portions based on existing FreeBSD network drivers.
74 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files.
75 *
76 * $Id: if_nv.c,v 1.9 2003/12/13 15:27:40 q Exp $
77 */
78
79 #include "opt_polling.h"
80
81 #include <sys/param.h>
82 #include <sys/systm.h>
83 #include <sys/sockio.h>
84 #include <sys/mbuf.h>
85 #include <sys/malloc.h>
86 #include <sys/kernel.h>
87 #include <sys/socket.h>
88 #include <sys/sysctl.h>
89 #include <sys/queue.h>
90 #include <sys/module.h>
91 #include <sys/thread2.h>
92
93 #include <net/if.h>
94 #include <net/ifq_var.h>
95 #include <net/if_arp.h>
96 #include <net/ethernet.h>
97 #include <net/if_dl.h>
98 #include <net/if_media.h>
99
100 #include <net/bpf.h>
101
102 #include <net/vlan/if_vlan_var.h>
103
104 #include <machine/bus_memio.h>
105 #include <machine/bus.h>
106 #include <machine/resource.h>
107
108 #include <vm/vm.h> /* for vtophys */
109 #include <vm/pmap.h> /* for vtophys */
110 #include <machine/clock.h> /* for DELAY */
111 #include <sys/bus.h>
112 #include <sys/rman.h>
113 #include <sys/serialize.h>
114
115 #include <bus/pci/pcireg.h>
116 #include <bus/pci/pcivar.h>
117
118 #include <dev/netif/mii_layer/mii.h>
119 #include <dev/netif/mii_layer/miivar.h>
120
121 MODULE_DEPEND(nv, pci, 1, 1, 1);
122 MODULE_DEPEND(nv, miibus, 1, 1, 1);
123
124 #include "if_nvreg.h"
125 #include "miibus_if.h"
126
127 static int nv_probe(device_t);
128 static int nv_attach(device_t);
129 static int nv_detach(device_t);
130 static void nv_init(void *);
131 static void nv_stop(struct nv_softc *);
132 static void nv_shutdown(device_t);
133 static int nv_init_rings(struct nv_softc *);
134 static void nv_free_rings(struct nv_softc *);
135
136 static void nv_ifstart(struct ifnet *);
137 static int nv_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
138 static void nv_intr(void *);
139 static void nv_tick(void *);
140 static void nv_setmulti(struct nv_softc *);
141 static void nv_watchdog(struct ifnet *);
142 static void nv_update_stats(struct nv_softc *);
143 #ifdef DEVICE_POLLING
144 static void nv_poll(struct ifnet *, enum poll_cmd, int);
145 #endif
146
147 static int nv_ifmedia_upd(struct ifnet *);
148 static void nv_ifmedia_sts(struct ifnet *, struct ifmediareq *);
149 static int nv_miibus_readreg(device_t, int, int);
150 static void nv_miibus_writereg(device_t, int, int, int);
151
152 static void nv_dmamap_cb(void *, bus_dma_segment_t *, int, int);
153 static void nv_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int);
154
155 static NV_SINT32 nv_osalloc(PNV_VOID, PMEMORY_BLOCK);
156 static NV_SINT32 nv_osfree(PNV_VOID, PMEMORY_BLOCK);
157 static NV_SINT32 nv_osallocex(PNV_VOID, PMEMORY_BLOCKEX);
158 static NV_SINT32 nv_osfreeex(PNV_VOID, PMEMORY_BLOCKEX);
159 static NV_SINT32 nv_osclear(PNV_VOID, PNV_VOID, NV_SINT32);
160 static NV_SINT32 nv_osdelay(PNV_VOID, NV_UINT32);
161 static NV_SINT32 nv_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *);
162 static NV_SINT32 nv_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID);
163 static NV_SINT32 nv_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32);
164 static NV_SINT32 nv_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8);
165 static NV_SINT32 nv_oslinkchg(PNV_VOID, NV_SINT32);
166 static NV_SINT32 nv_osalloctimer(PNV_VOID, PNV_VOID *);
167 static NV_SINT32 nv_osfreetimer(PNV_VOID, PNV_VOID);
168 static NV_SINT32 nv_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID);
169 static NV_SINT32 nv_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32);
170 static NV_SINT32 nv_oscanceltimer(PNV_VOID, PNV_VOID);
171
172 static NV_SINT32 nv_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8);
173 static PNV_VOID nv_ospreprocpktnopq(PNV_VOID, PNV_VOID);
174 static NV_SINT32 nv_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32);
175 static NV_SINT32 nv_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *);
176 static NV_SINT32 nv_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID);
177 static NV_SINT32 nv_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID);
178 static PNV_VOID nv_osreturnbufvirt(PNV_VOID, PNV_VOID);
179
180 static device_method_t nv_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, nv_probe),
183 DEVMETHOD(device_attach, nv_attach),
184 DEVMETHOD(device_detach, nv_detach),
185 DEVMETHOD(device_shutdown, nv_shutdown),
186
187 /* Bus interface */
188 DEVMETHOD(bus_print_child, bus_generic_print_child),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
190
191 /* MII interface */
192 DEVMETHOD(miibus_readreg, nv_miibus_readreg),
193 DEVMETHOD(miibus_writereg, nv_miibus_writereg),
194
195 {0, 0}
196 };
197
198 static driver_t nv_driver = {
199 "nv",
200 nv_methods,
201 sizeof(struct nv_softc)
202 };
203
204 static devclass_t nv_devclass;
205
206 static int nv_pollinterval = 0;
207 SYSCTL_INT(_hw, OID_AUTO, nv_pollinterval, CTLFLAG_RW,
208 &nv_pollinterval, 0, "delay between interface polls");
209
210 DRIVER_MODULE(nv, pci, nv_driver, nv_devclass, 0, 0);
211 DRIVER_MODULE(miibus, nv, miibus_driver, miibus_devclass, 0, 0);
212
213 static struct nv_type nv_devs[] = {
214 {NVIDIA_VENDORID, NFORCE_MCPNET1_DEVICEID,
215 "NVIDIA nForce MCP Networking Adapter"},
216 {NVIDIA_VENDORID, NFORCE_MCPNET2_DEVICEID,
217 "NVIDIA nForce MCP2 Networking Adapter"},
218 {NVIDIA_VENDORID, NFORCE_MCPNET3_DEVICEID,
219 "NVIDIA nForce MCP3 Networking Adapter"},
220 {NVIDIA_VENDORID, NFORCE_MCPNET4_DEVICEID,
221 "NVIDIA nForce MCP4 Networking Adapter"},
222 {NVIDIA_VENDORID, NFORCE_MCPNET5_DEVICEID,
223 "NVIDIA nForce MCP5 Networking Adapter"},
224 {NVIDIA_VENDORID, NFORCE_MCPNET6_DEVICEID,
225 "NVIDIA nForce MCP6 Networking Adapter"},
226 {NVIDIA_VENDORID, NFORCE_MCPNET7_DEVICEID,
227 "NVIDIA nForce MCP7 Networking Adapter"},
228 {NVIDIA_VENDORID, NFORCE_MCPNET8_DEVICEID,
229 "NVIDIA nForce MCP8 Networking Adapter"},
230 {NVIDIA_VENDORID, NFORCE_MCPNET9_DEVICEID,
231 "NVIDIA nForce MCP9 Networking Adapter"},
232 {NVIDIA_VENDORID, NFORCE_MCPNET10_DEVICEID,
233 "NVIDIA nForce MCP10 Networking Adapter"},
234 {NVIDIA_VENDORID, NFORCE_MCPNET11_DEVICEID,
235 "NVIDIA nForce MCP11 Networking Adapter"},
236 {NVIDIA_VENDORID, NFORCE_MCPNET12_DEVICEID,
237 "NVIDIA nForce MCP12 Networking Adapter"},
238 {NVIDIA_VENDORID, NFORCE_MCPNET13_DEVICEID,
239 "NVIDIA nForce MCP13 Networking Adapter"},
240 {0, 0, NULL}
241 };
242
243 /* DMA MEM map callback function to get data segment physical address */
244 static void
245 nv_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error)
246 {
247 if (error)
248 return;
249
250 KASSERT(nsegs == 1,
251 ("Too many DMA segments returned when mapping DMA memory"));
252 *(bus_addr_t *)arg = segs->ds_addr;
253 }
254
255 /* DMA RX map callback function to get data segment physical address */
256 static void
257 nv_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
258 {
259 if (error)
260 return;
261 *(bus_addr_t *)arg = segs->ds_addr;
262 }
263
264 /*
265 * DMA TX buffer callback function to allocate fragment data segment
266 * addresses
267 */
268 static void
269 nv_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
270 {
271 struct nv_tx_desc *info = arg;
272
273 if (error)
274 return;
275 KASSERT(nsegs < NV_MAX_FRAGS,
276 ("Too many DMA segments returned when mapping mbuf"));
277 info->numfrags = nsegs;
278 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t));
279 }
280
281 /* Probe for supported hardware ID's */
282 static int
283 nv_probe(device_t dev)
284 {
285 struct nv_type *t = nv_devs;
286
287 /* Check for matching PCI DEVICE ID's */
288 while (t->name != NULL) {
289 if ((pci_get_vendor(dev) == t->vid_id) &&
290 (pci_get_device(dev) == t->dev_id)) {
291 device_set_desc(dev, t->name);
292 return (0);
293 }
294 t++;
295 }
296
297 return (ENXIO);
298 }
299
300 /* Attach driver and initialise hardware for use */
301 static int
302 nv_attach(device_t dev)
303 {
304 u_char eaddr[ETHER_ADDR_LEN];
305 struct nv_softc *sc;
306 struct ifnet *ifp;
307 OS_API *osapi;
308 ADAPTER_OPEN_PARAMS OpenParams;
309 int error = 0, i, rid;
310 u_int32_t unit;
311
312 if (bootverbose)
313 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION);
314
315 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_attach - entry\n");
316
317 sc = device_get_softc(dev);
318 unit = device_get_unit(dev);
319
320 sc->dev = dev;
321 sc->unit = unit;
322 callout_init(&sc->nv_stat_timer);
323
324 /* Preinitialize data structures */
325 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS));
326
327 /* Enable bus mastering */
328 pci_enable_busmaster(dev);
329
330 /* Allocate memory mapped address space */
331 rid = NV_RID;
332 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
333
334 if (sc->res == NULL) {
335 device_printf(dev, "couldn't map memory\n");
336 error = ENXIO;
337 goto fail;
338 }
339 sc->sc_st = rman_get_bustag(sc->res);
340 sc->sc_sh = rman_get_bushandle(sc->res);
341
342 /* Allocate interrupt */
343 rid = 0;
344 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
345 RF_SHAREABLE | RF_ACTIVE);
346
347 if (sc->irq == NULL) {
348 device_printf(dev, "couldn't map interrupt\n");
349 error = ENXIO;
350 goto fail;
351 }
352 /* Allocate DMA tags */
353 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
354 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS,
355 NV_MAX_FRAGS, MCLBYTES, 0,
356 &sc->mtag);
357 if (error) {
358 device_printf(dev, "couldn't allocate dma tag\n");
359 goto fail;
360 }
361 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
362 BUS_SPACE_MAXADDR, NULL, NULL,
363 sizeof(struct nv_rx_desc) * RX_RING_SIZE, 1,
364 sizeof(struct nv_rx_desc) * RX_RING_SIZE, 0,
365 &sc->rtag);
366 if (error) {
367 device_printf(dev, "couldn't allocate dma tag\n");
368 goto fail;
369 }
370 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
371 BUS_SPACE_MAXADDR, NULL, NULL,
372 sizeof(struct nv_tx_desc) * TX_RING_SIZE, 1,
373 sizeof(struct nv_tx_desc) * TX_RING_SIZE, 0,
374 &sc->ttag);
375 if (error) {
376 device_printf(dev, "couldn't allocate dma tag\n");
377 goto fail;
378 }
379
380 error = bus_dmamap_create(sc->ttag, 0, &sc->tmap);
381 if (error) {
382 device_printf(dev, "couldn't create dma map\n");
383 goto fail;
384 }
385
386 /* Allocate DMA safe memory and get the DMA addresses. */
387 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc,
388 BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->tmap);
389 if (error) {
390 device_printf(dev, "couldn't allocate dma memory\n");
391 goto fail;
392 }
393 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc,
394 sizeof(struct nv_tx_desc) * TX_RING_SIZE, nv_dmamap_cb,
395 &sc->tx_addr, 0);
396 if (error) {
397 device_printf(dev, "couldn't map dma memory\n");
398 goto fail;
399 }
400
401 error = bus_dmamap_create(sc->rtag, 0, &sc->rmap);
402 if (error) {
403 device_printf(dev, "couldn't create dma map\n");
404 goto fail;
405 }
406
407 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc,
408 BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rmap);
409 if (error) {
410 device_printf(dev, "couldn't allocate dma memory\n");
411 goto fail;
412 }
413 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc,
414 sizeof(struct nv_rx_desc) * RX_RING_SIZE, nv_dmamap_cb,
415 &sc->rx_addr, 0);
416 if (error) {
417 device_printf(dev, "couldn't map dma memory\n");
418 goto fail;
419 }
420 /* Initialize rings. */
421 if (nv_init_rings(sc)) {
422 device_printf(dev, "failed to init rings\n");
423 error = ENXIO;
424 goto fail;
425 }
426 /* Setup NVIDIA API callback routines */
427 osapi = &sc->osapi;
428 osapi->pOSCX = sc;
429 osapi->pfnAllocMemory = nv_osalloc;
430 osapi->pfnFreeMemory = nv_osfree;
431 osapi->pfnAllocMemoryEx = nv_osallocex;
432 osapi->pfnFreeMemoryEx = nv_osfreeex;
433 osapi->pfnClearMemory = nv_osclear;
434 osapi->pfnStallExecution = nv_osdelay;
435 osapi->pfnAllocReceiveBuffer = nv_osallocrxbuf;
436 osapi->pfnFreeReceiveBuffer = nv_osfreerxbuf;
437 osapi->pfnPacketWasSent = nv_ospackettx;
438 osapi->pfnPacketWasReceived = nv_ospacketrx;
439 osapi->pfnLinkStateHasChanged = nv_oslinkchg;
440 osapi->pfnAllocTimer = nv_osalloctimer;
441 osapi->pfnFreeTimer = nv_osfreetimer;
442 osapi->pfnInitializeTimer = nv_osinittimer;
443 osapi->pfnSetTimer = nv_ossettimer;
444 osapi->pfnCancelTimer = nv_oscanceltimer;
445 osapi->pfnPreprocessPacket = nv_ospreprocpkt;
446 osapi->pfnPreprocessPacketNopq = nv_ospreprocpktnopq;
447 osapi->pfnIndicatePackets = nv_osindicatepkt;
448 osapi->pfnLockAlloc = nv_oslockalloc;
449 osapi->pfnLockAcquire = nv_oslockacquire;
450 osapi->pfnLockRelease = nv_oslockrelease;
451 osapi->pfnReturnBufferVirtual = nv_osreturnbufvirt;
452
453 sc->linkup = FALSE;
454 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN;
455
456 /* TODO - We don't support hardware offload yet */
457 sc->hwmode = 1;
458 sc->media = 0;
459
460 /* Set NVIDIA API startup parameters */
461 OpenParams.MaxDpcLoop = 2;
462 OpenParams.MaxRxPkt = RX_RING_SIZE;
463 OpenParams.MaxTxPkt = TX_RING_SIZE;
464 OpenParams.SentPacketStatusSuccess = 1;
465 OpenParams.SentPacketStatusFailure = 0;
466 OpenParams.MaxRxPktToAccumulate = 6;
467 OpenParams.ulPollInterval = nv_pollinterval;
468 OpenParams.SetForcedModeEveryNthRxPacket = 0;
469 OpenParams.SetForcedModeEveryNthTxPacket = 0;
470 OpenParams.RxForcedInterrupt = 0;
471 OpenParams.TxForcedInterrupt = 0;
472 OpenParams.pOSApi = osapi;
473 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res);
474 OpenParams.bASFEnabled = 0;
475 OpenParams.ulDescriptorVersion = sc->hwmode;
476 OpenParams.ulMaxPacketSize = sc->max_frame_size;
477 OpenParams.DeviceId = pci_get_device(dev);
478
479 /* Open NVIDIA Hardware API */
480 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr);
481 if (error) {
482 device_printf(dev, "failed to open NVIDIA Hardware API: 0x%x\n", error);
483 goto fail;
484 }
485
486 /* TODO - Add support for MODE2 hardware offload */
487
488 bzero(&sc->adapterdata, sizeof(sc->adapterdata));
489
490 sc->adapterdata.ulMediaIF = sc->media;
491 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1;
492 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata);
493
494 sc->hwapi->pfnInit(sc->hwapi->pADCX,
495 0, /* force speed */
496 0, /* force full duplex */
497 0, /* force mode */
498 0, /* force async mode */
499 &sc->linkup);
500
501 /* MAC is loaded backwards into h/w reg */
502 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
503 for (i = 0; i < 6; i++) {
504 eaddr[i] = sc->original_mac_addr[5 - i];
505 }
506 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr);
507 bcopy(eaddr, (char *)&sc->sc_macaddr, ETHER_ADDR_LEN);
508
509 DEBUGOUT(NV_DEBUG_INIT, "nv: do mii_phy_probe\n");
510
511 /* Probe device for MII interface to PHY */
512 if (mii_phy_probe(dev, &sc->miibus, nv_ifmedia_upd, nv_ifmedia_sts)) {
513 device_printf(dev, "MII without any phy!\n");
514 error = ENXIO;
515 goto fail;
516 }
517 /* Setup interface parameters */
518 ifp = &sc->sc_if;
519 ifp->if_softc = sc;
520 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
521 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
522 ifp->if_ioctl = nv_ioctl;
523 ifp->if_start = nv_ifstart;
524 #ifdef DEVICE_POLLING
525 ifp->if_poll = nv_poll;
526 #endif
527 ifp->if_watchdog = nv_watchdog;
528 ifp->if_timer = 0;
529 ifp->if_init = nv_init;
530 ifp->if_mtu = ETHERMTU;
531 ifp->if_baudrate = IF_Mbps(100);
532 ifp->if_capabilities |= IFCAP_VLAN_MTU;
533 ifq_set_maxlen(&ifp->if_snd, TX_RING_SIZE - 1);
534 ifq_set_ready(&ifp->if_snd);
535
536 /* Attach to OS's managers. */
537 ether_ifattach(ifp, sc->sc_macaddr, NULL);
538
539 /* Activate our interrupt handler. - attach last to avoid lock */
540 error = bus_setup_intr(sc->dev, sc->irq, INTR_NETSAFE,
541 nv_intr, sc, &sc->sc_ih, ifp->if_serializer);
542 if (error) {
543 ether_ifdetach(ifp);
544 device_printf(sc->dev, "couldn't set up interrupt handler\n");
545 goto fail;
546 }
547 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_attach - exit\n");
548
549 fail:
550 if (error)
551 nv_detach(dev);
552
553 return (error);
554 }
555
556 /* Detach interface for module unload */
557 static int
558 nv_detach(device_t dev)
559 {
560 struct nv_softc *sc = device_get_softc(dev);
561 struct ifnet *ifp;
562 int is_attached;
563
564 ifp = &sc->arpcom.ac_if;
565
566 DEBUGOUT(NV_DEBUG_DEINIT, "nv: nv_detach - entry\n");
567
568 lwkt_serialize_enter(ifp->if_serializer);
569
570 is_attached = device_is_attached(dev);
571 if (is_attached)
572 nv_stop(sc);
573
574 if (sc->miibus)
575 device_delete_child(dev, sc->miibus);
576 bus_generic_detach(dev);
577
578 /* Reload unreversed address back into MAC in original state */
579 if (sc->original_mac_addr)
580 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
581
582 DEBUGOUT(NV_DEBUG_DEINIT, "nv: do pfnClose\n");
583 /* Detach from NVIDIA hardware API */
584 if (sc->hwapi->pfnClose)
585 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE);
586 /* Release resources */
587 if (sc->sc_ih)
588 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih);
589
590 lwkt_serialize_exit(ifp->if_serializer);
591
592 if (is_attached)
593 ether_ifdetach(ifp);
594
595 if (sc->irq)
596 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
597 if (sc->res)
598 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res);
599
600 nv_free_rings(sc);
601
602 if (sc->tx_desc) {
603 bus_dmamap_unload(sc->rtag, sc->rmap);
604 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap);
605 bus_dmamap_destroy(sc->rtag, sc->rmap);
606 }
607 if (sc->mtag)
608 bus_dma_tag_destroy(sc->mtag);
609 if (sc->ttag)
610 bus_dma_tag_destroy(sc->ttag);
611 if (sc->rtag)
612 bus_dma_tag_destroy(sc->rtag);
613
614 DEBUGOUT(NV_DEBUG_DEINIT, "nv: nv_detach - exit\n");
615 return (0);
616 }
617
618 /* Initialise interface and start it "RUNNING" */
619 static void
620 nv_init(void *xsc)
621 {
622 struct nv_softc *sc = xsc;
623 struct ifnet *ifp;
624 int error;
625
626 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_init - entry (%d)\n", sc->linkup);
627
628 ifp = &sc->sc_if;
629
630 /* Do nothing if already running */
631 if (ifp->if_flags & IFF_RUNNING)
632 return;
633
634 nv_stop(sc);
635
636 DEBUGOUT(NV_DEBUG_INIT, "nv: do pfnInit\n");
637
638 nv_ifmedia_upd(ifp);
639
640 /* Setup Hardware interface and allocate memory structures */
641 error = sc->hwapi->pfnInit(sc->hwapi->pADCX,
642 0, /* force speed */
643 0, /* force full duplex */
644 0, /* force mode */
645 0, /* force async mode */
646 &sc->linkup);
647
648 if (error) {
649 device_printf(sc->dev, "failed to start NVIDIA Hardware interface\n");
650 return;
651 }
652 /* Set the MAC address */
653 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, sc->sc_macaddr);
654
655 /* Setup multicast filter */
656 nv_setmulti(sc);
657
658 sc->hwapi->pfnStart(sc->hwapi->pADCX);
659
660 /* Update interface parameters */
661 ifp->if_flags |= IFF_RUNNING;
662 ifp->if_flags &= ~IFF_OACTIVE;
663
664 /*
665 * Enable the interrupt. Currently the nvidia API does not support
666 * polling, if we do not call pfnEnableInterrupts() we cannot
667 * issue the nvidia callback to process interrupts. Call the
668 * interrupt service routine in case the interrupt got stuck during
669 * a reset, renegotiation, or timeout.
670 */
671 #if 1
672 lwkt_serialize_handler_enable(ifp->if_serializer);
673 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
674 #else
675 if ((ifp->if_flags & IFF_POLLING) == 0) {
676 lwkt_serialize_handler_enable(ifp->if_serializer);
677 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
678 }
679 #endif
680 nv_intr(sc);
681
682 /*
683 * Reset watchdog and ring queue indexes. XXX if the interface
684 * is reset with pending tx packets queued to the actual device,
685 * the mbufs are currently lost.
686 */
687 ifp->if_timer = 0;
688 sc->pending_txs = 0;
689
690 callout_reset(&sc->nv_stat_timer, hz, nv_tick, sc);
691
692 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_init - exit\n");
693 }
694
695 #ifdef DEVICE_POLLING
696
697 static void
698 nv_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
699 {
700 struct nv_softc *sc = ifp->if_softc;
701
702 switch(cmd) {
703 case POLL_REGISTER:
704 /*
705 * We must disable the hardware interrupt on the device
706 * as well as ensure that any interrupt queued prior to
707 * this point does not execute the handler function.
708 *
709 * NOTE! The nvidia API does not support polling with
710 * interrupts disabled, so we have to leave them turned on
711 * unfortunately.
712 */
713 #if 0
714 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
715 lwkt_serialize_handler_disable(ifp->if_serializer);
716 #endif
717 break;
718 case POLL_DEREGISTER:
719 #if 0
720 lwkt_serialize_handler_enable(ifp->if_serializer);
721 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
722 #endif
723 break;
724 case POLL_AND_CHECK_STATUS:
725 /* fall through */
726 case POLL_ONLY:
727 if (ifp->if_flags & IFF_RUNNING) {
728 nv_intr(sc);
729 }
730 if (ifp->if_flags & IFF_RUNNING) {
731 if (!ifq_is_empty(&ifp->if_snd))
732 nv_ifstart(ifp);
733 }
734 break;
735 }
736 }
737
738 #endif
739
740 /* Stop interface activity ie. not "RUNNING" */
741 static void
742 nv_stop(struct nv_softc *sc)
743 {
744 struct ifnet *ifp;
745
746 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_stop - entry\n");
747
748 ifp = &sc->sc_if;
749 ifp->if_timer = 0;
750
751 /* Cancel tick timer */
752 callout_stop(&sc->nv_stat_timer);
753
754 /*
755 * Stop hardware activity. The serializer handler disablement call
756 * prevents any interrupt scheduled prior to this call from calling
757 * the handler.
758 */
759 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
760 lwkt_serialize_handler_disable(ifp->if_serializer);
761
762 sc->hwapi->pfnStop(sc->hwapi->pADCX,
763 AFFECT_RECEIVER | AFFECT_TRANSMITTER);
764 sc->hwapi->pfnClearTxDesc(sc->hwapi->pADCX);
765
766 DEBUGOUT(NV_DEBUG_DEINIT, "nv: do pfnDeinit\n");
767 /* Shutdown interface and deallocate memory buffers */
768 if (sc->hwapi->pfnDeinit)
769 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0);
770
771 sc->linkup = 0;
772 sc->cur_rx = 0;
773 sc->pending_rxs = 0;
774 sc->pending_txs = 0;
775
776 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
777
778 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_stop - exit\n");
779 }
780
781 /* Shutdown interface for unload/reboot */
782 static void
783 nv_shutdown(device_t dev)
784 {
785 struct nv_softc *sc;
786
787 DEBUGOUT(NV_DEBUG_DEINIT, "nv: nv_shutdown\n");
788
789 sc = device_get_softc(dev);
790
791 /* Stop hardware activity */
792 lwkt_serialize_enter(sc->sc_if.if_serializer);
793 nv_stop(sc);
794 lwkt_serialize_exit(sc->sc_if.if_serializer);
795 }
796
797 /* Allocate TX ring buffers */
798 static int
799 nv_init_rings(struct nv_softc *sc)
800 {
801 int error, i;
802
803 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_init_rings - entry\n");
804
805 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0;
806 /* Initialise RX ring */
807 for (i = 0; i < RX_RING_SIZE; i++) {
808 struct nv_rx_desc *desc = sc->rx_desc + i;
809 struct nv_map_buffer *buf = &desc->buf;
810
811 buf->mbuf = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
812 if (buf->mbuf == NULL) {
813 device_printf(sc->dev, "couldn't allocate mbuf\n");
814 nv_free_rings(sc);
815 error = ENOBUFS;
816 goto fail;
817 }
818 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
819 m_adj(buf->mbuf, ETHER_ALIGN);
820
821 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
822 if (error) {
823 device_printf(sc->dev, "couldn't create dma map\n");
824 nv_free_rings(sc);
825 goto fail;
826 }
827 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
828 nv_dmamap_rx_cb, &desc->paddr, 0);
829 if (error) {
830 device_printf(sc->dev, "couldn't dma map mbuf\n");
831 nv_free_rings(sc);
832 goto fail;
833 }
834 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
835
836 desc->buflength = buf->mbuf->m_len;
837 desc->vaddr = mtod(buf->mbuf, caddr_t);
838 }
839 bus_dmamap_sync(sc->rtag, sc->rmap,
840 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
841
842 /* Initialize TX ring */
843 for (i = 0; i < TX_RING_SIZE; i++) {
844 struct nv_tx_desc *desc = sc->tx_desc + i;
845 struct nv_map_buffer *buf = &desc->buf;
846
847 buf->mbuf = NULL;
848
849 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
850 if (error) {
851 device_printf(sc->dev, "couldn't create dma map\n");
852 nv_free_rings(sc);
853 goto fail;
854 }
855 }
856 bus_dmamap_sync(sc->ttag, sc->tmap,
857 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
858
859 DEBUGOUT(NV_DEBUG_INIT, "nv: nv_init_rings - exit\n");
860
861 fail:
862 return (error);
863 }
864
865 /* Free the TX ring buffers */
866 static void
867 nv_free_rings(struct nv_softc *sc)
868 {
869 int i;
870
871 DEBUGOUT(NV_DEBUG_DEINIT, "nv: nv_free_rings - entry\n");
872
873 for (i = 0; i < RX_RING_SIZE; i++) {
874 struct nv_rx_desc *desc = sc->rx_desc + i;
875 struct nv_map_buffer *buf = &desc->buf;
876
877 if (buf->mbuf) {
878 bus_dmamap_unload(sc->mtag, buf->map);
879 bus_dmamap_destroy(sc->mtag, buf->map);
880 m_freem(buf->mbuf);
881 }
882 buf->mbuf = NULL;
883 }
884
885 for (i = 0; i < TX_RING_SIZE; i++) {
886 struct nv_tx_desc *desc = sc->tx_desc + i;
887 struct nv_map_buffer *buf = &desc->buf;
888
889 if (buf->mbuf) {
890 bus_dmamap_unload(sc->mtag, buf->map);
891 bus_dmamap_destroy(sc->mtag, buf->map);
892 m_freem(buf->mbuf);
893 }
894 buf->mbuf = NULL;
895 }
896
897 DEBUGOUT(NV_DEBUG_DEINIT, "nv: nv_free_rings - exit\n");
898 }
899
900 /* Main loop for sending packets from OS to interface */
901
902 static void
903 nv_ifstart(struct ifnet *ifp)
904 {
905 struct nv_softc *sc = ifp->if_softc;
906 struct nv_map_buffer *buf;
907 struct mbuf *m0, *m;
908 struct nv_tx_desc *desc;
909 ADAPTER_WRITE_DATA txdata;
910 int error, i;
911
912 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_ifstart - entry\n");
913
914 /* If link is down/busy or queue is empty do nothing */
915 if ((ifp->if_flags & IFF_OACTIVE) || ifq_is_empty(&ifp->if_snd))
916 return;
917
918 /* Transmit queued packets until sent or TX ring is full */
919 while (sc->pending_txs < TX_RING_SIZE) {
920 desc = sc->tx_desc + sc->cur_tx;
921 buf = &desc->buf;
922
923 /* Get next packet to send. */
924 m0 = ifq_dequeue(&ifp->if_snd, NULL);
925
926 /* If nothing to send, return. */
927 if (m0 == NULL)
928 return;
929
930 /* Map MBUF for DMA access */
931 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0,
932 nv_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
933
934 if (error && error != EFBIG) {
935 m_freem(m0);
936 sc->tx_errors++;
937 continue;
938 }
939 /*
940 * Packet has too many fragments - defrag into new mbuf
941 * cluster
942 */
943 if (error) {
944 m = m_defrag(m0, MB_DONTWAIT);
945 if (m == NULL) {
946 m_freem(m0);
947 sc->tx_errors++;
948 continue;
949 }
950 m0 = m;
951
952 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m,
953 nv_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
954 if (error) {
955 m_freem(m);
956 sc->tx_errors++;
957 continue;
958 }
959 }
960 /* Do sync on DMA bounce buffer */
961 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE);
962
963 buf->mbuf = m0;
964 txdata.ulNumberOfElements = desc->numfrags;
965 txdata.pvID = (PVOID)desc;
966
967 /* Put fragments into API element list */
968 txdata.ulTotalLength = buf->mbuf->m_len;
969 for (i = 0; i < desc->numfrags; i++) {
970 txdata.sElement[i].ulLength = (ulong)desc->frags[i].ds_len;
971 txdata.sElement[i].pPhysical = (PVOID)desc->frags[i].ds_addr;
972 }
973
974 /* Send packet to Nvidia API for transmission */
975 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata);
976
977 switch (error) {
978 case ADAPTERERR_NONE:
979 /* Packet was queued in API TX queue successfully */
980 sc->pending_txs++;
981 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE;
982 break;
983
984 case ADAPTERERR_TRANSMIT_QUEUE_FULL:
985 /* The API TX queue is full - requeue the packet */
986 device_printf(sc->dev, "nv_ifstart: transmit queue is full\n");
987 ifp->if_flags |= IFF_OACTIVE;
988 bus_dmamap_unload(sc->mtag, buf->map);
989 buf->mbuf = NULL;
990 m_freem(m0); /* XXX requeue */
991 return;
992
993 default:
994 /* The API failed to queue/send the packet so dump it */
995 device_printf(sc->dev, "nv_ifstart: transmit error\n");
996 bus_dmamap_unload(sc->mtag, buf->map);
997 m_freem(buf->mbuf);
998 buf->mbuf = NULL;
999 sc->tx_errors++;
1000 return;
1001 }
1002 /* Set watchdog timer. */
1003 ifp->if_timer = 8;
1004
1005 /* Copy packet to BPF tap */
1006 BPF_MTAP(ifp, m0);
1007 }
1008 ifp->if_flags |= IFF_OACTIVE;
1009
1010 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_ifstart - exit\n");
1011 }
1012
1013 /* Handle IOCTL events */
1014 static int
1015 nv_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1016 {
1017 struct nv_softc *sc = ifp->if_softc;
1018 struct ifreq *ifr = (struct ifreq *) data;
1019 struct mii_data *mii;
1020 int error = 0;
1021
1022 DEBUGOUT(NV_DEBUG_IOCTL, "nv: nv_ioctl - entry\n");
1023
1024 switch (command) {
1025 case SIOCSIFMTU:
1026 /* Set MTU size */
1027 if (ifp->if_mtu == ifr->ifr_mtu)
1028 break;
1029 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) {
1030 ifp->if_mtu = ifr->ifr_mtu;
1031 nv_stop(sc);
1032 nv_init(sc);
1033 } else
1034 error = EINVAL;
1035 break;
1036
1037 case SIOCSIFFLAGS:
1038 /* Setup interface flags */
1039 if (ifp->if_flags & IFF_UP) {
1040 if ((ifp->if_flags & IFF_RUNNING) == 0) {
1041 nv_init(sc);
1042 break;
1043 }
1044 } else {
1045 if (ifp->if_flags & IFF_RUNNING) {
1046 nv_stop(sc);
1047 break;
1048 }
1049 }
1050
1051 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
1052 nv_setmulti(sc);
1053 break;
1054
1055 case SIOCADDMULTI:
1056 case SIOCDELMULTI:
1057 /* Setup multicast filter */
1058 if (ifp->if_flags & IFF_RUNNING) {
1059 nv_setmulti(sc);
1060 }
1061 break;
1062 case SIOCGIFMEDIA:
1063 case SIOCSIFMEDIA:
1064 /* Get/Set interface media parameters */
1065 mii = device_get_softc(sc->miibus);
1066 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1067 break;
1068
1069 default:
1070 /* Everything else we forward to generic ether ioctl */
1071 error = ether_ioctl(ifp, command, data);
1072 break;
1073 }
1074
1075 DEBUGOUT(NV_DEBUG_IOCTL, "nv: nv_ioctl - exit\n");
1076
1077 return (error);
1078 }
1079
1080 /*
1081 * Interrupt service routine. The serializer has already been entered
1082 * since we installed it in our bus_setup_intr() call.
1083 */
1084 static void
1085 nv_intr(void *arg)
1086 {
1087 struct nv_softc *sc = arg;
1088 struct ifnet *ifp = &sc->sc_if;
1089
1090 DEBUGOUT(NV_DEBUG_INTERRUPT, "nv: nv_intr - entry\n");
1091
1092 /*
1093 * Handle an interrupt event. Unfortunately the nvidia API
1094 * does not support interrupt disablement when polling, so we
1095 * have to re-enable after the query masks them off.
1096 */
1097 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) {
1098 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1099 #if 1
1100 lwkt_serialize_handler_enable(ifp->if_serializer);
1101 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1102 #else
1103 if ((ifp->if_flags & IFF_POLLING) == 0) {
1104 lwkt_serialize_handler_enable(ifp->if_serializer);
1105 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1106 }
1107 #endif
1108 }
1109 if (!ifq_is_empty(&ifp->if_snd))
1110 nv_ifstart(ifp);
1111
1112 /* If no pending packets we don't need a timeout */
1113 if (sc->pending_txs == 0)
1114 sc->sc_if.if_timer = 0;
1115
1116 DEBUGOUT(NV_DEBUG_INTERRUPT, "nv: nv_intr - exit\n");
1117 }
1118
1119 /*
1120 * Setup multicast filters
1121 *
1122 * Serialized on call
1123 */
1124 static void
1125 nv_setmulti(struct nv_softc *sc)
1126 {
1127 struct ifnet *ifp;
1128 struct ifmultiaddr *ifma;
1129 PACKET_FILTER hwfilter;
1130 int i;
1131 u_int8_t oraddr[6];
1132 u_int8_t andaddr[6];
1133
1134 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_setmulti - entry\n");
1135
1136 ifp = &sc->sc_if;
1137
1138 /* Initialize filter */
1139 hwfilter.ulFilterFlags = 0;
1140 for (i = 0; i < 6; i++) {
1141 hwfilter.acMulticastAddress[i] = 0;
1142 hwfilter.acMulticastMask[i] = 0;
1143 }
1144
1145 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1146 /* Accept all packets */
1147 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS;
1148 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1149 return;
1150 }
1151 /* Setup multicast filter */
1152 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1153 u_char *addrp;
1154
1155 if (ifma->ifma_addr->sa_family != AF_LINK)
1156 continue;
1157
1158 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1159 for (i = 0; i < 6; i++) {
1160 u_int8_t mcaddr = addrp[i];
1161 andaddr[i] &= mcaddr;
1162 oraddr[i] |= mcaddr;
1163 }
1164 }
1165 for (i = 0; i < 6; i++) {
1166 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i];
1167 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]);
1168 }
1169
1170 /* Send filter to NVIDIA API */
1171 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1172
1173 DEBUGOUT(NV_DEBUG_RUNNING, "nv: nv_setmulti - exit\n");
1174 }
1175
1176 /*
1177 * Change the current media/mediaopts
1178 *
1179 * Serialized on call
1180 */
1181 static int
1182 nv_ifmedia_upd(struct ifnet *ifp)
1183 {
1184 struct nv_softc *sc = ifp->if_softc;
1185 struct mii_data *mii;
1186
1187 DEBUGOUT(NV_DEBUG_MII, "nv: nv_ifmedia_upd\n");
1188
1189 mii = device_get_softc(sc->miibus);
1190
1191 if (mii->mii_instance) {
1192 struct mii_softc *miisc;
1193 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
1194 miisc = LIST_NEXT(miisc, mii_list)) {
1195 mii_phy_reset(miisc);
1196 }
1197 }
1198 mii_mediachg(mii);
1199
1200 return (0);
1201 }
1202
1203 /*
1204 * Update current miibus PHY status of media
1205 *
1206 * Serialized on call
1207 */
1208 static void
1209 nv_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1210 {
1211 struct nv_softc *sc;
1212 struct mii_data *mii;
1213
1214 DEBUGOUT(NV_DEBUG_MII, "nv: nv_ifmedia_sts\n");
1215
1216 sc = ifp->if_softc;
1217 mii = device_get_softc(sc->miibus);
1218 mii_pollstat(mii);
1219
1220 ifmr->ifm_active = mii->mii_media_active;
1221 ifmr->ifm_status = mii->mii_media_status;
1222 }
1223
1224 /* miibus tick timer - maintain link status */
1225 static void
1226 nv_tick(void *xsc)
1227 {
1228 struct nv_softc *sc = xsc;
1229 struct mii_data *mii;
1230 struct ifnet *ifp;
1231
1232 ifp = &sc->sc_if;
1233 lwkt_serialize_enter(ifp->if_serializer);
1234 nv_update_stats(sc);
1235
1236 mii = device_get_softc(sc->miibus);
1237 mii_tick(mii);
1238
1239 if ((mii->mii_media_status & IFM_ACTIVE) &&
1240 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1241 if (!ifq_is_empty(&ifp->if_snd))
1242 nv_ifstart(ifp);
1243 }
1244 callout_reset(&sc->nv_stat_timer, hz, nv_tick, sc);
1245 lwkt_serialize_exit(ifp->if_serializer);
1246 }
1247
1248 /* Update ifnet data structure with collected interface stats from API */
1249 static void
1250 nv_update_stats(struct nv_softc *sc)
1251 {
1252 struct ifnet *ifp = &sc->sc_if;
1253 ADAPTER_STATS stats;
1254
1255 if (sc->hwapi) {
1256 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats);
1257
1258 ifp->if_ipackets = stats.ulSuccessfulReceptions;
1259 ifp->if_ierrors = stats.ulMissedFrames +
1260 stats.ulFailedReceptions +
1261 stats.ulCRCErrors +
1262 stats.ulFramingErrors +
1263 stats.ulOverFlowErrors;
1264
1265 ifp->if_opackets = stats.ulSuccessfulTransmissions;
1266 ifp->if_oerrors = sc->tx_errors +
1267 stats.ulFailedTransmissions +
1268 stats.ulRetryErrors +
1269 stats.ulUnderflowErrors +
1270 stats.ulLossOfCarrierErrors +
1271 stats.ulLateCollisionErrors;
1272
1273 ifp->if_collisions = stats.ulLateCollisionErrors;
1274 }
1275 }
1276
1277 /* miibus Read PHY register wrapper - calls Nvidia API entry point */
1278 static int
1279 nv_miibus_readreg(device_t dev, int phy, int reg)
1280 {
1281 struct nv_softc *sc = device_get_softc(dev);
1282 ULONG data;
1283
1284 DEBUGOUT(NV_DEBUG_MII, "nv: nv_miibus_readreg - entry\n");
1285
1286 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data);
1287
1288 DEBUGOUT(NV_DEBUG_MII, "nv: nv_miibus_readreg - exit\n");
1289
1290 return (data);
1291 }
1292
1293 /* miibus Write PHY register wrapper - calls Nvidia API entry point */
1294 static void
1295 nv_miibus_writereg(device_t dev, int phy, int reg, int data)
1296 {
1297 struct nv_softc *sc = device_get_softc(dev);
1298
1299 DEBUGOUT(NV_DEBUG_MII, "nv: nv_miibus_writereg - entry\n");
1300
1301 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data);
1302
1303 DEBUGOUT(NV_DEBUG_MII, "nv: nv_miibus_writereg - exit\n");
1304 }
1305
1306 /* Watchdog timer to prevent PHY lockups */
1307 static void
1308 nv_watchdog(struct ifnet *ifp)
1309 {
1310 struct nv_softc *sc = ifp->if_softc;
1311
1312 device_printf(sc->dev, "device timeout (%d) flags %d\n",
1313 sc->pending_txs, ifp->if_flags & IFF_OACTIVE);
1314
1315 sc->tx_errors++;
1316
1317 nv_stop(sc);
1318 ifp->if_flags &= ~IFF_RUNNING;
1319 nv_init(sc);
1320
1321 if (!ifq_is_empty(&ifp->if_snd))
1322 nv_ifstart(ifp);
1323 }
1324
1325 /* --- Start of NVOSAPI interface --- */
1326
1327 /* Allocate DMA enabled general use memory for API */
1328 static NV_SINT32
1329 nv_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem)
1330 {
1331 struct nv_softc *sc;
1332 bus_addr_t mem_physical;
1333
1334 DEBUGOUT(NV_DEBUG_API, "nv: nv_osalloc - %d\n", mem->uiLength);
1335
1336 sc = (struct nv_softc *)ctx;
1337
1338 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF,
1339 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
1340
1341 if (!mem->pLogical) {
1342 device_printf(sc->dev, "memory allocation failed\n");
1343 return (0);
1344 }
1345 memset(mem->pLogical, 0, (ulong)mem->uiLength);
1346 mem_physical = vtophys(mem->pLogical);
1347 mem->pPhysical = (PVOID)mem_physical;
1348
1349 DEBUGOUT(NV_DEBUG_API, "nv: nv_osalloc %p/%p - %d\n",
1350 mem->pLogical, mem->pPhysical, mem->uiLength);
1351
1352 return (1);
1353 }
1354
1355 /* Free allocated memory */
1356 static NV_SINT32
1357 nv_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem)
1358 {
1359 DEBUGOUT(NV_DEBUG_API, "nv: nv_osfree - %p - %d\n",
1360 mem->pLogical, mem->uiLength);
1361
1362 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF);
1363 return (1);
1364 }
1365
1366 /* Copied directly from nvnet.c */
1367 static NV_SINT32
1368 nv_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1369 {
1370 MEMORY_BLOCK mem_block;
1371
1372 DEBUGOUT(NV_DEBUG_API, "nv: nv_osallocex\n");
1373
1374 mem_block_ex->pLogical = NULL;
1375 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength;
1376
1377 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) &&
1378 (mem_block_ex->AlignmentSize > 1)) {
1379 DEBUGOUT(NV_DEBUG_API, " aligning on %d\n",
1380 mem_block_ex->AlignmentSize);
1381 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize;
1382 }
1383 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1384
1385 if (nv_osalloc(ctx, &mem_block) == 0) {
1386 return (0);
1387 }
1388 mem_block_ex->pLogicalOrig = mem_block.pLogical;
1389 mem_block_ex->pPhysicalOrigLow = (uintptr_t)mem_block.pPhysical;
1390 mem_block_ex->pPhysicalOrigHigh = 0;
1391
1392 mem_block_ex->pPhysical = mem_block.pPhysical;
1393 mem_block_ex->pLogical = mem_block.pLogical;
1394
1395 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) {
1396 unsigned int offset;
1397 offset = mem_block_ex->pPhysicalOrigLow & (mem_block_ex->AlignmentSize - 1);
1398
1399 if (offset) {
1400 mem_block_ex->pPhysical = (PVOID)((uintptr_t)mem_block_ex->pPhysical +
1401 mem_block_ex->AlignmentSize - offset);
1402 mem_block_ex->pLogical = (PVOID)((uintptr_t)mem_block_ex->pLogical +
1403 mem_block_ex->AlignmentSize - offset);
1404 } /* if (offset) */
1405 } /* if (mem_block_ex->uiLength !=
1406 * mem_block_ex->uiLengthOrig) */
1407 return (1);
1408 }
1409
1410 /* Copied directly from nvnet.c */
1411 static NV_SINT32
1412 nv_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1413 {
1414 MEMORY_BLOCK mem_block;
1415
1416 DEBUGOUT(NV_DEBUG_API, "nv: nv_osfreeex\n");
1417
1418 mem_block.pLogical = mem_block_ex->pLogicalOrig;
1419 mem_block.pPhysical = (PVOID)((uintptr_t)mem_block_ex->pPhysicalOrigLow);
1420 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1421
1422 return (nv_osfree(ctx, &mem_block));
1423 }
1424
1425 /* Clear memory region */
1426 static NV_SINT32
1427 nv_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length)
1428 {
1429 DEBUGOUT(NV_DEBUG_API, "nv: nv_osclear\n");
1430 memset(mem, 0, length);
1431 return (1);
1432 }
1433
1434 /* Sleep for a tick */
1435 static NV_SINT32
1436 nv_osdelay(PNV_VOID ctx, NV_UINT32 usec)
1437 {
1438 if (usec >= 1000000 / hz) {
1439 tsleep(nv_osdelay, 0, "nvdelay", (usec * hz / 1000000) + 1);
1440 } else {
1441 DELAY(usec);
1442 }
1443 return (1);
1444 }
1445
1446 /* Allocate memory for rx buffer */
1447 static NV_SINT32
1448 nv_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id)
1449 {
1450 struct nv_softc *sc = ctx;
1451 struct nv_rx_desc *desc;
1452 struct nv_map_buffer *buf;
1453 int error;
1454
1455 DEBUGOUT(NV_DEBUG_API, "nv: nv_osallocrxbuf\n");
1456
1457 if (sc->pending_rxs == RX_RING_SIZE) {
1458 device_printf(sc->dev, "rx ring buffer is full\n");
1459 goto fail;
1460 }
1461 desc = sc->rx_desc + sc->cur_rx;
1462 buf = &desc->buf;
1463
1464 if (buf->mbuf == NULL) {
1465 buf->mbuf = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1466 if (buf->mbuf == NULL) {
1467 device_printf(sc->dev, "failed to allocate memory\n");
1468 goto fail;
1469 }
1470 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
1471 m_adj(buf->mbuf, ETHER_ALIGN);
1472
1473 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
1474 nv_dmamap_rx_cb, &desc->paddr, 0);
1475 if (error) {
1476 device_printf(sc->dev, "failed to dmamap mbuf\n");
1477 m_freem(buf->mbuf);
1478 buf->mbuf = NULL;
1479 goto fail;
1480 }
1481 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
1482 desc->buflength = buf->mbuf->m_len;
1483 desc->vaddr = mtod(buf->mbuf, PVOID);
1484 }
1485 sc->pending_rxs++;
1486 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE;
1487
1488 mem->pLogical = (void *)desc->vaddr;
1489 mem->pPhysical = (void *)desc->paddr;
1490 mem->uiLength = desc->buflength;
1491 *id = (void *)desc;
1492
1493 return (1);
1494 fail:
1495 return (0);
1496 }
1497
1498
1499 /* Free the rx buffer */
1500 static NV_SINT32
1501 nv_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id)
1502 {
1503 struct nv_softc *sc = ctx;
1504 struct nv_rx_desc *desc;
1505 struct nv_map_buffer *buf;
1506
1507 DEBUGOUT(NV_DEBUG_API, "nv: nv_osfreerxbuf\n");
1508
1509 desc = (struct nv_rx_desc *) id;
1510 buf = &desc->buf;
1511
1512 if (buf->mbuf) {
1513 bus_dmamap_unload(sc->mtag, buf->map);
1514 bus_dmamap_destroy(sc->mtag, buf->map);
1515 m_freem(buf->mbuf);
1516 }
1517 sc->pending_rxs--;
1518 buf->mbuf = NULL;
1519
1520 return (1);
1521 }
1522
1523 /* This gets called by the Nvidia API after our TX packet has been sent */
1524 static NV_SINT32
1525 nv_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success)
1526 {
1527 struct nv_softc *sc = ctx;
1528 struct nv_map_buffer *buf;
1529 struct nv_tx_desc *desc = (struct nv_tx_desc *) id;
1530 struct ifnet *ifp;
1531
1532 DEBUGOUT(NV_DEBUG_API, "nv: nv_ospackettx\n");
1533
1534 ifp = &sc->sc_if;
1535 buf = &desc->buf;
1536 sc->pending_txs--;
1537
1538 /* Unload and free mbuf cluster */
1539 if (buf->mbuf == NULL)
1540 goto fail;
1541
1542 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE);
1543 bus_dmamap_unload(sc->mtag, buf->map);
1544 m_freem(buf->mbuf);
1545 buf->mbuf = NULL;
1546
1547 /*
1548 * Make sure we are clear to go if we previously stalled due
1549 * to a full ring.
1550 */
1551 if (sc->pending_txs < TX_RING_SIZE) {
1552 ifp->if_flags &= ~IFF_OACTIVE;
1553 if (!ifq_is_empty(&ifp->if_snd))
1554 nv_ifstart(ifp);
1555 }
1556 fail:
1557 return (1);
1558 }
1559
1560 /* This gets called by the Nvidia API when a new packet has been received */
1561 /* XXX What is newbuf used for? XXX */
1562 static NV_SINT32
1563 nv_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success,
1564 NV_UINT8 *newbuf, NV_UINT8 priority)
1565 {
1566 struct nv_softc *sc = ctx;
1567 struct ifnet *ifp;
1568 struct nv_rx_desc *desc;
1569 struct nv_map_buffer *buf;
1570 ADAPTER_READ_DATA *readdata;
1571
1572 DEBUGOUT(NV_DEBUG_API, "nv: nv_ospacketrx\n");
1573
1574 ifp = &sc->sc_if;
1575
1576 readdata = (ADAPTER_READ_DATA *) data;
1577 desc = readdata->pvID;
1578 buf = &desc->buf;
1579 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1580
1581 if (success) {
1582 /* Sync DMA bounce buffer. */
1583 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1584
1585 /* First mbuf in packet holds the ethernet and packet headers */
1586 buf->mbuf->m_pkthdr.rcvif = ifp;
1587 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len = readdata->ulTotalLength;
1588
1589 bus_dmamap_unload(sc->mtag, buf->map);
1590
1591 /* Give mbuf to OS. */
1592 ifp->if_input(ifp, buf->mbuf);
1593 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH)
1594 ifp->if_imcasts++;
1595
1596 /* Blat the mbuf pointer, kernel will free the mbuf cluster */
1597 buf->mbuf = NULL;
1598 } else {
1599 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1600 bus_dmamap_unload(sc->mtag, buf->map);
1601 m_freem(buf->mbuf);
1602 buf->mbuf = NULL;
1603 }
1604
1605 sc->cur_rx = desc - sc->rx_desc;
1606 sc->pending_rxs--;
1607
1608 return (1);
1609 }
1610
1611 /* This gets called by NVIDIA API when the PHY link state changes */
1612 static NV_SINT32
1613 nv_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled)
1614 {
1615 DEBUGOUT(NV_DEBUG_API, "nv: nv_oslinkchg\n");
1616
1617 return (1);
1618 }
1619
1620
1621 /* Setup a watchdog timer */
1622 static NV_SINT32
1623 nv_osalloctimer(PNV_VOID ctx, PNV_VOID *timer)
1624 {
1625 struct nv_softc *sc = (struct nv_softc *)ctx;
1626
1627 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_osalloctimer\n");
1628
1629 callout_init(&sc->ostimer);
1630 *timer = &sc->ostimer;
1631
1632 return (1);
1633 }
1634
1635 /* Free the timer */
1636 static NV_SINT32
1637 nv_osfreetimer(PNV_VOID ctx, PNV_VOID timer)
1638 {
1639 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_osfreetimer\n");
1640
1641 return (1);
1642 }
1643
1644 /* Setup timer parameters */
1645 static NV_SINT32
1646 nv_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters)
1647 {
1648 struct nv_softc *sc = (struct nv_softc *)ctx;
1649
1650 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_osinittimer\n");
1651
1652 sc->ostimer_func = func;
1653 sc->ostimer_params = parameters;
1654
1655 return (1);
1656 }
1657
1658 static void
1659 nv_ostimer_callback(void *data)
1660 {
1661 struct nv_softc *sc = data;
1662 struct ifnet *ifp = &sc->sc_if;
1663
1664 lwkt_serialize_enter(ifp->if_serializer);
1665 sc->ostimer_func(sc->ostimer_params);
1666 lwkt_serialize_exit(ifp->if_serializer);
1667 }
1668
1669 /*
1670 * Set the timer to go off
1671 *
1672 * XXX what the hell are the units for 'delay' ? They sure aren't ticks!
1673 */
1674 static NV_SINT32
1675 nv_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay)
1676 {
1677 struct nv_softc *sc = ctx;
1678
1679 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_ossettimer\n");
1680 printf("nv_ossettimer %d\n", (int)delay);
1681
1682 callout_reset(&sc->ostimer, delay, nv_ostimer_callback, sc);
1683
1684 return (1);
1685 }
1686
1687 /* Cancel the timer */
1688 static NV_SINT32
1689 nv_oscanceltimer(PNV_VOID ctx, PNV_VOID timer)
1690 {
1691 struct nv_softc *sc = ctx;
1692
1693 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_oscanceltimer\n");
1694
1695 callout_stop(&sc->ostimer);
1696
1697 return (1);
1698 }
1699
1700 static NV_SINT32
1701 nv_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id, NV_UINT8 *newbuffer,
1702 NV_UINT8 priority)
1703 {
1704 /* Not implemented */
1705 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_ospreprocpkt\n");
1706
1707 return (1);
1708 }
1709
1710 static PNV_VOID
1711 nv_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata)
1712 {
1713 /* Not implemented */
1714 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_ospreprocpkt\n");
1715
1716 return (NULL);
1717 }
1718
1719 static NV_SINT32
1720 nv_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno)
1721 {
1722 /* Not implemented */
1723 DEBUGOUT(NV_DEBUG_BROKEN, "nv: nv_osindicatepkt\n");
1724
1725 return (1);
1726 }
1727
1728 /* Allocate mutex context (already done in nv_attach) */
1729 static NV_SINT32
1730 nv_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock)
1731 {
1732 struct nv_softc *sc = (struct nv_softc *)ctx;
1733
1734 DEBUGOUT(NV_DEBUG_LOCK, "nv: nv_oslockalloc\n");
1735
1736 *pLock = (void **)sc;
1737
1738 return (1);
1739 }
1740
1741 /* Obtain a spin lock */
1742 static NV_SINT32
1743 nv_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1744 {
1745 DEBUGOUT(NV_DEBUG_LOCK, "nv: nv_oslockacquire\n");
1746
1747 return (1);
1748 }
1749
1750 /* Release lock */
1751 static NV_SINT32
1752 nv_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1753 {
1754 DEBUGOUT(NV_DEBUG_LOCK, "nv: nv_oslockrelease\n");
1755
1756 return (1);
1757 }
1758
1759 /* I have no idea what this is for */
1760 static PNV_VOID
1761 nv_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata)
1762 {
1763 /* Not implemented */
1764 DEBUGOUT(NV_DEBUG_LOCK, "nv: nv_osreturnbufvirt\n");
1765 panic("nv: nv_osreturnbufvirtual not implemented\n");
1766
1767 return (NULL);
1768 }
1769
1770
1771 /* --- End on NVOSAPI interface --- */
DragonFly BSD