2 * Copyright 2009 Jerome Glisse.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Jerome Glisse
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_BENCHMARK_COPY_BLIT 1
30 #define RADEON_BENCHMARK_COPY_DMA 0
32 #define RADEON_BENCHMARK_ITERATIONS 1024
33 #define RADEON_BENCHMARK_COMMON_MODES_N 17
35 static int radeon_benchmark_do_move(struct radeon_device
*rdev
, unsigned size
,
36 uint64_t saddr
, uint64_t daddr
,
39 unsigned long start_jiffies
;
40 unsigned long end_jiffies
;
41 struct radeon_fence
*fence
= NULL
;
44 start_jiffies
= jiffies
;
45 for (i
= 0; i
< n
; i
++) {
47 case RADEON_BENCHMARK_COPY_DMA
:
48 fence
= radeon_copy_dma(rdev
, saddr
, daddr
,
49 size
/ RADEON_GPU_PAGE_SIZE
,
52 case RADEON_BENCHMARK_COPY_BLIT
:
53 fence
= radeon_copy_blit(rdev
, saddr
, daddr
,
54 size
/ RADEON_GPU_PAGE_SIZE
,
58 DRM_ERROR("Unknown copy method\n");
62 return PTR_ERR(fence
);
64 r
= radeon_fence_wait(fence
, false);
65 radeon_fence_unref(&fence
);
69 end_jiffies
= jiffies
;
70 return jiffies_to_msecs(end_jiffies
- start_jiffies
);
74 static void radeon_benchmark_log_results(int n
, unsigned size
,
76 unsigned sdomain
, unsigned ddomain
,
79 unsigned int throughput
= (n
* (size
>> 10)) / time
;
80 DRM_INFO("radeon: %s %u bo moves of %u kB from"
81 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
82 kind
, n
, size
>> 10, sdomain
, ddomain
, time
,
83 throughput
* 8, throughput
);
86 static void radeon_benchmark_move(struct radeon_device
*rdev
, unsigned size
,
87 unsigned sdomain
, unsigned ddomain
)
89 struct radeon_bo
*dobj
= NULL
;
90 struct radeon_bo
*sobj
= NULL
;
91 uint64_t saddr
, daddr
;
95 n
= RADEON_BENCHMARK_ITERATIONS
;
96 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true, sdomain
, 0, NULL
, &sobj
);
100 r
= radeon_bo_reserve(sobj
, false);
101 if (unlikely(r
!= 0))
103 r
= radeon_bo_pin(sobj
, sdomain
, (u64
*)&saddr
);
104 radeon_bo_unreserve(sobj
);
108 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true, ddomain
, 0, NULL
, &dobj
);
112 r
= radeon_bo_reserve(dobj
, false);
113 if (unlikely(r
!= 0))
115 r
= radeon_bo_pin(dobj
, ddomain
, (u64
*)&daddr
);
116 radeon_bo_unreserve(dobj
);
121 if (rdev
->asic
->copy
.dma
) {
122 time
= radeon_benchmark_do_move(rdev
, size
, saddr
, daddr
,
123 RADEON_BENCHMARK_COPY_DMA
, n
);
127 radeon_benchmark_log_results(n
, size
, time
,
128 sdomain
, ddomain
, "dma");
131 if (rdev
->asic
->copy
.blit
) {
132 time
= radeon_benchmark_do_move(rdev
, size
, saddr
, daddr
,
133 RADEON_BENCHMARK_COPY_BLIT
, n
);
137 radeon_benchmark_log_results(n
, size
, time
,
138 sdomain
, ddomain
, "blit");
143 r
= radeon_bo_reserve(sobj
, false);
144 if (likely(r
== 0)) {
145 radeon_bo_unpin(sobj
);
146 radeon_bo_unreserve(sobj
);
148 radeon_bo_unref(&sobj
);
151 r
= radeon_bo_reserve(dobj
, false);
152 if (likely(r
== 0)) {
153 radeon_bo_unpin(dobj
);
154 radeon_bo_unreserve(dobj
);
156 radeon_bo_unref(&dobj
);
160 DRM_ERROR("Error while benchmarking BO move.\n");
164 void radeon_benchmark(struct radeon_device
*rdev
, int test_number
)
167 int common_modes
[RADEON_BENCHMARK_COMMON_MODES_N
] = {
187 switch (test_number
) {
189 /* simple test, VRAM to GTT and GTT to VRAM */
190 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_GTT
,
191 RADEON_GEM_DOMAIN_VRAM
);
192 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_VRAM
,
193 RADEON_GEM_DOMAIN_GTT
);
196 /* simple test, VRAM to VRAM */
197 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_VRAM
,
198 RADEON_GEM_DOMAIN_VRAM
);
201 /* GTT to VRAM, buffer size sweep, powers of 2 */
202 for (i
= 1; i
<= 16384; i
<<= 1)
203 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
204 RADEON_GEM_DOMAIN_GTT
,
205 RADEON_GEM_DOMAIN_VRAM
);
208 /* VRAM to GTT, buffer size sweep, powers of 2 */
209 for (i
= 1; i
<= 16384; i
<<= 1)
210 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
211 RADEON_GEM_DOMAIN_VRAM
,
212 RADEON_GEM_DOMAIN_GTT
);
215 /* VRAM to VRAM, buffer size sweep, powers of 2 */
216 for (i
= 1; i
<= 16384; i
<<= 1)
217 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
218 RADEON_GEM_DOMAIN_VRAM
,
219 RADEON_GEM_DOMAIN_VRAM
);
222 /* GTT to VRAM, buffer size sweep, common modes */
223 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
224 radeon_benchmark_move(rdev
, common_modes
[i
],
225 RADEON_GEM_DOMAIN_GTT
,
226 RADEON_GEM_DOMAIN_VRAM
);
229 /* VRAM to GTT, buffer size sweep, common modes */
230 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
231 radeon_benchmark_move(rdev
, common_modes
[i
],
232 RADEON_GEM_DOMAIN_VRAM
,
233 RADEON_GEM_DOMAIN_GTT
);
236 /* VRAM to VRAM, buffer size sweep, common modes */
237 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
238 radeon_benchmark_move(rdev
, common_modes
[i
],
239 RADEON_GEM_DOMAIN_VRAM
,
240 RADEON_GEM_DOMAIN_VRAM
);
244 DRM_ERROR("Unknown benchmark\n");