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Try to do a better job aborting active requests when a usb mass storage
[dragonfly.git] / sys / bus / usb / uhci.c
blob8776797094b6f22689bf3e473323a96989d98fbf
1 /* $NetBSD: uhci.c,v 1.170 2003/02/19 01:35:04 augustss Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.162.2.1 2006/03/01 01:59:04 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/uhci.c,v 1.30 2008/10/18 01:17:53 dillon Exp $ */
4
5 /* Also already incorporated from NetBSD:
6 * $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $
7 * $NetBSD: uhci.c,v 1.173 2003/05/13 04:41:59 gson Exp $
8 * $NetBSD: uhci.c,v 1.175 2003/09/12 16:18:08 mycroft Exp $
9 * $NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $
10 * $NetBSD: uhci.c,v 1.177 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: uhci.c,v 1.178 2004/03/02 16:32:05 martin Exp $
12 * $NetBSD: uhci.c,v 1.180 2004/07/17 20:12:03 mycroft Exp $
13 */
14
15 /*
16 * Copyright (c) 1998 The NetBSD Foundation, Inc.
17 * All rights reserved.
18 *
19 * This code is derived from software contributed to The NetBSD Foundation
20 * by Lennart Augustsson (lennart@augustsson.net) at
21 * Carlstedt Research & Technology.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * This product includes software developed by the NetBSD
34 * Foundation, Inc. and its contributors.
35 * 4. Neither the name of The NetBSD Foundation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
40 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
41 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52 /*
53 * USB Universal Host Controller driver.
54 * Handles e.g. PIIX3 and PIIX4.
55 *
56 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
57 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
59 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
60 */
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/kernel.h>
65 #include <sys/malloc.h>
66 #include <sys/endian.h>
67 #include <sys/module.h>
68 #include <sys/bus.h>
69 #if defined(DIAGNOSTIC) && defined(__i386__)
70 #include <machine/cpu.h>
71 #endif
72 #include <sys/proc.h>
73 #include <sys/queue.h>
74 #include <sys/sysctl.h>
75 #include <sys/thread2.h>
76
77 #include <machine/endian.h>
78
79 #include <bus/usb/usb.h>
80 #include <bus/usb/usbdi.h>
81 #include <bus/usb/usbdivar.h>
82 #include <bus/usb/usb_mem.h>
83 #include <bus/usb/usb_quirks.h>
84
85 #include <bus/usb/uhcireg.h>
86 #include <bus/usb/uhcivar.h>
87
88 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
89 /*#define UHCI_CTL_LOOP */
90
91 #define delay(d) DELAY(d)
92
93 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
94
95 #ifdef USB_DEBUG
96 uhci_softc_t *thesc;
97 #define DPRINTF(x) if (uhcidebug) kprintf x
98 #define DPRINTFN(n,x) if (uhcidebug>(n)) kprintf x
99 int uhcidebug = 0;
100 int uhcinoloop = 0;
101 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
102 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
103 &uhcidebug, 0, "uhci debug level");
104 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
105 &uhcinoloop, 0, "uhci noloop");
106 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
107 #else
108 #define DPRINTF(x)
109 #define DPRINTFN(n,x)
110 #endif
111
112 struct uhci_pipe {
113 struct usbd_pipe pipe;
114 int nexttoggle;
115
116 u_char aborting;
117 usbd_xfer_handle abortstart, abortend;
118
119 /* Info needed for different pipe kinds. */
120 union {
121 /* Control pipe */
122 struct {
123 uhci_soft_qh_t *sqh;
124 usb_dma_t reqdma;
125 uhci_soft_td_t *setup, *stat;
126 u_int length;
127 } ctl;
128 /* Interrupt pipe */
129 struct {
130 int npoll;
131 int isread;
132 uhci_soft_qh_t **qhs;
133 } intr;
134 /* Bulk pipe */
135 struct {
136 uhci_soft_qh_t *sqh;
137 u_int length;
138 int isread;
139 } bulk;
140 /* Iso pipe */
141 struct iso {
142 uhci_soft_td_t **stds;
143 int next, inuse;
144 } iso;
145 } u;
146 };
147
148 static void uhci_globalreset(uhci_softc_t *);
149 static usbd_status uhci_portreset(uhci_softc_t*, int);
150 static void uhci_reset(uhci_softc_t *);
151 static usbd_status uhci_run(uhci_softc_t *, int run);
152 static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
153 static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
154 static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
155 static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
156 #if 0
157 static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
158 uhci_intr_info_t *);
159 static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
160 #endif
161
162 static void uhci_free_std_chain(uhci_softc_t *,
163 uhci_soft_td_t *, uhci_soft_td_t *);
164 static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
165 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
166 uhci_soft_td_t **, uhci_soft_td_t **);
167 static void uhci_poll_hub(void *);
168 static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
169 static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
170 static void uhci_idone(uhci_intr_info_t *);
171
172 static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
173
174 static void uhci_timeout(void *);
175 static void uhci_timeout_task(void *);
176 static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
177 static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
178 static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
179 static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
180 static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
181 static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
182 static int uhci_str(usb_string_descriptor_t *, int, char *);
183 static void uhci_add_loop(uhci_softc_t *sc);
184 static void uhci_rem_loop(uhci_softc_t *sc);
185
186 static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
187 static void uhci_device_isoc_enter(usbd_xfer_handle);
188
189 static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
190 static void uhci_freem(struct usbd_bus *, usb_dma_t *);
191
192 static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
193 static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
194
195 static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
196 static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
197 static void uhci_device_ctrl_abort(usbd_xfer_handle);
198 static void uhci_device_ctrl_close(usbd_pipe_handle);
199 static void uhci_device_ctrl_done(usbd_xfer_handle);
200
201 static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
202 static usbd_status uhci_device_intr_start(usbd_xfer_handle);
203 static void uhci_device_intr_abort(usbd_xfer_handle);
204 static void uhci_device_intr_close(usbd_pipe_handle);
205 static void uhci_device_intr_done(usbd_xfer_handle);
206
207 static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
208 static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
209 static void uhci_device_bulk_abort(usbd_xfer_handle);
210 static void uhci_device_bulk_close(usbd_pipe_handle);
211 static void uhci_device_bulk_done(usbd_xfer_handle);
212
213 static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
214 static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
215 static void uhci_device_isoc_abort(usbd_xfer_handle);
216 static void uhci_device_isoc_close(usbd_pipe_handle);
217 static void uhci_device_isoc_done(usbd_xfer_handle);
218
219 static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
220 static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
221 static void uhci_root_ctrl_abort(usbd_xfer_handle);
222 static void uhci_root_ctrl_close(usbd_pipe_handle);
223 static void uhci_root_ctrl_done(usbd_xfer_handle);
224
225 static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
226 static usbd_status uhci_root_intr_start(usbd_xfer_handle);
227 static void uhci_root_intr_abort(usbd_xfer_handle);
228 static void uhci_root_intr_close(usbd_pipe_handle);
229 static void uhci_root_intr_done(usbd_xfer_handle);
230
231 static usbd_status uhci_open(usbd_pipe_handle);
232 static void uhci_poll(struct usbd_bus *);
233 static void uhci_softintr(void *);
234
235 static usbd_status uhci_device_request(usbd_xfer_handle xfer);
236
237 static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
238 static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
239 static usbd_status uhci_device_setintr(uhci_softc_t *sc,
240 struct uhci_pipe *pipe, int ival);
241
242 static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
243 static void uhci_noop(usbd_pipe_handle pipe);
244
245 static __inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
246 uhci_soft_qh_t *);
247
248 #ifdef USB_DEBUG
249 static void uhci_dump_all(uhci_softc_t *);
250 static void uhci_dumpregs(uhci_softc_t *);
251 static void uhci_dump_qhs(uhci_soft_qh_t *);
252 static void uhci_dump_qh(uhci_soft_qh_t *);
253 static void uhci_dump_tds(uhci_soft_td_t *);
254 static void uhci_dump_td(uhci_soft_td_t *);
255 static void uhci_dump_ii(uhci_intr_info_t *ii);
256 void uhci_dump(void);
257 #endif
258
259 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
260 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
261 #define UWRITE1(sc, r, x) \
262 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
263 } while (/*CONSTCOND*/0)
264 #define UWRITE2(sc, r, x) \
265 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
266 } while (/*CONSTCOND*/0)
267 #define UWRITE4(sc, r, x) \
268 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
269 } while (/*CONSTCOND*/0)
270 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
271 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
272 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
273
274 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
275 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
276
277 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
278
279 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
280
281 #define UHCI_INTR_ENDPT 1
282
283 struct usbd_bus_methods uhci_bus_methods = {
284 uhci_open,
285 uhci_softintr,
286 uhci_poll,
287 uhci_allocm,
288 uhci_freem,
289 uhci_allocx,
290 uhci_freex,
291 };
292
293 struct usbd_pipe_methods uhci_root_ctrl_methods = {
294 uhci_root_ctrl_transfer,
295 uhci_root_ctrl_start,
296 uhci_root_ctrl_abort,
297 uhci_root_ctrl_close,
298 uhci_noop,
299 uhci_root_ctrl_done,
300 };
301
302 struct usbd_pipe_methods uhci_root_intr_methods = {
303 uhci_root_intr_transfer,
304 uhci_root_intr_start,
305 uhci_root_intr_abort,
306 uhci_root_intr_close,
307 uhci_noop,
308 uhci_root_intr_done,
309 };
310
311 struct usbd_pipe_methods uhci_device_ctrl_methods = {
312 uhci_device_ctrl_transfer,
313 uhci_device_ctrl_start,
314 uhci_device_ctrl_abort,
315 uhci_device_ctrl_close,
316 uhci_noop,
317 uhci_device_ctrl_done,
318 };
319
320 struct usbd_pipe_methods uhci_device_intr_methods = {
321 uhci_device_intr_transfer,
322 uhci_device_intr_start,
323 uhci_device_intr_abort,
324 uhci_device_intr_close,
325 uhci_device_clear_toggle,
326 uhci_device_intr_done,
327 };
328
329 struct usbd_pipe_methods uhci_device_bulk_methods = {
330 uhci_device_bulk_transfer,
331 uhci_device_bulk_start,
332 uhci_device_bulk_abort,
333 uhci_device_bulk_close,
334 uhci_device_clear_toggle,
335 uhci_device_bulk_done,
336 };
337
338 struct usbd_pipe_methods uhci_device_isoc_methods = {
339 uhci_device_isoc_transfer,
340 uhci_device_isoc_start,
341 uhci_device_isoc_abort,
342 uhci_device_isoc_close,
343 uhci_noop,
344 uhci_device_isoc_done,
345 };
346
347 #define uhci_add_intr_info(sc, ii) \
348 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
349 #define uhci_del_intr_info(ii) \
350 do { \
351 LIST_REMOVE((ii), list); \
352 (ii)->list.le_prev = NULL; \
353 } while (0)
354 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
355
356 static __inline uhci_soft_qh_t *
357 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
358 {
359 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
360
361 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
362 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
363 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
364 kprintf("uhci_find_prev_qh: QH not found\n");
365 return (NULL);
366 }
367 #endif
368 }
369 return (pqh);
370 }
371
372 void
373 uhci_globalreset(uhci_softc_t *sc)
374 {
375 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
376 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
377 UHCICMD(sc, 0); /* do nothing */
378 }
379
380 usbd_status
381 uhci_init(uhci_softc_t *sc)
382 {
383 usbd_status err;
384 int i, j;
385 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
386 uhci_soft_td_t *std;
387
388 DPRINTFN(1,("uhci_init: start\n"));
389
390 #ifdef USB_DEBUG
391 thesc = sc;
392
393 if (uhcidebug > 2)
394 uhci_dumpregs(sc);
395 #endif
396
397 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
398 uhci_globalreset(sc); /* reset the controller */
399 uhci_reset(sc);
400
401 /* Allocate and initialize real frame array. */
402 err = usb_allocmem(&sc->sc_bus,
403 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
404 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
405 if (err)
406 return (err);
407 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
408 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
409 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
410
411 /*
412 * Allocate a TD, inactive, that hangs from the last QH.
413 * This is to avoid a bug in the PIIX that makes it run berserk
414 * otherwise.
415 */
416 std = uhci_alloc_std(sc);
417 if (std == NULL)
418 return (USBD_NOMEM);
419 std->link.std = NULL;
420 std->td.td_link = htole32(UHCI_PTR_T);
421 std->td.td_status = htole32(0); /* inactive */
422 std->td.td_token = htole32(0);
423 std->td.td_buffer = htole32(0);
424
425 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
426 lsqh = uhci_alloc_sqh(sc);
427 if (lsqh == NULL)
428 return (USBD_NOMEM);
429 lsqh->hlink = NULL;
430 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
431 lsqh->elink = std;
432 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
433 sc->sc_last_qh = lsqh;
434
435 /* Allocate the dummy QH where bulk traffic will be queued. */
436 bsqh = uhci_alloc_sqh(sc);
437 if (bsqh == NULL)
438 return (USBD_NOMEM);
439 bsqh->hlink = lsqh;
440 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
441 bsqh->elink = NULL;
442 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
443 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
444
445 /* Allocate dummy QH where high speed control traffic will be queued. */
446 chsqh = uhci_alloc_sqh(sc);
447 if (chsqh == NULL)
448 return (USBD_NOMEM);
449 chsqh->hlink = bsqh;
450 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
451 chsqh->elink = NULL;
452 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
453 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
454
455 /* Allocate dummy QH where control traffic will be queued. */
456 clsqh = uhci_alloc_sqh(sc);
457 if (clsqh == NULL)
458 return (USBD_NOMEM);
459 clsqh->hlink = chsqh;
460 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
461 clsqh->elink = NULL;
462 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
463 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
464
465 /*
466 * Make all (virtual) frame list pointers point to the interrupt
467 * queue heads and the interrupt queue heads at the control
468 * queue head and point the physical frame list to the virtual.
469 */
470 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
471 std = uhci_alloc_std(sc);
472 sqh = uhci_alloc_sqh(sc);
473 if (std == NULL || sqh == NULL)
474 return (USBD_NOMEM);
475 std->link.sqh = sqh;
476
477 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
478 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
479 std->td.td_token = htole32(0);
480 std->td.td_buffer = htole32(0);
481 sqh->hlink = clsqh;
482 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
483 sqh->elink = NULL;
484 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
485 sc->sc_vframes[i].htd = std;
486 sc->sc_vframes[i].etd = std;
487 sc->sc_vframes[i].hqh = sqh;
488 sc->sc_vframes[i].eqh = sqh;
489 for (j = i;
490 j < UHCI_FRAMELIST_COUNT;
491 j += UHCI_VFRAMELIST_COUNT) {
492 sc->sc_pframes[j] = htole32(std->physaddr);
493 }
494 }
495
496 LIST_INIT(&sc->sc_intrhead);
497
498 STAILQ_INIT(&sc->sc_free_xfers);
499
500 callout_init(&sc->sc_poll_handle);
501
502 /* Set up the bus struct. */
503 sc->sc_bus.methods = &uhci_bus_methods;
504 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
505
506 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
507
508 DPRINTFN(1,("uhci_init: enabling\n"));
509 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
510 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
511
512 return (uhci_run(sc, 1)); /* and here we go... */
513 }
514
515 int
516 uhci_detach(struct uhci_softc *sc, int flags)
517 {
518 usbd_xfer_handle xfer;
519 int rv = 0;
520
521 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
522 uhci_run(sc, 0);
523
524 /* Free all xfers associated with this HC. */
525 for (;;) {
526 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
527 if (xfer == NULL)
528 break;
529 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
530 kfree(xfer, M_USB);
531 }
532
533 /* XXX free other data structures XXX */
534 usb_freemem(&sc->sc_bus, &sc->sc_dma);
535
536 return (rv);
537 }
538
539 usbd_status
540 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
541 {
542 return (usb_allocmem(bus, size, 0, dma));
543 }
544
545 void
546 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
547 {
548 usb_freemem(bus, dma);
549 }
550
551 usbd_xfer_handle
552 uhci_allocx(struct usbd_bus *bus)
553 {
554 struct uhci_softc *sc = (struct uhci_softc *)bus;
555 usbd_xfer_handle xfer;
556
557 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
558 if (xfer != NULL) {
559 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
560 #ifdef DIAGNOSTIC
561 if (xfer->busy_free != XFER_FREE) {
562 kprintf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
563 xfer->busy_free);
564 }
565 #endif
566 } else {
567 xfer = kmalloc(sizeof(struct uhci_xfer), M_USB, M_INTWAIT);
568 }
569 if (xfer != NULL) {
570 memset(xfer, 0, sizeof (struct uhci_xfer));
571 UXFER(xfer)->iinfo.sc = sc;
572 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
573 xfer);
574 UXFER(xfer)->uhci_xfer_flags = 0;
575 #ifdef DIAGNOSTIC
576 UXFER(xfer)->iinfo.isdone = 1;
577 xfer->busy_free = XFER_BUSY;
578 #endif
579 }
580 return (xfer);
581 }
582
583 void
584 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
585 {
586 struct uhci_softc *sc = (struct uhci_softc *)bus;
587
588 #ifdef DIAGNOSTIC
589 if (xfer->busy_free != XFER_BUSY) {
590 kprintf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
591 xfer->busy_free);
592 return;
593 }
594 xfer->busy_free = XFER_FREE;
595 if (!UXFER(xfer)->iinfo.isdone) {
596 kprintf("uhci_freex: !isdone\n");
597 return;
598 }
599 #endif
600 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
601 }
602
603 /*
604 * Shut down the controller when the system is going down.
605 */
606 void
607 uhci_shutdown(void *v)
608 {
609 uhci_softc_t *sc = v;
610
611 DPRINTF(("uhci_shutdown: stopping the HC\n"));
612 uhci_run(sc, 0); /* stop the controller */
613 }
614
615 /*
616 * Handle suspend/resume.
617 *
618 * We need to switch to polling mode here, because this routine is
619 * called from an interrupt context. This is all right since we
620 * are almost suspended anyway.
621 */
622 void
623 uhci_power(int why, void *v)
624 {
625 uhci_softc_t *sc = v;
626 int cmd;
627
628 crit_enter();
629 cmd = UREAD2(sc, UHCI_CMD);
630
631 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
632 sc, why, sc->sc_suspend, cmd));
633
634 if (why != PWR_RESUME) {
635 #ifdef USB_DEBUG
636 if (uhcidebug > 2)
637 uhci_dumpregs(sc);
638 #endif
639 if (sc->sc_intr_xfer != NULL)
640 callout_stop(&sc->sc_poll_handle);
641 sc->sc_bus.use_polling++;
642 uhci_run(sc, 0); /* stop the controller */
643
644 /* save some state if BIOS doesn't */
645 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
646 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
647
648 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
649
650 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
651 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
652 sc->sc_suspend = why;
653 sc->sc_bus.use_polling--;
654 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
655 } else {
656 #ifdef DIAGNOSTIC
657 if (sc->sc_suspend == PWR_RESUME)
658 kprintf("uhci_power: weird, resume without suspend.\n");
659 #endif
660 sc->sc_bus.use_polling++;
661 sc->sc_suspend = why;
662 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
663 uhci_globalreset(sc); /* reset the controller */
664 uhci_reset(sc);
665 if (cmd & UHCI_CMD_RS)
666 uhci_run(sc, 0); /* in case BIOS has started it */
667
668 uhci_globalreset(sc);
669 uhci_reset(sc);
670
671 /* restore saved state */
672 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
673 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
674 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
675
676 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
677 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
678 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
679 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
680 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
681 UHCICMD(sc, UHCI_CMD_MAXP);
682 uhci_run(sc, 1); /* and start traffic again */
683 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
684 sc->sc_bus.use_polling--;
685 if (sc->sc_intr_xfer != NULL)
686 callout_reset(&sc->sc_poll_handle, sc->sc_ival,
687 uhci_poll_hub, sc->sc_intr_xfer);
688 #ifdef USB_DEBUG
689 if (uhcidebug > 2)
690 uhci_dumpregs(sc);
691 #endif
692 }
693 crit_exit();
694 }
695
696 #ifdef USB_DEBUG
697 static void
698 uhci_dumpregs(uhci_softc_t *sc)
699 {
700 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
701 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
702 device_get_nameunit(sc->sc_bus.bdev),
703 UREAD2(sc, UHCI_CMD),
704 UREAD2(sc, UHCI_STS),
705 UREAD2(sc, UHCI_INTR),
706 UREAD2(sc, UHCI_FRNUM),
707 UREAD4(sc, UHCI_FLBASEADDR),
708 UREAD1(sc, UHCI_SOF),
709 UREAD2(sc, UHCI_PORTSC1),
710 UREAD2(sc, UHCI_PORTSC2)));
711 }
712
713 void
714 uhci_dump_td(uhci_soft_td_t *p)
715 {
716 char sbuf[128], sbuf2[128];
717
718 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
719 "token=0x%08lx buffer=0x%08lx\n",
720 p, (long)p->physaddr,
721 (long)le32toh(p->td.td_link),
722 (long)le32toh(p->td.td_status),
723 (long)le32toh(p->td.td_token),
724 (long)le32toh(p->td.td_buffer)));
725
726 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
727 sbuf, sizeof(sbuf));
728 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
729 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
730 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
731 sbuf2, sizeof(sbuf2));
732
733 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
734 "D=%d,maxlen=%d\n", sbuf, sbuf2,
735 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
736 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
737 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
738 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
739 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
740 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
741 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
742 }
743
744 void
745 uhci_dump_qh(uhci_soft_qh_t *sqh)
746 {
747 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
748 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
749 le32toh(sqh->qh.qh_elink)));
750 }
751
752 #if 1
753 void
754 uhci_dump(void)
755 {
756 uhci_dump_all(thesc);
757 }
758 #endif
759
760 void
761 uhci_dump_all(uhci_softc_t *sc)
762 {
763 uhci_dumpregs(sc);
764 kprintf("intrs=%d\n", sc->sc_bus.no_intrs);
765 /*kprintf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
766 uhci_dump_qh(sc->sc_lctl_start);
767 }
768
769 void
770 uhci_dump_qhs(uhci_soft_qh_t *sqh)
771 {
772 uhci_dump_qh(sqh);
773
774 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
775 * Traverses sideways first, then down.
776 *
777 * QH1
778 * QH2
779 * No QH
780 * TD2.1
781 * TD2.2
782 * TD1.1
783 * etc.
784 *
785 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
786 */
787
788
789 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
790 uhci_dump_qhs(sqh->hlink);
791 else
792 DPRINTF(("No QH\n"));
793
794 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
795 uhci_dump_tds(sqh->elink);
796 else
797 DPRINTF(("No TD\n"));
798 }
799
800 void
801 uhci_dump_tds(uhci_soft_td_t *std)
802 {
803 uhci_soft_td_t *td;
804
805 for(td = std; td != NULL; td = td->link.std) {
806 uhci_dump_td(td);
807
808 /* Check whether the link pointer in this TD marks
809 * the link pointer as end of queue. This avoids
810 * printing the free list in case the queue/TD has
811 * already been moved there (seatbelt).
812 */
813 if (le32toh(td->td.td_link) & UHCI_PTR_T ||
814 le32toh(td->td.td_link) == 0)
815 break;
816 }
817 }
818
819 static void
820 uhci_dump_ii(uhci_intr_info_t *ii)
821 {
822 usbd_pipe_handle pipe;
823 usb_endpoint_descriptor_t *ed;
824 usbd_device_handle dev;
825
826 #ifdef DIAGNOSTIC
827 #define DONE ii->isdone
828 #else
829 #define DONE 0
830 #endif
831 if (ii == NULL) {
832 kprintf("ii NULL\n");
833 return;
834 }
835 if (ii->xfer == NULL) {
836 kprintf("ii %p: done=%d xfer=NULL\n",
837 ii, DONE);
838 return;
839 }
840 pipe = ii->xfer->pipe;
841 if (pipe == NULL) {
842 kprintf("ii %p: done=%d xfer=%p pipe=NULL\n",
843 ii, DONE, ii->xfer);
844 return;
845 }
846 if (pipe->endpoint == NULL) {
847 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
848 ii, DONE, ii->xfer, pipe);
849 return;
850 }
851 if (pipe->device == NULL) {
852 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
853 ii, DONE, ii->xfer, pipe);
854 return;
855 }
856 ed = pipe->endpoint->edesc;
857 dev = pipe->device;
858 kprintf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
859 ii, DONE, ii->xfer, dev,
860 UGETW(dev->ddesc.idVendor),
861 UGETW(dev->ddesc.idProduct),
862 dev->address, pipe,
863 ed->bEndpointAddress, ed->bmAttributes);
864 #undef DONE
865 }
866
867 void uhci_dump_iis(struct uhci_softc *sc);
868 void
869 uhci_dump_iis(struct uhci_softc *sc)
870 {
871 uhci_intr_info_t *ii;
872
873 kprintf("intr_info list:\n");
874 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
875 uhci_dump_ii(ii);
876 }
877
878 void iidump(void);
879 void iidump(void) { uhci_dump_iis(thesc); }
880
881 #endif
882
883 /*
884 * This routine is executed periodically and simulates interrupts
885 * from the root controller interrupt pipe for port status change.
886 */
887 void
888 uhci_poll_hub(void *addr)
889 {
890 usbd_xfer_handle xfer = addr;
891 usbd_pipe_handle pipe = xfer->pipe;
892 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
893 u_char *p;
894
895 DPRINTFN(20, ("uhci_poll_hub\n"));
896
897 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
898
899 p = KERNADDR(&xfer->dmabuf, 0);
900 p[0] = 0;
901 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
902 p[0] |= 1<<1;
903 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
904 p[0] |= 1<<2;
905 if (p[0] == 0)
906 /* No change, try again in a while */
907 return;
908
909 xfer->actlen = 1;
910 xfer->status = USBD_NORMAL_COMPLETION;
911 crit_enter();
912 xfer->device->bus->intr_context++;
913 usb_transfer_complete(xfer);
914 xfer->device->bus->intr_context--;
915 crit_exit();
916 }
917
918 void
919 uhci_root_intr_done(usbd_xfer_handle xfer)
920 {
921 }
922
923 void
924 uhci_root_ctrl_done(usbd_xfer_handle xfer)
925 {
926 }
927
928 /*
929 * Let the last QH loop back to the high speed control transfer QH.
930 * This is what intel calls "bandwidth reclamation" and improves
931 * USB performance a lot for some devices.
932 * If we are already looping, just count it.
933 */
934 void
935 uhci_add_loop(uhci_softc_t *sc) {
936 #ifdef USB_DEBUG
937 if (uhcinoloop)
938 return;
939 #endif
940 if (++sc->sc_loops == 1) {
941 DPRINTFN(5,("uhci_start_loop: add\n"));
942 /* Note, we don't loop back the soft pointer. */
943 sc->sc_last_qh->qh.qh_hlink =
944 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
945 }
946 }
947
948 void
949 uhci_rem_loop(uhci_softc_t *sc) {
950 #ifdef USB_DEBUG
951 if (uhcinoloop)
952 return;
953 #endif
954 if (--sc->sc_loops == 0) {
955 DPRINTFN(5,("uhci_end_loop: remove\n"));
956 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
957 }
958 }
959
960 /* Add high speed control QH, called from a critical section. */
961 void
962 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
963 {
964 uhci_soft_qh_t *eqh;
965
966 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
967 eqh = sc->sc_hctl_end;
968 sqh->hlink = eqh->hlink;
969 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
970 eqh->hlink = sqh;
971 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
972 sc->sc_hctl_end = sqh;
973 #ifdef UHCI_CTL_LOOP
974 uhci_add_loop(sc);
975 #endif
976 }
977
978 /* Remove high speed control QH, called from a critical section. */
979 void
980 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
981 {
982 uhci_soft_qh_t *pqh;
983
984 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
985 #ifdef UHCI_CTL_LOOP
986 uhci_rem_loop(sc);
987 #endif
988 /*
989 * The T bit should be set in the elink of the QH so that the HC
990 * doesn't follow the pointer. This condition may fail if the
991 * the transferred packet was short so that the QH still points
992 * at the last used TD.
993 * In this case we set the T bit and wait a little for the HC
994 * to stop looking at the TD.
995 */
996 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
997 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
998 delay(UHCI_QH_REMOVE_DELAY);
999 }
1000
1001 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1002 pqh->hlink = sqh->hlink;
1003 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1004 delay(UHCI_QH_REMOVE_DELAY);
1005 if (sc->sc_hctl_end == sqh)
1006 sc->sc_hctl_end = pqh;
1007 }
1008
1009 /* Add low speed control QH, called from a critical section. */
1010 void
1011 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1012 {
1013 uhci_soft_qh_t *eqh;
1014
1015 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1016 eqh = sc->sc_lctl_end;
1017 sqh->hlink = eqh->hlink;
1018 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1019 eqh->hlink = sqh;
1020 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1021 sc->sc_lctl_end = sqh;
1022 }
1023
1024 /* Remove low speed control QH, called from a critical section. */
1025 void
1026 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1027 {
1028 uhci_soft_qh_t *pqh;
1029
1030 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1031 /* See comment in uhci_remove_hs_ctrl() */
1032 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1033 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1034 delay(UHCI_QH_REMOVE_DELAY);
1035 }
1036 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1037 pqh->hlink = sqh->hlink;
1038 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1039 delay(UHCI_QH_REMOVE_DELAY);
1040 if (sc->sc_lctl_end == sqh)
1041 sc->sc_lctl_end = pqh;
1042 }
1043
1044 /* Add bulk QH, called from a critical section. */
1045 void
1046 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1047 {
1048 uhci_soft_qh_t *eqh;
1049
1050 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1051 eqh = sc->sc_bulk_end;
1052 sqh->hlink = eqh->hlink;
1053 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1054 eqh->hlink = sqh;
1055 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1056 sc->sc_bulk_end = sqh;
1057 uhci_add_loop(sc);
1058 }
1059
1060 /* Remove bulk QH, called from a critical section. */
1061 void
1062 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1063 {
1064 uhci_soft_qh_t *pqh;
1065
1066 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1067 uhci_rem_loop(sc);
1068 /* See comment in uhci_remove_hs_ctrl() */
1069 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1070 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1071 delay(UHCI_QH_REMOVE_DELAY);
1072 }
1073 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1074 pqh->hlink = sqh->hlink;
1075 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1076 delay(UHCI_QH_REMOVE_DELAY);
1077 if (sc->sc_bulk_end == sqh)
1078 sc->sc_bulk_end = pqh;
1079 }
1080
1081 static int uhci_intr1(uhci_softc_t *);
1082
1083 int
1084 uhci_intr(void *arg)
1085 {
1086 uhci_softc_t *sc = arg;
1087
1088 if (sc->sc_dying || (sc->sc_flags & UHCI_SCFLG_DONEINIT) == 0)
1089 return (0);
1090
1091 DPRINTFN(15,("uhci_intr: real interrupt\n"));
1092 if (sc->sc_bus.use_polling) {
1093 #ifdef DIAGNOSTIC
1094 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1095 #endif
1096 return (0);
1097 }
1098
1099 return (uhci_intr1(sc));
1100 }
1101
1102 int
1103 uhci_intr1(uhci_softc_t *sc)
1104 {
1105
1106 int status;
1107 int ack;
1108
1109 /*
1110 * It can happen that an interrupt will be delivered to
1111 * us before the device has been fully attached and the
1112 * softc struct has been configured. Usually this happens
1113 * when kldloading the USB support as a module after the
1114 * system has been booted. If we detect this condition,
1115 * we need to squelch the unwanted interrupts until we're
1116 * ready for them.
1117 */
1118 if (sc->sc_bus.bdev == NULL) {
1119 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */
1120 uhci_run(sc, 0); /* stop the controller */
1121 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
1122 return(0);
1123 }
1124
1125 #ifdef USB_DEBUG
1126 if (uhcidebug > 15) {
1127 DPRINTF(("%s: uhci_intr1\n", device_get_nameunit(sc->sc_bus.bdev)));
1128 uhci_dumpregs(sc);
1129 }
1130 #endif
1131 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1132 if (status == 0) /* The interrupt was not for us. */
1133 return (0);
1134
1135 if (sc->sc_suspend != PWR_RESUME) {
1136 device_printf(sc->sc_bus.bdev,
1137 "interrupt while not operating ignored\n");
1138 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1139 return (0);
1140 }
1141
1142 ack = 0;
1143 if (status & UHCI_STS_USBINT)
1144 ack |= UHCI_STS_USBINT;
1145 if (status & UHCI_STS_USBEI)
1146 ack |= UHCI_STS_USBEI;
1147 if (status & UHCI_STS_RD) {
1148 ack |= UHCI_STS_RD;
1149 #ifdef USB_DEBUG
1150 device_printf(sc->sc_bus.bdev, "resume detect\n");
1151 #endif
1152 }
1153 if (status & UHCI_STS_HSE) {
1154 ack |= UHCI_STS_HSE;
1155 device_printf(sc->sc_bus.bdev, "host system error\n");
1156 }
1157 if (status & UHCI_STS_HCPE) {
1158 ack |= UHCI_STS_HCPE;
1159 device_printf(sc->sc_bus.bdev,
1160 "host controller process error\n");
1161 }
1162 if (status & UHCI_STS_HCH) {
1163 /* no acknowledge needed */
1164 if (!sc->sc_dying) {
1165 device_printf(sc->sc_bus.bdev,
1166 "host controller halted\n");
1167 #ifdef USB_DEBUG
1168 uhci_dump_all(sc);
1169 #endif
1170 }
1171 sc->sc_dying = 1;
1172 }
1173
1174 if (!ack)
1175 return (0); /* nothing to acknowledge */
1176 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1177
1178 sc->sc_bus.no_intrs++;
1179 usb_schedsoftintr(&sc->sc_bus);
1180
1181 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_get_nameunit(sc->sc_bus.bdev)));
1182
1183 return (1);
1184 }
1185
1186 void
1187 uhci_softintr(void *v)
1188 {
1189 uhci_softc_t *sc = v;
1190 uhci_intr_info_t *ii, *nextii;
1191
1192 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
1193 sc->sc_bus.intr_context));
1194
1195 sc->sc_bus.intr_context++;
1196
1197 /*
1198 * Interrupts on UHCI really suck. When the host controller
1199 * interrupts because a transfer is completed there is no
1200 * way of knowing which transfer it was. You can scan down
1201 * the TDs and QHs of the previous frame to limit the search,
1202 * but that assumes that the interrupt was not delayed by more
1203 * than 1 ms, which may not always be true (e.g. after debug
1204 * output on a slow console).
1205 * We scan all interrupt descriptors to see if any have
1206 * completed.
1207 */
1208 LIST_FOREACH_MUTABLE(ii, &sc->sc_intrhead, list, nextii)
1209 uhci_check_intr(sc, ii);
1210
1211 #ifdef USB_USE_SOFTINTR
1212 if (sc->sc_softwake) {
1213 sc->sc_softwake = 0;
1214 wakeup(&sc->sc_softwake);
1215 }
1216 #endif /* USB_USE_SOFTINTR */
1217
1218 sc->sc_bus.intr_context--;
1219 }
1220
1221 /* Check for an interrupt. */
1222 void
1223 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1224 {
1225 uhci_soft_td_t *std, *lstd;
1226 u_int32_t status;
1227
1228 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1229 #ifdef DIAGNOSTIC
1230 if (ii == NULL) {
1231 kprintf("uhci_check_intr: no ii? %p\n", ii);
1232 return;
1233 }
1234 #endif
1235 if (ii->xfer->status == USBD_CANCELLED ||
1236 ii->xfer->status == USBD_TIMEOUT) {
1237 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1238 return;
1239 }
1240
1241 if (ii->stdstart == NULL)
1242 return;
1243 lstd = ii->stdend;
1244 #ifdef DIAGNOSTIC
1245 if (lstd == NULL) {
1246 kprintf("uhci_check_intr: std==0\n");
1247 return;
1248 }
1249 #endif
1250 /*
1251 * If the last TD is still active we need to check whether there
1252 * is an error somewhere in the middle, or whether there was a
1253 * short packet (SPD and not ACTIVE).
1254 */
1255 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1256 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1257 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1258 status = le32toh(std->td.td_status);
1259 /* If there's an active TD the xfer isn't done. */
1260 if (status & UHCI_TD_ACTIVE)
1261 break;
1262 /* Any kind of error makes the xfer done. */
1263 if (status & UHCI_TD_STALLED)
1264 goto done;
1265 /* We want short packets, and it is short: it's done */
1266 if ((status & UHCI_TD_SPD) &&
1267 UHCI_TD_GET_ACTLEN(status) <
1268 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
1269 goto done;
1270 }
1271 }
1272 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1273 ii, ii->stdstart));
1274 return;
1275 }
1276 done:
1277 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1278 callout_stop(&ii->xfer->timeout_handle);
1279 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
1280 uhci_idone(ii);
1281 }
1282
1283 /* Called from a critical section. */
1284 void
1285 uhci_idone(uhci_intr_info_t *ii)
1286 {
1287 usbd_xfer_handle xfer = ii->xfer;
1288 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1289 uhci_soft_td_t *std;
1290 u_int32_t status = 0, nstatus;
1291 int actlen;
1292
1293 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1294 #ifdef DIAGNOSTIC
1295 {
1296 crit_enter();
1297 if (ii->isdone) {
1298 crit_exit();
1299 #ifdef USB_DEBUG
1300 kprintf("uhci_idone: ii is done!\n ");
1301 uhci_dump_ii(ii);
1302 #else
1303 kprintf("uhci_idone: ii=%p is done!\n", ii);
1304 #endif
1305 return;
1306 }
1307 ii->isdone = 1;
1308 crit_exit();
1309 }
1310 #endif
1311
1312 if (xfer->nframes != 0) {
1313 /* Isoc transfer, do things differently. */
1314 uhci_soft_td_t **stds = upipe->u.iso.stds;
1315 int i, n, nframes, len;
1316
1317 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1318
1319 nframes = xfer->nframes;
1320 actlen = 0;
1321 n = UXFER(xfer)->curframe;
1322 for (i = 0; i < nframes; i++) {
1323 std = stds[n];
1324 #ifdef USB_DEBUG
1325 if (uhcidebug > 5) {
1326 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1327 uhci_dump_td(std);
1328 }
1329 #endif
1330 if (++n >= UHCI_VFRAMELIST_COUNT)
1331 n = 0;
1332 status = le32toh(std->td.td_status);
1333 len = UHCI_TD_GET_ACTLEN(status);
1334 xfer->frlengths[i] = len;
1335 actlen += len;
1336 }
1337 upipe->u.iso.inuse -= nframes;
1338 xfer->actlen = actlen;
1339 xfer->status = USBD_NORMAL_COMPLETION;
1340 goto end;
1341 }
1342
1343 #ifdef USB_DEBUG
1344 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1345 ii, xfer, upipe));
1346 if (uhcidebug > 10)
1347 uhci_dump_tds(ii->stdstart);
1348 #endif
1349
1350 /* The transfer is done, compute actual length and status. */
1351 actlen = 0;
1352 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1353 nstatus = le32toh(std->td.td_status);
1354 if (nstatus & UHCI_TD_ACTIVE)
1355 break;
1356
1357 status = nstatus;
1358 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1359 UHCI_TD_PID_SETUP) {
1360 actlen += UHCI_TD_GET_ACTLEN(status);
1361 } else {
1362 /*
1363 * UHCI will report CRCTO in addition to a STALL or NAK
1364 * for a SETUP transaction. See section 3.2.2, "TD
1365 * CONTROL AND STATUS".
1366 */
1367 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1368 status &= ~UHCI_TD_CRCTO;
1369 }
1370
1371 }
1372 /* If there are left over TDs we need to update the toggle. */
1373 if (std != NULL)
1374 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1375
1376 status &= UHCI_TD_ERROR;
1377 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1378 actlen, status));
1379 xfer->actlen = actlen;
1380 if (status != 0) {
1381 #ifdef USB_DEBUG
1382 char sbuf[128];
1383
1384 bitmask_snprintf((u_int32_t)status,
1385 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1386 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1387 sbuf, sizeof(sbuf));
1388
1389 DPRINTFN((status == UHCI_TD_STALLED)*10,
1390 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1391 "status 0x%s\n",
1392 xfer->pipe->device->address,
1393 xfer->pipe->endpoint->edesc->bEndpointAddress,
1394 sbuf));
1395 #endif
1396 if (status == UHCI_TD_STALLED)
1397 xfer->status = USBD_STALLED;
1398 else
1399 xfer->status = USBD_IOERROR; /* more info XXX */
1400 } else {
1401 xfer->status = USBD_NORMAL_COMPLETION;
1402 }
1403
1404 end:
1405 usb_transfer_complete(xfer);
1406 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1407 }
1408
1409 /*
1410 * Called when a request does not complete.
1411 */
1412 void
1413 uhci_timeout(void *addr)
1414 {
1415 uhci_intr_info_t *ii = addr;
1416 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1417 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1418 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1419
1420 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1421
1422 if (sc->sc_dying) {
1423 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1424 return;
1425 }
1426
1427 /* Execute the abort in a process context. */
1428 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1429 USB_TASKQ_HC);
1430 }
1431
1432 void
1433 uhci_timeout_task(void *addr)
1434 {
1435 usbd_xfer_handle xfer = addr;
1436
1437 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1438
1439 crit_enter();
1440 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1441 crit_exit();
1442 }
1443
1444 /*
1445 * Wait here until controller claims to have an interrupt.
1446 * Then call uhci_intr and return. Use timeout to avoid waiting
1447 * too long.
1448 * Only used during boot when interrupts are not enabled yet.
1449 */
1450 void
1451 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1452 {
1453 int timo = xfer->timeout;
1454 uhci_intr_info_t *ii;
1455
1456 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1457
1458 xfer->status = USBD_IN_PROGRESS;
1459 for (; timo >= 0; timo--) {
1460 usb_delay_ms(&sc->sc_bus, 1);
1461 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1462 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1463 uhci_intr1(sc);
1464 if (xfer->status != USBD_IN_PROGRESS)
1465 return;
1466 }
1467
1468 /* Timeout */
1469 DPRINTF(("uhci_waitintr: timeout\n"));
1470 for (ii = LIST_FIRST(&sc->sc_intrhead);
1471 ii != NULL && ii->xfer != xfer;
1472 ii = LIST_NEXT(ii, list))
1473 ;
1474 #ifdef DIAGNOSTIC
1475 if (ii == NULL)
1476 panic("uhci_waitintr: lost intr_info");
1477 #endif
1478 uhci_idone(ii);
1479 }
1480
1481 void
1482 uhci_poll(struct usbd_bus *bus)
1483 {
1484 uhci_softc_t *sc = (uhci_softc_t *)bus;
1485
1486 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1487 uhci_intr1(sc);
1488 }
1489
1490 void
1491 uhci_reset(uhci_softc_t *sc)
1492 {
1493 int n;
1494
1495 UHCICMD(sc, UHCI_CMD_HCRESET);
1496 /* The reset bit goes low when the controller is done. */
1497 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1498 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1499 usb_delay_ms(&sc->sc_bus, 1);
1500 if (n >= UHCI_RESET_TIMEOUT)
1501 device_printf(sc->sc_bus.bdev, "controller did not reset\n");
1502 }
1503
1504 usbd_status
1505 uhci_run(uhci_softc_t *sc, int run)
1506 {
1507 int n, running;
1508 u_int16_t cmd;
1509
1510 run = run != 0;
1511 crit_enter();
1512 DPRINTF(("uhci_run: setting run=%d\n", run));
1513 cmd = UREAD2(sc, UHCI_CMD);
1514 if (run)
1515 cmd |= UHCI_CMD_RS;
1516 else
1517 cmd &= ~UHCI_CMD_RS;
1518 UHCICMD(sc, cmd);
1519 for(n = 0; n < 10; n++) {
1520 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1521 /* return when we've entered the state we want */
1522 if (run == running) {
1523 crit_exit();
1524 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1525 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1526 return (USBD_NORMAL_COMPLETION);
1527 }
1528 usb_delay_ms(&sc->sc_bus, 1);
1529 }
1530 crit_exit();
1531 device_printf(sc->sc_bus.bdev, "cannot %s\n", run ? "start" : "stop");
1532 return (USBD_IOERROR);
1533 }
1534
1535 /*
1536 * Memory management routines.
1537 * uhci_alloc_std allocates TDs
1538 * uhci_alloc_sqh allocates QHs
1539 * These two routines do their own free list management,
1540 * partly for speed, partly because allocating DMAable memory
1541 * has page size granularaity so much memory would be wasted if
1542 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1543 */
1544
1545 uhci_soft_td_t *
1546 uhci_alloc_std(uhci_softc_t *sc)
1547 {
1548 uhci_soft_td_t *std;
1549 usbd_status err;
1550 int i, offs;
1551 usb_dma_t dma;
1552
1553 if (sc->sc_freetds == NULL) {
1554 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1555 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1556 UHCI_TD_ALIGN, &dma);
1557 if (err)
1558 return (0);
1559 for(i = 0; i < UHCI_STD_CHUNK; i++) {
1560 offs = i * UHCI_STD_SIZE;
1561 std = KERNADDR(&dma, offs);
1562 std->physaddr = DMAADDR(&dma, offs);
1563 std->link.std = sc->sc_freetds;
1564 sc->sc_freetds = std;
1565 }
1566 }
1567 std = sc->sc_freetds;
1568 sc->sc_freetds = std->link.std;
1569 memset(&std->td, 0, sizeof(uhci_td_t));
1570 return std;
1571 }
1572
1573 void
1574 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1575 {
1576 #ifdef DIAGNOSTIC
1577 #define TD_IS_FREE 0x12345678
1578 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1579 kprintf("uhci_free_std: freeing free TD %p\n", std);
1580 return;
1581 }
1582 std->td.td_token = htole32(TD_IS_FREE);
1583 #endif
1584 std->link.std = sc->sc_freetds;
1585 sc->sc_freetds = std;
1586 }
1587
1588 uhci_soft_qh_t *
1589 uhci_alloc_sqh(uhci_softc_t *sc)
1590 {
1591 uhci_soft_qh_t *sqh;
1592 usbd_status err;
1593 int i, offs;
1594 usb_dma_t dma;
1595
1596 if (sc->sc_freeqhs == NULL) {
1597 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1598 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1599 UHCI_QH_ALIGN, &dma);
1600 if (err)
1601 return (0);
1602 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1603 offs = i * UHCI_SQH_SIZE;
1604 sqh = KERNADDR(&dma, offs);
1605 sqh->physaddr = DMAADDR(&dma, offs);
1606 sqh->hlink = sc->sc_freeqhs;
1607 sc->sc_freeqhs = sqh;
1608 }
1609 }
1610 sqh = sc->sc_freeqhs;
1611 sc->sc_freeqhs = sqh->hlink;
1612 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1613 return (sqh);
1614 }
1615
1616 void
1617 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1618 {
1619 sqh->hlink = sc->sc_freeqhs;
1620 sc->sc_freeqhs = sqh;
1621 }
1622
1623 void
1624 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1625 uhci_soft_td_t *stdend)
1626 {
1627 uhci_soft_td_t *p;
1628
1629 for (; std != stdend; std = p) {
1630 p = std->link.std;
1631 uhci_free_std(sc, std);
1632 }
1633 }
1634
1635 usbd_status
1636 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1637 int rd, u_int16_t flags, usb_dma_t *dma,
1638 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1639 {
1640 uhci_soft_td_t *p, *lastp;
1641 uhci_physaddr_t lastlink;
1642 int i, ntd, l, tog, maxp;
1643 u_int32_t status;
1644 int addr = upipe->pipe.device->address;
1645 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1646
1647 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1648 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1649 upipe->pipe.device->speed, flags));
1650 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1651 if (maxp == 0) {
1652 kprintf("uhci_alloc_std_chain: maxp=0\n");
1653 return (USBD_INVAL);
1654 }
1655 ntd = (len + maxp - 1) / maxp;
1656 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1657 ntd++;
1658 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1659 if (ntd == 0) {
1660 *sp = *ep = 0;
1661 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1662 return (USBD_NORMAL_COMPLETION);
1663 }
1664 tog = upipe->nexttoggle;
1665 if (ntd % 2 == 0)
1666 tog ^= 1;
1667 upipe->nexttoggle = tog ^ 1;
1668 lastp = NULL;
1669 lastlink = UHCI_PTR_T;
1670 ntd--;
1671 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1672 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1673 status |= UHCI_TD_LS;
1674 if (flags & USBD_SHORT_XFER_OK)
1675 status |= UHCI_TD_SPD;
1676 for (i = ntd; i >= 0; i--) {
1677 p = uhci_alloc_std(sc);
1678 if (p == NULL) {
1679 uhci_free_std_chain(sc, lastp, NULL);
1680 return (USBD_NOMEM);
1681 }
1682 p->link.std = lastp;
1683 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1684 lastp = p;
1685 lastlink = p->physaddr;
1686 p->td.td_status = htole32(status);
1687 if (i == ntd) {
1688 /* last TD */
1689 l = len % maxp;
1690 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1691 l = maxp;
1692 *ep = p;
1693 } else
1694 l = maxp;
1695 p->td.td_token =
1696 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1697 UHCI_TD_OUT(l, endpt, addr, tog));
1698 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1699 tog ^= 1;
1700 }
1701 *sp = lastp;
1702 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1703 upipe->nexttoggle));
1704 return (USBD_NORMAL_COMPLETION);
1705 }
1706
1707 void
1708 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1709 {
1710 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1711 upipe->nexttoggle = 0;
1712 }
1713
1714 void
1715 uhci_noop(usbd_pipe_handle pipe)
1716 {
1717 }
1718
1719 usbd_status
1720 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1721 {
1722 usbd_status err;
1723
1724 /* Insert last in queue. */
1725 err = usb_insert_transfer(xfer);
1726 if (err)
1727 return (err);
1728
1729 /*
1730 * Pipe isn't running (otherwise err would be USBD_INPROG),
1731 * so start it first.
1732 */
1733 return (uhci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
1734 }
1735
1736 usbd_status
1737 uhci_device_bulk_start(usbd_xfer_handle xfer)
1738 {
1739 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1740 usbd_device_handle dev = upipe->pipe.device;
1741 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1742 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1743 uhci_soft_td_t *data, *dataend;
1744 uhci_soft_qh_t *sqh;
1745 usbd_status err;
1746 int len, isread, endpt;
1747
1748 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1749 xfer, xfer->length, xfer->flags, ii));
1750
1751 if (sc->sc_dying)
1752 return (USBD_IOERROR);
1753
1754 #ifdef DIAGNOSTIC
1755 if (xfer->rqflags & URQ_REQUEST)
1756 panic("uhci_device_bulk_transfer: a request");
1757 #endif
1758
1759 len = xfer->length;
1760 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1761 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1762 sqh = upipe->u.bulk.sqh;
1763
1764 upipe->u.bulk.isread = isread;
1765 upipe->u.bulk.length = len;
1766
1767 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1768 &xfer->dmabuf, &data, &dataend);
1769 if (err)
1770 return (err);
1771 dataend->td.td_status |= htole32(UHCI_TD_IOC);
1772
1773 #ifdef USB_DEBUG
1774 if (uhcidebug > 8) {
1775 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1776 uhci_dump_tds(data);
1777 }
1778 #endif
1779
1780 /* Set up interrupt info. */
1781 ii->xfer = xfer;
1782 ii->stdstart = data;
1783 ii->stdend = dataend;
1784 #ifdef DIAGNOSTIC
1785 if (!ii->isdone) {
1786 kprintf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1787 }
1788 ii->isdone = 0;
1789 #endif
1790
1791 sqh->elink = data;
1792 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1793
1794 crit_enter();
1795 uhci_add_bulk(sc, sqh);
1796 uhci_add_intr_info(sc, ii);
1797
1798 if (xfer->timeout && !sc->sc_bus.use_polling) {
1799 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1800 uhci_timeout, ii);
1801 }
1802 xfer->status = USBD_IN_PROGRESS;
1803 crit_exit();
1804
1805 #ifdef USB_DEBUG
1806 if (uhcidebug > 10) {
1807 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1808 uhci_dump_tds(data);
1809 }
1810 #endif
1811
1812 if (sc->sc_bus.use_polling)
1813 uhci_waitintr(sc, xfer);
1814
1815 return (USBD_IN_PROGRESS);
1816 }
1817
1818 /* Abort a device bulk request. */
1819 void
1820 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1821 {
1822 DPRINTF(("uhci_device_bulk_abort:\n"));
1823 uhci_abort_xfer(xfer, USBD_CANCELLED);
1824 }
1825
1826 /*
1827 * Abort a device request.
1828 * If this routine is called from a critical section. It guarantees that
1829 * the request will be removed from the hardware scheduling and that
1830 * the callback for it will be called with USBD_CANCELLED status.
1831 * It's impossible to guarantee that the requested transfer will not
1832 * have happened since the hardware runs concurrently.
1833 * If the transaction has already happened we rely on the ordinary
1834 * interrupt processing to process it.
1835 */
1836 void
1837 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1838 {
1839 struct uhci_xfer *uxfer = UXFER(xfer);
1840 uhci_intr_info_t *ii = &uxfer->iinfo;
1841 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1842 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1843 uhci_soft_td_t *std;
1844
1845 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1846
1847 if (sc->sc_dying) {
1848 /* If we're dying, just do the software part. */
1849 crit_enter();
1850 xfer->status = status; /* make software ignore it */
1851 callout_stop(&xfer->timeout_handle);
1852 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1853 usb_transfer_complete(xfer);
1854 crit_exit();
1855 return;
1856 }
1857
1858 #if 0
1859 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
1860 panic("uhci_abort_xfer: not in process context");
1861 #endif
1862
1863 /*
1864 * If an abort is already in progress then just wait for it to
1865 * complete and return.
1866 */
1867 crit_enter();
1868 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
1869 crit_exit();
1870 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1871 /* No need to wait if we're aborting from a timeout. */
1872 if (status == USBD_TIMEOUT)
1873 return;
1874 /* Override the status which might be USBD_TIMEOUT. */
1875 xfer->status = status;
1876 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
1877 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
1878 crit_enter();
1879 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
1880 tsleep(&uxfer->uhci_xfer_flags, 0, "uhciaw", 0);
1881 crit_exit();
1882 return;
1883 }
1884
1885 /*
1886 * Step 1: Make interrupt routine and hardware ignore xfer.
1887 */
1888 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
1889 xfer->status = status; /* make software ignore it */
1890 callout_stop(&xfer->timeout_handle);
1891 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1892 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1893 for (std = ii->stdstart; std != NULL; std = std->link.std)
1894 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1895 crit_exit();
1896
1897 /*
1898 * Step 2: Wait until we know hardware has finished any possible
1899 * use of the xfer. Also make sure the soft interrupt routine
1900 * has run.
1901 */
1902 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
1903 crit_enter();
1904 #ifdef USB_USE_SOFTINTR
1905 sc->sc_softwake = 1;
1906 #endif /* USB_USE_SOFTINTR */
1907 usb_schedsoftintr(&sc->sc_bus);
1908 #ifdef USB_USE_SOFTINTR
1909 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1910 tsleep(&sc->sc_softwake, 0, "uhciab", 0);
1911 #endif /* USB_USE_SOFTINTR */
1912
1913 /*
1914 * Step 3: Execute callback.
1915 */
1916 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1917 #ifdef DIAGNOSTIC
1918 ii->isdone = 1;
1919 #endif
1920 /* Do the wakeup first to avoid touching the xfer after the callback. */
1921 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTING;
1922 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT) {
1923 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTWAIT;
1924 wakeup(&uxfer->uhci_xfer_flags);
1925 }
1926 usb_transfer_complete(xfer);
1927 crit_exit();
1928 }
1929
1930 /* Close a device bulk pipe. */
1931 void
1932 uhci_device_bulk_close(usbd_pipe_handle pipe)
1933 {
1934 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1935 usbd_device_handle dev = upipe->pipe.device;
1936 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1937
1938 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1939 pipe->endpoint->savedtoggle = upipe->nexttoggle;
1940 }
1941
1942 usbd_status
1943 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
1944 {
1945 usbd_status err;
1946
1947 /* Insert last in queue. */
1948 err = usb_insert_transfer(xfer);
1949 if (err)
1950 return (err);
1951
1952 /*
1953 * Pipe isn't running (otherwise err would be USBD_INPROG),
1954 * so start it first.
1955 */
1956 return (uhci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1957 }
1958
1959 usbd_status
1960 uhci_device_ctrl_start(usbd_xfer_handle xfer)
1961 {
1962 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
1963 usbd_status err;
1964
1965 if (sc->sc_dying)
1966 return (USBD_IOERROR);
1967
1968 #ifdef DIAGNOSTIC
1969 if (!(xfer->rqflags & URQ_REQUEST))
1970 panic("uhci_device_ctrl_transfer: not a request");
1971 #endif
1972
1973 err = uhci_device_request(xfer);
1974 if (err)
1975 return (err);
1976
1977 if (sc->sc_bus.use_polling)
1978 uhci_waitintr(sc, xfer);
1979 return (USBD_IN_PROGRESS);
1980 }
1981
1982 usbd_status
1983 uhci_device_intr_transfer(usbd_xfer_handle xfer)
1984 {
1985 usbd_status err;
1986
1987 /* Insert last in queue. */
1988 err = usb_insert_transfer(xfer);
1989 if (err)
1990 return (err);
1991
1992 /*
1993 * Pipe isn't running (otherwise err would be USBD_INPROG),
1994 * so start it first.
1995 */
1996 return (uhci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
1997 }
1998
1999 usbd_status
2000 uhci_device_intr_start(usbd_xfer_handle xfer)
2001 {
2002 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2003 usbd_device_handle dev = upipe->pipe.device;
2004 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2005 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2006 uhci_soft_td_t *data, *dataend;
2007 uhci_soft_qh_t *sqh;
2008 usbd_status err;
2009 int isread, endpt;
2010 int i;
2011
2012 if (sc->sc_dying)
2013 return (USBD_IOERROR);
2014
2015 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2016 xfer, xfer->length, xfer->flags));
2017
2018 #ifdef DIAGNOSTIC
2019 if (xfer->rqflags & URQ_REQUEST)
2020 panic("uhci_device_intr_transfer: a request");
2021 #endif
2022
2023 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2024 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2025 sqh = upipe->u.bulk.sqh;
2026
2027 upipe->u.intr.isread = isread;
2028
2029 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2030 xfer->flags, &xfer->dmabuf, &data,
2031 &dataend);
2032 if (err)
2033 return (err);
2034 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2035
2036 #ifdef USB_DEBUG
2037 if (uhcidebug > 10) {
2038 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2039 uhci_dump_tds(data);
2040 uhci_dump_qh(upipe->u.intr.qhs[0]);
2041 }
2042 #endif
2043
2044 crit_enter();
2045 /* Set up interrupt info. */
2046 ii->xfer = xfer;
2047 ii->stdstart = data;
2048 ii->stdend = dataend;
2049 #ifdef DIAGNOSTIC
2050 if (!ii->isdone) {
2051 kprintf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2052 }
2053 ii->isdone = 0;
2054 #endif
2055
2056 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2057 upipe->u.intr.qhs[0]));
2058 for (i = 0; i < upipe->u.intr.npoll; i++) {
2059 sqh = upipe->u.intr.qhs[i];
2060 sqh->elink = data;
2061 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2062 }
2063 uhci_add_intr_info(sc, ii);
2064 xfer->status = USBD_IN_PROGRESS;
2065 crit_exit();
2066
2067 #ifdef USB_DEBUG
2068 if (uhcidebug > 10) {
2069 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2070 uhci_dump_tds(data);
2071 uhci_dump_qh(upipe->u.intr.qhs[0]);
2072 }
2073 #endif
2074
2075 return (USBD_IN_PROGRESS);
2076 }
2077
2078 /* Abort a device control request. */
2079 void
2080 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2081 {
2082 DPRINTF(("uhci_device_ctrl_abort:\n"));
2083 uhci_abort_xfer(xfer, USBD_CANCELLED);
2084 }
2085
2086 /* Close a device control pipe. */
2087 void
2088 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2089 {
2090 }
2091
2092 /* Abort a device interrupt request. */
2093 void
2094 uhci_device_intr_abort(usbd_xfer_handle xfer)
2095 {
2096 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2097 if (xfer->pipe->intrxfer == xfer) {
2098 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2099 xfer->pipe->intrxfer = NULL;
2100 }
2101 uhci_abort_xfer(xfer, USBD_CANCELLED);
2102 }
2103
2104 /* Close a device interrupt pipe. */
2105 void
2106 uhci_device_intr_close(usbd_pipe_handle pipe)
2107 {
2108 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2109 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2110 int i, npoll;
2111
2112 /* Unlink descriptors from controller data structures. */
2113 npoll = upipe->u.intr.npoll;
2114 crit_enter();
2115 for (i = 0; i < npoll; i++)
2116 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2117 crit_exit();
2118
2119 /*
2120 * We now have to wait for any activity on the physical
2121 * descriptors to stop.
2122 */
2123 usb_delay_ms(&sc->sc_bus, 2);
2124
2125 for(i = 0; i < npoll; i++)
2126 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2127 kfree(upipe->u.intr.qhs, M_USBHC);
2128
2129 /* XXX free other resources */
2130 }
2131
2132 usbd_status
2133 uhci_device_request(usbd_xfer_handle xfer)
2134 {
2135 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2136 usb_device_request_t *req = &xfer->request;
2137 usbd_device_handle dev = upipe->pipe.device;
2138 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2139 int addr = dev->address;
2140 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2141 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2142 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2143 uhci_soft_qh_t *sqh;
2144 int len;
2145 u_int32_t ls;
2146 usbd_status err;
2147 int isread;
2148
2149 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2150 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2151 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2152 UGETW(req->wIndex), UGETW(req->wLength),
2153 addr, endpt));
2154
2155 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2156 isread = req->bmRequestType & UT_READ;
2157 len = UGETW(req->wLength);
2158
2159 setup = upipe->u.ctl.setup;
2160 stat = upipe->u.ctl.stat;
2161 sqh = upipe->u.ctl.sqh;
2162
2163 /* Set up data transaction */
2164 if (len != 0) {
2165 upipe->nexttoggle = 1;
2166 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2167 &xfer->dmabuf, &data, &dataend);
2168 if (err)
2169 return (err);
2170 next = data;
2171 dataend->link.std = stat;
2172 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2173 } else {
2174 next = stat;
2175 }
2176 upipe->u.ctl.length = len;
2177
2178 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2179
2180 setup->link.std = next;
2181 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2182 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2183 UHCI_TD_ACTIVE);
2184 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2185 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2186 stat->link.std = NULL;
2187 stat->td.td_link = htole32(UHCI_PTR_T);
2188 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2189 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2190
2191 stat->td.td_token =
2192 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2193 UHCI_TD_IN (0, endpt, addr, 1));
2194 stat->td.td_buffer = htole32(0);
2195
2196 #ifdef USB_DEBUG
2197 if (uhcidebug > 10) {
2198 DPRINTF(("uhci_device_request: before transfer\n"));
2199 uhci_dump_tds(setup);
2200 }
2201 #endif
2202
2203 /* Set up interrupt info. */
2204 ii->xfer = xfer;
2205 ii->stdstart = setup;
2206 ii->stdend = stat;
2207 #ifdef DIAGNOSTIC
2208 if (!ii->isdone) {
2209 kprintf("uhci_device_request: not done, ii=%p\n", ii);
2210 }
2211 ii->isdone = 0;
2212 #endif
2213
2214 sqh->elink = setup;
2215 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2216
2217 crit_enter();
2218 if (dev->speed == USB_SPEED_LOW)
2219 uhci_add_ls_ctrl(sc, sqh);
2220 else
2221 uhci_add_hs_ctrl(sc, sqh);
2222 uhci_add_intr_info(sc, ii);
2223 #ifdef USB_DEBUG
2224 if (uhcidebug > 12) {
2225 uhci_soft_td_t *std;
2226 uhci_soft_qh_t *xqh;
2227 uhci_soft_qh_t *sxqh;
2228 int maxqh = 0;
2229 uhci_physaddr_t link;
2230 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2231 for (std = sc->sc_vframes[0].htd, link = 0;
2232 (link & UHCI_PTR_QH) == 0;
2233 std = std->link.std) {
2234 link = le32toh(std->td.td_link);
2235 uhci_dump_td(std);
2236 }
2237 sxqh = (uhci_soft_qh_t *)std;
2238 uhci_dump_qh(sxqh);
2239 for (xqh = sxqh;
2240 xqh != NULL;
2241 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2242 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2243 uhci_dump_qh(xqh);
2244 }
2245 DPRINTF(("Enqueued QH:\n"));
2246 uhci_dump_qh(sqh);
2247 uhci_dump_tds(sqh->elink);
2248 }
2249 #endif
2250 if (xfer->timeout && !sc->sc_bus.use_polling) {
2251 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2252 uhci_timeout, ii);
2253 }
2254 xfer->status = USBD_IN_PROGRESS;
2255 crit_exit();
2256
2257 return (USBD_NORMAL_COMPLETION);
2258 }
2259
2260 usbd_status
2261 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2262 {
2263 usbd_status err;
2264
2265 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2266
2267 /* Put it on our queue, */
2268 err = usb_insert_transfer(xfer);
2269
2270 /* bail out on error, */
2271 if (err && err != USBD_IN_PROGRESS)
2272 return (err);
2273
2274 /* XXX should check inuse here */
2275
2276 /* insert into schedule, */
2277 uhci_device_isoc_enter(xfer);
2278
2279 /* and start if the pipe wasn't running */
2280 if (!err)
2281 uhci_device_isoc_start(STAILQ_FIRST(&xfer->pipe->queue));
2282
2283 return (err);
2284 }
2285
2286 void
2287 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2288 {
2289 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2290 usbd_device_handle dev = upipe->pipe.device;
2291 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2292 struct iso *iso = &upipe->u.iso;
2293 uhci_soft_td_t *std;
2294 u_int32_t buf, len, status;
2295 int i, next, nframes;
2296
2297 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2298 "nframes=%d\n",
2299 iso->inuse, iso->next, xfer, xfer->nframes));
2300
2301 if (sc->sc_dying)
2302 return;
2303
2304 if (xfer->status == USBD_IN_PROGRESS) {
2305 /* This request has already been entered into the frame list */
2306 kprintf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2307 /* XXX */
2308 }
2309
2310 #ifdef DIAGNOSTIC
2311 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2312 kprintf("uhci_device_isoc_enter: overflow!\n");
2313 #endif
2314
2315 next = iso->next;
2316 if (next == -1) {
2317 /* Not in use yet, schedule it a few frames ahead. */
2318 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2319 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2320 }
2321
2322 xfer->status = USBD_IN_PROGRESS;
2323 UXFER(xfer)->curframe = next;
2324
2325 buf = DMAADDR(&xfer->dmabuf, 0);
2326 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2327 UHCI_TD_ACTIVE |
2328 UHCI_TD_IOS);
2329 nframes = xfer->nframes;
2330 crit_enter();
2331 for (i = 0; i < nframes; i++) {
2332 std = iso->stds[next];
2333 if (++next >= UHCI_VFRAMELIST_COUNT)
2334 next = 0;
2335 len = xfer->frlengths[i];
2336 std->td.td_buffer = htole32(buf);
2337 if (i == nframes - 1)
2338 status |= UHCI_TD_IOC;
2339 std->td.td_status = htole32(status);
2340 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2341 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2342 #ifdef USB_DEBUG
2343 if (uhcidebug > 5) {
2344 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2345 uhci_dump_td(std);
2346 }
2347 #endif
2348 buf += len;
2349 }
2350 iso->next = next;
2351 iso->inuse += xfer->nframes;
2352
2353 crit_exit();
2354 }
2355
2356 usbd_status
2357 uhci_device_isoc_start(usbd_xfer_handle xfer)
2358 {
2359 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2360 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2361 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2362 uhci_soft_td_t *end;
2363 int i;
2364
2365 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2366
2367 if (sc->sc_dying)
2368 return (USBD_IOERROR);
2369
2370 #ifdef DIAGNOSTIC
2371 if (xfer->status != USBD_IN_PROGRESS)
2372 kprintf("uhci_device_isoc_start: not in progress %p\n", xfer);
2373 #endif
2374
2375 /* Find the last TD */
2376 i = UXFER(xfer)->curframe + xfer->nframes;
2377 if (i >= UHCI_VFRAMELIST_COUNT)
2378 i -= UHCI_VFRAMELIST_COUNT;
2379 end = upipe->u.iso.stds[i];
2380
2381 #ifdef DIAGNOSTIC
2382 if (end == NULL) {
2383 kprintf("uhci_device_isoc_start: end == NULL\n");
2384 return (USBD_INVAL);
2385 }
2386 #endif
2387
2388 crit_enter();
2389
2390 /* Set up interrupt info. */
2391 ii->xfer = xfer;
2392 ii->stdstart = end;
2393 ii->stdend = end;
2394 #ifdef DIAGNOSTIC
2395 if (!ii->isdone)
2396 kprintf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2397 ii->isdone = 0;
2398 #endif
2399 uhci_add_intr_info(sc, ii);
2400
2401 crit_exit();
2402
2403 return (USBD_IN_PROGRESS);
2404 }
2405
2406 void
2407 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2408 {
2409 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2410 uhci_soft_td_t **stds = upipe->u.iso.stds;
2411 uhci_soft_td_t *std;
2412 int i, n, nframes, maxlen, len;
2413
2414 crit_enter();
2415
2416 /* Transfer is already done. */
2417 if (xfer->status != USBD_NOT_STARTED &&
2418 xfer->status != USBD_IN_PROGRESS) {
2419 crit_exit();
2420 return;
2421 }
2422
2423 /* Give xfer the requested abort code. */
2424 xfer->status = USBD_CANCELLED;
2425
2426 /* make hardware ignore it, */
2427 nframes = xfer->nframes;
2428 n = UXFER(xfer)->curframe;
2429 maxlen = 0;
2430 for (i = 0; i < nframes; i++) {
2431 std = stds[n];
2432 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2433 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2434 if (len > maxlen)
2435 maxlen = len;
2436 if (++n >= UHCI_VFRAMELIST_COUNT)
2437 n = 0;
2438 }
2439
2440 /* and wait until we are sure the hardware has finished. */
2441 delay(maxlen);
2442
2443 #ifdef DIAGNOSTIC
2444 UXFER(xfer)->iinfo.isdone = 1;
2445 #endif
2446 /* Run callback and remove from interrupt list. */
2447 usb_transfer_complete(xfer);
2448
2449 crit_exit();
2450 }
2451
2452 void
2453 uhci_device_isoc_close(usbd_pipe_handle pipe)
2454 {
2455 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2456 usbd_device_handle dev = upipe->pipe.device;
2457 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2458 uhci_soft_td_t *std, *vstd;
2459 struct iso *iso;
2460 int i;
2461
2462 /*
2463 * Make sure all TDs are marked as inactive.
2464 * Wait for completion.
2465 * Unschedule.
2466 * Deallocate.
2467 */
2468 iso = &upipe->u.iso;
2469
2470 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2471 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2472 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2473
2474 crit_enter();
2475 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2476 std = iso->stds[i];
2477 for (vstd = sc->sc_vframes[i].htd;
2478 vstd != NULL && vstd->link.std != std;
2479 vstd = vstd->link.std)
2480 ;
2481 if (vstd == NULL) {
2482 /*panic*/
2483 kprintf("uhci_device_isoc_close: %p not found\n", std);
2484 crit_exit();
2485 return;
2486 }
2487 vstd->link = std->link;
2488 vstd->td.td_link = std->td.td_link;
2489 uhci_free_std(sc, std);
2490 }
2491 crit_exit();
2492
2493 kfree(iso->stds, M_USBHC);
2494 }
2495
2496 usbd_status
2497 uhci_setup_isoc(usbd_pipe_handle pipe)
2498 {
2499 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2500 usbd_device_handle dev = upipe->pipe.device;
2501 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2502 int addr = upipe->pipe.device->address;
2503 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2504 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2505 uhci_soft_td_t *std, *vstd;
2506 u_int32_t token;
2507 struct iso *iso;
2508 int i;
2509
2510 iso = &upipe->u.iso;
2511 iso->stds = kmalloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2512 M_USBHC, M_INTWAIT);
2513
2514 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2515 UHCI_TD_OUT(0, endpt, addr, 0);
2516
2517 /* Allocate the TDs and mark as inactive; */
2518 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2519 std = uhci_alloc_std(sc);
2520 if (std == 0)
2521 goto bad;
2522 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2523 std->td.td_token = htole32(token);
2524 iso->stds[i] = std;
2525 }
2526
2527 /* Insert TDs into schedule. */
2528 crit_enter();
2529 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2530 std = iso->stds[i];
2531 vstd = sc->sc_vframes[i].htd;
2532 std->link = vstd->link;
2533 std->td.td_link = vstd->td.td_link;
2534 vstd->link.std = std;
2535 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2536 }
2537 crit_exit();
2538
2539 iso->next = -1;
2540 iso->inuse = 0;
2541
2542 return (USBD_NORMAL_COMPLETION);
2543
2544 bad:
2545 while (--i >= 0)
2546 uhci_free_std(sc, iso->stds[i]);
2547 kfree(iso->stds, M_USBHC);
2548 return (USBD_NOMEM);
2549 }
2550
2551 void
2552 uhci_device_isoc_done(usbd_xfer_handle xfer)
2553 {
2554 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2555
2556 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2557
2558 if (ii->xfer != xfer)
2559 /* Not on interrupt list, ignore it. */
2560 return;
2561
2562 if (!uhci_active_intr_info(ii))
2563 return;
2564
2565 #ifdef DIAGNOSTIC
2566 if (xfer->busy_free != XFER_BUSY) {
2567 kprintf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2568 xfer, xfer->busy_free);
2569 return;
2570 }
2571
2572 if (ii->stdend == NULL) {
2573 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2574 #ifdef USB_DEBUG
2575 uhci_dump_ii(ii);
2576 #endif
2577 return;
2578 }
2579 #endif
2580
2581 /* Turn off the interrupt since it is active even if the TD is not. */
2582 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2583
2584 uhci_del_intr_info(ii); /* remove from active list */
2585
2586 #ifdef DIAGNOSTIC
2587 if (ii->stdend == NULL) {
2588 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2589 #ifdef USB_DEBUG
2590 uhci_dump_ii(ii);
2591 #endif
2592 return;
2593 }
2594 #endif
2595 }
2596
2597 void
2598 uhci_device_intr_done(usbd_xfer_handle xfer)
2599 {
2600 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2601 uhci_softc_t *sc = ii->sc;
2602 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2603 uhci_soft_qh_t *sqh;
2604 int i, npoll;
2605
2606 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2607
2608 npoll = upipe->u.intr.npoll;
2609 for(i = 0; i < npoll; i++) {
2610 sqh = upipe->u.intr.qhs[i];
2611 sqh->elink = NULL;
2612 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2613 }
2614 uhci_free_std_chain(sc, ii->stdstart, NULL);
2615
2616 /* XXX Wasteful. */
2617 if (xfer->pipe->repeat) {
2618 uhci_soft_td_t *data, *dataend;
2619
2620 DPRINTFN(5,("uhci_device_intr_done: requeueing\n"));
2621
2622 /* This alloc cannot fail since we freed the chain above. */
2623 uhci_alloc_std_chain(upipe, sc, xfer->length,
2624 upipe->u.intr.isread, xfer->flags,
2625 &xfer->dmabuf, &data, &dataend);
2626 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2627
2628 #ifdef USB_DEBUG
2629 if (uhcidebug > 10) {
2630 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2631 uhci_dump_tds(data);
2632 uhci_dump_qh(upipe->u.intr.qhs[0]);
2633 }
2634 #endif
2635
2636 ii->stdstart = data;
2637 ii->stdend = dataend;
2638 #ifdef DIAGNOSTIC
2639 if (!ii->isdone) {
2640 kprintf("uhci_device_intr_done: not done, ii=%p\n", ii);
2641 }
2642 ii->isdone = 0;
2643 #endif
2644 for (i = 0; i < npoll; i++) {
2645 sqh = upipe->u.intr.qhs[i];
2646 sqh->elink = data;
2647 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2648 }
2649 xfer->status = USBD_IN_PROGRESS;
2650 /* The ii is already on the examined list, just leave it. */
2651 } else {
2652 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2653 if (uhci_active_intr_info(ii))
2654 uhci_del_intr_info(ii);
2655 }
2656 }
2657
2658 /* Deallocate request data structures */
2659 void
2660 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2661 {
2662 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2663 uhci_softc_t *sc = ii->sc;
2664 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2665
2666 #ifdef DIAGNOSTIC
2667 if (!(xfer->rqflags & URQ_REQUEST))
2668 panic("uhci_device_ctrl_done: not a request");
2669 #endif
2670
2671 if (!uhci_active_intr_info(ii))
2672 return;
2673
2674 uhci_del_intr_info(ii); /* remove from active list */
2675
2676 if (upipe->pipe.device->speed == USB_SPEED_LOW)
2677 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2678 else
2679 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2680
2681 if (upipe->u.ctl.length != 0)
2682 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2683
2684 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2685 }
2686
2687 /* Deallocate request data structures */
2688 void
2689 uhci_device_bulk_done(usbd_xfer_handle xfer)
2690 {
2691 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2692 uhci_softc_t *sc = ii->sc;
2693 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2694
2695 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2696 xfer, ii, sc, upipe));
2697
2698 if (!uhci_active_intr_info(ii))
2699 return;
2700
2701 uhci_del_intr_info(ii); /* remove from active list */
2702
2703 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2704
2705 uhci_free_std_chain(sc, ii->stdstart, NULL);
2706
2707 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2708 }
2709
2710 /* Add interrupt QH, called with vflock. */
2711 void
2712 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2713 {
2714 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2715 uhci_soft_qh_t *eqh;
2716
2717 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2718
2719 eqh = vf->eqh;
2720 sqh->hlink = eqh->hlink;
2721 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2722 eqh->hlink = sqh;
2723 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2724 vf->eqh = sqh;
2725 vf->bandwidth++;
2726 }
2727
2728 /* Remove interrupt QH. */
2729 void
2730 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2731 {
2732 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2733 uhci_soft_qh_t *pqh;
2734
2735 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2736
2737 /* See comment in uhci_remove_ctrl() */
2738 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2739 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2740 delay(UHCI_QH_REMOVE_DELAY);
2741 }
2742
2743 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2744 pqh->hlink = sqh->hlink;
2745 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2746 delay(UHCI_QH_REMOVE_DELAY);
2747 if (vf->eqh == sqh)
2748 vf->eqh = pqh;
2749 vf->bandwidth--;
2750 }
2751
2752 usbd_status
2753 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2754 {
2755 uhci_soft_qh_t *sqh;
2756 int i, npoll;
2757 u_int bestbw, bw, bestoffs, offs;
2758
2759 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2760 if (ival == 0) {
2761 kprintf("uhci_setintr: 0 interval\n");
2762 return (USBD_INVAL);
2763 }
2764
2765 if (ival > UHCI_VFRAMELIST_COUNT)
2766 ival = UHCI_VFRAMELIST_COUNT;
2767 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2768 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2769
2770 upipe->u.intr.npoll = npoll;
2771 upipe->u.intr.qhs =
2772 kmalloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_INTWAIT);
2773
2774 /*
2775 * Figure out which offset in the schedule that has most
2776 * bandwidth left over.
2777 */
2778 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2779 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2780 for (bw = i = 0; i < npoll; i++)
2781 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2782 if (bw < bestbw) {
2783 bestbw = bw;
2784 bestoffs = offs;
2785 }
2786 }
2787 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2788
2789 for(i = 0; i < npoll; i++) {
2790 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2791 sqh->elink = NULL;
2792 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2793 sqh->pos = MOD(i * ival + bestoffs);
2794 }
2795 #undef MOD
2796
2797 crit_enter();
2798 /* Enter QHs into the controller data structures. */
2799 for(i = 0; i < npoll; i++)
2800 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2801 crit_exit();
2802
2803 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2804 return (USBD_NORMAL_COMPLETION);
2805 }
2806
2807 /* Open a new pipe. */
2808 usbd_status
2809 uhci_open(usbd_pipe_handle pipe)
2810 {
2811 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2812 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2813 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2814 usbd_status err;
2815 int ival;
2816
2817 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2818 pipe, pipe->device->address,
2819 ed->bEndpointAddress, sc->sc_addr));
2820
2821 upipe->aborting = 0;
2822 upipe->nexttoggle = pipe->endpoint->savedtoggle;
2823
2824 if (pipe->device->address == sc->sc_addr) {
2825 switch (ed->bEndpointAddress) {
2826 case USB_CONTROL_ENDPOINT:
2827 pipe->methods = &uhci_root_ctrl_methods;
2828 break;
2829 case UE_DIR_IN | UHCI_INTR_ENDPT:
2830 pipe->methods = &uhci_root_intr_methods;
2831 break;
2832 default:
2833 return (USBD_INVAL);
2834 }
2835 } else {
2836 switch (ed->bmAttributes & UE_XFERTYPE) {
2837 case UE_CONTROL:
2838 pipe->methods = &uhci_device_ctrl_methods;
2839 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2840 if (upipe->u.ctl.sqh == NULL)
2841 goto bad;
2842 upipe->u.ctl.setup = uhci_alloc_std(sc);
2843 if (upipe->u.ctl.setup == NULL) {
2844 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2845 goto bad;
2846 }
2847 upipe->u.ctl.stat = uhci_alloc_std(sc);
2848 if (upipe->u.ctl.stat == NULL) {
2849 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2850 uhci_free_std(sc, upipe->u.ctl.setup);
2851 goto bad;
2852 }
2853 err = usb_allocmem(&sc->sc_bus,
2854 sizeof(usb_device_request_t),
2855 0, &upipe->u.ctl.reqdma);
2856 if (err) {
2857 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2858 uhci_free_std(sc, upipe->u.ctl.setup);
2859 uhci_free_std(sc, upipe->u.ctl.stat);
2860 goto bad;
2861 }
2862 break;
2863 case UE_INTERRUPT:
2864 pipe->methods = &uhci_device_intr_methods;
2865 ival = pipe->interval;
2866 if (ival == USBD_DEFAULT_INTERVAL)
2867 ival = ed->bInterval;
2868 return (uhci_device_setintr(sc, upipe, ival));
2869 case UE_ISOCHRONOUS:
2870 pipe->methods = &uhci_device_isoc_methods;
2871 return (uhci_setup_isoc(pipe));
2872 case UE_BULK:
2873 pipe->methods = &uhci_device_bulk_methods;
2874 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2875 if (upipe->u.bulk.sqh == NULL)
2876 goto bad;
2877 break;
2878 }
2879 }
2880 return (USBD_NORMAL_COMPLETION);
2881
2882 bad:
2883 return (USBD_NOMEM);
2884 }
2885
2886 /*
2887 * Data structures and routines to emulate the root hub.
2888 */
2889 usb_device_descriptor_t uhci_devd = {
2890 USB_DEVICE_DESCRIPTOR_SIZE,
2891 UDESC_DEVICE, /* type */
2892 {0x00, 0x01}, /* USB version */
2893 UDCLASS_HUB, /* class */
2894 UDSUBCLASS_HUB, /* subclass */
2895 UDPROTO_FSHUB, /* protocol */
2896 64, /* max packet */
2897 {0},{0},{0x00,0x01}, /* device id */
2898 1,2,0, /* string indicies */
2899 1 /* # of configurations */
2900 };
2901
2902 usb_config_descriptor_t uhci_confd = {
2903 USB_CONFIG_DESCRIPTOR_SIZE,
2904 UDESC_CONFIG,
2905 {USB_CONFIG_DESCRIPTOR_SIZE +
2906 USB_INTERFACE_DESCRIPTOR_SIZE +
2907 USB_ENDPOINT_DESCRIPTOR_SIZE},
2908 1,
2909 1,
2910 0,
2911 UC_SELF_POWERED,
2912 0 /* max power */
2913 };
2914
2915 usb_interface_descriptor_t uhci_ifcd = {
2916 USB_INTERFACE_DESCRIPTOR_SIZE,
2917 UDESC_INTERFACE,
2918 0,
2919 0,
2920 1,
2921 UICLASS_HUB,
2922 UISUBCLASS_HUB,
2923 UIPROTO_FSHUB,
2924 0
2925 };
2926
2927 usb_endpoint_descriptor_t uhci_endpd = {
2928 USB_ENDPOINT_DESCRIPTOR_SIZE,
2929 UDESC_ENDPOINT,
2930 UE_DIR_IN | UHCI_INTR_ENDPT,
2931 UE_INTERRUPT,
2932 {8},
2933 255
2934 };
2935
2936 usb_hub_descriptor_t uhci_hubd_piix = {
2937 USB_HUB_DESCRIPTOR_SIZE,
2938 UDESC_HUB,
2939 2,
2940 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2941 50, /* power on to power good */
2942 0,
2943 { 0x00 }, /* both ports are removable */
2944 };
2945
2946 int
2947 uhci_str(usb_string_descriptor_t *p, int l, char *s)
2948 {
2949 int i;
2950
2951 if (l == 0)
2952 return (0);
2953 p->bLength = 2 * strlen(s) + 2;
2954 if (l == 1)
2955 return (1);
2956 p->bDescriptorType = UDESC_STRING;
2957 l -= 2;
2958 for (i = 0; s[i] && l > 1; i++, l -= 2)
2959 USETW2(p->bString[i], 0, s[i]);
2960 return (2*i+2);
2961 }
2962
2963 /*
2964 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2965 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2966 * should not be used by the USB subsystem. As we cannot issue a
2967 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2968 * will be enabled as part of the reset.
2969 *
2970 * On the VT83C572, the port cannot be successfully enabled until the
2971 * outstanding "port enable change" and "connection status change"
2972 * events have been reset.
2973 */
2974 static usbd_status
2975 uhci_portreset(uhci_softc_t *sc, int index)
2976 {
2977 int lim, port, x;
2978
2979 if (index == 1)
2980 port = UHCI_PORTSC1;
2981 else if (index == 2)
2982 port = UHCI_PORTSC2;
2983 else
2984 return (USBD_IOERROR);
2985
2986 x = URWMASK(UREAD2(sc, port));
2987 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2988
2989 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2990
2991 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
2992 index, UREAD2(sc, port)));
2993
2994 x = URWMASK(UREAD2(sc, port));
2995 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2996
2997 delay(100);
2998
2999 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3000 index, UREAD2(sc, port)));
3001
3002 x = URWMASK(UREAD2(sc, port));
3003 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3004
3005 for (lim = 10; --lim > 0;) {
3006 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3007
3008 x = UREAD2(sc, port);
3009
3010 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3011 index, lim, x));
3012
3013 if (!(x & UHCI_PORTSC_CCS)) {
3014 /*
3015 * No device is connected (or was disconnected
3016 * during reset). Consider the port reset.
3017 * The delay must be long enough to ensure on
3018 * the initial iteration that the device
3019 * connection will have been registered. 50ms
3020 * appears to be sufficient, but 20ms is not.
3021 */
3022 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3023 index, lim));
3024 break;
3025 }
3026
3027 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3028 /*
3029 * Port enabled changed and/or connection
3030 * status changed were set. Reset either or
3031 * both raised flags (by writing a 1 to that
3032 * bit), and wait again for state to settle.
3033 */
3034 UWRITE2(sc, port, URWMASK(x) |
3035 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3036 continue;
3037 }
3038
3039 if (x & UHCI_PORTSC_PE)
3040 /* Port is enabled */
3041 break;
3042
3043 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3044 }
3045
3046 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3047 index, UREAD2(sc, port)));
3048
3049 if (lim <= 0) {
3050 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3051 return (USBD_TIMEOUT);
3052 }
3053
3054 sc->sc_isreset = 1;
3055 return (USBD_NORMAL_COMPLETION);
3056 }
3057
3058 /*
3059 * Simulate a hardware hub by handling all the necessary requests.
3060 */
3061 usbd_status
3062 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3063 {
3064 usbd_status err;
3065
3066 /* Insert last in queue. */
3067 err = usb_insert_transfer(xfer);
3068 if (err)
3069 return (err);
3070
3071 /*
3072 * Pipe isn't running (otherwise err would be USBD_INPROG),
3073 * so start it first.
3074 */
3075 return (uhci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
3076 }
3077
3078 usbd_status
3079 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3080 {
3081 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3082 usb_device_request_t *req;
3083 void *buf = NULL;
3084 int port, x;
3085 int len, value, index, status, change, l, totlen = 0;
3086 usb_port_status_t ps;
3087 usbd_status err;
3088
3089 if (sc->sc_dying)
3090 return (USBD_IOERROR);
3091
3092 #ifdef DIAGNOSTIC
3093 if (!(xfer->rqflags & URQ_REQUEST))
3094 panic("uhci_root_ctrl_transfer: not a request");
3095 #endif
3096 req = &xfer->request;
3097
3098 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3099 req->bmRequestType, req->bRequest));
3100
3101 len = UGETW(req->wLength);
3102 value = UGETW(req->wValue);
3103 index = UGETW(req->wIndex);
3104
3105 if (len != 0)
3106 buf = KERNADDR(&xfer->dmabuf, 0);
3107
3108 #define C(x,y) ((x) | ((y) << 8))
3109 switch(C(req->bRequest, req->bmRequestType)) {
3110 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3111 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3112 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3113 /*
3114 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3115 * for the integrated root hub.
3116 */
3117 break;
3118 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3119 if (len > 0) {
3120 *(u_int8_t *)buf = sc->sc_conf;
3121 totlen = 1;
3122 }
3123 break;
3124 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3125 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3126 switch(value >> 8) {
3127 case UDESC_DEVICE:
3128 if ((value & 0xff) != 0) {
3129 err = USBD_IOERROR;
3130 goto ret;
3131 }
3132 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3133 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3134 memcpy(buf, &uhci_devd, l);
3135 break;
3136 case UDESC_CONFIG:
3137 if ((value & 0xff) != 0) {
3138 err = USBD_IOERROR;
3139 goto ret;
3140 }
3141 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3142 memcpy(buf, &uhci_confd, l);
3143 buf = (char *)buf + l;
3144 len -= l;
3145 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3146 totlen += l;
3147 memcpy(buf, &uhci_ifcd, l);
3148 buf = (char *)buf + l;
3149 len -= l;
3150 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3151 totlen += l;
3152 memcpy(buf, &uhci_endpd, l);
3153 break;
3154 case UDESC_STRING:
3155 if (len == 0)
3156 break;
3157 *(u_int8_t *)buf = 0;
3158 totlen = 1;
3159 switch (value & 0xff) {
3160 case 1: /* Vendor */
3161 totlen = uhci_str(buf, len, sc->sc_vendor);
3162 break;
3163 case 2: /* Product */
3164 totlen = uhci_str(buf, len, "UHCI root hub");
3165 break;
3166 }
3167 break;
3168 default:
3169 err = USBD_IOERROR;
3170 goto ret;
3171 }
3172 break;
3173 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3174 if (len > 0) {
3175 *(u_int8_t *)buf = 0;
3176 totlen = 1;
3177 }
3178 break;
3179 case C(UR_GET_STATUS, UT_READ_DEVICE):
3180 if (len > 1) {
3181 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3182 totlen = 2;
3183 }
3184 break;
3185 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3186 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3187 if (len > 1) {
3188 USETW(((usb_status_t *)buf)->wStatus, 0);
3189 totlen = 2;
3190 }
3191 break;
3192 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3193 if (value >= USB_MAX_DEVICES) {
3194 err = USBD_IOERROR;
3195 goto ret;
3196 }
3197 sc->sc_addr = value;
3198 break;
3199 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3200 if (value != 0 && value != 1) {
3201 err = USBD_IOERROR;
3202 goto ret;
3203 }
3204 sc->sc_conf = value;
3205 break;
3206 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3207 break;
3208 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3209 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3210 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3211 err = USBD_IOERROR;
3212 goto ret;
3213 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3214 break;
3215 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3216 break;
3217 /* Hub requests */
3218 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3219 break;
3220 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3221 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3222 "port=%d feature=%d\n",
3223 index, value));
3224 if (index == 1)
3225 port = UHCI_PORTSC1;
3226 else if (index == 2)
3227 port = UHCI_PORTSC2;
3228 else {
3229 err = USBD_IOERROR;
3230 goto ret;
3231 }
3232 switch(value) {
3233 case UHF_PORT_ENABLE:
3234 x = URWMASK(UREAD2(sc, port));
3235 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3236 break;
3237 case UHF_PORT_SUSPEND:
3238 x = URWMASK(UREAD2(sc, port));
3239 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3240 break;
3241 case UHF_PORT_RESET:
3242 x = URWMASK(UREAD2(sc, port));
3243 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3244 break;
3245 case UHF_C_PORT_CONNECTION:
3246 x = URWMASK(UREAD2(sc, port));
3247 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3248 break;
3249 case UHF_C_PORT_ENABLE:
3250 x = URWMASK(UREAD2(sc, port));
3251 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3252 break;
3253 case UHF_C_PORT_OVER_CURRENT:
3254 x = URWMASK(UREAD2(sc, port));
3255 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3256 break;
3257 case UHF_C_PORT_RESET:
3258 sc->sc_isreset = 0;
3259 err = USBD_NORMAL_COMPLETION;
3260 goto ret;
3261 case UHF_PORT_CONNECTION:
3262 case UHF_PORT_OVER_CURRENT:
3263 case UHF_PORT_POWER:
3264 case UHF_PORT_LOW_SPEED:
3265 case UHF_C_PORT_SUSPEND:
3266 default:
3267 err = USBD_IOERROR;
3268 goto ret;
3269 }
3270 break;
3271 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3272 if (index == 1)
3273 port = UHCI_PORTSC1;
3274 else if (index == 2)
3275 port = UHCI_PORTSC2;
3276 else {
3277 err = USBD_IOERROR;
3278 goto ret;
3279 }
3280 if (len > 0) {
3281 *(u_int8_t *)buf =
3282 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3283 UHCI_PORTSC_LS_SHIFT;
3284 totlen = 1;
3285 }
3286 break;
3287 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3288 if ((value & 0xff) != 0) {
3289 err = USBD_IOERROR;
3290 goto ret;
3291 }
3292 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3293 totlen = l;
3294 memcpy(buf, &uhci_hubd_piix, l);
3295 break;
3296 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3297 if (len != 4) {
3298 err = USBD_IOERROR;
3299 goto ret;
3300 }
3301 memset(buf, 0, len);
3302 totlen = len;
3303 break;
3304 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3305 if (index == 1)
3306 port = UHCI_PORTSC1;
3307 else if (index == 2)
3308 port = UHCI_PORTSC2;
3309 else {
3310 err = USBD_IOERROR;
3311 goto ret;
3312 }
3313 if (len != 4) {
3314 err = USBD_IOERROR;
3315 goto ret;
3316 }
3317 x = UREAD2(sc, port);
3318 status = change = 0;
3319 if (x & UHCI_PORTSC_CCS)
3320 status |= UPS_CURRENT_CONNECT_STATUS;
3321 if (x & UHCI_PORTSC_CSC)
3322 change |= UPS_C_CONNECT_STATUS;
3323 if (x & UHCI_PORTSC_PE)
3324 status |= UPS_PORT_ENABLED;
3325 if (x & UHCI_PORTSC_POEDC)
3326 change |= UPS_C_PORT_ENABLED;
3327 if (x & UHCI_PORTSC_OCI)
3328 status |= UPS_OVERCURRENT_INDICATOR;
3329 if (x & UHCI_PORTSC_OCIC)
3330 change |= UPS_C_OVERCURRENT_INDICATOR;
3331 if (x & UHCI_PORTSC_SUSP)
3332 status |= UPS_SUSPEND;
3333 if (x & UHCI_PORTSC_LSDA)
3334 status |= UPS_LOW_SPEED;
3335 status |= UPS_PORT_POWER;
3336 if (sc->sc_isreset)
3337 change |= UPS_C_PORT_RESET;
3338 USETW(ps.wPortStatus, status);
3339 USETW(ps.wPortChange, change);
3340 l = min(len, sizeof ps);
3341 memcpy(buf, &ps, l);
3342 totlen = l;
3343 break;
3344 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3345 err = USBD_IOERROR;
3346 goto ret;
3347 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3348 break;
3349 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3350 if (index == 1)
3351 port = UHCI_PORTSC1;
3352 else if (index == 2)
3353 port = UHCI_PORTSC2;
3354 else {
3355 err = USBD_IOERROR;
3356 goto ret;
3357 }
3358 switch(value) {
3359 case UHF_PORT_ENABLE:
3360 x = URWMASK(UREAD2(sc, port));
3361 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3362 break;
3363 case UHF_PORT_SUSPEND:
3364 x = URWMASK(UREAD2(sc, port));
3365 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3366 break;
3367 case UHF_PORT_RESET:
3368 err = uhci_portreset(sc, index);
3369 goto ret;
3370 case UHF_PORT_POWER:
3371 /* Pretend we turned on power */
3372 err = USBD_NORMAL_COMPLETION;
3373 goto ret;
3374 case UHF_C_PORT_CONNECTION:
3375 case UHF_C_PORT_ENABLE:
3376 case UHF_C_PORT_OVER_CURRENT:
3377 case UHF_PORT_CONNECTION:
3378 case UHF_PORT_OVER_CURRENT:
3379 case UHF_PORT_LOW_SPEED:
3380 case UHF_C_PORT_SUSPEND:
3381 case UHF_C_PORT_RESET:
3382 default:
3383 err = USBD_IOERROR;
3384 goto ret;
3385 }
3386 break;
3387 default:
3388 err = USBD_IOERROR;
3389 goto ret;
3390 }
3391 xfer->actlen = totlen;
3392 err = USBD_NORMAL_COMPLETION;
3393 ret:
3394 xfer->status = err;
3395 crit_enter();
3396 usb_transfer_complete(xfer);
3397 crit_exit();
3398 return (USBD_IN_PROGRESS);
3399 }
3400
3401 /* Abort a root control request. */
3402 void
3403 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3404 {
3405 /* Nothing to do, all transfers are synchronous. */
3406 }
3407
3408 /* Close the root pipe. */
3409 void
3410 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3411 {
3412 DPRINTF(("uhci_root_ctrl_close\n"));
3413 }
3414
3415 /* Abort a root interrupt request. */
3416 void
3417 uhci_root_intr_abort(usbd_xfer_handle xfer)
3418 {
3419 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3420
3421 callout_stop(&sc->sc_poll_handle);
3422 sc->sc_intr_xfer = NULL;
3423
3424 if (xfer->pipe->intrxfer == xfer) {
3425 DPRINTF(("uhci_root_intr_abort: remove\n"));
3426 xfer->pipe->intrxfer = 0;
3427 }
3428 xfer->status = USBD_CANCELLED;
3429 #ifdef DIAGNOSTIC
3430 UXFER(xfer)->iinfo.isdone = 1;
3431 #endif
3432 usb_transfer_complete(xfer);
3433 }
3434
3435 usbd_status
3436 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3437 {
3438 usbd_status err;
3439
3440 /* Insert last in queue. */
3441 err = usb_insert_transfer(xfer);
3442 if (err)
3443 return (err);
3444
3445 /*
3446 * Pipe isn't running (otherwise err would be USBD_INPROG),
3447 * so start it first.
3448 */
3449 return (uhci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3450 }
3451
3452 /* Start a transfer on the root interrupt pipe */
3453 usbd_status
3454 uhci_root_intr_start(usbd_xfer_handle xfer)
3455 {
3456 usbd_pipe_handle pipe = xfer->pipe;
3457 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3458
3459 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3460 xfer, xfer->length, xfer->flags));
3461
3462 if (sc->sc_dying)
3463 return (USBD_IOERROR);
3464
3465 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3466 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3467 sc->sc_intr_xfer = xfer;
3468 return (USBD_IN_PROGRESS);
3469 }
3470
3471 /* Close the root interrupt pipe. */
3472 void
3473 uhci_root_intr_close(usbd_pipe_handle pipe)
3474 {
3475 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3476
3477 callout_stop(&sc->sc_poll_handle);
3478 sc->sc_intr_xfer = NULL;
3479 DPRINTF(("uhci_root_intr_close\n"));
3480 }
DragonFly BSD