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Don't bump intr_context when running from the softint. Hopefully this
[dragonfly.git] / sys / bus / usb / uhci.c
blob40d3928ba13b7c1941cb731f815a3f974d54644c
1 /* $NetBSD: uhci.c,v 1.170 2003/02/19 01:35:04 augustss Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.162.2.1 2006/03/01 01:59:04 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/uhci.c,v 1.29 2008/08/13 00:55:55 dillon Exp $ */
4
5 /* Also already incorporated from NetBSD:
6 * $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $
7 * $NetBSD: uhci.c,v 1.173 2003/05/13 04:41:59 gson Exp $
8 * $NetBSD: uhci.c,v 1.175 2003/09/12 16:18:08 mycroft Exp $
9 * $NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $
10 * $NetBSD: uhci.c,v 1.177 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: uhci.c,v 1.178 2004/03/02 16:32:05 martin Exp $
12 * $NetBSD: uhci.c,v 1.180 2004/07/17 20:12:03 mycroft Exp $
13 */
14
15 /*
16 * Copyright (c) 1998 The NetBSD Foundation, Inc.
17 * All rights reserved.
18 *
19 * This code is derived from software contributed to The NetBSD Foundation
20 * by Lennart Augustsson (lennart@augustsson.net) at
21 * Carlstedt Research & Technology.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * This product includes software developed by the NetBSD
34 * Foundation, Inc. and its contributors.
35 * 4. Neither the name of The NetBSD Foundation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
40 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
41 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52 /*
53 * USB Universal Host Controller driver.
54 * Handles e.g. PIIX3 and PIIX4.
55 *
56 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
57 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
59 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
60 */
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/kernel.h>
65 #include <sys/malloc.h>
66 #include <sys/endian.h>
67 #include <sys/module.h>
68 #include <sys/bus.h>
69 #if defined(DIAGNOSTIC) && defined(__i386__)
70 #include <machine/cpu.h>
71 #endif
72 #include <sys/proc.h>
73 #include <sys/queue.h>
74 #include <sys/sysctl.h>
75 #include <sys/thread2.h>
76
77 #include <machine/endian.h>
78
79 #include <bus/usb/usb.h>
80 #include <bus/usb/usbdi.h>
81 #include <bus/usb/usbdivar.h>
82 #include <bus/usb/usb_mem.h>
83 #include <bus/usb/usb_quirks.h>
84
85 #include <bus/usb/uhcireg.h>
86 #include <bus/usb/uhcivar.h>
87
88 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
89 /*#define UHCI_CTL_LOOP */
90
91 #define delay(d) DELAY(d)
92
93 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
94
95 #ifdef USB_DEBUG
96 uhci_softc_t *thesc;
97 #define DPRINTF(x) if (uhcidebug) kprintf x
98 #define DPRINTFN(n,x) if (uhcidebug>(n)) kprintf x
99 int uhcidebug = 0;
100 int uhcinoloop = 0;
101 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
102 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
103 &uhcidebug, 0, "uhci debug level");
104 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
105 &uhcinoloop, 0, "uhci noloop");
106 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
107 #else
108 #define DPRINTF(x)
109 #define DPRINTFN(n,x)
110 #endif
111
112 struct uhci_pipe {
113 struct usbd_pipe pipe;
114 int nexttoggle;
115
116 u_char aborting;
117 usbd_xfer_handle abortstart, abortend;
118
119 /* Info needed for different pipe kinds. */
120 union {
121 /* Control pipe */
122 struct {
123 uhci_soft_qh_t *sqh;
124 usb_dma_t reqdma;
125 uhci_soft_td_t *setup, *stat;
126 u_int length;
127 } ctl;
128 /* Interrupt pipe */
129 struct {
130 int npoll;
131 int isread;
132 uhci_soft_qh_t **qhs;
133 } intr;
134 /* Bulk pipe */
135 struct {
136 uhci_soft_qh_t *sqh;
137 u_int length;
138 int isread;
139 } bulk;
140 /* Iso pipe */
141 struct iso {
142 uhci_soft_td_t **stds;
143 int next, inuse;
144 } iso;
145 } u;
146 };
147
148 static void uhci_globalreset(uhci_softc_t *);
149 static usbd_status uhci_portreset(uhci_softc_t*, int);
150 static void uhci_reset(uhci_softc_t *);
151 static usbd_status uhci_run(uhci_softc_t *, int run);
152 static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
153 static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
154 static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
155 static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
156 #if 0
157 static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
158 uhci_intr_info_t *);
159 static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
160 #endif
161
162 static void uhci_free_std_chain(uhci_softc_t *,
163 uhci_soft_td_t *, uhci_soft_td_t *);
164 static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
165 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
166 uhci_soft_td_t **, uhci_soft_td_t **);
167 static void uhci_poll_hub(void *);
168 static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
169 static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
170 static void uhci_idone(uhci_intr_info_t *);
171
172 static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
173
174 static void uhci_timeout(void *);
175 static void uhci_timeout_task(void *);
176 static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
177 static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
178 static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
179 static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
180 static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
181 static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
182 static int uhci_str(usb_string_descriptor_t *, int, char *);
183 static void uhci_add_loop(uhci_softc_t *sc);
184 static void uhci_rem_loop(uhci_softc_t *sc);
185
186 static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
187 static void uhci_device_isoc_enter(usbd_xfer_handle);
188
189 static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
190 static void uhci_freem(struct usbd_bus *, usb_dma_t *);
191
192 static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
193 static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
194
195 static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
196 static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
197 static void uhci_device_ctrl_abort(usbd_xfer_handle);
198 static void uhci_device_ctrl_close(usbd_pipe_handle);
199 static void uhci_device_ctrl_done(usbd_xfer_handle);
200
201 static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
202 static usbd_status uhci_device_intr_start(usbd_xfer_handle);
203 static void uhci_device_intr_abort(usbd_xfer_handle);
204 static void uhci_device_intr_close(usbd_pipe_handle);
205 static void uhci_device_intr_done(usbd_xfer_handle);
206
207 static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
208 static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
209 static void uhci_device_bulk_abort(usbd_xfer_handle);
210 static void uhci_device_bulk_close(usbd_pipe_handle);
211 static void uhci_device_bulk_done(usbd_xfer_handle);
212
213 static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
214 static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
215 static void uhci_device_isoc_abort(usbd_xfer_handle);
216 static void uhci_device_isoc_close(usbd_pipe_handle);
217 static void uhci_device_isoc_done(usbd_xfer_handle);
218
219 static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
220 static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
221 static void uhci_root_ctrl_abort(usbd_xfer_handle);
222 static void uhci_root_ctrl_close(usbd_pipe_handle);
223 static void uhci_root_ctrl_done(usbd_xfer_handle);
224
225 static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
226 static usbd_status uhci_root_intr_start(usbd_xfer_handle);
227 static void uhci_root_intr_abort(usbd_xfer_handle);
228 static void uhci_root_intr_close(usbd_pipe_handle);
229 static void uhci_root_intr_done(usbd_xfer_handle);
230
231 static usbd_status uhci_open(usbd_pipe_handle);
232 static void uhci_poll(struct usbd_bus *);
233 static void uhci_softintr(void *);
234
235 static usbd_status uhci_device_request(usbd_xfer_handle xfer);
236
237 static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
238 static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
239 static usbd_status uhci_device_setintr(uhci_softc_t *sc,
240 struct uhci_pipe *pipe, int ival);
241
242 static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
243 static void uhci_noop(usbd_pipe_handle pipe);
244
245 static __inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
246 uhci_soft_qh_t *);
247
248 #ifdef USB_DEBUG
249 static void uhci_dump_all(uhci_softc_t *);
250 static void uhci_dumpregs(uhci_softc_t *);
251 static void uhci_dump_qhs(uhci_soft_qh_t *);
252 static void uhci_dump_qh(uhci_soft_qh_t *);
253 static void uhci_dump_tds(uhci_soft_td_t *);
254 static void uhci_dump_td(uhci_soft_td_t *);
255 static void uhci_dump_ii(uhci_intr_info_t *ii);
256 void uhci_dump(void);
257 #endif
258
259 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
260 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
261 #define UWRITE1(sc, r, x) \
262 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
263 } while (/*CONSTCOND*/0)
264 #define UWRITE2(sc, r, x) \
265 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
266 } while (/*CONSTCOND*/0)
267 #define UWRITE4(sc, r, x) \
268 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
269 } while (/*CONSTCOND*/0)
270 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
271 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
272 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
273
274 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
275 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
276
277 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
278
279 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
280
281 #define UHCI_INTR_ENDPT 1
282
283 struct usbd_bus_methods uhci_bus_methods = {
284 uhci_open,
285 uhci_softintr,
286 uhci_poll,
287 uhci_allocm,
288 uhci_freem,
289 uhci_allocx,
290 uhci_freex,
291 };
292
293 struct usbd_pipe_methods uhci_root_ctrl_methods = {
294 uhci_root_ctrl_transfer,
295 uhci_root_ctrl_start,
296 uhci_root_ctrl_abort,
297 uhci_root_ctrl_close,
298 uhci_noop,
299 uhci_root_ctrl_done,
300 };
301
302 struct usbd_pipe_methods uhci_root_intr_methods = {
303 uhci_root_intr_transfer,
304 uhci_root_intr_start,
305 uhci_root_intr_abort,
306 uhci_root_intr_close,
307 uhci_noop,
308 uhci_root_intr_done,
309 };
310
311 struct usbd_pipe_methods uhci_device_ctrl_methods = {
312 uhci_device_ctrl_transfer,
313 uhci_device_ctrl_start,
314 uhci_device_ctrl_abort,
315 uhci_device_ctrl_close,
316 uhci_noop,
317 uhci_device_ctrl_done,
318 };
319
320 struct usbd_pipe_methods uhci_device_intr_methods = {
321 uhci_device_intr_transfer,
322 uhci_device_intr_start,
323 uhci_device_intr_abort,
324 uhci_device_intr_close,
325 uhci_device_clear_toggle,
326 uhci_device_intr_done,
327 };
328
329 struct usbd_pipe_methods uhci_device_bulk_methods = {
330 uhci_device_bulk_transfer,
331 uhci_device_bulk_start,
332 uhci_device_bulk_abort,
333 uhci_device_bulk_close,
334 uhci_device_clear_toggle,
335 uhci_device_bulk_done,
336 };
337
338 struct usbd_pipe_methods uhci_device_isoc_methods = {
339 uhci_device_isoc_transfer,
340 uhci_device_isoc_start,
341 uhci_device_isoc_abort,
342 uhci_device_isoc_close,
343 uhci_noop,
344 uhci_device_isoc_done,
345 };
346
347 #define uhci_add_intr_info(sc, ii) \
348 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
349 #define uhci_del_intr_info(ii) \
350 do { \
351 LIST_REMOVE((ii), list); \
352 (ii)->list.le_prev = NULL; \
353 } while (0)
354 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
355
356 static __inline uhci_soft_qh_t *
357 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
358 {
359 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
360
361 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
362 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
363 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
364 kprintf("uhci_find_prev_qh: QH not found\n");
365 return (NULL);
366 }
367 #endif
368 }
369 return (pqh);
370 }
371
372 void
373 uhci_globalreset(uhci_softc_t *sc)
374 {
375 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
376 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
377 UHCICMD(sc, 0); /* do nothing */
378 }
379
380 usbd_status
381 uhci_init(uhci_softc_t *sc)
382 {
383 usbd_status err;
384 int i, j;
385 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
386 uhci_soft_td_t *std;
387
388 DPRINTFN(1,("uhci_init: start\n"));
389
390 #ifdef USB_DEBUG
391 thesc = sc;
392
393 if (uhcidebug > 2)
394 uhci_dumpregs(sc);
395 #endif
396
397 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
398 uhci_globalreset(sc); /* reset the controller */
399 uhci_reset(sc);
400
401 /* Allocate and initialize real frame array. */
402 err = usb_allocmem(&sc->sc_bus,
403 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
404 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
405 if (err)
406 return (err);
407 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
408 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
409 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
410
411 /*
412 * Allocate a TD, inactive, that hangs from the last QH.
413 * This is to avoid a bug in the PIIX that makes it run berserk
414 * otherwise.
415 */
416 std = uhci_alloc_std(sc);
417 if (std == NULL)
418 return (USBD_NOMEM);
419 std->link.std = NULL;
420 std->td.td_link = htole32(UHCI_PTR_T);
421 std->td.td_status = htole32(0); /* inactive */
422 std->td.td_token = htole32(0);
423 std->td.td_buffer = htole32(0);
424
425 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
426 lsqh = uhci_alloc_sqh(sc);
427 if (lsqh == NULL)
428 return (USBD_NOMEM);
429 lsqh->hlink = NULL;
430 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
431 lsqh->elink = std;
432 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
433 sc->sc_last_qh = lsqh;
434
435 /* Allocate the dummy QH where bulk traffic will be queued. */
436 bsqh = uhci_alloc_sqh(sc);
437 if (bsqh == NULL)
438 return (USBD_NOMEM);
439 bsqh->hlink = lsqh;
440 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
441 bsqh->elink = NULL;
442 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
443 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
444
445 /* Allocate dummy QH where high speed control traffic will be queued. */
446 chsqh = uhci_alloc_sqh(sc);
447 if (chsqh == NULL)
448 return (USBD_NOMEM);
449 chsqh->hlink = bsqh;
450 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
451 chsqh->elink = NULL;
452 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
453 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
454
455 /* Allocate dummy QH where control traffic will be queued. */
456 clsqh = uhci_alloc_sqh(sc);
457 if (clsqh == NULL)
458 return (USBD_NOMEM);
459 clsqh->hlink = chsqh;
460 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
461 clsqh->elink = NULL;
462 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
463 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
464
465 /*
466 * Make all (virtual) frame list pointers point to the interrupt
467 * queue heads and the interrupt queue heads at the control
468 * queue head and point the physical frame list to the virtual.
469 */
470 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
471 std = uhci_alloc_std(sc);
472 sqh = uhci_alloc_sqh(sc);
473 if (std == NULL || sqh == NULL)
474 return (USBD_NOMEM);
475 std->link.sqh = sqh;
476
477 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
478 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
479 std->td.td_token = htole32(0);
480 std->td.td_buffer = htole32(0);
481 sqh->hlink = clsqh;
482 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
483 sqh->elink = NULL;
484 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
485 sc->sc_vframes[i].htd = std;
486 sc->sc_vframes[i].etd = std;
487 sc->sc_vframes[i].hqh = sqh;
488 sc->sc_vframes[i].eqh = sqh;
489 for (j = i;
490 j < UHCI_FRAMELIST_COUNT;
491 j += UHCI_VFRAMELIST_COUNT) {
492 sc->sc_pframes[j] = htole32(std->physaddr);
493 }
494 }
495
496 LIST_INIT(&sc->sc_intrhead);
497
498 STAILQ_INIT(&sc->sc_free_xfers);
499
500 callout_init(&sc->sc_poll_handle);
501
502 /* Set up the bus struct. */
503 sc->sc_bus.methods = &uhci_bus_methods;
504 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
505
506 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
507
508 DPRINTFN(1,("uhci_init: enabling\n"));
509 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
510 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
511
512 return (uhci_run(sc, 1)); /* and here we go... */
513 }
514
515 int
516 uhci_detach(struct uhci_softc *sc, int flags)
517 {
518 usbd_xfer_handle xfer;
519 int rv = 0;
520
521 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
522 uhci_run(sc, 0);
523
524 /* Free all xfers associated with this HC. */
525 for (;;) {
526 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
527 if (xfer == NULL)
528 break;
529 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
530 kfree(xfer, M_USB);
531 }
532
533 /* XXX free other data structures XXX */
534 usb_freemem(&sc->sc_bus, &sc->sc_dma);
535
536 return (rv);
537 }
538
539 usbd_status
540 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
541 {
542 return (usb_allocmem(bus, size, 0, dma));
543 }
544
545 void
546 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
547 {
548 usb_freemem(bus, dma);
549 }
550
551 usbd_xfer_handle
552 uhci_allocx(struct usbd_bus *bus)
553 {
554 struct uhci_softc *sc = (struct uhci_softc *)bus;
555 usbd_xfer_handle xfer;
556
557 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
558 if (xfer != NULL) {
559 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
560 #ifdef DIAGNOSTIC
561 if (xfer->busy_free != XFER_FREE) {
562 kprintf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
563 xfer->busy_free);
564 }
565 #endif
566 } else {
567 xfer = kmalloc(sizeof(struct uhci_xfer), M_USB, M_INTWAIT);
568 }
569 if (xfer != NULL) {
570 memset(xfer, 0, sizeof (struct uhci_xfer));
571 UXFER(xfer)->iinfo.sc = sc;
572 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
573 xfer);
574 UXFER(xfer)->uhci_xfer_flags = 0;
575 #ifdef DIAGNOSTIC
576 UXFER(xfer)->iinfo.isdone = 1;
577 xfer->busy_free = XFER_BUSY;
578 #endif
579 }
580 return (xfer);
581 }
582
583 void
584 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
585 {
586 struct uhci_softc *sc = (struct uhci_softc *)bus;
587
588 #ifdef DIAGNOSTIC
589 if (xfer->busy_free != XFER_BUSY) {
590 kprintf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
591 xfer->busy_free);
592 return;
593 }
594 xfer->busy_free = XFER_FREE;
595 if (!UXFER(xfer)->iinfo.isdone) {
596 kprintf("uhci_freex: !isdone\n");
597 return;
598 }
599 #endif
600 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
601 }
602
603 /*
604 * Shut down the controller when the system is going down.
605 */
606 void
607 uhci_shutdown(void *v)
608 {
609 uhci_softc_t *sc = v;
610
611 DPRINTF(("uhci_shutdown: stopping the HC\n"));
612 uhci_run(sc, 0); /* stop the controller */
613 }
614
615 /*
616 * Handle suspend/resume.
617 *
618 * We need to switch to polling mode here, because this routine is
619 * called from an interrupt context. This is all right since we
620 * are almost suspended anyway.
621 */
622 void
623 uhci_power(int why, void *v)
624 {
625 uhci_softc_t *sc = v;
626 int cmd;
627
628 crit_enter();
629 cmd = UREAD2(sc, UHCI_CMD);
630
631 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
632 sc, why, sc->sc_suspend, cmd));
633
634 if (why != PWR_RESUME) {
635 #ifdef USB_DEBUG
636 if (uhcidebug > 2)
637 uhci_dumpregs(sc);
638 #endif
639 if (sc->sc_intr_xfer != NULL)
640 callout_stop(&sc->sc_poll_handle);
641 sc->sc_bus.use_polling++;
642 uhci_run(sc, 0); /* stop the controller */
643
644 /* save some state if BIOS doesn't */
645 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
646 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
647
648 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
649
650 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
651 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
652 sc->sc_suspend = why;
653 sc->sc_bus.use_polling--;
654 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
655 } else {
656 #ifdef DIAGNOSTIC
657 if (sc->sc_suspend == PWR_RESUME)
658 kprintf("uhci_power: weird, resume without suspend.\n");
659 #endif
660 sc->sc_bus.use_polling++;
661 sc->sc_suspend = why;
662 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
663 uhci_globalreset(sc); /* reset the controller */
664 uhci_reset(sc);
665 if (cmd & UHCI_CMD_RS)
666 uhci_run(sc, 0); /* in case BIOS has started it */
667
668 uhci_globalreset(sc);
669 uhci_reset(sc);
670
671 /* restore saved state */
672 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
673 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
674 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
675
676 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
677 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
678 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
679 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
680 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
681 UHCICMD(sc, UHCI_CMD_MAXP);
682 uhci_run(sc, 1); /* and start traffic again */
683 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
684 sc->sc_bus.use_polling--;
685 if (sc->sc_intr_xfer != NULL)
686 callout_reset(&sc->sc_poll_handle, sc->sc_ival,
687 uhci_poll_hub, sc->sc_intr_xfer);
688 #ifdef USB_DEBUG
689 if (uhcidebug > 2)
690 uhci_dumpregs(sc);
691 #endif
692 }
693 crit_exit();
694 }
695
696 #ifdef USB_DEBUG
697 static void
698 uhci_dumpregs(uhci_softc_t *sc)
699 {
700 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
701 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
702 device_get_nameunit(sc->sc_bus.bdev),
703 UREAD2(sc, UHCI_CMD),
704 UREAD2(sc, UHCI_STS),
705 UREAD2(sc, UHCI_INTR),
706 UREAD2(sc, UHCI_FRNUM),
707 UREAD4(sc, UHCI_FLBASEADDR),
708 UREAD1(sc, UHCI_SOF),
709 UREAD2(sc, UHCI_PORTSC1),
710 UREAD2(sc, UHCI_PORTSC2)));
711 }
712
713 void
714 uhci_dump_td(uhci_soft_td_t *p)
715 {
716 char sbuf[128], sbuf2[128];
717
718 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
719 "token=0x%08lx buffer=0x%08lx\n",
720 p, (long)p->physaddr,
721 (long)le32toh(p->td.td_link),
722 (long)le32toh(p->td.td_status),
723 (long)le32toh(p->td.td_token),
724 (long)le32toh(p->td.td_buffer)));
725
726 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
727 sbuf, sizeof(sbuf));
728 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
729 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
730 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
731 sbuf2, sizeof(sbuf2));
732
733 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
734 "D=%d,maxlen=%d\n", sbuf, sbuf2,
735 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
736 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
737 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
738 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
739 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
740 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
741 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
742 }
743
744 void
745 uhci_dump_qh(uhci_soft_qh_t *sqh)
746 {
747 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
748 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
749 le32toh(sqh->qh.qh_elink)));
750 }
751
752 #if 1
753 void
754 uhci_dump(void)
755 {
756 uhci_dump_all(thesc);
757 }
758 #endif
759
760 void
761 uhci_dump_all(uhci_softc_t *sc)
762 {
763 uhci_dumpregs(sc);
764 kprintf("intrs=%d\n", sc->sc_bus.no_intrs);
765 /*kprintf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
766 uhci_dump_qh(sc->sc_lctl_start);
767 }
768
769 void
770 uhci_dump_qhs(uhci_soft_qh_t *sqh)
771 {
772 uhci_dump_qh(sqh);
773
774 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
775 * Traverses sideways first, then down.
776 *
777 * QH1
778 * QH2
779 * No QH
780 * TD2.1
781 * TD2.2
782 * TD1.1
783 * etc.
784 *
785 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
786 */
787
788
789 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
790 uhci_dump_qhs(sqh->hlink);
791 else
792 DPRINTF(("No QH\n"));
793
794 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
795 uhci_dump_tds(sqh->elink);
796 else
797 DPRINTF(("No TD\n"));
798 }
799
800 void
801 uhci_dump_tds(uhci_soft_td_t *std)
802 {
803 uhci_soft_td_t *td;
804
805 for(td = std; td != NULL; td = td->link.std) {
806 uhci_dump_td(td);
807
808 /* Check whether the link pointer in this TD marks
809 * the link pointer as end of queue. This avoids
810 * printing the free list in case the queue/TD has
811 * already been moved there (seatbelt).
812 */
813 if (le32toh(td->td.td_link) & UHCI_PTR_T ||
814 le32toh(td->td.td_link) == 0)
815 break;
816 }
817 }
818
819 static void
820 uhci_dump_ii(uhci_intr_info_t *ii)
821 {
822 usbd_pipe_handle pipe;
823 usb_endpoint_descriptor_t *ed;
824 usbd_device_handle dev;
825
826 #ifdef DIAGNOSTIC
827 #define DONE ii->isdone
828 #else
829 #define DONE 0
830 #endif
831 if (ii == NULL) {
832 kprintf("ii NULL\n");
833 return;
834 }
835 if (ii->xfer == NULL) {
836 kprintf("ii %p: done=%d xfer=NULL\n",
837 ii, DONE);
838 return;
839 }
840 pipe = ii->xfer->pipe;
841 if (pipe == NULL) {
842 kprintf("ii %p: done=%d xfer=%p pipe=NULL\n",
843 ii, DONE, ii->xfer);
844 return;
845 }
846 if (pipe->endpoint == NULL) {
847 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
848 ii, DONE, ii->xfer, pipe);
849 return;
850 }
851 if (pipe->device == NULL) {
852 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
853 ii, DONE, ii->xfer, pipe);
854 return;
855 }
856 ed = pipe->endpoint->edesc;
857 dev = pipe->device;
858 kprintf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
859 ii, DONE, ii->xfer, dev,
860 UGETW(dev->ddesc.idVendor),
861 UGETW(dev->ddesc.idProduct),
862 dev->address, pipe,
863 ed->bEndpointAddress, ed->bmAttributes);
864 #undef DONE
865 }
866
867 void uhci_dump_iis(struct uhci_softc *sc);
868 void
869 uhci_dump_iis(struct uhci_softc *sc)
870 {
871 uhci_intr_info_t *ii;
872
873 kprintf("intr_info list:\n");
874 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
875 uhci_dump_ii(ii);
876 }
877
878 void iidump(void);
879 void iidump(void) { uhci_dump_iis(thesc); }
880
881 #endif
882
883 /*
884 * This routine is executed periodically and simulates interrupts
885 * from the root controller interrupt pipe for port status change.
886 */
887 void
888 uhci_poll_hub(void *addr)
889 {
890 usbd_xfer_handle xfer = addr;
891 usbd_pipe_handle pipe = xfer->pipe;
892 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
893 u_char *p;
894
895 DPRINTFN(20, ("uhci_poll_hub\n"));
896
897 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
898
899 p = KERNADDR(&xfer->dmabuf, 0);
900 p[0] = 0;
901 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
902 p[0] |= 1<<1;
903 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
904 p[0] |= 1<<2;
905 if (p[0] == 0)
906 /* No change, try again in a while */
907 return;
908
909 xfer->actlen = 1;
910 xfer->status = USBD_NORMAL_COMPLETION;
911 crit_enter();
912 xfer->device->bus->intr_context++;
913 usb_transfer_complete(xfer);
914 xfer->device->bus->intr_context--;
915 crit_exit();
916 }
917
918 void
919 uhci_root_intr_done(usbd_xfer_handle xfer)
920 {
921 }
922
923 void
924 uhci_root_ctrl_done(usbd_xfer_handle xfer)
925 {
926 }
927
928 /*
929 * Let the last QH loop back to the high speed control transfer QH.
930 * This is what intel calls "bandwidth reclamation" and improves
931 * USB performance a lot for some devices.
932 * If we are already looping, just count it.
933 */
934 void
935 uhci_add_loop(uhci_softc_t *sc) {
936 #ifdef USB_DEBUG
937 if (uhcinoloop)
938 return;
939 #endif
940 if (++sc->sc_loops == 1) {
941 DPRINTFN(5,("uhci_start_loop: add\n"));
942 /* Note, we don't loop back the soft pointer. */
943 sc->sc_last_qh->qh.qh_hlink =
944 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
945 }
946 }
947
948 void
949 uhci_rem_loop(uhci_softc_t *sc) {
950 #ifdef USB_DEBUG
951 if (uhcinoloop)
952 return;
953 #endif
954 if (--sc->sc_loops == 0) {
955 DPRINTFN(5,("uhci_end_loop: remove\n"));
956 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
957 }
958 }
959
960 /* Add high speed control QH, called from a critical section. */
961 void
962 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
963 {
964 uhci_soft_qh_t *eqh;
965
966 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
967 eqh = sc->sc_hctl_end;
968 sqh->hlink = eqh->hlink;
969 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
970 eqh->hlink = sqh;
971 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
972 sc->sc_hctl_end = sqh;
973 #ifdef UHCI_CTL_LOOP
974 uhci_add_loop(sc);
975 #endif
976 }
977
978 /* Remove high speed control QH, called from a critical section. */
979 void
980 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
981 {
982 uhci_soft_qh_t *pqh;
983
984 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
985 #ifdef UHCI_CTL_LOOP
986 uhci_rem_loop(sc);
987 #endif
988 /*
989 * The T bit should be set in the elink of the QH so that the HC
990 * doesn't follow the pointer. This condition may fail if the
991 * the transferred packet was short so that the QH still points
992 * at the last used TD.
993 * In this case we set the T bit and wait a little for the HC
994 * to stop looking at the TD.
995 */
996 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
997 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
998 delay(UHCI_QH_REMOVE_DELAY);
999 }
1000
1001 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1002 pqh->hlink = sqh->hlink;
1003 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1004 delay(UHCI_QH_REMOVE_DELAY);
1005 if (sc->sc_hctl_end == sqh)
1006 sc->sc_hctl_end = pqh;
1007 }
1008
1009 /* Add low speed control QH, called from a critical section. */
1010 void
1011 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1012 {
1013 uhci_soft_qh_t *eqh;
1014
1015 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1016 eqh = sc->sc_lctl_end;
1017 sqh->hlink = eqh->hlink;
1018 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1019 eqh->hlink = sqh;
1020 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1021 sc->sc_lctl_end = sqh;
1022 }
1023
1024 /* Remove low speed control QH, called from a critical section. */
1025 void
1026 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1027 {
1028 uhci_soft_qh_t *pqh;
1029
1030 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1031 /* See comment in uhci_remove_hs_ctrl() */
1032 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1033 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1034 delay(UHCI_QH_REMOVE_DELAY);
1035 }
1036 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1037 pqh->hlink = sqh->hlink;
1038 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1039 delay(UHCI_QH_REMOVE_DELAY);
1040 if (sc->sc_lctl_end == sqh)
1041 sc->sc_lctl_end = pqh;
1042 }
1043
1044 /* Add bulk QH, called from a critical section. */
1045 void
1046 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1047 {
1048 uhci_soft_qh_t *eqh;
1049
1050 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1051 eqh = sc->sc_bulk_end;
1052 sqh->hlink = eqh->hlink;
1053 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1054 eqh->hlink = sqh;
1055 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1056 sc->sc_bulk_end = sqh;
1057 uhci_add_loop(sc);
1058 }
1059
1060 /* Remove bulk QH, called from a critical section. */
1061 void
1062 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1063 {
1064 uhci_soft_qh_t *pqh;
1065
1066 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1067 uhci_rem_loop(sc);
1068 /* See comment in uhci_remove_hs_ctrl() */
1069 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1070 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1071 delay(UHCI_QH_REMOVE_DELAY);
1072 }
1073 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1074 pqh->hlink = sqh->hlink;
1075 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1076 delay(UHCI_QH_REMOVE_DELAY);
1077 if (sc->sc_bulk_end == sqh)
1078 sc->sc_bulk_end = pqh;
1079 }
1080
1081 static int uhci_intr1(uhci_softc_t *);
1082
1083 int
1084 uhci_intr(void *arg)
1085 {
1086 uhci_softc_t *sc = arg;
1087
1088 if (sc->sc_dying || (sc->sc_flags & UHCI_SCFLG_DONEINIT) == 0)
1089 return (0);
1090
1091 DPRINTFN(15,("uhci_intr: real interrupt\n"));
1092 if (sc->sc_bus.use_polling) {
1093 #ifdef DIAGNOSTIC
1094 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1095 #endif
1096 return (0);
1097 }
1098
1099 return (uhci_intr1(sc));
1100 }
1101
1102 int
1103 uhci_intr1(uhci_softc_t *sc)
1104 {
1105
1106 int status;
1107 int ack;
1108
1109 /*
1110 * It can happen that an interrupt will be delivered to
1111 * us before the device has been fully attached and the
1112 * softc struct has been configured. Usually this happens
1113 * when kldloading the USB support as a module after the
1114 * system has been booted. If we detect this condition,
1115 * we need to squelch the unwanted interrupts until we're
1116 * ready for them.
1117 */
1118 if (sc->sc_bus.bdev == NULL) {
1119 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */
1120 uhci_run(sc, 0); /* stop the controller */
1121 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
1122 return(0);
1123 }
1124
1125 #ifdef USB_DEBUG
1126 if (uhcidebug > 15) {
1127 DPRINTF(("%s: uhci_intr1\n", device_get_nameunit(sc->sc_bus.bdev)));
1128 uhci_dumpregs(sc);
1129 }
1130 #endif
1131 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1132 if (status == 0) /* The interrupt was not for us. */
1133 return (0);
1134
1135 if (sc->sc_suspend != PWR_RESUME) {
1136 device_printf(sc->sc_bus.bdev,
1137 "interrupt while not operating ignored\n");
1138 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1139 return (0);
1140 }
1141
1142 ack = 0;
1143 if (status & UHCI_STS_USBINT)
1144 ack |= UHCI_STS_USBINT;
1145 if (status & UHCI_STS_USBEI)
1146 ack |= UHCI_STS_USBEI;
1147 if (status & UHCI_STS_RD) {
1148 ack |= UHCI_STS_RD;
1149 #ifdef USB_DEBUG
1150 device_printf(sc->sc_bus.bdev, "resume detect\n");
1151 #endif
1152 }
1153 if (status & UHCI_STS_HSE) {
1154 ack |= UHCI_STS_HSE;
1155 device_printf(sc->sc_bus.bdev, "host system error\n");
1156 }
1157 if (status & UHCI_STS_HCPE) {
1158 ack |= UHCI_STS_HCPE;
1159 device_printf(sc->sc_bus.bdev,
1160 "host controller process error\n");
1161 }
1162 if (status & UHCI_STS_HCH) {
1163 /* no acknowledge needed */
1164 if (!sc->sc_dying) {
1165 device_printf(sc->sc_bus.bdev,
1166 "host controller halted\n");
1167 #ifdef USB_DEBUG
1168 uhci_dump_all(sc);
1169 #endif
1170 }
1171 sc->sc_dying = 1;
1172 }
1173
1174 if (!ack)
1175 return (0); /* nothing to acknowledge */
1176 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1177
1178 sc->sc_bus.no_intrs++;
1179 usb_schedsoftintr(&sc->sc_bus);
1180
1181 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_get_nameunit(sc->sc_bus.bdev)));
1182
1183 return (1);
1184 }
1185
1186 void
1187 uhci_softintr(void *v)
1188 {
1189 uhci_softc_t *sc = v;
1190 uhci_intr_info_t *ii, *nextii;
1191
1192 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
1193 sc->sc_bus.intr_context));
1194
1195 /*
1196 * this is a software interrupt, not a real interrupt,
1197 * do not bump intr_context
1198 */
1199 /* sc->sc_bus.intr_context++; */
1200
1201 /*
1202 * Interrupts on UHCI really suck. When the host controller
1203 * interrupts because a transfer is completed there is no
1204 * way of knowing which transfer it was. You can scan down
1205 * the TDs and QHs of the previous frame to limit the search,
1206 * but that assumes that the interrupt was not delayed by more
1207 * than 1 ms, which may not always be true (e.g. after debug
1208 * output on a slow console).
1209 * We scan all interrupt descriptors to see if any have
1210 * completed.
1211 */
1212 LIST_FOREACH_MUTABLE(ii, &sc->sc_intrhead, list, nextii)
1213 uhci_check_intr(sc, ii);
1214
1215 #ifdef USB_USE_SOFTINTR
1216 if (sc->sc_softwake) {
1217 sc->sc_softwake = 0;
1218 wakeup(&sc->sc_softwake);
1219 }
1220 #endif /* USB_USE_SOFTINTR */
1221
1222 /* sc->sc_bus.intr_context--; */
1223 }
1224
1225 /* Check for an interrupt. */
1226 void
1227 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1228 {
1229 uhci_soft_td_t *std, *lstd;
1230 u_int32_t status;
1231
1232 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1233 #ifdef DIAGNOSTIC
1234 if (ii == NULL) {
1235 kprintf("uhci_check_intr: no ii? %p\n", ii);
1236 return;
1237 }
1238 #endif
1239 if (ii->xfer->status == USBD_CANCELLED ||
1240 ii->xfer->status == USBD_TIMEOUT) {
1241 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1242 return;
1243 }
1244
1245 if (ii->stdstart == NULL)
1246 return;
1247 lstd = ii->stdend;
1248 #ifdef DIAGNOSTIC
1249 if (lstd == NULL) {
1250 kprintf("uhci_check_intr: std==0\n");
1251 return;
1252 }
1253 #endif
1254 /*
1255 * If the last TD is still active we need to check whether there
1256 * is an error somewhere in the middle, or whether there was a
1257 * short packet (SPD and not ACTIVE).
1258 */
1259 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1260 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1261 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1262 status = le32toh(std->td.td_status);
1263 /* If there's an active TD the xfer isn't done. */
1264 if (status & UHCI_TD_ACTIVE)
1265 break;
1266 /* Any kind of error makes the xfer done. */
1267 if (status & UHCI_TD_STALLED)
1268 goto done;
1269 /* We want short packets, and it is short: it's done */
1270 if ((status & UHCI_TD_SPD) &&
1271 UHCI_TD_GET_ACTLEN(status) <
1272 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
1273 goto done;
1274 }
1275 }
1276 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1277 ii, ii->stdstart));
1278 return;
1279 }
1280 done:
1281 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1282 callout_stop(&ii->xfer->timeout_handle);
1283 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
1284 uhci_idone(ii);
1285 }
1286
1287 /* Called from a critical section. */
1288 void
1289 uhci_idone(uhci_intr_info_t *ii)
1290 {
1291 usbd_xfer_handle xfer = ii->xfer;
1292 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1293 uhci_soft_td_t *std;
1294 u_int32_t status = 0, nstatus;
1295 int actlen;
1296
1297 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1298 #ifdef DIAGNOSTIC
1299 {
1300 crit_enter();
1301 if (ii->isdone) {
1302 crit_exit();
1303 #ifdef USB_DEBUG
1304 kprintf("uhci_idone: ii is done!\n ");
1305 uhci_dump_ii(ii);
1306 #else
1307 kprintf("uhci_idone: ii=%p is done!\n", ii);
1308 #endif
1309 return;
1310 }
1311 ii->isdone = 1;
1312 crit_exit();
1313 }
1314 #endif
1315
1316 if (xfer->nframes != 0) {
1317 /* Isoc transfer, do things differently. */
1318 uhci_soft_td_t **stds = upipe->u.iso.stds;
1319 int i, n, nframes, len;
1320
1321 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1322
1323 nframes = xfer->nframes;
1324 actlen = 0;
1325 n = UXFER(xfer)->curframe;
1326 for (i = 0; i < nframes; i++) {
1327 std = stds[n];
1328 #ifdef USB_DEBUG
1329 if (uhcidebug > 5) {
1330 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1331 uhci_dump_td(std);
1332 }
1333 #endif
1334 if (++n >= UHCI_VFRAMELIST_COUNT)
1335 n = 0;
1336 status = le32toh(std->td.td_status);
1337 len = UHCI_TD_GET_ACTLEN(status);
1338 xfer->frlengths[i] = len;
1339 actlen += len;
1340 }
1341 upipe->u.iso.inuse -= nframes;
1342 xfer->actlen = actlen;
1343 xfer->status = USBD_NORMAL_COMPLETION;
1344 goto end;
1345 }
1346
1347 #ifdef USB_DEBUG
1348 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1349 ii, xfer, upipe));
1350 if (uhcidebug > 10)
1351 uhci_dump_tds(ii->stdstart);
1352 #endif
1353
1354 /* The transfer is done, compute actual length and status. */
1355 actlen = 0;
1356 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1357 nstatus = le32toh(std->td.td_status);
1358 if (nstatus & UHCI_TD_ACTIVE)
1359 break;
1360
1361 status = nstatus;
1362 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1363 UHCI_TD_PID_SETUP) {
1364 actlen += UHCI_TD_GET_ACTLEN(status);
1365 } else {
1366 /*
1367 * UHCI will report CRCTO in addition to a STALL or NAK
1368 * for a SETUP transaction. See section 3.2.2, "TD
1369 * CONTROL AND STATUS".
1370 */
1371 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1372 status &= ~UHCI_TD_CRCTO;
1373 }
1374
1375 }
1376 /* If there are left over TDs we need to update the toggle. */
1377 if (std != NULL)
1378 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1379
1380 status &= UHCI_TD_ERROR;
1381 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1382 actlen, status));
1383 xfer->actlen = actlen;
1384 if (status != 0) {
1385 #ifdef USB_DEBUG
1386 char sbuf[128];
1387
1388 bitmask_snprintf((u_int32_t)status,
1389 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1390 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1391 sbuf, sizeof(sbuf));
1392
1393 DPRINTFN((status == UHCI_TD_STALLED)*10,
1394 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1395 "status 0x%s\n",
1396 xfer->pipe->device->address,
1397 xfer->pipe->endpoint->edesc->bEndpointAddress,
1398 sbuf));
1399 #endif
1400 if (status == UHCI_TD_STALLED)
1401 xfer->status = USBD_STALLED;
1402 else
1403 xfer->status = USBD_IOERROR; /* more info XXX */
1404 } else {
1405 xfer->status = USBD_NORMAL_COMPLETION;
1406 }
1407
1408 end:
1409 usb_transfer_complete(xfer);
1410 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1411 }
1412
1413 /*
1414 * Called when a request does not complete.
1415 */
1416 void
1417 uhci_timeout(void *addr)
1418 {
1419 uhci_intr_info_t *ii = addr;
1420 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1421 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1422 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1423
1424 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1425
1426 if (sc->sc_dying) {
1427 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1428 return;
1429 }
1430
1431 /* Execute the abort in a process context. */
1432 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1433 USB_TASKQ_HC);
1434 }
1435
1436 void
1437 uhci_timeout_task(void *addr)
1438 {
1439 usbd_xfer_handle xfer = addr;
1440
1441 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1442
1443 crit_enter();
1444 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1445 crit_exit();
1446 }
1447
1448 /*
1449 * Wait here until controller claims to have an interrupt.
1450 * Then call uhci_intr and return. Use timeout to avoid waiting
1451 * too long.
1452 * Only used during boot when interrupts are not enabled yet.
1453 */
1454 void
1455 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1456 {
1457 int timo = xfer->timeout;
1458 uhci_intr_info_t *ii;
1459
1460 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1461
1462 xfer->status = USBD_IN_PROGRESS;
1463 for (; timo >= 0; timo--) {
1464 usb_delay_ms(&sc->sc_bus, 1);
1465 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1466 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1467 uhci_intr1(sc);
1468 if (xfer->status != USBD_IN_PROGRESS)
1469 return;
1470 }
1471
1472 /* Timeout */
1473 DPRINTF(("uhci_waitintr: timeout\n"));
1474 for (ii = LIST_FIRST(&sc->sc_intrhead);
1475 ii != NULL && ii->xfer != xfer;
1476 ii = LIST_NEXT(ii, list))
1477 ;
1478 #ifdef DIAGNOSTIC
1479 if (ii == NULL)
1480 panic("uhci_waitintr: lost intr_info");
1481 #endif
1482 uhci_idone(ii);
1483 }
1484
1485 void
1486 uhci_poll(struct usbd_bus *bus)
1487 {
1488 uhci_softc_t *sc = (uhci_softc_t *)bus;
1489
1490 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1491 uhci_intr1(sc);
1492 }
1493
1494 void
1495 uhci_reset(uhci_softc_t *sc)
1496 {
1497 int n;
1498
1499 UHCICMD(sc, UHCI_CMD_HCRESET);
1500 /* The reset bit goes low when the controller is done. */
1501 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1502 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1503 usb_delay_ms(&sc->sc_bus, 1);
1504 if (n >= UHCI_RESET_TIMEOUT)
1505 device_printf(sc->sc_bus.bdev, "controller did not reset\n");
1506 }
1507
1508 usbd_status
1509 uhci_run(uhci_softc_t *sc, int run)
1510 {
1511 int n, running;
1512 u_int16_t cmd;
1513
1514 run = run != 0;
1515 crit_enter();
1516 DPRINTF(("uhci_run: setting run=%d\n", run));
1517 cmd = UREAD2(sc, UHCI_CMD);
1518 if (run)
1519 cmd |= UHCI_CMD_RS;
1520 else
1521 cmd &= ~UHCI_CMD_RS;
1522 UHCICMD(sc, cmd);
1523 for(n = 0; n < 10; n++) {
1524 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1525 /* return when we've entered the state we want */
1526 if (run == running) {
1527 crit_exit();
1528 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1529 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1530 return (USBD_NORMAL_COMPLETION);
1531 }
1532 usb_delay_ms(&sc->sc_bus, 1);
1533 }
1534 crit_exit();
1535 device_printf(sc->sc_bus.bdev, "cannot %s\n", run ? "start" : "stop");
1536 return (USBD_IOERROR);
1537 }
1538
1539 /*
1540 * Memory management routines.
1541 * uhci_alloc_std allocates TDs
1542 * uhci_alloc_sqh allocates QHs
1543 * These two routines do their own free list management,
1544 * partly for speed, partly because allocating DMAable memory
1545 * has page size granularaity so much memory would be wasted if
1546 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1547 */
1548
1549 uhci_soft_td_t *
1550 uhci_alloc_std(uhci_softc_t *sc)
1551 {
1552 uhci_soft_td_t *std;
1553 usbd_status err;
1554 int i, offs;
1555 usb_dma_t dma;
1556
1557 if (sc->sc_freetds == NULL) {
1558 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1559 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1560 UHCI_TD_ALIGN, &dma);
1561 if (err)
1562 return (0);
1563 for(i = 0; i < UHCI_STD_CHUNK; i++) {
1564 offs = i * UHCI_STD_SIZE;
1565 std = KERNADDR(&dma, offs);
1566 std->physaddr = DMAADDR(&dma, offs);
1567 std->link.std = sc->sc_freetds;
1568 sc->sc_freetds = std;
1569 }
1570 }
1571 std = sc->sc_freetds;
1572 sc->sc_freetds = std->link.std;
1573 memset(&std->td, 0, sizeof(uhci_td_t));
1574 return std;
1575 }
1576
1577 void
1578 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1579 {
1580 #ifdef DIAGNOSTIC
1581 #define TD_IS_FREE 0x12345678
1582 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1583 kprintf("uhci_free_std: freeing free TD %p\n", std);
1584 return;
1585 }
1586 std->td.td_token = htole32(TD_IS_FREE);
1587 #endif
1588 std->link.std = sc->sc_freetds;
1589 sc->sc_freetds = std;
1590 }
1591
1592 uhci_soft_qh_t *
1593 uhci_alloc_sqh(uhci_softc_t *sc)
1594 {
1595 uhci_soft_qh_t *sqh;
1596 usbd_status err;
1597 int i, offs;
1598 usb_dma_t dma;
1599
1600 if (sc->sc_freeqhs == NULL) {
1601 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1602 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1603 UHCI_QH_ALIGN, &dma);
1604 if (err)
1605 return (0);
1606 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1607 offs = i * UHCI_SQH_SIZE;
1608 sqh = KERNADDR(&dma, offs);
1609 sqh->physaddr = DMAADDR(&dma, offs);
1610 sqh->hlink = sc->sc_freeqhs;
1611 sc->sc_freeqhs = sqh;
1612 }
1613 }
1614 sqh = sc->sc_freeqhs;
1615 sc->sc_freeqhs = sqh->hlink;
1616 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1617 return (sqh);
1618 }
1619
1620 void
1621 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1622 {
1623 sqh->hlink = sc->sc_freeqhs;
1624 sc->sc_freeqhs = sqh;
1625 }
1626
1627 void
1628 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1629 uhci_soft_td_t *stdend)
1630 {
1631 uhci_soft_td_t *p;
1632
1633 for (; std != stdend; std = p) {
1634 p = std->link.std;
1635 uhci_free_std(sc, std);
1636 }
1637 }
1638
1639 usbd_status
1640 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1641 int rd, u_int16_t flags, usb_dma_t *dma,
1642 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1643 {
1644 uhci_soft_td_t *p, *lastp;
1645 uhci_physaddr_t lastlink;
1646 int i, ntd, l, tog, maxp;
1647 u_int32_t status;
1648 int addr = upipe->pipe.device->address;
1649 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1650
1651 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1652 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1653 upipe->pipe.device->speed, flags));
1654 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1655 if (maxp == 0) {
1656 kprintf("uhci_alloc_std_chain: maxp=0\n");
1657 return (USBD_INVAL);
1658 }
1659 ntd = (len + maxp - 1) / maxp;
1660 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1661 ntd++;
1662 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1663 if (ntd == 0) {
1664 *sp = *ep = 0;
1665 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1666 return (USBD_NORMAL_COMPLETION);
1667 }
1668 tog = upipe->nexttoggle;
1669 if (ntd % 2 == 0)
1670 tog ^= 1;
1671 upipe->nexttoggle = tog ^ 1;
1672 lastp = NULL;
1673 lastlink = UHCI_PTR_T;
1674 ntd--;
1675 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1676 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1677 status |= UHCI_TD_LS;
1678 if (flags & USBD_SHORT_XFER_OK)
1679 status |= UHCI_TD_SPD;
1680 for (i = ntd; i >= 0; i--) {
1681 p = uhci_alloc_std(sc);
1682 if (p == NULL) {
1683 uhci_free_std_chain(sc, lastp, NULL);
1684 return (USBD_NOMEM);
1685 }
1686 p->link.std = lastp;
1687 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1688 lastp = p;
1689 lastlink = p->physaddr;
1690 p->td.td_status = htole32(status);
1691 if (i == ntd) {
1692 /* last TD */
1693 l = len % maxp;
1694 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1695 l = maxp;
1696 *ep = p;
1697 } else
1698 l = maxp;
1699 p->td.td_token =
1700 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1701 UHCI_TD_OUT(l, endpt, addr, tog));
1702 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1703 tog ^= 1;
1704 }
1705 *sp = lastp;
1706 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1707 upipe->nexttoggle));
1708 return (USBD_NORMAL_COMPLETION);
1709 }
1710
1711 void
1712 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1713 {
1714 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1715 upipe->nexttoggle = 0;
1716 }
1717
1718 void
1719 uhci_noop(usbd_pipe_handle pipe)
1720 {
1721 }
1722
1723 usbd_status
1724 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1725 {
1726 usbd_status err;
1727
1728 /* Insert last in queue. */
1729 err = usb_insert_transfer(xfer);
1730 if (err)
1731 return (err);
1732
1733 /*
1734 * Pipe isn't running (otherwise err would be USBD_INPROG),
1735 * so start it first.
1736 */
1737 return (uhci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
1738 }
1739
1740 usbd_status
1741 uhci_device_bulk_start(usbd_xfer_handle xfer)
1742 {
1743 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1744 usbd_device_handle dev = upipe->pipe.device;
1745 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1746 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1747 uhci_soft_td_t *data, *dataend;
1748 uhci_soft_qh_t *sqh;
1749 usbd_status err;
1750 int len, isread, endpt;
1751
1752 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1753 xfer, xfer->length, xfer->flags, ii));
1754
1755 if (sc->sc_dying)
1756 return (USBD_IOERROR);
1757
1758 #ifdef DIAGNOSTIC
1759 if (xfer->rqflags & URQ_REQUEST)
1760 panic("uhci_device_bulk_transfer: a request");
1761 #endif
1762
1763 len = xfer->length;
1764 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1765 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1766 sqh = upipe->u.bulk.sqh;
1767
1768 upipe->u.bulk.isread = isread;
1769 upipe->u.bulk.length = len;
1770
1771 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1772 &xfer->dmabuf, &data, &dataend);
1773 if (err)
1774 return (err);
1775 dataend->td.td_status |= htole32(UHCI_TD_IOC);
1776
1777 #ifdef USB_DEBUG
1778 if (uhcidebug > 8) {
1779 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1780 uhci_dump_tds(data);
1781 }
1782 #endif
1783
1784 /* Set up interrupt info. */
1785 ii->xfer = xfer;
1786 ii->stdstart = data;
1787 ii->stdend = dataend;
1788 #ifdef DIAGNOSTIC
1789 if (!ii->isdone) {
1790 kprintf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1791 }
1792 ii->isdone = 0;
1793 #endif
1794
1795 sqh->elink = data;
1796 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1797
1798 crit_enter();
1799 uhci_add_bulk(sc, sqh);
1800 uhci_add_intr_info(sc, ii);
1801
1802 if (xfer->timeout && !sc->sc_bus.use_polling) {
1803 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1804 uhci_timeout, ii);
1805 }
1806 xfer->status = USBD_IN_PROGRESS;
1807 crit_exit();
1808
1809 #ifdef USB_DEBUG
1810 if (uhcidebug > 10) {
1811 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1812 uhci_dump_tds(data);
1813 }
1814 #endif
1815
1816 if (sc->sc_bus.use_polling)
1817 uhci_waitintr(sc, xfer);
1818
1819 return (USBD_IN_PROGRESS);
1820 }
1821
1822 /* Abort a device bulk request. */
1823 void
1824 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1825 {
1826 DPRINTF(("uhci_device_bulk_abort:\n"));
1827 uhci_abort_xfer(xfer, USBD_CANCELLED);
1828 }
1829
1830 /*
1831 * Abort a device request.
1832 * If this routine is called from a critical section. It guarantees that
1833 * the request will be removed from the hardware scheduling and that
1834 * the callback for it will be called with USBD_CANCELLED status.
1835 * It's impossible to guarantee that the requested transfer will not
1836 * have happened since the hardware runs concurrently.
1837 * If the transaction has already happened we rely on the ordinary
1838 * interrupt processing to process it.
1839 */
1840 void
1841 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1842 {
1843 struct uhci_xfer *uxfer = UXFER(xfer);
1844 uhci_intr_info_t *ii = &uxfer->iinfo;
1845 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1846 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1847 uhci_soft_td_t *std;
1848
1849 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1850
1851 if (sc->sc_dying) {
1852 /* If we're dying, just do the software part. */
1853 crit_enter();
1854 xfer->status = status; /* make software ignore it */
1855 callout_stop(&xfer->timeout_handle);
1856 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1857 usb_transfer_complete(xfer);
1858 crit_exit();
1859 return;
1860 }
1861
1862 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
1863 panic("uhci_abort_xfer: not in process context");
1864
1865 /*
1866 * If an abort is already in progress then just wait for it to
1867 * complete and return.
1868 */
1869 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
1870 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1871 /* No need to wait if we're aborting from a timeout. */
1872 if (status == USBD_TIMEOUT)
1873 return;
1874 /* Override the status which might be USBD_TIMEOUT. */
1875 xfer->status = status;
1876 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
1877 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
1878 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
1879 tsleep(&uxfer->uhci_xfer_flags, 0, "uhciaw", 0);
1880 return;
1881 }
1882
1883 /*
1884 * Step 1: Make interrupt routine and hardware ignore xfer.
1885 */
1886 crit_enter();
1887 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
1888 xfer->status = status; /* make software ignore it */
1889 callout_stop(&xfer->timeout_handle);
1890 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1891 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1892 for (std = ii->stdstart; std != NULL; std = std->link.std)
1893 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1894 crit_exit();
1895
1896 /*
1897 * Step 2: Wait until we know hardware has finished any possible
1898 * use of the xfer. Also make sure the soft interrupt routine
1899 * has run.
1900 */
1901 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
1902 crit_enter();
1903 #ifdef USB_USE_SOFTINTR
1904 sc->sc_softwake = 1;
1905 #endif /* USB_USE_SOFTINTR */
1906 usb_schedsoftintr(&sc->sc_bus);
1907 #ifdef USB_USE_SOFTINTR
1908 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1909 tsleep(&sc->sc_softwake, 0, "uhciab", 0);
1910 #endif /* USB_USE_SOFTINTR */
1911
1912 /*
1913 * Step 3: Execute callback.
1914 */
1915 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1916 #ifdef DIAGNOSTIC
1917 ii->isdone = 1;
1918 #endif
1919 /* Do the wakeup first to avoid touching the xfer after the callback. */
1920 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTING;
1921 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT) {
1922 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTWAIT;
1923 wakeup(&uxfer->uhci_xfer_flags);
1924 }
1925 usb_transfer_complete(xfer);
1926 crit_exit();
1927 }
1928
1929 /* Close a device bulk pipe. */
1930 void
1931 uhci_device_bulk_close(usbd_pipe_handle pipe)
1932 {
1933 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1934 usbd_device_handle dev = upipe->pipe.device;
1935 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1936
1937 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1938 pipe->endpoint->savedtoggle = upipe->nexttoggle;
1939 }
1940
1941 usbd_status
1942 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
1943 {
1944 usbd_status err;
1945
1946 /* Insert last in queue. */
1947 err = usb_insert_transfer(xfer);
1948 if (err)
1949 return (err);
1950
1951 /*
1952 * Pipe isn't running (otherwise err would be USBD_INPROG),
1953 * so start it first.
1954 */
1955 return (uhci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1956 }
1957
1958 usbd_status
1959 uhci_device_ctrl_start(usbd_xfer_handle xfer)
1960 {
1961 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
1962 usbd_status err;
1963
1964 if (sc->sc_dying)
1965 return (USBD_IOERROR);
1966
1967 #ifdef DIAGNOSTIC
1968 if (!(xfer->rqflags & URQ_REQUEST))
1969 panic("uhci_device_ctrl_transfer: not a request");
1970 #endif
1971
1972 err = uhci_device_request(xfer);
1973 if (err)
1974 return (err);
1975
1976 if (sc->sc_bus.use_polling)
1977 uhci_waitintr(sc, xfer);
1978 return (USBD_IN_PROGRESS);
1979 }
1980
1981 usbd_status
1982 uhci_device_intr_transfer(usbd_xfer_handle xfer)
1983 {
1984 usbd_status err;
1985
1986 /* Insert last in queue. */
1987 err = usb_insert_transfer(xfer);
1988 if (err)
1989 return (err);
1990
1991 /*
1992 * Pipe isn't running (otherwise err would be USBD_INPROG),
1993 * so start it first.
1994 */
1995 return (uhci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
1996 }
1997
1998 usbd_status
1999 uhci_device_intr_start(usbd_xfer_handle xfer)
2000 {
2001 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2002 usbd_device_handle dev = upipe->pipe.device;
2003 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2004 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2005 uhci_soft_td_t *data, *dataend;
2006 uhci_soft_qh_t *sqh;
2007 usbd_status err;
2008 int isread, endpt;
2009 int i;
2010
2011 if (sc->sc_dying)
2012 return (USBD_IOERROR);
2013
2014 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2015 xfer, xfer->length, xfer->flags));
2016
2017 #ifdef DIAGNOSTIC
2018 if (xfer->rqflags & URQ_REQUEST)
2019 panic("uhci_device_intr_transfer: a request");
2020 #endif
2021
2022 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2023 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2024 sqh = upipe->u.bulk.sqh;
2025
2026 upipe->u.intr.isread = isread;
2027
2028 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2029 xfer->flags, &xfer->dmabuf, &data,
2030 &dataend);
2031 if (err)
2032 return (err);
2033 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2034
2035 #ifdef USB_DEBUG
2036 if (uhcidebug > 10) {
2037 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2038 uhci_dump_tds(data);
2039 uhci_dump_qh(upipe->u.intr.qhs[0]);
2040 }
2041 #endif
2042
2043 crit_enter();
2044 /* Set up interrupt info. */
2045 ii->xfer = xfer;
2046 ii->stdstart = data;
2047 ii->stdend = dataend;
2048 #ifdef DIAGNOSTIC
2049 if (!ii->isdone) {
2050 kprintf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2051 }
2052 ii->isdone = 0;
2053 #endif
2054
2055 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2056 upipe->u.intr.qhs[0]));
2057 for (i = 0; i < upipe->u.intr.npoll; i++) {
2058 sqh = upipe->u.intr.qhs[i];
2059 sqh->elink = data;
2060 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2061 }
2062 uhci_add_intr_info(sc, ii);
2063 xfer->status = USBD_IN_PROGRESS;
2064 crit_exit();
2065
2066 #ifdef USB_DEBUG
2067 if (uhcidebug > 10) {
2068 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2069 uhci_dump_tds(data);
2070 uhci_dump_qh(upipe->u.intr.qhs[0]);
2071 }
2072 #endif
2073
2074 return (USBD_IN_PROGRESS);
2075 }
2076
2077 /* Abort a device control request. */
2078 void
2079 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2080 {
2081 DPRINTF(("uhci_device_ctrl_abort:\n"));
2082 uhci_abort_xfer(xfer, USBD_CANCELLED);
2083 }
2084
2085 /* Close a device control pipe. */
2086 void
2087 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2088 {
2089 }
2090
2091 /* Abort a device interrupt request. */
2092 void
2093 uhci_device_intr_abort(usbd_xfer_handle xfer)
2094 {
2095 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2096 if (xfer->pipe->intrxfer == xfer) {
2097 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2098 xfer->pipe->intrxfer = NULL;
2099 }
2100 uhci_abort_xfer(xfer, USBD_CANCELLED);
2101 }
2102
2103 /* Close a device interrupt pipe. */
2104 void
2105 uhci_device_intr_close(usbd_pipe_handle pipe)
2106 {
2107 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2108 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2109 int i, npoll;
2110
2111 /* Unlink descriptors from controller data structures. */
2112 npoll = upipe->u.intr.npoll;
2113 crit_enter();
2114 for (i = 0; i < npoll; i++)
2115 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2116 crit_exit();
2117
2118 /*
2119 * We now have to wait for any activity on the physical
2120 * descriptors to stop.
2121 */
2122 usb_delay_ms(&sc->sc_bus, 2);
2123
2124 for(i = 0; i < npoll; i++)
2125 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2126 kfree(upipe->u.intr.qhs, M_USBHC);
2127
2128 /* XXX free other resources */
2129 }
2130
2131 usbd_status
2132 uhci_device_request(usbd_xfer_handle xfer)
2133 {
2134 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2135 usb_device_request_t *req = &xfer->request;
2136 usbd_device_handle dev = upipe->pipe.device;
2137 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2138 int addr = dev->address;
2139 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2140 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2141 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2142 uhci_soft_qh_t *sqh;
2143 int len;
2144 u_int32_t ls;
2145 usbd_status err;
2146 int isread;
2147
2148 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2149 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2150 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2151 UGETW(req->wIndex), UGETW(req->wLength),
2152 addr, endpt));
2153
2154 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2155 isread = req->bmRequestType & UT_READ;
2156 len = UGETW(req->wLength);
2157
2158 setup = upipe->u.ctl.setup;
2159 stat = upipe->u.ctl.stat;
2160 sqh = upipe->u.ctl.sqh;
2161
2162 /* Set up data transaction */
2163 if (len != 0) {
2164 upipe->nexttoggle = 1;
2165 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2166 &xfer->dmabuf, &data, &dataend);
2167 if (err)
2168 return (err);
2169 next = data;
2170 dataend->link.std = stat;
2171 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2172 } else {
2173 next = stat;
2174 }
2175 upipe->u.ctl.length = len;
2176
2177 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2178
2179 setup->link.std = next;
2180 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2181 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2182 UHCI_TD_ACTIVE);
2183 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2184 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2185 stat->link.std = NULL;
2186 stat->td.td_link = htole32(UHCI_PTR_T);
2187 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2188 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2189
2190 stat->td.td_token =
2191 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2192 UHCI_TD_IN (0, endpt, addr, 1));
2193 stat->td.td_buffer = htole32(0);
2194
2195 #ifdef USB_DEBUG
2196 if (uhcidebug > 10) {
2197 DPRINTF(("uhci_device_request: before transfer\n"));
2198 uhci_dump_tds(setup);
2199 }
2200 #endif
2201
2202 /* Set up interrupt info. */
2203 ii->xfer = xfer;
2204 ii->stdstart = setup;
2205 ii->stdend = stat;
2206 #ifdef DIAGNOSTIC
2207 if (!ii->isdone) {
2208 kprintf("uhci_device_request: not done, ii=%p\n", ii);
2209 }
2210 ii->isdone = 0;
2211 #endif
2212
2213 sqh->elink = setup;
2214 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2215
2216 crit_enter();
2217 if (dev->speed == USB_SPEED_LOW)
2218 uhci_add_ls_ctrl(sc, sqh);
2219 else
2220 uhci_add_hs_ctrl(sc, sqh);
2221 uhci_add_intr_info(sc, ii);
2222 #ifdef USB_DEBUG
2223 if (uhcidebug > 12) {
2224 uhci_soft_td_t *std;
2225 uhci_soft_qh_t *xqh;
2226 uhci_soft_qh_t *sxqh;
2227 int maxqh = 0;
2228 uhci_physaddr_t link;
2229 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2230 for (std = sc->sc_vframes[0].htd, link = 0;
2231 (link & UHCI_PTR_QH) == 0;
2232 std = std->link.std) {
2233 link = le32toh(std->td.td_link);
2234 uhci_dump_td(std);
2235 }
2236 sxqh = (uhci_soft_qh_t *)std;
2237 uhci_dump_qh(sxqh);
2238 for (xqh = sxqh;
2239 xqh != NULL;
2240 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2241 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2242 uhci_dump_qh(xqh);
2243 }
2244 DPRINTF(("Enqueued QH:\n"));
2245 uhci_dump_qh(sqh);
2246 uhci_dump_tds(sqh->elink);
2247 }
2248 #endif
2249 if (xfer->timeout && !sc->sc_bus.use_polling) {
2250 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2251 uhci_timeout, ii);
2252 }
2253 xfer->status = USBD_IN_PROGRESS;
2254 crit_exit();
2255
2256 return (USBD_NORMAL_COMPLETION);
2257 }
2258
2259 usbd_status
2260 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2261 {
2262 usbd_status err;
2263
2264 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2265
2266 /* Put it on our queue, */
2267 err = usb_insert_transfer(xfer);
2268
2269 /* bail out on error, */
2270 if (err && err != USBD_IN_PROGRESS)
2271 return (err);
2272
2273 /* XXX should check inuse here */
2274
2275 /* insert into schedule, */
2276 uhci_device_isoc_enter(xfer);
2277
2278 /* and start if the pipe wasn't running */
2279 if (!err)
2280 uhci_device_isoc_start(STAILQ_FIRST(&xfer->pipe->queue));
2281
2282 return (err);
2283 }
2284
2285 void
2286 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2287 {
2288 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2289 usbd_device_handle dev = upipe->pipe.device;
2290 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2291 struct iso *iso = &upipe->u.iso;
2292 uhci_soft_td_t *std;
2293 u_int32_t buf, len, status;
2294 int i, next, nframes;
2295
2296 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2297 "nframes=%d\n",
2298 iso->inuse, iso->next, xfer, xfer->nframes));
2299
2300 if (sc->sc_dying)
2301 return;
2302
2303 if (xfer->status == USBD_IN_PROGRESS) {
2304 /* This request has already been entered into the frame list */
2305 kprintf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2306 /* XXX */
2307 }
2308
2309 #ifdef DIAGNOSTIC
2310 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2311 kprintf("uhci_device_isoc_enter: overflow!\n");
2312 #endif
2313
2314 next = iso->next;
2315 if (next == -1) {
2316 /* Not in use yet, schedule it a few frames ahead. */
2317 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2318 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2319 }
2320
2321 xfer->status = USBD_IN_PROGRESS;
2322 UXFER(xfer)->curframe = next;
2323
2324 buf = DMAADDR(&xfer->dmabuf, 0);
2325 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2326 UHCI_TD_ACTIVE |
2327 UHCI_TD_IOS);
2328 nframes = xfer->nframes;
2329 crit_enter();
2330 for (i = 0; i < nframes; i++) {
2331 std = iso->stds[next];
2332 if (++next >= UHCI_VFRAMELIST_COUNT)
2333 next = 0;
2334 len = xfer->frlengths[i];
2335 std->td.td_buffer = htole32(buf);
2336 if (i == nframes - 1)
2337 status |= UHCI_TD_IOC;
2338 std->td.td_status = htole32(status);
2339 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2340 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2341 #ifdef USB_DEBUG
2342 if (uhcidebug > 5) {
2343 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2344 uhci_dump_td(std);
2345 }
2346 #endif
2347 buf += len;
2348 }
2349 iso->next = next;
2350 iso->inuse += xfer->nframes;
2351
2352 crit_exit();
2353 }
2354
2355 usbd_status
2356 uhci_device_isoc_start(usbd_xfer_handle xfer)
2357 {
2358 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2359 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2360 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2361 uhci_soft_td_t *end;
2362 int i;
2363
2364 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2365
2366 if (sc->sc_dying)
2367 return (USBD_IOERROR);
2368
2369 #ifdef DIAGNOSTIC
2370 if (xfer->status != USBD_IN_PROGRESS)
2371 kprintf("uhci_device_isoc_start: not in progress %p\n", xfer);
2372 #endif
2373
2374 /* Find the last TD */
2375 i = UXFER(xfer)->curframe + xfer->nframes;
2376 if (i >= UHCI_VFRAMELIST_COUNT)
2377 i -= UHCI_VFRAMELIST_COUNT;
2378 end = upipe->u.iso.stds[i];
2379
2380 #ifdef DIAGNOSTIC
2381 if (end == NULL) {
2382 kprintf("uhci_device_isoc_start: end == NULL\n");
2383 return (USBD_INVAL);
2384 }
2385 #endif
2386
2387 crit_enter();
2388
2389 /* Set up interrupt info. */
2390 ii->xfer = xfer;
2391 ii->stdstart = end;
2392 ii->stdend = end;
2393 #ifdef DIAGNOSTIC
2394 if (!ii->isdone)
2395 kprintf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2396 ii->isdone = 0;
2397 #endif
2398 uhci_add_intr_info(sc, ii);
2399
2400 crit_exit();
2401
2402 return (USBD_IN_PROGRESS);
2403 }
2404
2405 void
2406 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2407 {
2408 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2409 uhci_soft_td_t **stds = upipe->u.iso.stds;
2410 uhci_soft_td_t *std;
2411 int i, n, nframes, maxlen, len;
2412
2413 crit_enter();
2414
2415 /* Transfer is already done. */
2416 if (xfer->status != USBD_NOT_STARTED &&
2417 xfer->status != USBD_IN_PROGRESS) {
2418 crit_exit();
2419 return;
2420 }
2421
2422 /* Give xfer the requested abort code. */
2423 xfer->status = USBD_CANCELLED;
2424
2425 /* make hardware ignore it, */
2426 nframes = xfer->nframes;
2427 n = UXFER(xfer)->curframe;
2428 maxlen = 0;
2429 for (i = 0; i < nframes; i++) {
2430 std = stds[n];
2431 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2432 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2433 if (len > maxlen)
2434 maxlen = len;
2435 if (++n >= UHCI_VFRAMELIST_COUNT)
2436 n = 0;
2437 }
2438
2439 /* and wait until we are sure the hardware has finished. */
2440 delay(maxlen);
2441
2442 #ifdef DIAGNOSTIC
2443 UXFER(xfer)->iinfo.isdone = 1;
2444 #endif
2445 /* Run callback and remove from interrupt list. */
2446 usb_transfer_complete(xfer);
2447
2448 crit_exit();
2449 }
2450
2451 void
2452 uhci_device_isoc_close(usbd_pipe_handle pipe)
2453 {
2454 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2455 usbd_device_handle dev = upipe->pipe.device;
2456 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2457 uhci_soft_td_t *std, *vstd;
2458 struct iso *iso;
2459 int i;
2460
2461 /*
2462 * Make sure all TDs are marked as inactive.
2463 * Wait for completion.
2464 * Unschedule.
2465 * Deallocate.
2466 */
2467 iso = &upipe->u.iso;
2468
2469 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2470 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2471 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2472
2473 crit_enter();
2474 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2475 std = iso->stds[i];
2476 for (vstd = sc->sc_vframes[i].htd;
2477 vstd != NULL && vstd->link.std != std;
2478 vstd = vstd->link.std)
2479 ;
2480 if (vstd == NULL) {
2481 /*panic*/
2482 kprintf("uhci_device_isoc_close: %p not found\n", std);
2483 crit_exit();
2484 return;
2485 }
2486 vstd->link = std->link;
2487 vstd->td.td_link = std->td.td_link;
2488 uhci_free_std(sc, std);
2489 }
2490 crit_exit();
2491
2492 kfree(iso->stds, M_USBHC);
2493 }
2494
2495 usbd_status
2496 uhci_setup_isoc(usbd_pipe_handle pipe)
2497 {
2498 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2499 usbd_device_handle dev = upipe->pipe.device;
2500 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2501 int addr = upipe->pipe.device->address;
2502 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2503 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2504 uhci_soft_td_t *std, *vstd;
2505 u_int32_t token;
2506 struct iso *iso;
2507 int i;
2508
2509 iso = &upipe->u.iso;
2510 iso->stds = kmalloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2511 M_USBHC, M_INTWAIT);
2512
2513 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2514 UHCI_TD_OUT(0, endpt, addr, 0);
2515
2516 /* Allocate the TDs and mark as inactive; */
2517 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2518 std = uhci_alloc_std(sc);
2519 if (std == 0)
2520 goto bad;
2521 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2522 std->td.td_token = htole32(token);
2523 iso->stds[i] = std;
2524 }
2525
2526 /* Insert TDs into schedule. */
2527 crit_enter();
2528 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2529 std = iso->stds[i];
2530 vstd = sc->sc_vframes[i].htd;
2531 std->link = vstd->link;
2532 std->td.td_link = vstd->td.td_link;
2533 vstd->link.std = std;
2534 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2535 }
2536 crit_exit();
2537
2538 iso->next = -1;
2539 iso->inuse = 0;
2540
2541 return (USBD_NORMAL_COMPLETION);
2542
2543 bad:
2544 while (--i >= 0)
2545 uhci_free_std(sc, iso->stds[i]);
2546 kfree(iso->stds, M_USBHC);
2547 return (USBD_NOMEM);
2548 }
2549
2550 void
2551 uhci_device_isoc_done(usbd_xfer_handle xfer)
2552 {
2553 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2554
2555 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2556
2557 if (ii->xfer != xfer)
2558 /* Not on interrupt list, ignore it. */
2559 return;
2560
2561 if (!uhci_active_intr_info(ii))
2562 return;
2563
2564 #ifdef DIAGNOSTIC
2565 if (xfer->busy_free != XFER_BUSY) {
2566 kprintf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2567 xfer, xfer->busy_free);
2568 return;
2569 }
2570
2571 if (ii->stdend == NULL) {
2572 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2573 #ifdef USB_DEBUG
2574 uhci_dump_ii(ii);
2575 #endif
2576 return;
2577 }
2578 #endif
2579
2580 /* Turn off the interrupt since it is active even if the TD is not. */
2581 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2582
2583 uhci_del_intr_info(ii); /* remove from active list */
2584
2585 #ifdef DIAGNOSTIC
2586 if (ii->stdend == NULL) {
2587 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2588 #ifdef USB_DEBUG
2589 uhci_dump_ii(ii);
2590 #endif
2591 return;
2592 }
2593 #endif
2594 }
2595
2596 void
2597 uhci_device_intr_done(usbd_xfer_handle xfer)
2598 {
2599 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2600 uhci_softc_t *sc = ii->sc;
2601 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2602 uhci_soft_qh_t *sqh;
2603 int i, npoll;
2604
2605 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2606
2607 npoll = upipe->u.intr.npoll;
2608 for(i = 0; i < npoll; i++) {
2609 sqh = upipe->u.intr.qhs[i];
2610 sqh->elink = NULL;
2611 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2612 }
2613 uhci_free_std_chain(sc, ii->stdstart, NULL);
2614
2615 /* XXX Wasteful. */
2616 if (xfer->pipe->repeat) {
2617 uhci_soft_td_t *data, *dataend;
2618
2619 DPRINTFN(5,("uhci_device_intr_done: requeueing\n"));
2620
2621 /* This alloc cannot fail since we freed the chain above. */
2622 uhci_alloc_std_chain(upipe, sc, xfer->length,
2623 upipe->u.intr.isread, xfer->flags,
2624 &xfer->dmabuf, &data, &dataend);
2625 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2626
2627 #ifdef USB_DEBUG
2628 if (uhcidebug > 10) {
2629 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2630 uhci_dump_tds(data);
2631 uhci_dump_qh(upipe->u.intr.qhs[0]);
2632 }
2633 #endif
2634
2635 ii->stdstart = data;
2636 ii->stdend = dataend;
2637 #ifdef DIAGNOSTIC
2638 if (!ii->isdone) {
2639 kprintf("uhci_device_intr_done: not done, ii=%p\n", ii);
2640 }
2641 ii->isdone = 0;
2642 #endif
2643 for (i = 0; i < npoll; i++) {
2644 sqh = upipe->u.intr.qhs[i];
2645 sqh->elink = data;
2646 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2647 }
2648 xfer->status = USBD_IN_PROGRESS;
2649 /* The ii is already on the examined list, just leave it. */
2650 } else {
2651 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2652 if (uhci_active_intr_info(ii))
2653 uhci_del_intr_info(ii);
2654 }
2655 }
2656
2657 /* Deallocate request data structures */
2658 void
2659 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2660 {
2661 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2662 uhci_softc_t *sc = ii->sc;
2663 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2664
2665 #ifdef DIAGNOSTIC
2666 if (!(xfer->rqflags & URQ_REQUEST))
2667 panic("uhci_device_ctrl_done: not a request");
2668 #endif
2669
2670 if (!uhci_active_intr_info(ii))
2671 return;
2672
2673 uhci_del_intr_info(ii); /* remove from active list */
2674
2675 if (upipe->pipe.device->speed == USB_SPEED_LOW)
2676 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2677 else
2678 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2679
2680 if (upipe->u.ctl.length != 0)
2681 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2682
2683 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2684 }
2685
2686 /* Deallocate request data structures */
2687 void
2688 uhci_device_bulk_done(usbd_xfer_handle xfer)
2689 {
2690 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2691 uhci_softc_t *sc = ii->sc;
2692 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2693
2694 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2695 xfer, ii, sc, upipe));
2696
2697 if (!uhci_active_intr_info(ii))
2698 return;
2699
2700 uhci_del_intr_info(ii); /* remove from active list */
2701
2702 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2703
2704 uhci_free_std_chain(sc, ii->stdstart, NULL);
2705
2706 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2707 }
2708
2709 /* Add interrupt QH, called with vflock. */
2710 void
2711 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2712 {
2713 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2714 uhci_soft_qh_t *eqh;
2715
2716 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2717
2718 eqh = vf->eqh;
2719 sqh->hlink = eqh->hlink;
2720 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2721 eqh->hlink = sqh;
2722 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2723 vf->eqh = sqh;
2724 vf->bandwidth++;
2725 }
2726
2727 /* Remove interrupt QH. */
2728 void
2729 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2730 {
2731 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2732 uhci_soft_qh_t *pqh;
2733
2734 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2735
2736 /* See comment in uhci_remove_ctrl() */
2737 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2738 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2739 delay(UHCI_QH_REMOVE_DELAY);
2740 }
2741
2742 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2743 pqh->hlink = sqh->hlink;
2744 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2745 delay(UHCI_QH_REMOVE_DELAY);
2746 if (vf->eqh == sqh)
2747 vf->eqh = pqh;
2748 vf->bandwidth--;
2749 }
2750
2751 usbd_status
2752 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2753 {
2754 uhci_soft_qh_t *sqh;
2755 int i, npoll;
2756 u_int bestbw, bw, bestoffs, offs;
2757
2758 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2759 if (ival == 0) {
2760 kprintf("uhci_setintr: 0 interval\n");
2761 return (USBD_INVAL);
2762 }
2763
2764 if (ival > UHCI_VFRAMELIST_COUNT)
2765 ival = UHCI_VFRAMELIST_COUNT;
2766 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2767 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2768
2769 upipe->u.intr.npoll = npoll;
2770 upipe->u.intr.qhs =
2771 kmalloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_INTWAIT);
2772
2773 /*
2774 * Figure out which offset in the schedule that has most
2775 * bandwidth left over.
2776 */
2777 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2778 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2779 for (bw = i = 0; i < npoll; i++)
2780 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2781 if (bw < bestbw) {
2782 bestbw = bw;
2783 bestoffs = offs;
2784 }
2785 }
2786 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2787
2788 for(i = 0; i < npoll; i++) {
2789 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2790 sqh->elink = NULL;
2791 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2792 sqh->pos = MOD(i * ival + bestoffs);
2793 }
2794 #undef MOD
2795
2796 crit_enter();
2797 /* Enter QHs into the controller data structures. */
2798 for(i = 0; i < npoll; i++)
2799 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2800 crit_exit();
2801
2802 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2803 return (USBD_NORMAL_COMPLETION);
2804 }
2805
2806 /* Open a new pipe. */
2807 usbd_status
2808 uhci_open(usbd_pipe_handle pipe)
2809 {
2810 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2811 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2812 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2813 usbd_status err;
2814 int ival;
2815
2816 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2817 pipe, pipe->device->address,
2818 ed->bEndpointAddress, sc->sc_addr));
2819
2820 upipe->aborting = 0;
2821 upipe->nexttoggle = pipe->endpoint->savedtoggle;
2822
2823 if (pipe->device->address == sc->sc_addr) {
2824 switch (ed->bEndpointAddress) {
2825 case USB_CONTROL_ENDPOINT:
2826 pipe->methods = &uhci_root_ctrl_methods;
2827 break;
2828 case UE_DIR_IN | UHCI_INTR_ENDPT:
2829 pipe->methods = &uhci_root_intr_methods;
2830 break;
2831 default:
2832 return (USBD_INVAL);
2833 }
2834 } else {
2835 switch (ed->bmAttributes & UE_XFERTYPE) {
2836 case UE_CONTROL:
2837 pipe->methods = &uhci_device_ctrl_methods;
2838 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2839 if (upipe->u.ctl.sqh == NULL)
2840 goto bad;
2841 upipe->u.ctl.setup = uhci_alloc_std(sc);
2842 if (upipe->u.ctl.setup == NULL) {
2843 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2844 goto bad;
2845 }
2846 upipe->u.ctl.stat = uhci_alloc_std(sc);
2847 if (upipe->u.ctl.stat == NULL) {
2848 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2849 uhci_free_std(sc, upipe->u.ctl.setup);
2850 goto bad;
2851 }
2852 err = usb_allocmem(&sc->sc_bus,
2853 sizeof(usb_device_request_t),
2854 0, &upipe->u.ctl.reqdma);
2855 if (err) {
2856 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2857 uhci_free_std(sc, upipe->u.ctl.setup);
2858 uhci_free_std(sc, upipe->u.ctl.stat);
2859 goto bad;
2860 }
2861 break;
2862 case UE_INTERRUPT:
2863 pipe->methods = &uhci_device_intr_methods;
2864 ival = pipe->interval;
2865 if (ival == USBD_DEFAULT_INTERVAL)
2866 ival = ed->bInterval;
2867 return (uhci_device_setintr(sc, upipe, ival));
2868 case UE_ISOCHRONOUS:
2869 pipe->methods = &uhci_device_isoc_methods;
2870 return (uhci_setup_isoc(pipe));
2871 case UE_BULK:
2872 pipe->methods = &uhci_device_bulk_methods;
2873 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2874 if (upipe->u.bulk.sqh == NULL)
2875 goto bad;
2876 break;
2877 }
2878 }
2879 return (USBD_NORMAL_COMPLETION);
2880
2881 bad:
2882 return (USBD_NOMEM);
2883 }
2884
2885 /*
2886 * Data structures and routines to emulate the root hub.
2887 */
2888 usb_device_descriptor_t uhci_devd = {
2889 USB_DEVICE_DESCRIPTOR_SIZE,
2890 UDESC_DEVICE, /* type */
2891 {0x00, 0x01}, /* USB version */
2892 UDCLASS_HUB, /* class */
2893 UDSUBCLASS_HUB, /* subclass */
2894 UDPROTO_FSHUB, /* protocol */
2895 64, /* max packet */
2896 {0},{0},{0x00,0x01}, /* device id */
2897 1,2,0, /* string indicies */
2898 1 /* # of configurations */
2899 };
2900
2901 usb_config_descriptor_t uhci_confd = {
2902 USB_CONFIG_DESCRIPTOR_SIZE,
2903 UDESC_CONFIG,
2904 {USB_CONFIG_DESCRIPTOR_SIZE +
2905 USB_INTERFACE_DESCRIPTOR_SIZE +
2906 USB_ENDPOINT_DESCRIPTOR_SIZE},
2907 1,
2908 1,
2909 0,
2910 UC_SELF_POWERED,
2911 0 /* max power */
2912 };
2913
2914 usb_interface_descriptor_t uhci_ifcd = {
2915 USB_INTERFACE_DESCRIPTOR_SIZE,
2916 UDESC_INTERFACE,
2917 0,
2918 0,
2919 1,
2920 UICLASS_HUB,
2921 UISUBCLASS_HUB,
2922 UIPROTO_FSHUB,
2923 0
2924 };
2925
2926 usb_endpoint_descriptor_t uhci_endpd = {
2927 USB_ENDPOINT_DESCRIPTOR_SIZE,
2928 UDESC_ENDPOINT,
2929 UE_DIR_IN | UHCI_INTR_ENDPT,
2930 UE_INTERRUPT,
2931 {8},
2932 255
2933 };
2934
2935 usb_hub_descriptor_t uhci_hubd_piix = {
2936 USB_HUB_DESCRIPTOR_SIZE,
2937 UDESC_HUB,
2938 2,
2939 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2940 50, /* power on to power good */
2941 0,
2942 { 0x00 }, /* both ports are removable */
2943 };
2944
2945 int
2946 uhci_str(usb_string_descriptor_t *p, int l, char *s)
2947 {
2948 int i;
2949
2950 if (l == 0)
2951 return (0);
2952 p->bLength = 2 * strlen(s) + 2;
2953 if (l == 1)
2954 return (1);
2955 p->bDescriptorType = UDESC_STRING;
2956 l -= 2;
2957 for (i = 0; s[i] && l > 1; i++, l -= 2)
2958 USETW2(p->bString[i], 0, s[i]);
2959 return (2*i+2);
2960 }
2961
2962 /*
2963 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2964 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2965 * should not be used by the USB subsystem. As we cannot issue a
2966 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2967 * will be enabled as part of the reset.
2968 *
2969 * On the VT83C572, the port cannot be successfully enabled until the
2970 * outstanding "port enable change" and "connection status change"
2971 * events have been reset.
2972 */
2973 static usbd_status
2974 uhci_portreset(uhci_softc_t *sc, int index)
2975 {
2976 int lim, port, x;
2977
2978 if (index == 1)
2979 port = UHCI_PORTSC1;
2980 else if (index == 2)
2981 port = UHCI_PORTSC2;
2982 else
2983 return (USBD_IOERROR);
2984
2985 x = URWMASK(UREAD2(sc, port));
2986 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2987
2988 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2989
2990 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
2991 index, UREAD2(sc, port)));
2992
2993 x = URWMASK(UREAD2(sc, port));
2994 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2995
2996 delay(100);
2997
2998 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
2999 index, UREAD2(sc, port)));
3000
3001 x = URWMASK(UREAD2(sc, port));
3002 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3003
3004 for (lim = 10; --lim > 0;) {
3005 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3006
3007 x = UREAD2(sc, port);
3008
3009 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3010 index, lim, x));
3011
3012 if (!(x & UHCI_PORTSC_CCS)) {
3013 /*
3014 * No device is connected (or was disconnected
3015 * during reset). Consider the port reset.
3016 * The delay must be long enough to ensure on
3017 * the initial iteration that the device
3018 * connection will have been registered. 50ms
3019 * appears to be sufficient, but 20ms is not.
3020 */
3021 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3022 index, lim));
3023 break;
3024 }
3025
3026 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3027 /*
3028 * Port enabled changed and/or connection
3029 * status changed were set. Reset either or
3030 * both raised flags (by writing a 1 to that
3031 * bit), and wait again for state to settle.
3032 */
3033 UWRITE2(sc, port, URWMASK(x) |
3034 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3035 continue;
3036 }
3037
3038 if (x & UHCI_PORTSC_PE)
3039 /* Port is enabled */
3040 break;
3041
3042 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3043 }
3044
3045 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3046 index, UREAD2(sc, port)));
3047
3048 if (lim <= 0) {
3049 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3050 return (USBD_TIMEOUT);
3051 }
3052
3053 sc->sc_isreset = 1;
3054 return (USBD_NORMAL_COMPLETION);
3055 }
3056
3057 /*
3058 * Simulate a hardware hub by handling all the necessary requests.
3059 */
3060 usbd_status
3061 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3062 {
3063 usbd_status err;
3064
3065 /* Insert last in queue. */
3066 err = usb_insert_transfer(xfer);
3067 if (err)
3068 return (err);
3069
3070 /*
3071 * Pipe isn't running (otherwise err would be USBD_INPROG),
3072 * so start it first.
3073 */
3074 return (uhci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
3075 }
3076
3077 usbd_status
3078 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3079 {
3080 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3081 usb_device_request_t *req;
3082 void *buf = NULL;
3083 int port, x;
3084 int len, value, index, status, change, l, totlen = 0;
3085 usb_port_status_t ps;
3086 usbd_status err;
3087
3088 if (sc->sc_dying)
3089 return (USBD_IOERROR);
3090
3091 #ifdef DIAGNOSTIC
3092 if (!(xfer->rqflags & URQ_REQUEST))
3093 panic("uhci_root_ctrl_transfer: not a request");
3094 #endif
3095 req = &xfer->request;
3096
3097 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3098 req->bmRequestType, req->bRequest));
3099
3100 len = UGETW(req->wLength);
3101 value = UGETW(req->wValue);
3102 index = UGETW(req->wIndex);
3103
3104 if (len != 0)
3105 buf = KERNADDR(&xfer->dmabuf, 0);
3106
3107 #define C(x,y) ((x) | ((y) << 8))
3108 switch(C(req->bRequest, req->bmRequestType)) {
3109 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3110 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3111 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3112 /*
3113 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3114 * for the integrated root hub.
3115 */
3116 break;
3117 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3118 if (len > 0) {
3119 *(u_int8_t *)buf = sc->sc_conf;
3120 totlen = 1;
3121 }
3122 break;
3123 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3124 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3125 switch(value >> 8) {
3126 case UDESC_DEVICE:
3127 if ((value & 0xff) != 0) {
3128 err = USBD_IOERROR;
3129 goto ret;
3130 }
3131 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3132 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3133 memcpy(buf, &uhci_devd, l);
3134 break;
3135 case UDESC_CONFIG:
3136 if ((value & 0xff) != 0) {
3137 err = USBD_IOERROR;
3138 goto ret;
3139 }
3140 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3141 memcpy(buf, &uhci_confd, l);
3142 buf = (char *)buf + l;
3143 len -= l;
3144 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3145 totlen += l;
3146 memcpy(buf, &uhci_ifcd, l);
3147 buf = (char *)buf + l;
3148 len -= l;
3149 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3150 totlen += l;
3151 memcpy(buf, &uhci_endpd, l);
3152 break;
3153 case UDESC_STRING:
3154 if (len == 0)
3155 break;
3156 *(u_int8_t *)buf = 0;
3157 totlen = 1;
3158 switch (value & 0xff) {
3159 case 1: /* Vendor */
3160 totlen = uhci_str(buf, len, sc->sc_vendor);
3161 break;
3162 case 2: /* Product */
3163 totlen = uhci_str(buf, len, "UHCI root hub");
3164 break;
3165 }
3166 break;
3167 default:
3168 err = USBD_IOERROR;
3169 goto ret;
3170 }
3171 break;
3172 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3173 if (len > 0) {
3174 *(u_int8_t *)buf = 0;
3175 totlen = 1;
3176 }
3177 break;
3178 case C(UR_GET_STATUS, UT_READ_DEVICE):
3179 if (len > 1) {
3180 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3181 totlen = 2;
3182 }
3183 break;
3184 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3185 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3186 if (len > 1) {
3187 USETW(((usb_status_t *)buf)->wStatus, 0);
3188 totlen = 2;
3189 }
3190 break;
3191 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3192 if (value >= USB_MAX_DEVICES) {
3193 err = USBD_IOERROR;
3194 goto ret;
3195 }
3196 sc->sc_addr = value;
3197 break;
3198 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3199 if (value != 0 && value != 1) {
3200 err = USBD_IOERROR;
3201 goto ret;
3202 }
3203 sc->sc_conf = value;
3204 break;
3205 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3206 break;
3207 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3208 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3209 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3210 err = USBD_IOERROR;
3211 goto ret;
3212 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3213 break;
3214 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3215 break;
3216 /* Hub requests */
3217 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3218 break;
3219 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3220 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3221 "port=%d feature=%d\n",
3222 index, value));
3223 if (index == 1)
3224 port = UHCI_PORTSC1;
3225 else if (index == 2)
3226 port = UHCI_PORTSC2;
3227 else {
3228 err = USBD_IOERROR;
3229 goto ret;
3230 }
3231 switch(value) {
3232 case UHF_PORT_ENABLE:
3233 x = URWMASK(UREAD2(sc, port));
3234 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3235 break;
3236 case UHF_PORT_SUSPEND:
3237 x = URWMASK(UREAD2(sc, port));
3238 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3239 break;
3240 case UHF_PORT_RESET:
3241 x = URWMASK(UREAD2(sc, port));
3242 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3243 break;
3244 case UHF_C_PORT_CONNECTION:
3245 x = URWMASK(UREAD2(sc, port));
3246 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3247 break;
3248 case UHF_C_PORT_ENABLE:
3249 x = URWMASK(UREAD2(sc, port));
3250 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3251 break;
3252 case UHF_C_PORT_OVER_CURRENT:
3253 x = URWMASK(UREAD2(sc, port));
3254 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3255 break;
3256 case UHF_C_PORT_RESET:
3257 sc->sc_isreset = 0;
3258 err = USBD_NORMAL_COMPLETION;
3259 goto ret;
3260 case UHF_PORT_CONNECTION:
3261 case UHF_PORT_OVER_CURRENT:
3262 case UHF_PORT_POWER:
3263 case UHF_PORT_LOW_SPEED:
3264 case UHF_C_PORT_SUSPEND:
3265 default:
3266 err = USBD_IOERROR;
3267 goto ret;
3268 }
3269 break;
3270 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3271 if (index == 1)
3272 port = UHCI_PORTSC1;
3273 else if (index == 2)
3274 port = UHCI_PORTSC2;
3275 else {
3276 err = USBD_IOERROR;
3277 goto ret;
3278 }
3279 if (len > 0) {
3280 *(u_int8_t *)buf =
3281 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3282 UHCI_PORTSC_LS_SHIFT;
3283 totlen = 1;
3284 }
3285 break;
3286 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3287 if ((value & 0xff) != 0) {
3288 err = USBD_IOERROR;
3289 goto ret;
3290 }
3291 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3292 totlen = l;
3293 memcpy(buf, &uhci_hubd_piix, l);
3294 break;
3295 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3296 if (len != 4) {
3297 err = USBD_IOERROR;
3298 goto ret;
3299 }
3300 memset(buf, 0, len);
3301 totlen = len;
3302 break;
3303 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3304 if (index == 1)
3305 port = UHCI_PORTSC1;
3306 else if (index == 2)
3307 port = UHCI_PORTSC2;
3308 else {
3309 err = USBD_IOERROR;
3310 goto ret;
3311 }
3312 if (len != 4) {
3313 err = USBD_IOERROR;
3314 goto ret;
3315 }
3316 x = UREAD2(sc, port);
3317 status = change = 0;
3318 if (x & UHCI_PORTSC_CCS)
3319 status |= UPS_CURRENT_CONNECT_STATUS;
3320 if (x & UHCI_PORTSC_CSC)
3321 change |= UPS_C_CONNECT_STATUS;
3322 if (x & UHCI_PORTSC_PE)
3323 status |= UPS_PORT_ENABLED;
3324 if (x & UHCI_PORTSC_POEDC)
3325 change |= UPS_C_PORT_ENABLED;
3326 if (x & UHCI_PORTSC_OCI)
3327 status |= UPS_OVERCURRENT_INDICATOR;
3328 if (x & UHCI_PORTSC_OCIC)
3329 change |= UPS_C_OVERCURRENT_INDICATOR;
3330 if (x & UHCI_PORTSC_SUSP)
3331 status |= UPS_SUSPEND;
3332 if (x & UHCI_PORTSC_LSDA)
3333 status |= UPS_LOW_SPEED;
3334 status |= UPS_PORT_POWER;
3335 if (sc->sc_isreset)
3336 change |= UPS_C_PORT_RESET;
3337 USETW(ps.wPortStatus, status);
3338 USETW(ps.wPortChange, change);
3339 l = min(len, sizeof ps);
3340 memcpy(buf, &ps, l);
3341 totlen = l;
3342 break;
3343 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3344 err = USBD_IOERROR;
3345 goto ret;
3346 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3347 break;
3348 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3349 if (index == 1)
3350 port = UHCI_PORTSC1;
3351 else if (index == 2)
3352 port = UHCI_PORTSC2;
3353 else {
3354 err = USBD_IOERROR;
3355 goto ret;
3356 }
3357 switch(value) {
3358 case UHF_PORT_ENABLE:
3359 x = URWMASK(UREAD2(sc, port));
3360 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3361 break;
3362 case UHF_PORT_SUSPEND:
3363 x = URWMASK(UREAD2(sc, port));
3364 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3365 break;
3366 case UHF_PORT_RESET:
3367 err = uhci_portreset(sc, index);
3368 goto ret;
3369 case UHF_PORT_POWER:
3370 /* Pretend we turned on power */
3371 err = USBD_NORMAL_COMPLETION;
3372 goto ret;
3373 case UHF_C_PORT_CONNECTION:
3374 case UHF_C_PORT_ENABLE:
3375 case UHF_C_PORT_OVER_CURRENT:
3376 case UHF_PORT_CONNECTION:
3377 case UHF_PORT_OVER_CURRENT:
3378 case UHF_PORT_LOW_SPEED:
3379 case UHF_C_PORT_SUSPEND:
3380 case UHF_C_PORT_RESET:
3381 default:
3382 err = USBD_IOERROR;
3383 goto ret;
3384 }
3385 break;
3386 default:
3387 err = USBD_IOERROR;
3388 goto ret;
3389 }
3390 xfer->actlen = totlen;
3391 err = USBD_NORMAL_COMPLETION;
3392 ret:
3393 xfer->status = err;
3394 crit_enter();
3395 usb_transfer_complete(xfer);
3396 crit_exit();
3397 return (USBD_IN_PROGRESS);
3398 }
3399
3400 /* Abort a root control request. */
3401 void
3402 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3403 {
3404 /* Nothing to do, all transfers are synchronous. */
3405 }
3406
3407 /* Close the root pipe. */
3408 void
3409 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3410 {
3411 DPRINTF(("uhci_root_ctrl_close\n"));
3412 }
3413
3414 /* Abort a root interrupt request. */
3415 void
3416 uhci_root_intr_abort(usbd_xfer_handle xfer)
3417 {
3418 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3419
3420 callout_stop(&sc->sc_poll_handle);
3421 sc->sc_intr_xfer = NULL;
3422
3423 if (xfer->pipe->intrxfer == xfer) {
3424 DPRINTF(("uhci_root_intr_abort: remove\n"));
3425 xfer->pipe->intrxfer = 0;
3426 }
3427 xfer->status = USBD_CANCELLED;
3428 #ifdef DIAGNOSTIC
3429 UXFER(xfer)->iinfo.isdone = 1;
3430 #endif
3431 usb_transfer_complete(xfer);
3432 }
3433
3434 usbd_status
3435 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3436 {
3437 usbd_status err;
3438
3439 /* Insert last in queue. */
3440 err = usb_insert_transfer(xfer);
3441 if (err)
3442 return (err);
3443
3444 /*
3445 * Pipe isn't running (otherwise err would be USBD_INPROG),
3446 * so start it first.
3447 */
3448 return (uhci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3449 }
3450
3451 /* Start a transfer on the root interrupt pipe */
3452 usbd_status
3453 uhci_root_intr_start(usbd_xfer_handle xfer)
3454 {
3455 usbd_pipe_handle pipe = xfer->pipe;
3456 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3457
3458 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3459 xfer, xfer->length, xfer->flags));
3460
3461 if (sc->sc_dying)
3462 return (USBD_IOERROR);
3463
3464 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3465 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3466 sc->sc_intr_xfer = xfer;
3467 return (USBD_IN_PROGRESS);
3468 }
3469
3470 /* Close the root interrupt pipe. */
3471 void
3472 uhci_root_intr_close(usbd_pipe_handle pipe)
3473 {
3474 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3475
3476 callout_stop(&sc->sc_poll_handle);
3477 sc->sc_intr_xfer = NULL;
3478 DPRINTF(("uhci_root_intr_close\n"));
3479 }
DragonFly BSD