kernel/mrsas: Fix a double assignment.
[dragonfly.git] / sys / dev / drm / drm_dp_helper.c
blobf59cfc53a1872af2dee6cc3ddb8087d651d33b32
1 /*
2 * Copyright © 2009 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/i2c.h>
30 #include <drm/drm_dp_helper.h>
31 #include <drm/drm_dp_aux_dev.h>
32 #include <drm/drmP.h>
34 /**
35 * DOC: dp helpers
37 * These functions contain some common logic and helpers at various abstraction
38 * levels to deal with Display Port sink devices and related things like DP aux
39 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
40 * blocks, ...
43 /* Helpers for DP link training */
44 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
46 return link_status[r - DP_LANE0_1_STATUS];
49 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
50 int lane)
52 int i = DP_LANE0_1_STATUS + (lane >> 1);
53 int s = (lane & 1) * 4;
54 u8 l = dp_link_status(link_status, i);
55 return (l >> s) & 0xf;
58 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
59 int lane_count)
61 u8 lane_align;
62 u8 lane_status;
63 int lane;
65 lane_align = dp_link_status(link_status,
66 DP_LANE_ALIGN_STATUS_UPDATED);
67 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
68 return false;
69 for (lane = 0; lane < lane_count; lane++) {
70 lane_status = dp_get_lane_status(link_status, lane);
71 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
72 return false;
74 return true;
76 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
78 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
79 int lane_count)
81 int lane;
82 u8 lane_status;
84 for (lane = 0; lane < lane_count; lane++) {
85 lane_status = dp_get_lane_status(link_status, lane);
86 if ((lane_status & DP_LANE_CR_DONE) == 0)
87 return false;
89 return true;
91 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
93 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
94 int lane)
96 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
97 int s = ((lane & 1) ?
98 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
99 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
100 u8 l = dp_link_status(link_status, i);
102 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
104 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
106 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
107 int lane)
109 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
110 int s = ((lane & 1) ?
111 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
112 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
113 u8 l = dp_link_status(link_status, i);
115 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
117 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
119 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
120 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
121 udelay(100);
122 else
123 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
125 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
127 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
128 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
129 udelay(400);
130 else
131 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
133 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
135 u8 drm_dp_link_rate_to_bw_code(int link_rate)
137 switch (link_rate) {
138 case 162000:
139 default:
140 return DP_LINK_BW_1_62;
141 case 270000:
142 return DP_LINK_BW_2_7;
143 case 540000:
144 return DP_LINK_BW_5_4;
147 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
149 int drm_dp_bw_code_to_link_rate(u8 link_bw)
151 switch (link_bw) {
152 case DP_LINK_BW_1_62:
153 default:
154 return 162000;
155 case DP_LINK_BW_2_7:
156 return 270000;
157 case DP_LINK_BW_5_4:
158 return 540000;
161 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
163 #define AUX_RETRY_INTERVAL 500 /* us */
166 * DOC: dp helpers
168 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
169 * independent access to AUX functionality. Drivers can take advantage of
170 * this by filling in the fields of the drm_dp_aux structure.
172 * Transactions are described using a hardware-independent drm_dp_aux_msg
173 * structure, which is passed into a driver's .transfer() implementation.
174 * Both native and I2C-over-AUX transactions are supported.
177 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
178 unsigned int offset, void *buffer, size_t size)
180 struct drm_dp_aux_msg msg;
181 unsigned int retry, native_reply;
182 int err = 0, ret = 0;
184 memset(&msg, 0, sizeof(msg));
185 msg.address = offset;
186 msg.request = request;
187 msg.buffer = buffer;
188 msg.size = size;
190 mutex_lock(&aux->hw_mutex);
193 * The specification doesn't give any recommendation on how often to
194 * retry native transactions. We used to retry 7 times like for
195 * aux i2c transactions but real world devices this wasn't
196 * sufficient, bump to 32 which makes Dell 4k monitors happier.
198 for (retry = 0; retry < 32; retry++) {
199 if (ret != 0 && ret != -ETIMEDOUT) {
200 usleep_range(AUX_RETRY_INTERVAL,
201 AUX_RETRY_INTERVAL + 100);
204 ret = aux->transfer(aux, &msg);
206 if (ret >= 0) {
207 native_reply = msg.reply & DP_AUX_NATIVE_REPLY_MASK;
208 if (native_reply == DP_AUX_NATIVE_REPLY_ACK) {
209 if (ret == size)
210 goto unlock;
212 ret = -EPROTO;
213 } else
214 ret = -EIO;
218 * We want the error we return to be the error we received on
219 * the first transaction, since we may get a different error the
220 * next time we retry
222 if (!err)
223 err = ret;
226 DRM_DEBUG_KMS("too many retries, giving up\n");
227 ret = err;
229 unlock:
230 mutex_unlock(&aux->hw_mutex);
231 return ret;
235 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
236 * @aux: DisplayPort AUX channel
237 * @offset: address of the (first) register to read
238 * @buffer: buffer to store the register values
239 * @size: number of bytes in @buffer
241 * Returns the number of bytes transferred on success, or a negative error
242 * code on failure. -EIO is returned if the request was NAKed by the sink or
243 * if the retry count was exceeded. If not all bytes were transferred, this
244 * function returns -EPROTO. Errors from the underlying AUX channel transfer
245 * function, with the exception of -EBUSY (which causes the transaction to
246 * be retried), are propagated to the caller.
248 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
249 void *buffer, size_t size)
251 int ret;
254 * HP ZR24w corrupts the first DPCD access after entering power save
255 * mode. Eg. on a read, the entire buffer will be filled with the same
256 * byte. Do a throw away read to avoid corrupting anything we care
257 * about. Afterwards things will work correctly until the monitor
258 * gets woken up and subsequently re-enters power save mode.
260 * The user pressing any button on the monitor is enough to wake it
261 * up, so there is no particularly good place to do the workaround.
262 * We just have to do it before any DPCD access and hope that the
263 * monitor doesn't power down exactly after the throw away read.
265 ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, buffer,
267 if (ret != 1)
268 return ret;
270 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
271 size);
273 EXPORT_SYMBOL(drm_dp_dpcd_read);
276 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
277 * @aux: DisplayPort AUX channel
278 * @offset: address of the (first) register to write
279 * @buffer: buffer containing the values to write
280 * @size: number of bytes in @buffer
282 * Returns the number of bytes transferred on success, or a negative error
283 * code on failure. -EIO is returned if the request was NAKed by the sink or
284 * if the retry count was exceeded. If not all bytes were transferred, this
285 * function returns -EPROTO. Errors from the underlying AUX channel transfer
286 * function, with the exception of -EBUSY (which causes the transaction to
287 * be retried), are propagated to the caller.
289 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
290 void *buffer, size_t size)
292 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
293 size);
295 EXPORT_SYMBOL(drm_dp_dpcd_write);
298 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
299 * @aux: DisplayPort AUX channel
300 * @status: buffer to store the link status in (must be at least 6 bytes)
302 * Returns the number of bytes transferred on success or a negative error
303 * code on failure.
305 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
306 u8 status[DP_LINK_STATUS_SIZE])
308 return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
309 DP_LINK_STATUS_SIZE);
311 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
314 * drm_dp_link_probe() - probe a DisplayPort link for capabilities
315 * @aux: DisplayPort AUX channel
316 * @link: pointer to structure in which to return link capabilities
318 * The structure filled in by this function can usually be passed directly
319 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
320 * configure the link based on the link's capabilities.
322 * Returns 0 on success or a negative error code on failure.
324 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
326 u8 values[3];
327 int err;
329 memset(link, 0, sizeof(*link));
331 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
332 if (err < 0)
333 return err;
335 link->revision = values[0];
336 link->rate = drm_dp_bw_code_to_link_rate(values[1]);
337 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
339 if (values[2] & DP_ENHANCED_FRAME_CAP)
340 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
342 return 0;
344 EXPORT_SYMBOL(drm_dp_link_probe);
347 * drm_dp_link_power_up() - power up a DisplayPort link
348 * @aux: DisplayPort AUX channel
349 * @link: pointer to a structure containing the link configuration
351 * Returns 0 on success or a negative error code on failure.
353 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
355 u8 value;
356 int err;
358 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
359 if (link->revision < 0x11)
360 return 0;
362 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
363 if (err < 0)
364 return err;
366 value &= ~DP_SET_POWER_MASK;
367 value |= DP_SET_POWER_D0;
369 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
370 if (err < 0)
371 return err;
374 * According to the DP 1.1 specification, a "Sink Device must exit the
375 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
376 * Control Field" (register 0x600).
378 usleep_range(1000, 2000);
380 return 0;
382 EXPORT_SYMBOL(drm_dp_link_power_up);
385 * drm_dp_link_power_down() - power down a DisplayPort link
386 * @aux: DisplayPort AUX channel
387 * @link: pointer to a structure containing the link configuration
389 * Returns 0 on success or a negative error code on failure.
391 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
393 u8 value;
394 int err;
396 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
397 if (link->revision < 0x11)
398 return 0;
400 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
401 if (err < 0)
402 return err;
404 value &= ~DP_SET_POWER_MASK;
405 value |= DP_SET_POWER_D3;
407 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
408 if (err < 0)
409 return err;
411 return 0;
413 EXPORT_SYMBOL(drm_dp_link_power_down);
416 * drm_dp_link_configure() - configure a DisplayPort link
417 * @aux: DisplayPort AUX channel
418 * @link: pointer to a structure containing the link configuration
420 * Returns 0 on success or a negative error code on failure.
422 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
424 u8 values[2];
425 int err;
427 values[0] = drm_dp_link_rate_to_bw_code(link->rate);
428 values[1] = link->num_lanes;
430 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
431 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
433 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
434 if (err < 0)
435 return err;
437 return 0;
439 EXPORT_SYMBOL(drm_dp_link_configure);
442 * I2C-over-AUX implementation
445 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
447 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
448 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
449 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
450 I2C_FUNC_10BIT_ADDR;
453 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg)
456 * In case of i2c defer or short i2c ack reply to a write,
457 * we need to switch to WRITE_STATUS_UPDATE to drain the
458 * rest of the message
460 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) {
461 msg->request &= DP_AUX_I2C_MOT;
462 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE;
466 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
467 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
468 #define AUX_STOP_LEN 4
469 #define AUX_CMD_LEN 4
470 #define AUX_ADDRESS_LEN 20
471 #define AUX_REPLY_PAD_LEN 4
472 #define AUX_LENGTH_LEN 8
475 * Calculate the duration of the AUX request/reply in usec. Gives the
476 * "best" case estimate, ie. successful while as short as possible.
478 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg)
480 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
481 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN;
483 if ((msg->request & DP_AUX_I2C_READ) == 0)
484 len += msg->size * 8;
486 return len;
489 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg)
491 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
492 AUX_CMD_LEN + AUX_REPLY_PAD_LEN;
495 * For read we expect what was asked. For writes there will
496 * be 0 or 1 data bytes. Assume 0 for the "best" case.
498 if (msg->request & DP_AUX_I2C_READ)
499 len += msg->size * 8;
501 return len;
504 #define I2C_START_LEN 1
505 #define I2C_STOP_LEN 1
506 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
507 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
510 * Calculate the length of the i2c transfer in usec, assuming
511 * the i2c bus speed is as specified. Gives the the "worst"
512 * case estimate, ie. successful while as long as possible.
513 * Doesn't account the the "MOT" bit, and instead assumes each
514 * message includes a START, ADDRESS and STOP. Neither does it
515 * account for additional random variables such as clock stretching.
517 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg,
518 int i2c_speed_khz)
520 /* AUX bitrate is 1MHz, i2c bitrate as specified */
521 return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +
522 msg->size * I2C_DATA_LEN +
523 I2C_STOP_LEN) * 1000, i2c_speed_khz);
527 * Deterine how many retries should be attempted to successfully transfer
528 * the specified message, based on the estimated durations of the
529 * i2c and AUX transfers.
531 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg,
532 int i2c_speed_khz)
534 int aux_time_us = drm_dp_aux_req_duration(msg) +
535 drm_dp_aux_reply_duration(msg);
536 int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
538 return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
542 * FIXME currently assumes 10 kHz as some real world devices seem
543 * to require it. We should query/set the speed via DPCD if supported.
545 static int dp_aux_i2c_speed_khz __read_mostly = 10;
546 MODULE_PARM_DESC(dp_aux_i2c_speed_khz,
547 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
550 * Transfer a single I2C-over-AUX message and handle various error conditions,
551 * retrying the transaction as appropriate. It is assumed that the
552 * aux->transfer function does not modify anything in the msg other than the
553 * reply field.
555 * Returns bytes transferred on success, or a negative error code on failure.
557 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
559 unsigned int retry, defer_i2c;
560 int ret;
562 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
563 * is required to retry at least seven times upon receiving AUX_DEFER
564 * before giving up the AUX transaction.
566 * We also try to account for the i2c bus speed.
568 int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz));
570 for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) {
571 ret = aux->transfer(aux, msg);
572 if (ret < 0) {
573 if (ret == -EBUSY)
574 continue;
576 DRM_DEBUG_KMS("transaction failed: %d\n", ret);
577 return ret;
581 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
582 case DP_AUX_NATIVE_REPLY_ACK:
584 * For I2C-over-AUX transactions this isn't enough, we
585 * need to check for the I2C ACK reply.
587 break;
589 case DP_AUX_NATIVE_REPLY_NACK:
590 DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
591 return -EREMOTEIO;
593 case DP_AUX_NATIVE_REPLY_DEFER:
594 DRM_DEBUG_KMS("native defer\n");
596 * We could check for I2C bit rate capabilities and if
597 * available adjust this interval. We could also be
598 * more careful with DP-to-legacy adapters where a
599 * long legacy cable may force very low I2C bit rates.
601 * For now just defer for long enough to hopefully be
602 * safe for all use-cases.
604 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
605 continue;
607 default:
608 DRM_ERROR("invalid native reply %#04x\n", msg->reply);
609 return -EREMOTEIO;
612 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
613 case DP_AUX_I2C_REPLY_ACK:
615 * Both native ACK and I2C ACK replies received. We
616 * can assume the transfer was successful.
618 if (ret != msg->size)
619 drm_dp_i2c_msg_write_status_update(msg);
620 return ret;
622 case DP_AUX_I2C_REPLY_NACK:
623 DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
624 aux->i2c_nack_count++;
625 return -EREMOTEIO;
627 case DP_AUX_I2C_REPLY_DEFER:
628 DRM_DEBUG_KMS("I2C defer\n");
629 /* DP Compliance Test 4.2.2.5 Requirement:
630 * Must have at least 7 retries for I2C defers on the
631 * transaction to pass this test
633 aux->i2c_defer_count++;
634 if (defer_i2c < 7)
635 defer_i2c++;
636 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
637 drm_dp_i2c_msg_write_status_update(msg);
639 continue;
641 default:
642 DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
643 return -EREMOTEIO;
647 DRM_DEBUG_KMS("too many retries, giving up\n");
648 return -EREMOTEIO;
651 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg,
652 const struct i2c_msg *i2c_msg)
654 msg->request = (i2c_msg->flags & I2C_M_RD) ?
655 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE;
656 msg->request |= DP_AUX_I2C_MOT;
660 * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
662 * Returns an error code on failure, or a recommended transfer size on success.
664 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
666 int err, ret = orig_msg->size;
667 struct drm_dp_aux_msg msg = *orig_msg;
669 while (msg.size > 0) {
670 err = drm_dp_i2c_do_msg(aux, &msg);
671 if (err <= 0)
672 return err == 0 ? -EPROTO : err;
674 if (err < msg.size && err < ret) {
675 DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
676 msg.size, err);
677 ret = err;
680 msg.size -= err;
681 msg.buffer += err;
684 return ret;
688 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
689 * packets to be as large as possible. If not, the I2C transactions never
690 * succeed. Hence the default is maximum.
692 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
693 MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
694 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
696 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
697 int num)
699 struct drm_dp_aux *aux = adapter->algo_data;
700 unsigned int i, j;
701 unsigned transfer_size;
702 struct drm_dp_aux_msg msg;
703 int err = 0;
705 dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
707 memset(&msg, 0, sizeof(msg));
709 mutex_lock(&aux->hw_mutex);
711 for (i = 0; i < num; i++) {
712 msg.address = msgs[i].addr;
713 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
714 /* Send a bare address packet to start the transaction.
715 * Zero sized messages specify an address only (bare
716 * address) transaction.
718 msg.buffer = NULL;
719 msg.size = 0;
720 err = drm_dp_i2c_do_msg(aux, &msg);
723 * Reset msg.request in case in case it got
724 * changed into a WRITE_STATUS_UPDATE.
726 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
728 if (err < 0)
729 break;
730 /* We want each transaction to be as large as possible, but
731 * we'll go to smaller sizes if the hardware gives us a
732 * short reply.
734 transfer_size = dp_aux_i2c_transfer_size;
735 for (j = 0; j < msgs[i].len; j += msg.size) {
736 msg.buffer = msgs[i].buf + j;
737 msg.size = min(transfer_size, msgs[i].len - j);
739 err = drm_dp_i2c_drain_msg(aux, &msg);
742 * Reset msg.request in case in case it got
743 * changed into a WRITE_STATUS_UPDATE.
745 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
747 if (err < 0)
748 break;
749 transfer_size = err;
751 if (err < 0)
752 break;
754 if (err >= 0)
755 err = num;
756 /* Send a bare address packet to close out the transaction.
757 * Zero sized messages specify an address only (bare
758 * address) transaction.
760 msg.request &= ~DP_AUX_I2C_MOT;
761 msg.buffer = NULL;
762 msg.size = 0;
763 (void)drm_dp_i2c_do_msg(aux, &msg);
765 mutex_unlock(&aux->hw_mutex);
767 return err;
770 static const struct i2c_algorithm drm_dp_i2c_algo = {
771 .functionality = drm_dp_i2c_functionality,
772 .master_xfer = drm_dp_i2c_xfer,
776 * drm_dp_aux_register() - initialise and register aux channel
777 * @aux: DisplayPort AUX channel
779 * Returns 0 on success or a negative error code on failure.
781 int drm_dp_aux_register(struct drm_dp_aux *aux)
783 int ret;
785 lockinit(&aux->hw_mutex, "ahwm", 0, LK_CANRECURSE);
787 aux->ddc.algo = &drm_dp_i2c_algo;
788 aux->ddc.algo_data = aux;
789 aux->ddc.retries = 3;
791 #if 0
792 aux->ddc.class = I2C_CLASS_DDC;
793 aux->ddc.owner = THIS_MODULE;
794 #endif
795 aux->ddc.dev.parent = aux->dev;
796 #if 0
797 aux->ddc.dev.of_node = aux->dev->of_node;
798 #endif
800 strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
801 sizeof(aux->ddc.name));
803 ret = drm_dp_aux_register_devnode(aux);
804 if (ret)
805 return ret;
807 ret = i2c_add_adapter(&aux->ddc);
808 if (ret) {
809 drm_dp_aux_unregister_devnode(aux);
810 return ret;
813 return 0;
815 EXPORT_SYMBOL(drm_dp_aux_register);
818 * drm_dp_aux_unregister() - unregister an AUX adapter
819 * @aux: DisplayPort AUX channel
821 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
823 drm_dp_aux_unregister_devnode(aux);
824 i2c_del_adapter(&aux->ddc);
826 EXPORT_SYMBOL(drm_dp_aux_unregister);