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Add more ids for RT2500USB.
[dragonfly.git] / sys / dev / netif / ural / if_ural.c
blob1e855e7fcab70dd515add2ef077307c221a7ea7d
1 /* $FreeBSD: src/sys/dev/usb/if_ural.c,v 1.10.2.8 2006/07/08 07:48:43 maxim Exp $ */
2 /* $DragonFly: src/sys/dev/netif/ural/if_ural.c,v 1.4 2006/12/24 05:18:22 sephe Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini@free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/param.h>
27 #include <sys/bus.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/mbuf.h>
32 #include <sys/rman.h>
33 #include <sys/socket.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36
37 #include <net/bpf.h>
38 #include <net/ethernet.h>
39 #include <net/if.h>
40 #include <net/if_arp.h>
41 #include <net/if_dl.h>
42 #include <net/if_media.h>
43 #include <net/ifq_var.h>
44
45 #include <netproto/802_11/ieee80211_var.h>
46 #include <netproto/802_11/ieee80211_radiotap.h>
47 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
48
49 #include <bus/usb/usb.h>
50 #include <bus/usb/usbdi.h>
51 #include <bus/usb/usbdi_util.h>
52 #include <bus/usb/usbdevs.h>
53
54 #include "if_uralreg.h"
55 #include "if_uralvar.h"
56
57 #ifdef USB_DEBUG
58 #define DPRINTF(x) do { if (uraldebug > 0) logprintf x; } while (0)
59 #define DPRINTFN(n, x) do { if (uraldebug >= (n)) logprintf x; } while (0)
60 int uraldebug = 0;
61 SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
62 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &uraldebug, 0,
63 "ural debug level");
64 #else
65 #define DPRINTF(x)
66 #define DPRINTFN(n, x)
67 #endif
68
69 /* various supported device vendors/products */
70 static const struct usb_devno ural_devs[] = {
71 { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G },
72 { USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570 },
73 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
74 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54U },
75 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
76 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
77 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
78 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54G },
79 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54GP },
80 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_HU200TS },
81 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
82 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
83 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
84 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
85 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570 },
86 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2 },
87 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3 },
88 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
89 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
90 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
91 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
92 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
93 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570 },
94 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
95 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570 }
96 };
97
98 MODULE_DEPEND(ural, wlan, 1, 1, 1);
99
100 Static int ural_alloc_tx_list(struct ural_softc *);
101 Static void ural_free_tx_list(struct ural_softc *);
102 Static int ural_alloc_rx_list(struct ural_softc *);
103 Static void ural_free_rx_list(struct ural_softc *);
104 Static int ural_media_change(struct ifnet *);
105 Static void ural_next_scan(void *);
106 Static void ural_task(void *);
107 Static int ural_newstate(struct ieee80211com *,
108 enum ieee80211_state, int);
109 Static int ural_rxrate(struct ural_rx_desc *);
110 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
111 usbd_status);
112 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
113 usbd_status);
114 Static int ural_ack_rate(struct ieee80211com *, int);
115 Static uint16_t ural_txtime(int, int, uint32_t);
116 Static uint8_t ural_plcp_signal(int);
117 Static void ural_setup_tx_desc(struct ural_softc *,
118 struct ural_tx_desc *, uint32_t, int, int);
119 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
120 struct ieee80211_node *);
121 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
122 struct ieee80211_node *);
123 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
124 struct ieee80211_node *);
125 Static void ural_start(struct ifnet *);
126 Static void ural_watchdog(struct ifnet *);
127 Static int ural_reset(struct ifnet *);
128 Static int ural_ioctl(struct ifnet *, u_long, caddr_t,
129 struct ucred *);
130 Static void ural_set_testmode(struct ural_softc *);
131 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
132 int);
133 Static uint16_t ural_read(struct ural_softc *, uint16_t);
134 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
135 int);
136 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
137 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
138 int);
139 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
140 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
141 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
142 Static void ural_set_chan(struct ural_softc *,
143 struct ieee80211_channel *);
144 Static void ural_disable_rf_tune(struct ural_softc *);
145 Static void ural_enable_tsf_sync(struct ural_softc *);
146 Static void ural_update_slot(struct ifnet *);
147 Static void ural_set_txpreamble(struct ural_softc *);
148 Static void ural_set_basicrates(struct ural_softc *);
149 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
150 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
151 Static void ural_update_promisc(struct ural_softc *);
152 Static const char *ural_get_rf(int);
153 Static void ural_read_eeprom(struct ural_softc *);
154 Static int ural_bbp_init(struct ural_softc *);
155 Static void ural_set_txantenna(struct ural_softc *, int);
156 Static void ural_set_rxantenna(struct ural_softc *, int);
157 Static void ural_init(void *);
158 Static void ural_stop(struct ural_softc *);
159 Static void ural_stats(struct ieee80211com *,
160 struct ieee80211_node *,
161 struct ieee80211_ratectl_stats *);
162 Static void ural_stats_update(usbd_xfer_handle,
163 usbd_private_handle, usbd_status);
164 Static void ural_stats_timeout(void *);
165 Static void ural_ratectl_change(struct ieee80211com *ic, u_int,
166 u_int);
167
168 /*
169 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
170 */
171 static const struct ieee80211_rateset ural_rateset_11a =
172 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
173
174 static const struct ieee80211_rateset ural_rateset_11b =
175 { 4, { 2, 4, 11, 22 } };
176
177 static const struct ieee80211_rateset ural_rateset_11g =
178 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
179
180 /*
181 * Default values for MAC registers; values taken from the reference driver.
182 */
183 static const struct {
184 uint16_t reg;
185 uint16_t val;
186 } ural_def_mac[] = {
187 { RAL_TXRX_CSR5, 0x8c8d },
188 { RAL_TXRX_CSR6, 0x8b8a },
189 { RAL_TXRX_CSR7, 0x8687 },
190 { RAL_TXRX_CSR8, 0x0085 },
191 { RAL_MAC_CSR13, 0x1111 },
192 { RAL_MAC_CSR14, 0x1e11 },
193 { RAL_TXRX_CSR21, 0xe78f },
194 { RAL_MAC_CSR9, 0xff1d },
195 { RAL_MAC_CSR11, 0x0002 },
196 { RAL_MAC_CSR22, 0x0053 },
197 { RAL_MAC_CSR15, 0x0000 },
198 { RAL_MAC_CSR8, 0x0780 },
199 { RAL_TXRX_CSR19, 0x0000 },
200 { RAL_TXRX_CSR18, 0x005a },
201 { RAL_PHY_CSR2, 0x0000 },
202 { RAL_TXRX_CSR0, 0x1ec0 },
203 { RAL_PHY_CSR4, 0x000f }
204 };
205
206 /*
207 * Default values for BBP registers; values taken from the reference driver.
208 */
209 static const struct {
210 uint8_t reg;
211 uint8_t val;
212 } ural_def_bbp[] = {
213 { 3, 0x02 },
214 { 4, 0x19 },
215 { 14, 0x1c },
216 { 15, 0x30 },
217 { 16, 0xac },
218 { 17, 0x48 },
219 { 18, 0x18 },
220 { 19, 0xff },
221 { 20, 0x1e },
222 { 21, 0x08 },
223 { 22, 0x08 },
224 { 23, 0x08 },
225 { 24, 0x80 },
226 { 25, 0x50 },
227 { 26, 0x08 },
228 { 27, 0x23 },
229 { 30, 0x10 },
230 { 31, 0x2b },
231 { 32, 0xb9 },
232 { 34, 0x12 },
233 { 35, 0x50 },
234 { 39, 0xc4 },
235 { 40, 0x02 },
236 { 41, 0x60 },
237 { 53, 0x10 },
238 { 54, 0x18 },
239 { 56, 0x08 },
240 { 57, 0x10 },
241 { 58, 0x08 },
242 { 61, 0x60 },
243 { 62, 0x10 },
244 { 75, 0xff }
245 };
246
247 /*
248 * Default values for RF register R2 indexed by channel numbers.
249 */
250 static const uint32_t ural_rf2522_r2[] = {
251 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
252 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
253 };
254
255 static const uint32_t ural_rf2523_r2[] = {
256 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
257 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
258 };
259
260 static const uint32_t ural_rf2524_r2[] = {
261 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
262 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
263 };
264
265 static const uint32_t ural_rf2525_r2[] = {
266 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
267 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
268 };
269
270 static const uint32_t ural_rf2525_hi_r2[] = {
271 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
272 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
273 };
274
275 static const uint32_t ural_rf2525e_r2[] = {
276 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
277 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
278 };
279
280 static const uint32_t ural_rf2526_hi_r2[] = {
281 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
282 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
283 };
284
285 static const uint32_t ural_rf2526_r2[] = {
286 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
287 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
288 };
289
290 /*
291 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
292 * values taken from the reference driver.
293 */
294 static const struct {
295 uint8_t chan;
296 uint32_t r1;
297 uint32_t r2;
298 uint32_t r4;
299 } ural_rf5222[] = {
300 { 1, 0x08808, 0x0044d, 0x00282 },
301 { 2, 0x08808, 0x0044e, 0x00282 },
302 { 3, 0x08808, 0x0044f, 0x00282 },
303 { 4, 0x08808, 0x00460, 0x00282 },
304 { 5, 0x08808, 0x00461, 0x00282 },
305 { 6, 0x08808, 0x00462, 0x00282 },
306 { 7, 0x08808, 0x00463, 0x00282 },
307 { 8, 0x08808, 0x00464, 0x00282 },
308 { 9, 0x08808, 0x00465, 0x00282 },
309 { 10, 0x08808, 0x00466, 0x00282 },
310 { 11, 0x08808, 0x00467, 0x00282 },
311 { 12, 0x08808, 0x00468, 0x00282 },
312 { 13, 0x08808, 0x00469, 0x00282 },
313 { 14, 0x08808, 0x0046b, 0x00286 },
314
315 { 36, 0x08804, 0x06225, 0x00287 },
316 { 40, 0x08804, 0x06226, 0x00287 },
317 { 44, 0x08804, 0x06227, 0x00287 },
318 { 48, 0x08804, 0x06228, 0x00287 },
319 { 52, 0x08804, 0x06229, 0x00287 },
320 { 56, 0x08804, 0x0622a, 0x00287 },
321 { 60, 0x08804, 0x0622b, 0x00287 },
322 { 64, 0x08804, 0x0622c, 0x00287 },
323
324 { 100, 0x08804, 0x02200, 0x00283 },
325 { 104, 0x08804, 0x02201, 0x00283 },
326 { 108, 0x08804, 0x02202, 0x00283 },
327 { 112, 0x08804, 0x02203, 0x00283 },
328 { 116, 0x08804, 0x02204, 0x00283 },
329 { 120, 0x08804, 0x02205, 0x00283 },
330 { 124, 0x08804, 0x02206, 0x00283 },
331 { 128, 0x08804, 0x02207, 0x00283 },
332 { 132, 0x08804, 0x02208, 0x00283 },
333 { 136, 0x08804, 0x02209, 0x00283 },
334 { 140, 0x08804, 0x0220a, 0x00283 },
335
336 { 149, 0x08808, 0x02429, 0x00281 },
337 { 153, 0x08808, 0x0242b, 0x00281 },
338 { 157, 0x08808, 0x0242d, 0x00281 },
339 { 161, 0x08808, 0x0242f, 0x00281 }
340 };
341
342 USB_DECLARE_DRIVER(ural);
343
344 USB_MATCH(ural)
345 {
346 USB_MATCH_START(ural, uaa);
347
348 if (uaa->iface != NULL)
349 return UMATCH_NONE;
350
351 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
353 }
354
355 USB_ATTACH(ural)
356 {
357 USB_ATTACH_START(ural, sc, uaa);
358 struct ifnet *ifp;
359 struct ieee80211com *ic = &sc->sc_ic;
360 usb_interface_descriptor_t *id;
361 usb_endpoint_descriptor_t *ed;
362 usbd_status error;
363 char devinfo[1024];
364 int i;
365
366 sc->sc_udev = uaa->device;
367 sc->sc_tx_retries = 7; /* TODO tunable/sysctl */
368
369 usbd_devinfo(sc->sc_udev, 0, devinfo);
370 USB_ATTACH_SETUP;
371
372 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
373 kprintf("%s: could not set configuration no\n",
374 USBDEVNAME(sc->sc_dev));
375 USB_ATTACH_ERROR_RETURN;
376 }
377
378 /* get the first interface handle */
379 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
380 &sc->sc_iface);
381 if (error != 0) {
382 kprintf("%s: could not get interface handle\n",
383 USBDEVNAME(sc->sc_dev));
384 USB_ATTACH_ERROR_RETURN;
385 }
386
387 /*
388 * Find endpoints.
389 */
390 id = usbd_get_interface_descriptor(sc->sc_iface);
391
392 sc->sc_rx_no = sc->sc_tx_no = -1;
393 for (i = 0; i < id->bNumEndpoints; i++) {
394 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
395 if (ed == NULL) {
396 kprintf("%s: no endpoint descriptor for %d\n",
397 USBDEVNAME(sc->sc_dev), i);
398 USB_ATTACH_ERROR_RETURN;
399 }
400
401 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
402 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
403 sc->sc_rx_no = ed->bEndpointAddress;
404 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
405 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
406 sc->sc_tx_no = ed->bEndpointAddress;
407 }
408 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
409 kprintf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev));
410 USB_ATTACH_ERROR_RETURN;
411 }
412
413 #if 0
414 mtx_init(&sc->sc_mtx, USBDEVNAME(sc->sc_dev), MTX_NETWORK_LOCK,
415 MTX_DEF | MTX_RECURSE);
416 #endif
417
418 usb_init_task(&sc->sc_task, ural_task, sc);
419 callout_init(&sc->scan_ch);
420 callout_init(&sc->stats_ch);
421
422 /* retrieve RT2570 rev. no */
423 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
424
425 /* retrieve MAC address and various other things from EEPROM */
426 ural_read_eeprom(sc);
427
428 kprintf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
429 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev));
430
431 ifp = &ic->ic_if;
432 ifp->if_softc = sc;
433 if_initname(ifp, "ural", USBDEVUNIT(sc->sc_dev));
434 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
435 ifp->if_init = ural_init;
436 ifp->if_ioctl = ural_ioctl;
437 ifp->if_start = ural_start;
438 ifp->if_watchdog = ural_watchdog;
439 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
440 ifq_set_ready(&ifp->if_snd);
441
442 ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE;
443 ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_ONOE;
444 ic->ic_ratectl.rc_st_valid_stats =
445 IEEE80211_RATECTL_STATS_PKT_NORETRY |
446 IEEE80211_RATECTL_STATS_PKT_OK |
447 IEEE80211_RATECTL_STATS_PKT_ERR |
448 IEEE80211_RATECTL_STATS_RETRIES;
449 ic->ic_ratectl.rc_st_stats = ural_stats;
450 ic->ic_ratectl.rc_st_change = ural_ratectl_change;
451
452 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
453 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
454 ic->ic_state = IEEE80211_S_INIT;
455
456 /* set device capabilities */
457 ic->ic_caps =
458 IEEE80211_C_IBSS | /* IBSS mode supported */
459 IEEE80211_C_MONITOR | /* monitor mode supported */
460 IEEE80211_C_HOSTAP | /* HostAp mode supported */
461 IEEE80211_C_TXPMGT | /* tx power management */
462 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
463 IEEE80211_C_SHSLOT | /* short slot time supported */
464 IEEE80211_C_WPA; /* 802.11i */
465
466 if (sc->rf_rev == RAL_RF_5222) {
467 /* set supported .11a rates */
468 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
469
470 /* set supported .11a channels */
471 for (i = 36; i <= 64; i += 4) {
472 ic->ic_channels[i].ic_freq =
473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
475 }
476 for (i = 100; i <= 140; i += 4) {
477 ic->ic_channels[i].ic_freq =
478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
480 }
481 for (i = 149; i <= 161; i += 4) {
482 ic->ic_channels[i].ic_freq =
483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
485 }
486 }
487
488 /* set supported .11b and .11g rates */
489 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
490 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
491
492 /* set supported .11b and .11g channels (1 through 14) */
493 for (i = 1; i <= 14; i++) {
494 ic->ic_channels[i].ic_freq =
495 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
496 ic->ic_channels[i].ic_flags =
497 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
498 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
499 }
500
501 ieee80211_ifattach(ic);
502 ic->ic_reset = ural_reset;
503 /* enable s/w bmiss handling in sta mode */
504 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
505
506 /* override state transition machine */
507 sc->sc_newstate = ic->ic_newstate;
508 ic->ic_newstate = ural_newstate;
509 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
510
511 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
512 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
513
514 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
515 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
516 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
517
518 sc->sc_txtap_len = sizeof sc->sc_txtapu;
519 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
520 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
521
522 if (bootverbose)
523 ieee80211_announce(ic);
524
525 USB_ATTACH_SUCCESS_RETURN;
526 }
527
528 USB_DETACH(ural)
529 {
530 USB_DETACH_START(ural, sc);
531 struct ieee80211com *ic = &sc->sc_ic;
532 struct ifnet *ifp = &ic->ic_if;
533
534 lwkt_serialize_enter(ifp->if_serializer);
535
536 callout_stop(&sc->scan_ch);
537 callout_stop(&sc->stats_ch);
538
539 sc->sc_flags |= URAL_FLAG_SYNCTASK;
540 ural_stop(sc);
541
542 lwkt_serialize_exit(ifp->if_serializer);
543
544 usb_rem_task(sc->sc_udev, &sc->sc_task);
545
546 if (sc->stats_xfer != NULL) {
547 usbd_free_xfer(sc->stats_xfer);
548 sc->stats_xfer = NULL;
549 }
550
551 if (sc->sc_rx_pipeh != NULL) {
552 usbd_abort_pipe(sc->sc_rx_pipeh);
553 usbd_close_pipe(sc->sc_rx_pipeh);
554 }
555
556 if (sc->sc_tx_pipeh != NULL) {
557 usbd_abort_pipe(sc->sc_tx_pipeh);
558 usbd_close_pipe(sc->sc_tx_pipeh);
559 }
560
561 ural_free_rx_list(sc);
562 ural_free_tx_list(sc);
563
564 bpfdetach(ifp);
565 ieee80211_ifdetach(ic);
566
567 #if 0
568 mtx_destroy(&sc->sc_mtx);
569 #endif
570
571 return 0;
572 }
573
574 Static int
575 ural_alloc_tx_list(struct ural_softc *sc)
576 {
577 struct ural_tx_data *data;
578 int i, error;
579
580 sc->tx_queued = 0;
581
582 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
583 data = &sc->tx_data[i];
584
585 data->sc = sc;
586
587 data->xfer = usbd_alloc_xfer(sc->sc_udev);
588 if (data->xfer == NULL) {
589 kprintf("%s: could not allocate tx xfer\n",
590 USBDEVNAME(sc->sc_dev));
591 error = ENOMEM;
592 goto fail;
593 }
594
595 data->buf = usbd_alloc_buffer(data->xfer,
596 RAL_TX_DESC_SIZE + MCLBYTES);
597 if (data->buf == NULL) {
598 kprintf("%s: could not allocate tx buffer\n",
599 USBDEVNAME(sc->sc_dev));
600 error = ENOMEM;
601 goto fail;
602 }
603 }
604
605 return 0;
606
607 fail: ural_free_tx_list(sc);
608 return error;
609 }
610
611 Static void
612 ural_free_tx_list(struct ural_softc *sc)
613 {
614 struct ural_tx_data *data;
615 int i;
616
617 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
618 data = &sc->tx_data[i];
619
620 if (data->xfer != NULL) {
621 usbd_free_xfer(data->xfer);
622 data->xfer = NULL;
623 }
624
625 if (data->ni != NULL) {
626 ieee80211_free_node(data->ni);
627 data->ni = NULL;
628 }
629 }
630 }
631
632 Static int
633 ural_alloc_rx_list(struct ural_softc *sc)
634 {
635 struct ural_rx_data *data;
636 int i, error;
637
638 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
639 data = &sc->rx_data[i];
640
641 data->sc = sc;
642
643 data->xfer = usbd_alloc_xfer(sc->sc_udev);
644 if (data->xfer == NULL) {
645 kprintf("%s: could not allocate rx xfer\n",
646 USBDEVNAME(sc->sc_dev));
647 error = ENOMEM;
648 goto fail;
649 }
650
651 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
652 kprintf("%s: could not allocate rx buffer\n",
653 USBDEVNAME(sc->sc_dev));
654 error = ENOMEM;
655 goto fail;
656 }
657
658 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
659 if (data->m == NULL) {
660 kprintf("%s: could not allocate rx mbuf\n",
661 USBDEVNAME(sc->sc_dev));
662 error = ENOMEM;
663 goto fail;
664 }
665
666 data->buf = mtod(data->m, uint8_t *);
667 }
668
669 return 0;
670
671 fail: ural_free_tx_list(sc);
672 return error;
673 }
674
675 Static void
676 ural_free_rx_list(struct ural_softc *sc)
677 {
678 struct ural_rx_data *data;
679 int i;
680
681 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
682 data = &sc->rx_data[i];
683
684 if (data->xfer != NULL) {
685 usbd_free_xfer(data->xfer);
686 data->xfer = NULL;
687 }
688
689 if (data->m != NULL) {
690 m_freem(data->m);
691 data->m = NULL;
692 }
693 }
694 }
695
696 Static int
697 ural_media_change(struct ifnet *ifp)
698 {
699 struct ural_softc *sc = ifp->if_softc;
700 int error;
701
702 error = ieee80211_media_change(ifp);
703 if (error != ENETRESET)
704 return error;
705
706 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
707 ural_init(sc);
708
709 return 0;
710 }
711
712 /*
713 * This function is called periodically (every 200ms) during scanning to
714 * switch from one channel to another.
715 */
716 Static void
717 ural_next_scan(void *arg)
718 {
719 struct ural_softc *sc = arg;
720 struct ieee80211com *ic = &sc->sc_ic;
721 struct ifnet *ifp = &ic->ic_if;
722
723 lwkt_serialize_enter(ifp->if_serializer);
724
725 if (ic->ic_state == IEEE80211_S_SCAN)
726 ieee80211_next_scan(ic);
727
728 lwkt_serialize_exit(ifp->if_serializer);
729 }
730
731 Static void
732 ural_task(void *arg)
733 {
734 struct ural_softc *sc = arg;
735 struct ieee80211com *ic = &sc->sc_ic;
736 struct ifnet *ifp = &ic->ic_if;
737 enum ieee80211_state ostate;
738 struct ieee80211_node *ni;
739 struct mbuf *m;
740
741 lwkt_serialize_enter(ifp->if_serializer);
742
743 ieee80211_ratectl_newstate(ic, sc->sc_state);
744
745 ostate = ic->ic_state;
746
747 switch (sc->sc_state) {
748 case IEEE80211_S_INIT:
749 if (ostate == IEEE80211_S_RUN) {
750 /* abort TSF synchronization */
751 ural_write(sc, RAL_TXRX_CSR19, 0);
752
753 /* force tx led to stop blinking */
754 ural_write(sc, RAL_MAC_CSR20, 0);
755 }
756 break;
757
758 case IEEE80211_S_SCAN:
759 ural_set_chan(sc, ic->ic_curchan);
760 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc);
761 break;
762
763 case IEEE80211_S_AUTH:
764 ural_set_chan(sc, ic->ic_curchan);
765 break;
766
767 case IEEE80211_S_ASSOC:
768 ural_set_chan(sc, ic->ic_curchan);
769 break;
770
771 case IEEE80211_S_RUN:
772 ural_set_chan(sc, ic->ic_curchan);
773
774 ni = ic->ic_bss;
775
776 lwkt_serialize_exit(ifp->if_serializer);
777
778 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
779 ural_update_slot(&ic->ic_if);
780 ural_set_txpreamble(sc);
781 ural_set_basicrates(sc);
782 ural_set_bssid(sc, ni->ni_bssid);
783 }
784
785 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
786 ic->ic_opmode == IEEE80211_M_IBSS) {
787 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
788 if (m == NULL) {
789 kprintf("%s: could not allocate beacon\n",
790 USBDEVNAME(sc->sc_dev));
791 return;
792 }
793
794 if (ural_tx_bcn(sc, m, ni) != 0) {
795 kprintf("%s: could not send beacon\n",
796 USBDEVNAME(sc->sc_dev));
797 return;
798 }
799 }
800
801 /* make tx led blink on tx (controlled by ASIC) */
802 ural_write(sc, RAL_MAC_CSR20, 1);
803
804 if (ic->ic_opmode != IEEE80211_M_MONITOR)
805 ural_enable_tsf_sync(sc);
806
807 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
808 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
809
810 lwkt_serialize_enter(ifp->if_serializer);
811
812 callout_reset(&sc->stats_ch, 4 * hz / 5,
813 ural_stats_timeout, sc);
814
815 break;
816 }
817
818 sc->sc_newstate(ic, sc->sc_state, -1);
819
820 lwkt_serialize_exit(ifp->if_serializer);
821 }
822
823 Static int
824 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
825 {
826 struct ifnet *ifp = &ic->ic_if;
827 struct ural_softc *sc = ifp->if_softc;
828
829 ASSERT_SERIALIZED(ifp->if_serializer);
830
831 callout_stop(&sc->scan_ch);
832 callout_stop(&sc->stats_ch);
833
834 /* do it in a process context */
835 sc->sc_state = nstate;
836
837 lwkt_serialize_exit(ifp->if_serializer);
838 usb_rem_task(sc->sc_udev, &sc->sc_task);
839
840 if (sc->sc_flags & URAL_FLAG_SYNCTASK) {
841 usb_do_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER,
842 USBD_NO_TIMEOUT);
843 } else {
844 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
845 }
846 lwkt_serialize_enter(ifp->if_serializer);
847
848 return 0;
849 }
850
851 /* quickly determine if a given rate is CCK or OFDM */
852 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
853
854 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
855 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
856
857 #define RAL_SIFS 10 /* us */
858
859 #define RAL_RXTX_TURNAROUND 5 /* us */
860
861 /*
862 * This function is only used by the Rx radiotap code.
863 */
864 Static int
865 ural_rxrate(struct ural_rx_desc *desc)
866 {
867 if (le32toh(desc->flags) & RAL_RX_OFDM) {
868 /* reverse function of ural_plcp_signal */
869 switch (desc->rate) {
870 case 0xb: return 12;
871 case 0xf: return 18;
872 case 0xa: return 24;
873 case 0xe: return 36;
874 case 0x9: return 48;
875 case 0xd: return 72;
876 case 0x8: return 96;
877 case 0xc: return 108;
878 }
879 } else {
880 if (desc->rate == 10)
881 return 2;
882 if (desc->rate == 20)
883 return 4;
884 if (desc->rate == 55)
885 return 11;
886 if (desc->rate == 110)
887 return 22;
888 }
889 return 2; /* should not get there */
890 }
891
892 Static void
893 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
894 {
895 struct ural_tx_data *data = priv;
896 struct ural_softc *sc = data->sc;
897 struct ifnet *ifp = &sc->sc_ic.ic_if;
898
899 if (status != USBD_NORMAL_COMPLETION) {
900 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
901 return;
902
903 kprintf("%s: could not transmit buffer: %s\n",
904 USBDEVNAME(sc->sc_dev), usbd_errstr(status));
905
906 if (status == USBD_STALLED)
907 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
908
909 ifp->if_oerrors++;
910 return;
911 }
912
913 lwkt_serialize_enter(ifp->if_serializer);
914
915 m_freem(data->m);
916 data->m = NULL;
917 ieee80211_free_node(data->ni);
918 data->ni = NULL;
919
920 sc->tx_queued--;
921 ifp->if_opackets++;
922
923 DPRINTFN(10, ("tx done\n"));
924
925 sc->sc_tx_timer = 0;
926 ifp->if_flags &= ~IFF_OACTIVE;
927 ural_start(ifp);
928
929 lwkt_serialize_exit(ifp->if_serializer);
930 }
931
932 Static void
933 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
934 {
935 struct ural_rx_data *data = priv;
936 struct ural_softc *sc = data->sc;
937 struct ieee80211com *ic = &sc->sc_ic;
938 struct ifnet *ifp = &ic->ic_if;
939 struct ural_rx_desc *desc;
940 struct ieee80211_frame *wh;
941 struct ieee80211_node *ni;
942 struct mbuf *mnew, *m;
943 int len;
944
945 if (status != USBD_NORMAL_COMPLETION) {
946 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
947 return;
948
949 if (status == USBD_STALLED)
950 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
951 goto skip;
952 }
953
954 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
955
956 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
957 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
958 len));
959 ifp->if_ierrors++;
960 goto skip;
961 }
962
963 /* rx descriptor is located at the end */
964 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
965
966 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
967 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
968 /*
969 * This should not happen since we did not request to receive
970 * those frames when we filled RAL_TXRX_CSR2.
971 */
972 DPRINTFN(5, ("PHY or CRC error\n"));
973 ifp->if_ierrors++;
974 goto skip;
975 }
976
977 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
978 if (mnew == NULL) {
979 ifp->if_ierrors++;
980 goto skip;
981 }
982
983 m = data->m;
984 data->m = mnew;
985 data->buf = mtod(data->m, uint8_t *);
986
987 /* finalize mbuf */
988 m->m_pkthdr.rcvif = ifp;
989 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
990
991 lwkt_serialize_enter(ifp->if_serializer);
992
993 if (sc->sc_drvbpf != NULL) {
994 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
995
996 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; /* h/w leaves FCS */
997 tap->wr_rate = ural_rxrate(desc);
998 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
999 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1000 tap->wr_antenna = sc->rx_ant;
1001 tap->wr_antsignal = desc->rssi;
1002
1003 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1004 }
1005
1006 /* trim CRC here so WEP can find its own CRC at the end of packet. */
1007 m_adj(m, -IEEE80211_CRC_LEN);
1008
1009 wh = mtod(m, struct ieee80211_frame *);
1010 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1011
1012 /* send the frame to the 802.11 layer */
1013 ieee80211_input(ic, m, ni, desc->rssi, 0);
1014
1015 /* node is no longer needed */
1016 ieee80211_free_node(ni);
1017
1018 DPRINTFN(15, ("rx done\n"));
1019
1020 lwkt_serialize_exit(ifp->if_serializer);
1021
1022 skip: /* setup a new transfer */
1023 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1024 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1025 usbd_transfer(xfer);
1026 }
1027
1028 /*
1029 * Return the expected ack rate for a frame transmitted at rate `rate'.
1030 * XXX: this should depend on the destination node basic rate set.
1031 */
1032 Static int
1033 ural_ack_rate(struct ieee80211com *ic, int rate)
1034 {
1035 switch (rate) {
1036 /* CCK rates */
1037 case 2:
1038 return 2;
1039 case 4:
1040 case 11:
1041 case 22:
1042 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1043
1044 /* OFDM rates */
1045 case 12:
1046 case 18:
1047 return 12;
1048 case 24:
1049 case 36:
1050 return 24;
1051 case 48:
1052 case 72:
1053 case 96:
1054 case 108:
1055 return 48;
1056 }
1057
1058 /* default to 1Mbps */
1059 return 2;
1060 }
1061
1062 /*
1063 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1064 * The function automatically determines the operating mode depending on the
1065 * given rate. `flags' indicates whether short preamble is in use or not.
1066 */
1067 Static uint16_t
1068 ural_txtime(int len, int rate, uint32_t flags)
1069 {
1070 uint16_t txtime;
1071
1072 if (RAL_RATE_IS_OFDM(rate)) {
1073 /* IEEE Std 802.11a-1999, pp. 37 */
1074 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1075 txtime = 16 + 4 + 4 * txtime + 6;
1076 } else {
1077 /* IEEE Std 802.11b-1999, pp. 28 */
1078 txtime = (16 * len + rate - 1) / rate;
1079 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1080 txtime += 72 + 24;
1081 else
1082 txtime += 144 + 48;
1083 }
1084 return txtime;
1085 }
1086
1087 Static uint8_t
1088 ural_plcp_signal(int rate)
1089 {
1090 switch (rate) {
1091 /* CCK rates (returned values are device-dependent) */
1092 case 2: return 0x0;
1093 case 4: return 0x1;
1094 case 11: return 0x2;
1095 case 22: return 0x3;
1096
1097 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1098 case 12: return 0xb;
1099 case 18: return 0xf;
1100 case 24: return 0xa;
1101 case 36: return 0xe;
1102 case 48: return 0x9;
1103 case 72: return 0xd;
1104 case 96: return 0x8;
1105 case 108: return 0xc;
1106
1107 /* unsupported rates (should not get there) */
1108 default: return 0xff;
1109 }
1110 }
1111
1112 Static void
1113 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1114 uint32_t flags, int len, int rate)
1115 {
1116 struct ieee80211com *ic = &sc->sc_ic;
1117 uint16_t plcp_length;
1118 int remainder;
1119
1120 desc->flags = htole32(flags);
1121 desc->flags |= htole32(RAL_TX_NEWSEQ);
1122 desc->flags |= htole32(len << 16);
1123
1124 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1125 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1126
1127 /* setup PLCP fields */
1128 desc->plcp_signal = ural_plcp_signal(rate);
1129 desc->plcp_service = 4;
1130
1131 len += IEEE80211_CRC_LEN;
1132 if (RAL_RATE_IS_OFDM(rate)) {
1133 desc->flags |= htole32(RAL_TX_OFDM);
1134
1135 plcp_length = len & 0xfff;
1136 desc->plcp_length_hi = plcp_length >> 6;
1137 desc->plcp_length_lo = plcp_length & 0x3f;
1138 } else {
1139 plcp_length = (16 * len + rate - 1) / rate;
1140 if (rate == 22) {
1141 remainder = (16 * len) % 22;
1142 if (remainder != 0 && remainder < 7)
1143 desc->plcp_service |= RAL_PLCP_LENGEXT;
1144 }
1145 desc->plcp_length_hi = plcp_length >> 8;
1146 desc->plcp_length_lo = plcp_length & 0xff;
1147
1148 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1149 desc->plcp_signal |= 0x08;
1150 }
1151
1152 desc->iv = 0;
1153 desc->eiv = 0;
1154 }
1155
1156 #define RAL_TX_TIMEOUT 5000
1157
1158 Static int
1159 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1160 {
1161 struct ural_tx_desc *desc;
1162 usbd_xfer_handle xfer;
1163 uint8_t cmd = 0;
1164 usbd_status error;
1165 uint8_t *buf;
1166 int xferlen, rate;
1167
1168 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1169
1170 xfer = usbd_alloc_xfer(sc->sc_udev);
1171 if (xfer == NULL)
1172 return ENOMEM;
1173
1174 /* xfer length needs to be a multiple of two! */
1175 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1176
1177 buf = usbd_alloc_buffer(xfer, xferlen);
1178 if (buf == NULL) {
1179 usbd_free_xfer(xfer);
1180 return ENOMEM;
1181 }
1182
1183 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1184 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1185
1186 error = usbd_sync_transfer(xfer);
1187 if (error != 0) {
1188 usbd_free_xfer(xfer);
1189 return error;
1190 }
1191
1192 desc = (struct ural_tx_desc *)buf;
1193
1194 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1195 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1196 m0->m_pkthdr.len, rate);
1197
1198 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1199 m0->m_pkthdr.len, rate, xferlen));
1200
1201 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1202 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1203
1204 error = usbd_sync_transfer(xfer);
1205 usbd_free_xfer(xfer);
1206
1207 return error;
1208 }
1209
1210 Static int
1211 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1212 {
1213 struct ieee80211com *ic = &sc->sc_ic;
1214 struct ural_tx_desc *desc;
1215 struct ural_tx_data *data;
1216 struct ieee80211_frame *wh;
1217 uint32_t flags = 0;
1218 uint16_t dur;
1219 usbd_status error;
1220 int xferlen, rate;
1221
1222 data = &sc->tx_data[0];
1223 desc = (struct ural_tx_desc *)data->buf;
1224
1225 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1226
1227 data->m = m0;
1228 data->ni = ni;
1229
1230 wh = mtod(m0, struct ieee80211_frame *);
1231
1232 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1233 flags |= RAL_TX_ACK;
1234
1235 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1236 *(uint16_t *)wh->i_dur = htole16(dur);
1237
1238 /* tell hardware to add timestamp for probe responses */
1239 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1240 IEEE80211_FC0_TYPE_MGT &&
1241 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1242 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1243 flags |= RAL_TX_TIMESTAMP;
1244 }
1245
1246 if (sc->sc_drvbpf != NULL) {
1247 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1248
1249 tap->wt_flags = 0;
1250 tap->wt_rate = rate;
1251 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1252 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1253 tap->wt_antenna = sc->tx_ant;
1254
1255 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1256 }
1257
1258 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1259 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1260
1261 /* align end on a 2-bytes boundary */
1262 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1263
1264 /*
1265 * No space left in the last URB to store the extra 2 bytes, force
1266 * sending of another URB.
1267 */
1268 if ((xferlen % 64) == 0)
1269 xferlen += 2;
1270
1271 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1272 m0->m_pkthdr.len, rate, xferlen));
1273
1274 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1275 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1276 ural_txeof);
1277
1278 error = usbd_transfer(data->xfer);
1279 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1280 return error;
1281
1282 sc->tx_queued++;
1283
1284 return 0;
1285 }
1286
1287 Static int
1288 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1289 {
1290 struct ieee80211com *ic = &sc->sc_ic;
1291 struct ural_tx_desc *desc;
1292 struct ural_tx_data *data;
1293 struct ieee80211_frame *wh;
1294 struct ieee80211_key *k;
1295 uint32_t flags = 0;
1296 uint16_t dur;
1297 usbd_status error;
1298 int xferlen, rate, rate_idx;
1299
1300 wh = mtod(m0, struct ieee80211_frame *);
1301
1302 ieee80211_ratectl_findrate(ni, m0->m_pkthdr.len, &rate_idx, 1);
1303 rate = IEEE80211_RS_RATE(&ni->ni_rates, rate_idx);
1304
1305 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1306 k = ieee80211_crypto_encap(ic, ni, m0);
1307 if (k == NULL) {
1308 m_freem(m0);
1309 return ENOBUFS;
1310 }
1311
1312 /* packet header may have moved, reset our local pointer */
1313 wh = mtod(m0, struct ieee80211_frame *);
1314 }
1315
1316 data = &sc->tx_data[0];
1317 desc = (struct ural_tx_desc *)data->buf;
1318
1319 data->m = m0;
1320 data->ni = ni;
1321
1322 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1323 flags |= RAL_TX_ACK;
1324 flags |= RAL_TX_RETRY(sc->sc_tx_retries);
1325
1326 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1327 ic->ic_flags) + RAL_SIFS;
1328 *(uint16_t *)wh->i_dur = htole16(dur);
1329 }
1330
1331 if (sc->sc_drvbpf != NULL) {
1332 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1333
1334 tap->wt_flags = 0;
1335 tap->wt_rate = rate;
1336 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1337 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1338 tap->wt_antenna = sc->tx_ant;
1339
1340 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1341 }
1342
1343 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1344 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1345
1346 /* align end on a 2-bytes boundary */
1347 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1348
1349 /*
1350 * No space left in the last URB to store the extra 2 bytes, force
1351 * sending of another URB.
1352 */
1353 if ((xferlen % 64) == 0)
1354 xferlen += 2;
1355
1356 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1357 m0->m_pkthdr.len, rate, xferlen));
1358
1359 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1360 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1361 ural_txeof);
1362
1363 error = usbd_transfer(data->xfer);
1364 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1365 return error;
1366
1367 sc->tx_queued++;
1368
1369 return 0;
1370 }
1371
1372 Static void
1373 ural_start(struct ifnet *ifp)
1374 {
1375 struct ural_softc *sc = ifp->if_softc;
1376 struct ieee80211com *ic = &sc->sc_ic;
1377 struct mbuf *m0;
1378 struct ether_header *eh;
1379 struct ieee80211_node *ni;
1380
1381 ASSERT_SERIALIZED(ifp->if_serializer);
1382
1383 if ((ifp->if_flags & (IFF_OACTIVE | IFF_RUNNING)) != IFF_RUNNING)
1384 return;
1385
1386 for (;;) {
1387 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1388 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1389 ifp->if_flags |= IFF_OACTIVE;
1390 break;
1391 }
1392 IF_DEQUEUE(&ic->ic_mgtq, m0);
1393
1394 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1395 m0->m_pkthdr.rcvif = NULL;
1396
1397 if (ic->ic_rawbpf != NULL)
1398 bpf_mtap(ic->ic_rawbpf, m0);
1399
1400 if (ural_tx_mgt(sc, m0, ni) != 0)
1401 break;
1402
1403 } else {
1404 if (ic->ic_state != IEEE80211_S_RUN)
1405 break;
1406 m0 = ifq_poll(&ifp->if_snd);
1407 if (m0 == NULL)
1408 break;
1409 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1410 ifp->if_flags |= IFF_OACTIVE;
1411 break;
1412 }
1413
1414 ifq_dequeue(&ifp->if_snd, m0);
1415
1416 if (m0->m_len < sizeof (struct ether_header) &&
1417 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1418 continue;
1419
1420 eh = mtod(m0, struct ether_header *);
1421 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1422 if (ni == NULL) {
1423 m_freem(m0);
1424 continue;
1425 }
1426 BPF_MTAP(ifp, m0);
1427
1428 m0 = ieee80211_encap(ic, m0, ni);
1429 if (m0 == NULL) {
1430 ieee80211_free_node(ni);
1431 continue;
1432 }
1433
1434 if (ic->ic_rawbpf != NULL)
1435 bpf_mtap(ic->ic_rawbpf, m0);
1436
1437 if (ural_tx_data(sc, m0, ni) != 0) {
1438 ieee80211_free_node(ni);
1439 ifp->if_oerrors++;
1440 break;
1441 }
1442 }
1443
1444 sc->sc_tx_timer = 5;
1445 ifp->if_timer = 1;
1446 }
1447 }
1448
1449 Static void
1450 ural_watchdog(struct ifnet *ifp)
1451 {
1452 struct ural_softc *sc = ifp->if_softc;
1453 struct ieee80211com *ic = &sc->sc_ic;
1454
1455 ASSERT_SERIALIZED(ifp->if_serializer);
1456
1457 ifp->if_timer = 0;
1458
1459 if (sc->sc_tx_timer > 0) {
1460 if (--sc->sc_tx_timer == 0) {
1461 device_printf(sc->sc_dev, "device timeout\n");
1462 /*ural_init(sc); XXX needs a process context! */
1463 ifp->if_oerrors++;
1464 return;
1465 }
1466 ifp->if_timer = 1;
1467 }
1468
1469 ieee80211_watchdog(ic);
1470 }
1471
1472 /*
1473 * This function allows for fast channel switching in monitor mode (used by
1474 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1475 * generate a new beacon frame.
1476 */
1477 Static int
1478 ural_reset(struct ifnet *ifp)
1479 {
1480 struct ural_softc *sc = ifp->if_softc;
1481 struct ieee80211com *ic = &sc->sc_ic;
1482
1483 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1484 return ENETRESET;
1485
1486 ural_set_chan(sc, ic->ic_curchan);
1487
1488 return 0;
1489 }
1490
1491 Static int
1492 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1493 {
1494 struct ural_softc *sc = ifp->if_softc;
1495 struct ieee80211com *ic = &sc->sc_ic;
1496 int error = 0;
1497
1498 ASSERT_SERIALIZED(ifp->if_serializer);
1499
1500 switch (cmd) {
1501 case SIOCSIFFLAGS:
1502 if (ifp->if_flags & IFF_UP) {
1503 if (ifp->if_flags & IFF_RUNNING)
1504 ural_update_promisc(sc);
1505 else
1506 ural_init(sc);
1507 } else {
1508 if (ifp->if_flags & IFF_RUNNING)
1509 ural_stop(sc);
1510 }
1511 break;
1512
1513 default:
1514 error = ieee80211_ioctl(ic, cmd, data, cr);
1515 }
1516
1517 if (error == ENETRESET) {
1518 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1519 (IFF_UP | IFF_RUNNING) &&
1520 ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
1521 ural_init(sc);
1522 error = 0;
1523 }
1524 return error;
1525 }
1526
1527 Static void
1528 ural_set_testmode(struct ural_softc *sc)
1529 {
1530 usb_device_request_t req;
1531 usbd_status error;
1532
1533 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1534 req.bRequest = RAL_VENDOR_REQUEST;
1535 USETW(req.wValue, 4);
1536 USETW(req.wIndex, 1);
1537 USETW(req.wLength, 0);
1538
1539 error = usbd_do_request(sc->sc_udev, &req, NULL);
1540 if (error != 0) {
1541 kprintf("%s: could not set test mode: %s\n",
1542 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1543 }
1544 }
1545
1546 Static void
1547 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1548 {
1549 usb_device_request_t req;
1550 usbd_status error;
1551
1552 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1553 req.bRequest = RAL_READ_EEPROM;
1554 USETW(req.wValue, 0);
1555 USETW(req.wIndex, addr);
1556 USETW(req.wLength, len);
1557
1558 error = usbd_do_request(sc->sc_udev, &req, buf);
1559 if (error != 0) {
1560 kprintf("%s: could not read EEPROM: %s\n",
1561 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1562 }
1563 }
1564
1565 Static uint16_t
1566 ural_read(struct ural_softc *sc, uint16_t reg)
1567 {
1568 usb_device_request_t req;
1569 usbd_status error;
1570 uint16_t val;
1571
1572 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1573 req.bRequest = RAL_READ_MAC;
1574 USETW(req.wValue, 0);
1575 USETW(req.wIndex, reg);
1576 USETW(req.wLength, sizeof (uint16_t));
1577
1578 error = usbd_do_request(sc->sc_udev, &req, &val);
1579 if (error != 0) {
1580 kprintf("%s: could not read MAC register: %s\n",
1581 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1582 return 0;
1583 }
1584
1585 return le16toh(val);
1586 }
1587
1588 Static void
1589 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1590 {
1591 usb_device_request_t req;
1592 usbd_status error;
1593
1594 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1595 req.bRequest = RAL_READ_MULTI_MAC;
1596 USETW(req.wValue, 0);
1597 USETW(req.wIndex, reg);
1598 USETW(req.wLength, len);
1599
1600 error = usbd_do_request(sc->sc_udev, &req, buf);
1601 if (error != 0) {
1602 kprintf("%s: could not read MAC register: %s\n",
1603 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1604 }
1605 }
1606
1607 Static void
1608 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1609 {
1610 usb_device_request_t req;
1611 usbd_status error;
1612
1613 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1614 req.bRequest = RAL_WRITE_MAC;
1615 USETW(req.wValue, val);
1616 USETW(req.wIndex, reg);
1617 USETW(req.wLength, 0);
1618
1619 error = usbd_do_request(sc->sc_udev, &req, NULL);
1620 if (error != 0) {
1621 kprintf("%s: could not write MAC register: %s\n",
1622 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1623 }
1624 }
1625
1626 Static void
1627 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1628 {
1629 usb_device_request_t req;
1630 usbd_status error;
1631
1632 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1633 req.bRequest = RAL_WRITE_MULTI_MAC;
1634 USETW(req.wValue, 0);
1635 USETW(req.wIndex, reg);
1636 USETW(req.wLength, len);
1637
1638 error = usbd_do_request(sc->sc_udev, &req, buf);
1639 if (error != 0) {
1640 kprintf("%s: could not write MAC register: %s\n",
1641 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1642 }
1643 }
1644
1645 Static void
1646 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1647 {
1648 uint16_t tmp;
1649 int ntries;
1650
1651 for (ntries = 0; ntries < 5; ntries++) {
1652 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1653 break;
1654 }
1655 if (ntries == 5) {
1656 kprintf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1657 return;
1658 }
1659
1660 tmp = reg << 8 | val;
1661 ural_write(sc, RAL_PHY_CSR7, tmp);
1662 }
1663
1664 Static uint8_t
1665 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1666 {
1667 uint16_t val;
1668 int ntries;
1669
1670 val = RAL_BBP_WRITE | reg << 8;
1671 ural_write(sc, RAL_PHY_CSR7, val);
1672
1673 for (ntries = 0; ntries < 5; ntries++) {
1674 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1675 break;
1676 }
1677 if (ntries == 5) {
1678 kprintf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1679 return 0;
1680 }
1681
1682 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1683 }
1684
1685 Static void
1686 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1687 {
1688 uint32_t tmp;
1689 int ntries;
1690
1691 for (ntries = 0; ntries < 5; ntries++) {
1692 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1693 break;
1694 }
1695 if (ntries == 5) {
1696 kprintf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1697 return;
1698 }
1699
1700 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1701 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1702 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1703
1704 /* remember last written value in sc */
1705 sc->rf_regs[reg] = val;
1706
1707 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1708 }
1709
1710 Static void
1711 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1712 {
1713 struct ieee80211com *ic = &sc->sc_ic;
1714 struct ifnet *ifp = &ic->ic_if;
1715 uint8_t power, tmp;
1716 u_int i, chan;
1717
1718 ASSERT_SERIALIZED(ifp->if_serializer);
1719
1720 chan = ieee80211_chan2ieee(ic, c);
1721 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1722 return;
1723
1724 lwkt_serialize_exit(ifp->if_serializer);
1725
1726 if (IEEE80211_IS_CHAN_2GHZ(c))
1727 power = min(sc->txpow[chan - 1], 31);
1728 else
1729 power = 31;
1730
1731 /* adjust txpower using ifconfig settings */
1732 power -= (100 - ic->ic_txpowlimit) / 8;
1733
1734 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1735
1736 switch (sc->rf_rev) {
1737 case RAL_RF_2522:
1738 ural_rf_write(sc, RAL_RF1, 0x00814);
1739 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1740 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1741 break;
1742
1743 case RAL_RF_2523:
1744 ural_rf_write(sc, RAL_RF1, 0x08804);
1745 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1746 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1747 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1748 break;
1749
1750 case RAL_RF_2524:
1751 ural_rf_write(sc, RAL_RF1, 0x0c808);
1752 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1753 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1754 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1755 break;
1756
1757 case RAL_RF_2525:
1758 ural_rf_write(sc, RAL_RF1, 0x08808);
1759 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1760 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1761 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1762
1763 ural_rf_write(sc, RAL_RF1, 0x08808);
1764 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1765 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1766 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1767 break;
1768
1769 case RAL_RF_2525E:
1770 ural_rf_write(sc, RAL_RF1, 0x08808);
1771 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1772 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1773 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1774 break;
1775
1776 case RAL_RF_2526:
1777 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1778 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1779 ural_rf_write(sc, RAL_RF1, 0x08804);
1780
1781 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1782 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1783 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1784 break;
1785
1786 /* dual-band RF */
1787 case RAL_RF_5222:
1788 for (i = 0; ural_rf5222[i].chan != chan; i++)
1789 ; /* EMPTY */
1790
1791 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1792 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1793 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1794 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1795 break;
1796 }
1797
1798 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1799 ic->ic_state != IEEE80211_S_SCAN) {
1800 /* set Japan filter bit for channel 14 */
1801 tmp = ural_bbp_read(sc, 70);
1802
1803 tmp &= ~RAL_JAPAN_FILTER;
1804 if (chan == 14)
1805 tmp |= RAL_JAPAN_FILTER;
1806
1807 ural_bbp_write(sc, 70, tmp);
1808
1809 /* clear CRC errors */
1810 ural_read(sc, RAL_STA_CSR0);
1811
1812 DELAY(10000);
1813 ural_disable_rf_tune(sc);
1814 }
1815
1816 lwkt_serialize_enter(ifp->if_serializer);
1817 }
1818
1819 /*
1820 * Disable RF auto-tuning.
1821 */
1822 Static void
1823 ural_disable_rf_tune(struct ural_softc *sc)
1824 {
1825 uint32_t tmp;
1826
1827 if (sc->rf_rev != RAL_RF_2523) {
1828 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1829 ural_rf_write(sc, RAL_RF1, tmp);
1830 }
1831
1832 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1833 ural_rf_write(sc, RAL_RF3, tmp);
1834
1835 DPRINTFN(2, ("disabling RF autotune\n"));
1836 }
1837
1838 /*
1839 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1840 * synchronization.
1841 */
1842 Static void
1843 ural_enable_tsf_sync(struct ural_softc *sc)
1844 {
1845 struct ieee80211com *ic = &sc->sc_ic;
1846 uint16_t logcwmin, preload, tmp;
1847
1848 /* first, disable TSF synchronization */
1849 ural_write(sc, RAL_TXRX_CSR19, 0);
1850
1851 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1852 ural_write(sc, RAL_TXRX_CSR18, tmp);
1853
1854 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1855 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1856 tmp = logcwmin << 12 | preload;
1857 ural_write(sc, RAL_TXRX_CSR20, tmp);
1858
1859 /* finally, enable TSF synchronization */
1860 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1861 if (ic->ic_opmode == IEEE80211_M_STA)
1862 tmp |= RAL_ENABLE_TSF_SYNC(1);
1863 else
1864 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1865 ural_write(sc, RAL_TXRX_CSR19, tmp);
1866
1867 DPRINTF(("enabling TSF synchronization\n"));
1868 }
1869
1870 Static void
1871 ural_update_slot(struct ifnet *ifp)
1872 {
1873 struct ural_softc *sc = ifp->if_softc;
1874 struct ieee80211com *ic = &sc->sc_ic;
1875 uint16_t slottime, sifs, eifs;
1876
1877 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1878
1879 /*
1880 * These settings may sound a bit inconsistent but this is what the
1881 * reference driver does.
1882 */
1883 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1884 sifs = 16 - RAL_RXTX_TURNAROUND;
1885 eifs = 364;
1886 } else {
1887 sifs = 10 - RAL_RXTX_TURNAROUND;
1888 eifs = 64;
1889 }
1890
1891 ural_write(sc, RAL_MAC_CSR10, slottime);
1892 ural_write(sc, RAL_MAC_CSR11, sifs);
1893 ural_write(sc, RAL_MAC_CSR12, eifs);
1894 }
1895
1896 Static void
1897 ural_set_txpreamble(struct ural_softc *sc)
1898 {
1899 uint16_t tmp;
1900
1901 tmp = ural_read(sc, RAL_TXRX_CSR10);
1902
1903 tmp &= ~RAL_SHORT_PREAMBLE;
1904 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1905 tmp |= RAL_SHORT_PREAMBLE;
1906
1907 ural_write(sc, RAL_TXRX_CSR10, tmp);
1908 }
1909
1910 Static void
1911 ural_set_basicrates(struct ural_softc *sc)
1912 {
1913 struct ieee80211com *ic = &sc->sc_ic;
1914
1915 /* update basic rate set */
1916 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1917 /* 11b basic rates: 1, 2Mbps */
1918 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1919 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1920 /* 11a basic rates: 6, 12, 24Mbps */
1921 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1922 } else {
1923 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1924 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1925 }
1926 }
1927
1928 Static void
1929 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1930 {
1931 uint16_t tmp;
1932
1933 tmp = bssid[0] | bssid[1] << 8;
1934 ural_write(sc, RAL_MAC_CSR5, tmp);
1935
1936 tmp = bssid[2] | bssid[3] << 8;
1937 ural_write(sc, RAL_MAC_CSR6, tmp);
1938
1939 tmp = bssid[4] | bssid[5] << 8;
1940 ural_write(sc, RAL_MAC_CSR7, tmp);
1941
1942 DPRINTF(("setting BSSID to %6D\n", bssid, ":"));
1943 }
1944
1945 Static void
1946 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1947 {
1948 uint16_t tmp;
1949
1950 tmp = addr[0] | addr[1] << 8;
1951 ural_write(sc, RAL_MAC_CSR2, tmp);
1952
1953 tmp = addr[2] | addr[3] << 8;
1954 ural_write(sc, RAL_MAC_CSR3, tmp);
1955
1956 tmp = addr[4] | addr[5] << 8;
1957 ural_write(sc, RAL_MAC_CSR4, tmp);
1958
1959 DPRINTF(("setting MAC address to %6D\n", addr, ":"));
1960 }
1961
1962 Static void
1963 ural_update_promisc(struct ural_softc *sc)
1964 {
1965 struct ifnet *ifp = &sc->sc_ic.ic_if;
1966 uint32_t tmp;
1967
1968 tmp = ural_read(sc, RAL_TXRX_CSR2);
1969
1970 tmp &= ~RAL_DROP_NOT_TO_ME;
1971 if (!(ifp->if_flags & IFF_PROMISC))
1972 tmp |= RAL_DROP_NOT_TO_ME;
1973
1974 ural_write(sc, RAL_TXRX_CSR2, tmp);
1975
1976 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1977 "entering" : "leaving"));
1978 }
1979
1980 Static const char *
1981 ural_get_rf(int rev)
1982 {
1983 switch (rev) {
1984 case RAL_RF_2522: return "RT2522";
1985 case RAL_RF_2523: return "RT2523";
1986 case RAL_RF_2524: return "RT2524";
1987 case RAL_RF_2525: return "RT2525";
1988 case RAL_RF_2525E: return "RT2525e";
1989 case RAL_RF_2526: return "RT2526";
1990 case RAL_RF_5222: return "RT5222";
1991 default: return "unknown";
1992 }
1993 }
1994
1995 Static void
1996 ural_read_eeprom(struct ural_softc *sc)
1997 {
1998 struct ieee80211com *ic = &sc->sc_ic;
1999 uint16_t val;
2000
2001 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
2002 val = le16toh(val);
2003 sc->rf_rev = (val >> 11) & 0x7;
2004 sc->hw_radio = (val >> 10) & 0x1;
2005 sc->led_mode = (val >> 6) & 0x7;
2006 sc->rx_ant = (val >> 4) & 0x3;
2007 sc->tx_ant = (val >> 2) & 0x3;
2008 sc->nb_ant = val & 0x3;
2009
2010 /* read MAC address */
2011 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
2012
2013 /* read default values for BBP registers */
2014 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
2015
2016 /* read Tx power for all b/g channels */
2017 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
2018 }
2019
2020 Static int
2021 ural_bbp_init(struct ural_softc *sc)
2022 {
2023 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2024 int i, ntries;
2025
2026 /* wait for BBP to be ready */
2027 for (ntries = 0; ntries < 100; ntries++) {
2028 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2029 break;
2030 DELAY(1000);
2031 }
2032 if (ntries == 100) {
2033 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2034 return EIO;
2035 }
2036
2037 /* initialize BBP registers to default values */
2038 for (i = 0; i < N(ural_def_bbp); i++)
2039 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2040
2041 #if 0
2042 /* initialize BBP registers to values stored in EEPROM */
2043 for (i = 0; i < 16; i++) {
2044 if (sc->bbp_prom[i].reg == 0xff)
2045 continue;
2046 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2047 }
2048 #endif
2049
2050 return 0;
2051 #undef N
2052 }
2053
2054 Static void
2055 ural_set_txantenna(struct ural_softc *sc, int antenna)
2056 {
2057 uint16_t tmp;
2058 uint8_t tx;
2059
2060 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2061 if (antenna == 1)
2062 tx |= RAL_BBP_ANTA;
2063 else if (antenna == 2)
2064 tx |= RAL_BBP_ANTB;
2065 else
2066 tx |= RAL_BBP_DIVERSITY;
2067
2068 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2069 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2070 sc->rf_rev == RAL_RF_5222)
2071 tx |= RAL_BBP_FLIPIQ;
2072
2073 ural_bbp_write(sc, RAL_BBP_TX, tx);
2074
2075 /* update values in PHY_CSR5 and PHY_CSR6 */
2076 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2077 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2078
2079 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2080 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2081 }
2082
2083 Static void
2084 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2085 {
2086 uint8_t rx;
2087
2088 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2089 if (antenna == 1)
2090 rx |= RAL_BBP_ANTA;
2091 else if (antenna == 2)
2092 rx |= RAL_BBP_ANTB;
2093 else
2094 rx |= RAL_BBP_DIVERSITY;
2095
2096 /* need to force no I/Q flip for RF 2525e and 2526 */
2097 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2098 rx &= ~RAL_BBP_FLIPIQ;
2099
2100 ural_bbp_write(sc, RAL_BBP_RX, rx);
2101 }
2102
2103 Static void
2104 ural_init(void *priv)
2105 {
2106 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2107 struct ural_softc *sc = priv;
2108 struct ieee80211com *ic = &sc->sc_ic;
2109 struct ifnet *ifp = &ic->ic_if;
2110 struct ieee80211_key *wk;
2111 struct ural_rx_data *data;
2112 uint16_t tmp;
2113 usbd_status error;
2114 int i, ntries;
2115
2116 ASSERT_SERIALIZED(ifp->if_serializer);
2117
2118 ural_set_testmode(sc);
2119 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2120
2121 ural_stop(sc);
2122
2123 /* initialize MAC registers to default values */
2124 for (i = 0; i < N(ural_def_mac); i++)
2125 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2126
2127 /* wait for BBP and RF to wake up (this can take a long time!) */
2128 for (ntries = 0; ntries < 100; ntries++) {
2129 tmp = ural_read(sc, RAL_MAC_CSR17);
2130 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2131 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2132 break;
2133 DELAY(1000);
2134 }
2135 if (ntries == 100) {
2136 kprintf("%s: timeout waiting for BBP/RF to wakeup\n",
2137 USBDEVNAME(sc->sc_dev));
2138 goto fail;
2139 }
2140
2141 /* we're ready! */
2142 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2143
2144 /* set basic rate set (will be updated later) */
2145 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2146
2147 if (ural_bbp_init(sc) != 0)
2148 goto fail;
2149
2150 /* set default BSS channel */
2151 ural_set_chan(sc, ic->ic_curchan);
2152
2153 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2154 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2155
2156 ural_set_txantenna(sc, sc->tx_ant);
2157 ural_set_rxantenna(sc, sc->rx_ant);
2158
2159 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2160 ural_set_macaddr(sc, ic->ic_myaddr);
2161
2162 /*
2163 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2164 */
2165 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2166 wk = &ic->ic_crypto.cs_nw_keys[i];
2167 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2168 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2169 }
2170
2171 /*
2172 * Allocate xfer for AMRR statistics requests.
2173 */
2174 sc->stats_xfer = usbd_alloc_xfer(sc->sc_udev);
2175 if (sc->stats_xfer == NULL) {
2176 kprintf("%s: could not allocate AMRR xfer\n",
2177 USBDEVNAME(sc->sc_dev));
2178 goto fail;
2179 }
2180
2181 /*
2182 * Open Tx and Rx USB bulk pipes.
2183 */
2184 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2185 &sc->sc_tx_pipeh);
2186 if (error != 0) {
2187 kprintf("%s: could not open Tx pipe: %s\n",
2188 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2189 goto fail;
2190 }
2191
2192 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2193 &sc->sc_rx_pipeh);
2194 if (error != 0) {
2195 kprintf("%s: could not open Rx pipe: %s\n",
2196 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2197 goto fail;
2198 }
2199
2200 /*
2201 * Allocate Tx and Rx xfer queues.
2202 */
2203 error = ural_alloc_tx_list(sc);
2204 if (error != 0) {
2205 kprintf("%s: could not allocate Tx list\n",
2206 USBDEVNAME(sc->sc_dev));
2207 goto fail;
2208 }
2209
2210 error = ural_alloc_rx_list(sc);
2211 if (error != 0) {
2212 kprintf("%s: could not allocate Rx list\n",
2213 USBDEVNAME(sc->sc_dev));
2214 goto fail;
2215 }
2216
2217 /*
2218 * Start up the receive pipe.
2219 */
2220 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2221 data = &sc->rx_data[i];
2222
2223 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2224 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2225 usbd_transfer(data->xfer);
2226 }
2227
2228 /* kick Rx */
2229 tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2230 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2231 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2232 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2233 tmp |= RAL_DROP_TODS;
2234 if (!(ifp->if_flags & IFF_PROMISC))
2235 tmp |= RAL_DROP_NOT_TO_ME;
2236 }
2237 ural_write(sc, RAL_TXRX_CSR2, tmp);
2238
2239 ifp->if_flags &= ~IFF_OACTIVE;
2240 ifp->if_flags |= IFF_RUNNING;
2241
2242 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2243 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2244
2245 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2246 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2247 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2248 } else
2249 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2250
2251 return;
2252
2253 fail: ural_stop(sc);
2254 #undef N
2255 }
2256
2257 Static void
2258 ural_stop(struct ural_softc *sc)
2259 {
2260 struct ieee80211com *ic = &sc->sc_ic;
2261 struct ifnet *ifp = &ic->ic_if;
2262
2263 ASSERT_SERIALIZED(ifp->if_serializer);
2264
2265 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2266
2267 sc->sc_tx_timer = 0;
2268 ifp->if_timer = 0;
2269 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2270
2271 /* disable Rx */
2272 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2273
2274 /* reset ASIC and BBP (but won't reset MAC registers!) */
2275 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2276 ural_write(sc, RAL_MAC_CSR1, 0);
2277
2278 if (sc->stats_xfer != NULL) {
2279 usbd_free_xfer(sc->stats_xfer);
2280 sc->stats_xfer = NULL;
2281 }
2282
2283 if (sc->sc_rx_pipeh != NULL) {
2284 usbd_abort_pipe(sc->sc_rx_pipeh);
2285 usbd_close_pipe(sc->sc_rx_pipeh);
2286 sc->sc_rx_pipeh = NULL;
2287 }
2288
2289 if (sc->sc_tx_pipeh != NULL) {
2290 usbd_abort_pipe(sc->sc_tx_pipeh);
2291 usbd_close_pipe(sc->sc_tx_pipeh);
2292 sc->sc_tx_pipeh = NULL;
2293 }
2294
2295 ural_free_rx_list(sc);
2296 ural_free_tx_list(sc);
2297 }
2298
2299 Static void
2300 ural_stats_timeout(void *arg)
2301 {
2302 struct ural_softc *sc = (struct ural_softc *)arg;
2303 struct ifnet *ifp = &sc->sc_ic.ic_if;
2304 usb_device_request_t req;
2305
2306 lwkt_serialize_enter(ifp->if_serializer);
2307
2308 /*
2309 * Asynchronously read statistic registers (cleared by read).
2310 */
2311 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2312 req.bRequest = RAL_READ_MULTI_MAC;
2313 USETW(req.wValue, 0);
2314 USETW(req.wIndex, RAL_STA_CSR0);
2315 USETW(req.wLength, sizeof(sc->sta));
2316
2317 usbd_setup_default_xfer(sc->stats_xfer, sc->sc_udev, sc,
2318 USBD_DEFAULT_TIMEOUT, &req,
2319 sc->sta, sizeof(sc->sta), 0,
2320 ural_stats_update);
2321 usbd_transfer(sc->stats_xfer);
2322
2323 lwkt_serialize_exit(ifp->if_serializer);
2324 }
2325
2326 Static void
2327 ural_stats_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2328 usbd_status status)
2329 {
2330 struct ural_softc *sc = (struct ural_softc *)priv;
2331 struct ifnet *ifp = &sc->sc_ic.ic_if;
2332 struct ieee80211_ratectl_stats *stats = &sc->sc_stats;
2333
2334 if (status != USBD_NORMAL_COMPLETION) {
2335 device_printf(sc->sc_dev, "could not retrieve Tx statistics - "
2336 "cancelling automatic rate control\n");
2337 return;
2338 }
2339
2340 lwkt_serialize_enter(ifp->if_serializer);
2341
2342 /* count TX retry-fail as Tx errors */
2343 ifp->if_oerrors += sc->sta[RAL_TX_PKT_FAIL];
2344
2345 stats->stats_pkt_ok += sc->sta[RAL_TX_PKT_NO_RETRY] +
2346 sc->sta[RAL_TX_PKT_ONE_RETRY] +
2347 sc->sta[RAL_TX_PKT_MULTI_RETRY];
2348
2349 stats->stats_pkt_err += sc->sta[RAL_TX_PKT_FAIL];
2350
2351 stats->stats_pkt_noretry += sc->sta[RAL_TX_PKT_NO_RETRY];
2352
2353 stats->stats_short_retries += sc->sta[RAL_TX_PKT_ONE_RETRY];
2354 #if 1
2355 /*
2356 * XXX Estimated average:
2357 * Actual number of retries for each packet should belong to
2358 * [2, sc->sc_tx_retries]
2359 */
2360 stats->stats_short_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY] *
2361 ((2 + sc->sc_tx_retries) / 2);
2362 #else
2363 stats->stats_short_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY];
2364 #endif
2365 stats->stats_short_retries +=
2366 sc->sta[RAL_TX_PKT_FAIL] * sc->sc_tx_retries;
2367
2368 callout_reset(&sc->stats_ch, 4 * hz / 5, ural_stats_timeout, sc);
2369
2370 lwkt_serialize_exit(ifp->if_serializer);
2371 }
2372
2373 Static void
2374 ural_stats(struct ieee80211com *ic, struct ieee80211_node *ni __unused,
2375 struct ieee80211_ratectl_stats *stats)
2376 {
2377 struct ifnet *ifp = &ic->ic_if;
2378 struct ural_softc *sc = ifp->if_softc;
2379
2380 ASSERT_SERIALIZED(ifp->if_serializer);
2381
2382 bcopy(&sc->sc_stats, stats, sizeof(*stats));
2383 bzero(&sc->sc_stats, sizeof(sc->sc_stats));
2384 }
2385
2386 Static void
2387 ural_ratectl_change(struct ieee80211com *ic, u_int orc __unused, u_int nrc)
2388 {
2389 struct ieee80211_ratectl_state *st = &ic->ic_ratectl;
2390 struct ieee80211_onoe_param *oparam;
2391
2392 if (st->rc_st_param != NULL) {
2393 kfree(st->rc_st_param, M_DEVBUF);
2394 st->rc_st_param = NULL;
2395 }
2396
2397 switch (nrc) {
2398 case IEEE80211_RATECTL_ONOE:
2399 oparam = kmalloc(sizeof(*oparam), M_DEVBUF, M_INTWAIT);
2400
2401 IEEE80211_ONOE_PARAM_SETUP(oparam);
2402 oparam->onoe_raise = 20;
2403
2404 st->rc_st_param = oparam;
2405 break;
2406 case IEEE80211_RATECTL_NONE:
2407 /* This could only happen during detaching */
2408 break;
2409 default:
2410 panic("unknown rate control algo %u\n", nrc);
2411 }
2412 }
2413
2414 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, usbd_driver_load, 0);
DragonFly BSD