1 /******************************************************************************
3 Copyright (c) 2001-2012, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_vf.c,v 1.3 2012/07/05 20:51:44 jfv Exp $*/
36 #include "ixgbe_api.h"
37 #include "ixgbe_type.h"
40 #ifndef IXGBE_VFWRITE_REG
41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
43 #ifndef IXGBE_VFREAD_REG
44 #define IXGBE_VFREAD_REG IXGBE_READ_REG
48 * ixgbe_init_ops_vf - Initialize the pointers for vf
49 * @hw: pointer to hardware structure
51 * This will assign function pointers, adapter-specific functions can
52 * override the assignment of generic function pointers by assigning
53 * their own adapter-specific function pointers.
54 * Does not touch the hardware.
56 s32
ixgbe_init_ops_vf(struct ixgbe_hw
*hw
)
59 hw
->mac
.ops
.init_hw
= ixgbe_init_hw_vf
;
60 hw
->mac
.ops
.reset_hw
= ixgbe_reset_hw_vf
;
61 hw
->mac
.ops
.start_hw
= ixgbe_start_hw_vf
;
62 /* Cannot clear stats on VF */
63 hw
->mac
.ops
.clear_hw_cntrs
= NULL
;
64 hw
->mac
.ops
.get_media_type
= NULL
;
65 hw
->mac
.ops
.get_mac_addr
= ixgbe_get_mac_addr_vf
;
66 hw
->mac
.ops
.stop_adapter
= ixgbe_stop_adapter_vf
;
67 hw
->mac
.ops
.get_bus_info
= NULL
;
70 hw
->mac
.ops
.setup_link
= ixgbe_setup_mac_link_vf
;
71 hw
->mac
.ops
.check_link
= ixgbe_check_mac_link_vf
;
72 hw
->mac
.ops
.get_link_capabilities
= NULL
;
74 /* RAR, Multicast, VLAN */
75 hw
->mac
.ops
.set_rar
= ixgbe_set_rar_vf
;
76 hw
->mac
.ops
.set_uc_addr
= ixgbevf_set_uc_addr_vf
;
77 hw
->mac
.ops
.init_rx_addrs
= NULL
;
78 hw
->mac
.ops
.update_mc_addr_list
= ixgbe_update_mc_addr_list_vf
;
79 hw
->mac
.ops
.enable_mc
= NULL
;
80 hw
->mac
.ops
.disable_mc
= NULL
;
81 hw
->mac
.ops
.clear_vfta
= NULL
;
82 hw
->mac
.ops
.set_vfta
= ixgbe_set_vfta_vf
;
84 hw
->mac
.max_tx_queues
= 1;
85 hw
->mac
.max_rx_queues
= 1;
87 hw
->mbx
.ops
.init_params
= ixgbe_init_mbx_params_vf
;
93 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
94 * @hw: pointer to hardware structure
96 * Starts the hardware by filling the bus info structure and media type, clears
97 * all on chip counters, initializes receive address registers, multicast
98 * table, VLAN filter table, calls routine to set up link and flow control
99 * settings, and leaves transmit and receive units disabled and uninitialized
101 s32
ixgbe_start_hw_vf(struct ixgbe_hw
*hw
)
103 /* Clear adapter stopped flag */
104 hw
->adapter_stopped
= FALSE
;
106 return IXGBE_SUCCESS
;
110 * ixgbe_init_hw_vf - virtual function hardware initialization
111 * @hw: pointer to hardware structure
113 * Initialize the hardware by resetting the hardware and then starting
116 s32
ixgbe_init_hw_vf(struct ixgbe_hw
*hw
)
118 s32 status
= hw
->mac
.ops
.start_hw(hw
);
120 hw
->mac
.ops
.get_mac_addr(hw
, hw
->mac
.addr
);
126 * ixgbe_reset_hw_vf - Performs hardware reset
127 * @hw: pointer to hardware structure
129 * Resets the hardware by reseting the transmit and receive units, masks and
130 * clears all interrupts.
132 s32
ixgbe_reset_hw_vf(struct ixgbe_hw
*hw
)
134 struct ixgbe_mbx_info
*mbx
= &hw
->mbx
;
135 u32 timeout
= IXGBE_VF_INIT_TIMEOUT
;
136 s32 ret_val
= IXGBE_ERR_INVALID_MAC_ADDR
;
137 u32 ctrl
, msgbuf
[IXGBE_VF_PERMADDR_MSG_LEN
];
138 u8
*addr
= (u8
*)(&msgbuf
[1]);
140 DEBUGFUNC("ixgbevf_reset_hw_vf");
142 /* Call adapter stop to disable tx/rx and clear interrupts */
143 hw
->mac
.ops
.stop_adapter(hw
);
145 DEBUGOUT("Issuing a function level reset to MAC\n");
147 ctrl
= IXGBE_VFREAD_REG(hw
, IXGBE_VFCTRL
) | IXGBE_CTRL_RST
;
148 IXGBE_VFWRITE_REG(hw
, IXGBE_VFCTRL
, ctrl
);
149 IXGBE_WRITE_FLUSH(hw
);
153 /* we cannot reset while the RSTI / RSTD bits are asserted */
154 while (!mbx
->ops
.check_for_rst(hw
, 0) && timeout
) {
160 /* mailbox timeout can now become active */
161 mbx
->timeout
= IXGBE_VF_MBX_INIT_TIMEOUT
;
163 msgbuf
[0] = IXGBE_VF_RESET
;
164 mbx
->ops
.write_posted(hw
, msgbuf
, 1, 0);
169 * set our "perm_addr" based on info provided by PF
170 * also set up the mc_filter_type which is piggy backed
171 * on the mac address in word 3
173 ret_val
= mbx
->ops
.read_posted(hw
, msgbuf
,
174 IXGBE_VF_PERMADDR_MSG_LEN
, 0);
176 if (msgbuf
[0] == (IXGBE_VF_RESET
|
177 IXGBE_VT_MSGTYPE_ACK
)) {
178 memcpy(hw
->mac
.perm_addr
, addr
,
179 IXGBE_ETH_LENGTH_OF_ADDRESS
);
180 hw
->mac
.mc_filter_type
=
181 msgbuf
[IXGBE_VF_MC_TYPE_WORD
];
183 ret_val
= IXGBE_ERR_INVALID_MAC_ADDR
;
192 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
193 * @hw: pointer to hardware structure
195 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
196 * disables transmit and receive units. The adapter_stopped flag is used by
197 * the shared code and drivers to determine if the adapter is in a stopped
198 * state and should not touch the hardware.
200 s32
ixgbe_stop_adapter_vf(struct ixgbe_hw
*hw
)
206 * Set the adapter_stopped flag so other driver functions stop touching
209 hw
->adapter_stopped
= TRUE
;
211 /* Clear interrupt mask to stop from interrupts being generated */
212 IXGBE_VFWRITE_REG(hw
, IXGBE_VTEIMC
, IXGBE_VF_IRQ_CLEAR_MASK
);
214 /* Clear any pending interrupts, flush previous writes */
215 IXGBE_VFREAD_REG(hw
, IXGBE_VTEICR
);
217 /* Disable the transmit unit. Each queue must be disabled. */
218 for (i
= 0; i
< hw
->mac
.max_tx_queues
; i
++)
219 IXGBE_VFWRITE_REG(hw
, IXGBE_VFTXDCTL(i
), IXGBE_TXDCTL_SWFLSH
);
221 /* Disable the receive unit by stopping each queue */
222 for (i
= 0; i
< hw
->mac
.max_rx_queues
; i
++) {
223 reg_val
= IXGBE_VFREAD_REG(hw
, IXGBE_VFRXDCTL(i
));
224 reg_val
&= ~IXGBE_RXDCTL_ENABLE
;
225 IXGBE_VFWRITE_REG(hw
, IXGBE_VFRXDCTL(i
), reg_val
);
228 /* flush all queues disables */
229 IXGBE_WRITE_FLUSH(hw
);
232 return IXGBE_SUCCESS
;
236 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
237 * @hw: pointer to hardware structure
238 * @mc_addr: the multicast address
240 * Extracts the 12 bits, from a multicast address, to determine which
241 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
242 * incoming rx multicast addresses, to determine the bit-vector to check in
243 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
244 * by the MO field of the MCSTCTRL. The MO field is set during initialization
247 static s32
ixgbe_mta_vector(struct ixgbe_hw
*hw
, u8
*mc_addr
)
251 switch (hw
->mac
.mc_filter_type
) {
252 case 0: /* use bits [47:36] of the address */
253 vector
= ((mc_addr
[4] >> 4) | (((u16
)mc_addr
[5]) << 4));
255 case 1: /* use bits [46:35] of the address */
256 vector
= ((mc_addr
[4] >> 3) | (((u16
)mc_addr
[5]) << 5));
258 case 2: /* use bits [45:34] of the address */
259 vector
= ((mc_addr
[4] >> 2) | (((u16
)mc_addr
[5]) << 6));
261 case 3: /* use bits [43:32] of the address */
262 vector
= ((mc_addr
[4]) | (((u16
)mc_addr
[5]) << 8));
264 default: /* Invalid mc_filter_type */
265 DEBUGOUT("MC filter type param set incorrectly\n");
270 /* vector can only be 12-bits or boundary will be exceeded */
276 * ixgbe_set_rar_vf - set device MAC address
277 * @hw: pointer to hardware structure
278 * @index: Receive address register to write
279 * @addr: Address to put into receive address register
280 * @vmdq: VMDq "set" or "pool" index
281 * @enable_addr: set flag that address is active
283 s32
ixgbe_set_rar_vf(struct ixgbe_hw
*hw
, u32 index
, u8
*addr
, u32 vmdq
,
286 struct ixgbe_mbx_info
*mbx
= &hw
->mbx
;
288 u8
*msg_addr
= (u8
*)(&msgbuf
[1]);
290 UNREFERENCED_3PARAMETER(vmdq
, enable_addr
, index
);
292 memset(msgbuf
, 0, 12);
293 msgbuf
[0] = IXGBE_VF_SET_MAC_ADDR
;
294 memcpy(msg_addr
, addr
, 6);
295 ret_val
= mbx
->ops
.write_posted(hw
, msgbuf
, 3, 0);
298 ret_val
= mbx
->ops
.read_posted(hw
, msgbuf
, 3, 0);
300 msgbuf
[0] &= ~IXGBE_VT_MSGTYPE_CTS
;
302 /* if nacked the address was rejected, use "perm_addr" */
304 (msgbuf
[0] == (IXGBE_VF_SET_MAC_ADDR
| IXGBE_VT_MSGTYPE_NACK
)))
305 ixgbe_get_mac_addr_vf(hw
, hw
->mac
.addr
);
311 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
312 * @hw: pointer to the HW structure
313 * @mc_addr_list: array of multicast addresses to program
314 * @mc_addr_count: number of multicast addresses to program
315 * @next: caller supplied function to return next address in list
317 * Updates the Multicast Table Array.
319 s32
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw
*hw
, u8
*mc_addr_list
,
320 u32 mc_addr_count
, ixgbe_mc_addr_itr next
,
323 struct ixgbe_mbx_info
*mbx
= &hw
->mbx
;
324 u32 msgbuf
[IXGBE_VFMAILBOX_SIZE
];
325 u16
*vector_list
= (u16
*)&msgbuf
[1];
330 UNREFERENCED_1PARAMETER(clear
);
332 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
334 /* Each entry in the list uses 1 16 bit word. We have 30
335 * 16 bit words available in our HW msg buffer (minus 1 for the
336 * msg type). That's 30 hash values if we pack 'em right. If
337 * there are more than 30 MC addresses to add then punt the
338 * extras for now and then add code to handle more than 30 later.
339 * It would be unusual for a server to request that many multi-cast
340 * addresses except for in large enterprise network environments.
343 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count
);
345 cnt
= (mc_addr_count
> 30) ? 30 : mc_addr_count
;
346 msgbuf
[0] = IXGBE_VF_SET_MULTICAST
;
347 msgbuf
[0] |= cnt
<< IXGBE_VT_MSGINFO_SHIFT
;
349 for (i
= 0; i
< cnt
; i
++) {
350 vector
= ixgbe_mta_vector(hw
, next(hw
, &mc_addr_list
, &vmdq
));
351 DEBUGOUT1("Hash value = 0x%03X\n", vector
);
352 vector_list
[i
] = (u16
)vector
;
355 return mbx
->ops
.write_posted(hw
, msgbuf
, IXGBE_VFMAILBOX_SIZE
, 0);
359 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
360 * @hw: pointer to the HW structure
361 * @vlan: 12 bit VLAN ID
362 * @vind: unused by VF drivers
363 * @vlan_on: if TRUE then set bit, else clear bit
365 s32
ixgbe_set_vfta_vf(struct ixgbe_hw
*hw
, u32 vlan
, u32 vind
, bool vlan_on
)
367 struct ixgbe_mbx_info
*mbx
= &hw
->mbx
;
370 UNREFERENCED_1PARAMETER(vind
);
372 msgbuf
[0] = IXGBE_VF_SET_VLAN
;
374 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
375 msgbuf
[0] |= vlan_on
<< IXGBE_VT_MSGINFO_SHIFT
;
377 ret_val
= mbx
->ops
.write_posted(hw
, msgbuf
, 2, 0);
379 ret_val
= mbx
->ops
.read_posted(hw
, msgbuf
, 1, 0);
381 if (!ret_val
&& (msgbuf
[0] & IXGBE_VT_MSGTYPE_ACK
))
382 return IXGBE_SUCCESS
;
384 return ret_val
| (msgbuf
[0] & IXGBE_VT_MSGTYPE_NACK
);
388 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
389 * @hw: pointer to hardware structure
391 * Returns the number of transmit queues for the given adapter.
393 u32
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw
*hw
)
395 UNREFERENCED_1PARAMETER(hw
);
396 return IXGBE_VF_MAX_TX_QUEUES
;
400 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
401 * @hw: pointer to hardware structure
403 * Returns the number of receive queues for the given adapter.
405 u32
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw
*hw
)
407 UNREFERENCED_1PARAMETER(hw
);
408 return IXGBE_VF_MAX_RX_QUEUES
;
412 * ixgbe_get_mac_addr_vf - Read device MAC address
413 * @hw: pointer to the HW structure
415 s32
ixgbe_get_mac_addr_vf(struct ixgbe_hw
*hw
, u8
*mac_addr
)
419 for (i
= 0; i
< IXGBE_ETH_LENGTH_OF_ADDRESS
; i
++)
420 mac_addr
[i
] = hw
->mac
.perm_addr
[i
];
422 return IXGBE_SUCCESS
;
425 s32
ixgbevf_set_uc_addr_vf(struct ixgbe_hw
*hw
, u32 index
, u8
*addr
)
427 struct ixgbe_mbx_info
*mbx
= &hw
->mbx
;
429 u8
*msg_addr
= (u8
*)(&msgbuf
[1]);
432 memset(msgbuf
, 0, sizeof(msgbuf
));
434 * If index is one then this is the start of a new list and needs
435 * indication to the PF so it can do it's own list management.
436 * If it is zero then that tells the PF to just clear all of
437 * this VF's macvlans and there is no new list.
439 msgbuf
[0] |= index
<< IXGBE_VT_MSGINFO_SHIFT
;
440 msgbuf
[0] |= IXGBE_VF_SET_MACVLAN
;
442 memcpy(msg_addr
, addr
, 6);
443 ret_val
= mbx
->ops
.write_posted(hw
, msgbuf
, 3, 0);
446 ret_val
= mbx
->ops
.read_posted(hw
, msgbuf
, 3, 0);
448 msgbuf
[0] &= ~IXGBE_VT_MSGTYPE_CTS
;
451 if (msgbuf
[0] == (IXGBE_VF_SET_MACVLAN
| IXGBE_VT_MSGTYPE_NACK
))
452 ret_val
= IXGBE_ERR_OUT_OF_MEM
;
458 * ixgbe_setup_mac_link_vf - Setup MAC link settings
459 * @hw: pointer to hardware structure
460 * @speed: new link speed
461 * @autoneg: TRUE if autonegotiation enabled
462 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
464 * Set the link speed in the AUTOC register and restarts link.
466 s32
ixgbe_setup_mac_link_vf(struct ixgbe_hw
*hw
,
467 ixgbe_link_speed speed
, bool autoneg
,
468 bool autoneg_wait_to_complete
)
470 UNREFERENCED_4PARAMETER(hw
, speed
, autoneg
, autoneg_wait_to_complete
);
471 return IXGBE_SUCCESS
;
475 * ixgbe_check_mac_link_vf - Get link/speed status
476 * @hw: pointer to hardware structure
477 * @speed: pointer to link speed
478 * @link_up: TRUE is link is up, FALSE otherwise
479 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
481 * Reads the links register to determine if link is up and the current speed
483 s32
ixgbe_check_mac_link_vf(struct ixgbe_hw
*hw
, ixgbe_link_speed
*speed
,
484 bool *link_up
, bool autoneg_wait_to_complete
)
487 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete
);
489 if (!(hw
->mbx
.ops
.check_for_rst(hw
, 0))) {
495 links_reg
= IXGBE_VFREAD_REG(hw
, IXGBE_VFLINKS
);
497 if (links_reg
& IXGBE_LINKS_UP
)
502 switch (links_reg
& IXGBE_LINKS_SPEED_10G_82599
) {
503 case IXGBE_LINKS_SPEED_10G_82599
:
504 *speed
= IXGBE_LINK_SPEED_10GB_FULL
;
506 case IXGBE_LINKS_SPEED_1G_82599
:
507 *speed
= IXGBE_LINK_SPEED_1GB_FULL
;
509 case IXGBE_LINKS_SPEED_100_82599
:
510 *speed
= IXGBE_LINK_SPEED_100_FULL
;
514 return IXGBE_SUCCESS
;