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- Setup BBP according to the values stored in BBP
[dragonfly.git] / sys / dev / netif / ral / rt2560.c
blob548cc3248522fbf234a3164350fb99c8b07ccfcc
1 /*
2 * Copyright (c) 2005, 2006
3 * Damien Bergamini <damien.bergamini@free.fr>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: src/sys/dev/ral/rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2560.c,v 1.24 2008/01/19 13:36:31 sephe Exp $
19 */
20
21 /*
22 * Ralink Technology RT2560 chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/param.h>
27 #include <sys/bus.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/mbuf.h>
32 #include <sys/module.h>
33 #include <sys/rman.h>
34 #include <sys/socket.h>
35 #include <sys/sockio.h>
36 #include <sys/sysctl.h>
37 #include <sys/serialize.h>
38
39 #include <net/bpf.h>
40 #include <net/if.h>
41 #include <net/if_arp.h>
42 #include <net/ethernet.h>
43 #include <net/if_dl.h>
44 #include <net/if_media.h>
45 #include <net/ifq_var.h>
46
47 #include <netproto/802_11/ieee80211_var.h>
48 #include <netproto/802_11/ieee80211_radiotap.h>
49 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
50 #include <netproto/802_11/wlan_ratectl/sample/ieee80211_sample_param.h>
51
52 #include <dev/netif/ral/rt2560reg.h>
53 #include <dev/netif/ral/rt2560var.h>
54
55 #define RT2560_RSSI(sc, rssi) \
56 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \
57 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0)
58
59 #ifdef RAL_DEBUG
60 #define DPRINTF(x) do { if (ral_debug > 0) kprintf x; } while (0)
61 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) kprintf x; } while (0)
62 extern int ral_debug;
63 #else
64 #define DPRINTF(x)
65 #define DPRINTFN(n, x)
66 #endif
67
68 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int,
69 int);
70 static void rt2560_dma_map_mbuf(void *, bus_dma_segment_t *, int,
71 bus_size_t, int);
72 static int rt2560_alloc_tx_ring(struct rt2560_softc *,
73 struct rt2560_tx_ring *, int);
74 static void rt2560_reset_tx_ring(struct rt2560_softc *,
75 struct rt2560_tx_ring *);
76 static void rt2560_free_tx_ring(struct rt2560_softc *,
77 struct rt2560_tx_ring *);
78 static int rt2560_alloc_rx_ring(struct rt2560_softc *,
79 struct rt2560_rx_ring *, int);
80 static void rt2560_reset_rx_ring(struct rt2560_softc *,
81 struct rt2560_rx_ring *);
82 static void rt2560_free_rx_ring(struct rt2560_softc *,
83 struct rt2560_rx_ring *);
84 static int rt2560_media_change(struct ifnet *);
85 static void rt2560_next_scan(void *);
86 static int rt2560_newstate(struct ieee80211com *,
87 enum ieee80211_state, int);
88 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
89 static void rt2560_encryption_intr(struct rt2560_softc *);
90 static void rt2560_tx_intr(struct rt2560_softc *);
91 static void rt2560_prio_intr(struct rt2560_softc *);
92 static void rt2560_decryption_intr(struct rt2560_softc *);
93 static void rt2560_rx_intr(struct rt2560_softc *);
94 static void rt2560_beacon_expire(struct rt2560_softc *);
95 static void rt2560_wakeup_expire(struct rt2560_softc *);
96 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *);
97 static uint8_t rt2560_plcp_signal(int);
98 static void rt2560_setup_tx_desc(struct rt2560_softc *,
99 struct rt2560_tx_desc *, uint32_t, int, int, int,
100 bus_addr_t);
101 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
102 struct ieee80211_node *);
103 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
104 struct ieee80211_node *);
105 static struct mbuf *rt2560_get_rts(struct rt2560_softc *,
106 struct ieee80211_frame *, uint16_t);
107 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
108 struct ieee80211_node *);
109 static void rt2560_start(struct ifnet *);
110 static void rt2560_watchdog(struct ifnet *);
111 static int rt2560_reset(struct ifnet *);
112 static int rt2560_ioctl(struct ifnet *, u_long, caddr_t,
113 struct ucred *);
114 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t,
115 uint8_t);
116 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
117 static void rt2560_rf_write(struct rt2560_softc *, uint8_t,
118 uint32_t);
119 static void rt2560_set_chan(struct rt2560_softc *,
120 struct ieee80211_channel *);
121 static void rt2560_enable_tsf_sync(struct rt2560_softc *);
122 static void rt2560_update_plcp(struct rt2560_softc *);
123 static void rt2560_update_slot(struct ifnet *);
124 static void rt2560_set_basicrates(struct rt2560_softc *);
125 static void rt2560_update_led(struct rt2560_softc *, int, int);
126 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
127 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
128 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
129 static void rt2560_update_promisc(struct rt2560_softc *);
130 static const char *rt2560_get_rf(int);
131 static void rt2560_read_config(struct rt2560_softc *);
132 static int rt2560_bbp_init(struct rt2560_softc *);
133 static void rt2560_set_txantenna(struct rt2560_softc *, int);
134 static void rt2560_set_rxantenna(struct rt2560_softc *, int);
135 static void rt2560_init(void *);
136 static void rt2560_stop(void *);
137 static void rt2560_intr(void *);
138 static void *rt2560_ratectl_attach(struct ieee80211com *, u_int);
139 static void rt2560_calibrate(void *);
140 static void rt2560_calib_rxsensitivity(struct rt2560_softc *,
141 uint32_t);
142
143 /*
144 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
145 */
146 static const struct ieee80211_rateset rt2560_rateset_11a =
147 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
148
149 static const struct ieee80211_rateset rt2560_rateset_11b =
150 { 4, { 2, 4, 11, 22 } };
151
152 static const struct ieee80211_rateset rt2560_rateset_11g =
153 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
154
155 static const struct {
156 uint32_t reg;
157 uint32_t val;
158 } rt2560_def_mac[] = {
159 RT2560_DEF_MAC
160 };
161
162 static const struct {
163 uint8_t reg;
164 uint8_t val;
165 } rt2560_def_bbp[] = {
166 RT2560_DEF_BBP
167 };
168
169 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2;
170 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2;
171 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2;
172 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2;
173 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
174 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2;
175 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2;
176 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
177
178 static const struct {
179 uint8_t chan;
180 uint32_t r1, r2, r4;
181 } rt2560_rf5222[] = {
182 RT2560_RF5222
183 };
184
185 int
186 rt2560_attach(device_t dev, int id)
187 {
188 struct rt2560_softc *sc = device_get_softc(dev);
189 struct ieee80211com *ic = &sc->sc_ic;
190 struct ifnet *ifp = &ic->ic_if;
191 int error, i;
192
193 callout_init(&sc->scan_ch);
194 callout_init(&sc->calib_ch);
195
196 sc->sc_irq_rid = 0;
197 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
198 RF_ACTIVE | RF_SHAREABLE);
199 if (sc->sc_irq == NULL) {
200 device_printf(dev, "could not allocate interrupt resource\n");
201 return ENXIO;
202 }
203
204 /* retrieve RT2560 rev. no */
205 sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
206
207 /* retrieve MAC address */
208 rt2560_get_macaddr(sc, ic->ic_myaddr);
209
210 /* retrieve RF rev. no and various other things from EEPROM */
211 rt2560_read_config(sc);
212
213 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
214 sc->asic_rev, rt2560_get_rf(sc->rf_rev));
215
216 /*
217 * Allocate Tx and Rx rings.
218 */
219 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
220 if (error != 0) {
221 device_printf(sc->sc_dev, "could not allocate Tx ring\n");
222 goto fail;
223 }
224
225 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
226 if (error != 0) {
227 device_printf(sc->sc_dev, "could not allocate ATIM ring\n");
228 goto fail;
229 }
230
231 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
232 if (error != 0) {
233 device_printf(sc->sc_dev, "could not allocate Prio ring\n");
234 goto fail;
235 }
236
237 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
238 if (error != 0) {
239 device_printf(sc->sc_dev, "could not allocate Beacon ring\n");
240 goto fail;
241 }
242
243 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
244 if (error != 0) {
245 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
246 goto fail;
247 }
248
249 sysctl_ctx_init(&sc->sysctl_ctx);
250 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
251 SYSCTL_STATIC_CHILDREN(_hw),
252 OID_AUTO,
253 device_get_nameunit(dev),
254 CTLFLAG_RD, 0, "");
255 if (sc->sysctl_tree == NULL) {
256 device_printf(dev, "could not add sysctl node\n");
257 error = ENXIO;
258 goto fail;
259 }
260
261 ifp->if_softc = sc;
262 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
263 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
264 ifp->if_init = rt2560_init;
265 ifp->if_ioctl = rt2560_ioctl;
266 ifp->if_start = rt2560_start;
267 ifp->if_watchdog = rt2560_watchdog;
268 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
269 ifq_set_ready(&ifp->if_snd);
270
271 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
272 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
273 ic->ic_state = IEEE80211_S_INIT;
274
275 IEEE80211_ONOE_PARAM_SETUP(&sc->sc_onoe_param);
276 IEEE80211_SAMPLE_PARAM_SETUP(&sc->sc_sample_param);
277 ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE |
278 IEEE80211_RATECTL_CAP_SAMPLE;
279 ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_SAMPLE;
280 ic->ic_ratectl.rc_st_attach = rt2560_ratectl_attach;
281
282 /* set device capabilities */
283 ic->ic_caps =
284 IEEE80211_C_IBSS | /* IBSS mode supported */
285 IEEE80211_C_MONITOR | /* monitor mode supported */
286 IEEE80211_C_HOSTAP | /* HostAp mode supported */
287 IEEE80211_C_TXPMGT | /* tx power management */
288 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
289 IEEE80211_C_SHSLOT | /* short slot time supported */
290 IEEE80211_C_WEP | /* WEP */
291 IEEE80211_C_WPA; /* 802.11i */
292
293 if (sc->rf_rev == RT2560_RF_5222) {
294 /* set supported .11a rates */
295 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a;
296
297 /* set supported .11a channels */
298 for (i = 36; i <= 64; i += 4) {
299 ic->ic_channels[i].ic_freq =
300 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
301 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
302 }
303 for (i = 100; i <= 140; i += 4) {
304 ic->ic_channels[i].ic_freq =
305 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
306 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
307 }
308 for (i = 149; i <= 161; i += 4) {
309 ic->ic_channels[i].ic_freq =
310 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
311 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
312 }
313 }
314
315 /* set supported .11b and .11g rates */
316 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b;
317 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g;
318
319 /* set supported .11b and .11g channels (1 through 14) */
320 for (i = 1; i <= 14; i++) {
321 ic->ic_channels[i].ic_freq =
322 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
323 ic->ic_channels[i].ic_flags =
324 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
325 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
326 }
327
328 sc->sc_sifs = IEEE80211_DUR_SIFS; /* Default SIFS */
329
330 ieee80211_ifattach(ic);
331 ic->ic_updateslot = rt2560_update_slot;
332 ic->ic_reset = rt2560_reset;
333 /* enable s/w bmiss handling in sta mode */
334 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
335
336 /* override state transition machine */
337 sc->sc_newstate = ic->ic_newstate;
338 ic->ic_newstate = rt2560_newstate;
339 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status);
340
341 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
342 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
343
344 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
345 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
346 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
347
348 sc->sc_txtap_len = sizeof sc->sc_txtapu;
349 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
350 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
351
352 /*
353 * Add a few sysctl knobs.
354 */
355 sc->sc_dwelltime = 200; /* milliseconds */
356 sc->sc_calib_rxsns = 1; /* Enable */
357
358 SYSCTL_ADD_INT(&sc->sysctl_ctx,
359 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO,
360 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)");
361
362 SYSCTL_ADD_INT(&sc->sysctl_ctx,
363 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO,
364 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)");
365
366 SYSCTL_ADD_INT(&sc->sysctl_ctx,
367 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
368 CTLFLAG_RW, &sc->sc_dwelltime, 0,
369 "channel dwell time (ms) for AP/station scanning");
370
371 if (sc->sc_flags & RT2560_FLAG_RXSNS) {
372 SYSCTL_ADD_INT(&sc->sysctl_ctx,
373 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "calib_rxsns",
374 CTLFLAG_RW, &sc->sc_calib_rxsns, 0,
375 "calibrate RX sensitivity (sta mode)");
376 }
377
378 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2560_intr,
379 sc, &sc->sc_ih, ifp->if_serializer);
380 if (error != 0) {
381 device_printf(dev, "could not set up interrupt\n");
382 bpfdetach(ifp);
383 ieee80211_ifdetach(ic);
384 goto fail;
385 }
386
387 if (bootverbose)
388 ieee80211_announce(ic);
389 return 0;
390 fail:
391 rt2560_detach(sc);
392 return error;
393 }
394
395 int
396 rt2560_detach(void *xsc)
397 {
398 struct rt2560_softc *sc = xsc;
399 struct ieee80211com *ic = &sc->sc_ic;
400 struct ifnet *ifp = ic->ic_ifp;
401
402 if (device_is_attached(sc->sc_dev)) {
403 lwkt_serialize_enter(ifp->if_serializer);
404
405 callout_stop(&sc->scan_ch);
406
407 rt2560_stop(sc);
408 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
409
410 lwkt_serialize_exit(ifp->if_serializer);
411
412 bpfdetach(ifp);
413 ieee80211_ifdetach(ic);
414 }
415
416 rt2560_free_tx_ring(sc, &sc->txq);
417 rt2560_free_tx_ring(sc, &sc->atimq);
418 rt2560_free_tx_ring(sc, &sc->prioq);
419 rt2560_free_tx_ring(sc, &sc->bcnq);
420 rt2560_free_rx_ring(sc, &sc->rxq);
421
422 if (sc->sc_irq != NULL) {
423 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
424 sc->sc_irq);
425 }
426
427 if (sc->sysctl_tree != NULL)
428 sysctl_ctx_free(&sc->sysctl_ctx);
429
430 return 0;
431 }
432
433 void
434 rt2560_shutdown(void *xsc)
435 {
436 struct rt2560_softc *sc = xsc;
437 struct ifnet *ifp = &sc->sc_ic.ic_if;
438
439 lwkt_serialize_enter(ifp->if_serializer);
440 rt2560_stop(sc);
441 lwkt_serialize_exit(ifp->if_serializer);
442 }
443
444 void
445 rt2560_suspend(void *xsc)
446 {
447 struct rt2560_softc *sc = xsc;
448 struct ifnet *ifp = &sc->sc_ic.ic_if;
449
450 lwkt_serialize_enter(ifp->if_serializer);
451 rt2560_stop(sc);
452 lwkt_serialize_exit(ifp->if_serializer);
453 }
454
455 void
456 rt2560_resume(void *xsc)
457 {
458 struct rt2560_softc *sc = xsc;
459 struct ifnet *ifp = sc->sc_ic.ic_ifp;
460
461 lwkt_serialize_enter(ifp->if_serializer);
462 if (ifp->if_flags & IFF_UP) {
463 ifp->if_init(ifp->if_softc);
464 if (ifp->if_flags & IFF_RUNNING)
465 ifp->if_start(ifp);
466 }
467 lwkt_serialize_exit(ifp->if_serializer);
468 }
469
470 static void
471 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
472 {
473 if (error != 0)
474 return;
475
476 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
477
478 *(bus_addr_t *)arg = segs[0].ds_addr;
479 }
480
481 static int
482 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
483 int count)
484 {
485 int i, error;
486
487 ring->count = count;
488 ring->queued = 0;
489 ring->cur = ring->next = 0;
490 ring->cur_encrypt = ring->next_encrypt = 0;
491
492 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
493 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2560_TX_DESC_SIZE, 1,
494 count * RT2560_TX_DESC_SIZE, 0, &ring->desc_dmat);
495 if (error != 0) {
496 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
497 goto fail;
498 }
499
500 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
501 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
502 if (error != 0) {
503 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
504 goto fail;
505 }
506
507 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
508 count * RT2560_TX_DESC_SIZE,
509 rt2560_dma_map_addr, &ring->physaddr, 0);
510 if (error != 0) {
511 device_printf(sc->sc_dev, "could not load desc DMA map\n");
512
513 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
514 ring->desc = NULL;
515 goto fail;
516 }
517
518 ring->data = kmalloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
519 M_WAITOK | M_ZERO);
520
521 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
522 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, RT2560_MAX_SCATTER,
523 MCLBYTES, 0, &ring->data_dmat);
524 if (error != 0) {
525 device_printf(sc->sc_dev, "could not create data DMA tag\n");
526 goto fail;
527 }
528
529 for (i = 0; i < count; i++) {
530 error = bus_dmamap_create(ring->data_dmat, 0,
531 &ring->data[i].map);
532 if (error != 0) {
533 device_printf(sc->sc_dev, "could not create DMA map\n");
534 goto fail;
535 }
536 }
537 return 0;
538
539 fail: rt2560_free_tx_ring(sc, ring);
540 return error;
541 }
542
543 static void
544 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
545 {
546 struct rt2560_tx_desc *desc;
547 struct rt2560_tx_data *data;
548 int i;
549
550 for (i = 0; i < ring->count; i++) {
551 desc = &ring->desc[i];
552 data = &ring->data[i];
553
554 if (data->m != NULL) {
555 bus_dmamap_sync(ring->data_dmat, data->map,
556 BUS_DMASYNC_POSTWRITE);
557 bus_dmamap_unload(ring->data_dmat, data->map);
558 m_freem(data->m);
559 data->m = NULL;
560 }
561
562 if (data->ni != NULL) {
563 ieee80211_free_node(data->ni);
564 data->ni = NULL;
565 }
566
567 desc->flags = 0;
568 }
569
570 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
571
572 ring->queued = 0;
573 ring->cur = ring->next = 0;
574 ring->cur_encrypt = ring->next_encrypt = 0;
575 }
576
577 static void
578 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
579 {
580 struct rt2560_tx_data *data;
581 int i;
582
583 if (ring->desc != NULL) {
584 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
585 BUS_DMASYNC_POSTWRITE);
586 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
587 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
588 ring->desc = NULL;
589 }
590
591 if (ring->desc_dmat != NULL) {
592 bus_dma_tag_destroy(ring->desc_dmat);
593 ring->desc_dmat = NULL;
594 }
595
596 if (ring->data != NULL) {
597 for (i = 0; i < ring->count; i++) {
598 data = &ring->data[i];
599
600 if (data->m != NULL) {
601 bus_dmamap_sync(ring->data_dmat, data->map,
602 BUS_DMASYNC_POSTWRITE);
603 bus_dmamap_unload(ring->data_dmat, data->map);
604 m_freem(data->m);
605 data->m = NULL;
606 }
607
608 if (data->ni != NULL) {
609 ieee80211_free_node(data->ni);
610 data->ni = NULL;
611 }
612
613 if (data->map != NULL) {
614 bus_dmamap_destroy(ring->data_dmat, data->map);
615 data->map = NULL;
616 }
617 }
618
619 kfree(ring->data, M_DEVBUF);
620 ring->data = NULL;
621 }
622
623 if (ring->data_dmat != NULL) {
624 bus_dma_tag_destroy(ring->data_dmat);
625 ring->data_dmat = NULL;
626 }
627 }
628
629 static int
630 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
631 int count)
632 {
633 struct rt2560_rx_desc *desc;
634 struct rt2560_rx_data *data;
635 bus_addr_t physaddr;
636 int i, error;
637
638 ring->count = count;
639 ring->cur = ring->next = 0;
640 ring->cur_decrypt = 0;
641
642 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
643 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2560_RX_DESC_SIZE, 1,
644 count * RT2560_RX_DESC_SIZE, 0, &ring->desc_dmat);
645 if (error != 0) {
646 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
647 goto fail;
648 }
649
650 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
651 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
652 if (error != 0) {
653 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
654 goto fail;
655 }
656
657 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
658 count * RT2560_RX_DESC_SIZE,
659 rt2560_dma_map_addr, &ring->physaddr, 0);
660 if (error != 0) {
661 device_printf(sc->sc_dev, "could not load desc DMA map\n");
662
663 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
664 ring->desc = NULL;
665 goto fail;
666 }
667
668 ring->data = kmalloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
669 M_WAITOK | M_ZERO);
670
671 /*
672 * Pre-allocate Rx buffers and populate Rx ring.
673 */
674 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
675 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
676 &ring->data_dmat);
677 if (error != 0) {
678 device_printf(sc->sc_dev, "could not create data DMA tag\n");
679 goto fail;
680 }
681
682 for (i = 0; i < count; i++) {
683 desc = &sc->rxq.desc[i];
684 data = &sc->rxq.data[i];
685
686 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
687 if (error != 0) {
688 device_printf(sc->sc_dev, "could not create DMA map\n");
689 goto fail;
690 }
691
692 data->m = m_getcl(MB_WAIT, MT_DATA, M_PKTHDR);
693 if (data->m == NULL) {
694 device_printf(sc->sc_dev,
695 "could not allocate rx mbuf\n");
696 error = ENOMEM;
697 goto fail;
698 }
699
700 error = bus_dmamap_load(ring->data_dmat, data->map,
701 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr,
702 &physaddr, 0);
703 if (error != 0) {
704 device_printf(sc->sc_dev,
705 "could not load rx buf DMA map");
706
707 m_freem(data->m);
708 data->m = NULL;
709 goto fail;
710 }
711
712 desc->flags = htole32(RT2560_RX_BUSY);
713 desc->physaddr = htole32(physaddr);
714 }
715
716 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
717
718 return 0;
719
720 fail: rt2560_free_rx_ring(sc, ring);
721 return error;
722 }
723
724 static void
725 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
726 {
727 int i;
728
729 for (i = 0; i < ring->count; i++) {
730 ring->desc[i].flags = htole32(RT2560_RX_BUSY);
731 ring->data[i].drop = 0;
732 }
733
734 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
735
736 ring->cur = ring->next = 0;
737 ring->cur_decrypt = 0;
738 }
739
740 static void
741 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
742 {
743 struct rt2560_rx_data *data;
744
745 if (ring->desc != NULL) {
746 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
747 BUS_DMASYNC_POSTWRITE);
748 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
749 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
750 ring->desc = NULL;
751 }
752
753 if (ring->desc_dmat != NULL) {
754 bus_dma_tag_destroy(ring->desc_dmat);
755 ring->desc_dmat = NULL;
756 }
757
758 if (ring->data != NULL) {
759 int i;
760
761 for (i = 0; i < ring->count; i++) {
762 data = &ring->data[i];
763
764 if (data->m != NULL) {
765 bus_dmamap_sync(ring->data_dmat, data->map,
766 BUS_DMASYNC_POSTREAD);
767 bus_dmamap_unload(ring->data_dmat, data->map);
768 m_freem(data->m);
769 data->m = NULL;
770 }
771
772 if (data->map != NULL) {
773 bus_dmamap_destroy(ring->data_dmat, data->map);
774 data->map = NULL;
775 }
776 }
777
778 kfree(ring->data, M_DEVBUF);
779 ring->data = NULL;
780 }
781
782 if (ring->data_dmat != NULL) {
783 bus_dma_tag_destroy(ring->data_dmat);
784 ring->data_dmat = NULL;
785 }
786 }
787
788 static int
789 rt2560_media_change(struct ifnet *ifp)
790 {
791 struct rt2560_softc *sc = ifp->if_softc;
792 int error;
793
794 error = ieee80211_media_change(ifp);
795 if (error != ENETRESET)
796 return error;
797
798 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
799 rt2560_init(sc);
800 return 0;
801 }
802
803 /*
804 * This function is called periodically (every 200ms) during scanning to
805 * switch from one channel to another.
806 */
807 static void
808 rt2560_next_scan(void *arg)
809 {
810 struct rt2560_softc *sc = arg;
811 struct ieee80211com *ic = &sc->sc_ic;
812 struct ifnet *ifp = ic->ic_ifp;
813
814 lwkt_serialize_enter(ifp->if_serializer);
815 if (ic->ic_state == IEEE80211_S_SCAN)
816 ieee80211_next_scan(ic);
817 lwkt_serialize_exit(ifp->if_serializer);
818 }
819
820 static int
821 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
822 {
823 struct rt2560_softc *sc = ic->ic_ifp->if_softc;
824 enum ieee80211_state ostate;
825 struct ieee80211_node *ni;
826 struct mbuf *m;
827 int error = 0;
828
829 ostate = ic->ic_state;
830 callout_stop(&sc->scan_ch);
831 callout_stop(&sc->calib_ch);
832 ieee80211_ratectl_newstate(ic, nstate);
833
834 switch (nstate) {
835 case IEEE80211_S_INIT:
836 if (ostate == IEEE80211_S_RUN) {
837 /* abort TSF synchronization */
838 RAL_WRITE(sc, RT2560_CSR14, 0);
839
840 /* turn association led off */
841 rt2560_update_led(sc, 0, 0);
842 }
843 break;
844
845 case IEEE80211_S_SCAN:
846 rt2560_set_chan(sc, ic->ic_curchan);
847 callout_reset(&sc->scan_ch, (sc->sc_dwelltime * hz) / 1000,
848 rt2560_next_scan, sc);
849 break;
850
851 case IEEE80211_S_AUTH:
852 rt2560_set_chan(sc, ic->ic_curchan);
853 break;
854
855 case IEEE80211_S_ASSOC:
856 rt2560_set_chan(sc, ic->ic_curchan);
857 break;
858
859 case IEEE80211_S_RUN:
860 sc->sc_avgrssi = -1;
861 rt2560_set_chan(sc, ic->ic_curchan);
862
863 ni = ic->ic_bss;
864
865 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
866 rt2560_update_plcp(sc);
867 rt2560_set_basicrates(sc);
868 rt2560_set_bssid(sc, ni->ni_bssid);
869 }
870
871 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
872 ic->ic_opmode == IEEE80211_M_IBSS) {
873 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
874 if (m == NULL) {
875 device_printf(sc->sc_dev,
876 "could not allocate beacon\n");
877 error = ENOBUFS;
878 break;
879 }
880
881 ieee80211_ref_node(ni);
882 error = rt2560_tx_bcn(sc, m, ni);
883 if (error != 0)
884 break;
885 }
886
887 /* turn assocation led on */
888 rt2560_update_led(sc, 1, 0);
889
890 if (ic->ic_opmode != IEEE80211_M_MONITOR)
891 rt2560_enable_tsf_sync(sc);
892 if (ic->ic_opmode == IEEE80211_M_STA) {
893 /* Clear false CCA counter */
894 RAL_READ(sc, RT2560_CNT3);
895 callout_reset(&sc->calib_ch, hz, rt2560_calibrate, sc);
896 }
897 break;
898 }
899
900 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
901 }
902
903 /*
904 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
905 * 93C66).
906 */
907 static uint16_t
908 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
909 {
910 uint32_t tmp;
911 uint16_t val;
912 int n;
913
914 /* clock C once before the first command */
915 RT2560_EEPROM_CTL(sc, 0);
916
917 RT2560_EEPROM_CTL(sc, RT2560_S);
918 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
919 RT2560_EEPROM_CTL(sc, RT2560_S);
920
921 /* write start bit (1) */
922 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
923 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
924
925 /* write READ opcode (10) */
926 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
927 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
928 RT2560_EEPROM_CTL(sc, RT2560_S);
929 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
930
931 /* write address (A5-A0 or A7-A0) */
932 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
933 for (; n >= 0; n--) {
934 RT2560_EEPROM_CTL(sc, RT2560_S |
935 (((addr >> n) & 1) << RT2560_SHIFT_D));
936 RT2560_EEPROM_CTL(sc, RT2560_S |
937 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
938 }
939
940 RT2560_EEPROM_CTL(sc, RT2560_S);
941
942 /* read data Q15-Q0 */
943 val = 0;
944 for (n = 15; n >= 0; n--) {
945 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
946 tmp = RAL_READ(sc, RT2560_CSR21);
947 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
948 RT2560_EEPROM_CTL(sc, RT2560_S);
949 }
950
951 RT2560_EEPROM_CTL(sc, 0);
952
953 /* clear Chip Select and clock C */
954 RT2560_EEPROM_CTL(sc, RT2560_S);
955 RT2560_EEPROM_CTL(sc, 0);
956 RT2560_EEPROM_CTL(sc, RT2560_C);
957
958 return val;
959 }
960
961 /*
962 * Some frames were processed by the hardware cipher engine and are ready for
963 * transmission.
964 */
965 static void
966 rt2560_encryption_intr(struct rt2560_softc *sc)
967 {
968 struct rt2560_tx_desc *desc;
969 int hw;
970
971 /* retrieve last descriptor index processed by cipher engine */
972 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr;
973 hw /= RT2560_TX_DESC_SIZE;
974
975 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
976 BUS_DMASYNC_POSTREAD);
977
978 for (; sc->txq.next_encrypt != hw;) {
979 desc = &sc->txq.desc[sc->txq.next_encrypt];
980
981 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
982 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY))
983 break;
984
985 /* for TKIP, swap eiv field to fix a bug in ASIC */
986 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
987 RT2560_TX_CIPHER_TKIP)
988 desc->eiv = bswap32(desc->eiv);
989
990 /* mark the frame ready for transmission */
991 desc->flags |= htole32(RT2560_TX_VALID);
992 desc->flags |= htole32(RT2560_TX_BUSY);
993
994 DPRINTFN(15, ("encryption done idx=%u\n",
995 sc->txq.next_encrypt));
996
997 sc->txq.next_encrypt =
998 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
999 }
1000
1001 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1002 BUS_DMASYNC_PREWRITE);
1003
1004 /* kick Tx */
1005 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
1006 }
1007
1008 static void
1009 rt2560_tx_intr(struct rt2560_softc *sc)
1010 {
1011 struct ieee80211com *ic = &sc->sc_ic;
1012 struct ifnet *ifp = ic->ic_ifp;
1013
1014 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1015 BUS_DMASYNC_POSTREAD);
1016
1017 for (;;) {
1018 struct rt2560_tx_desc *desc;
1019 struct rt2560_tx_data *data;
1020 struct ieee80211_node *ni;
1021 int rateidx, data_retries, failed;
1022 struct mbuf *m;
1023 uint32_t flags;
1024
1025 desc = &sc->txq.desc[sc->txq.next];
1026 data = &sc->txq.data[sc->txq.next];
1027
1028 flags = le32toh(desc->flags);
1029
1030 if ((flags & RT2560_TX_BUSY) ||
1031 (flags & RT2560_TX_CIPHER_BUSY) ||
1032 !(flags & RT2560_TX_VALID))
1033 break;
1034
1035 rateidx = data->rateidx;
1036 ni = data->ni;
1037 m = data->m;
1038
1039 data->ni = NULL;
1040 data->m = NULL;
1041
1042 failed = 0;
1043 switch (flags & RT2560_TX_RESULT_MASK) {
1044 case RT2560_TX_SUCCESS:
1045 DPRINTFN(10, ("data frame sent successfully\n"));
1046 ifp->if_opackets++;
1047 data_retries = 0;
1048 break;
1049
1050 case RT2560_TX_SUCCESS_RETRY:
1051 data_retries = (flags >> 5) & 0x7;
1052 DPRINTFN(9, ("data frame sent after %u retries\n",
1053 data_retries));
1054 ifp->if_opackets++;
1055 break;
1056
1057 case RT2560_TX_FAIL_RETRY:
1058 DPRINTFN(9, ("sending data frame failed (too much "
1059 "retries)\n"));
1060 ifp->if_oerrors++;
1061 data_retries = 7;
1062 failed = 1;
1063 break;
1064
1065 case RT2560_TX_FAIL_INVALID:
1066 case RT2560_TX_FAIL_OTHER:
1067 default:
1068 data_retries = 7;
1069 failed = 1;
1070 device_printf(sc->sc_dev, "sending data frame failed "
1071 "0x%08x\n", flags);
1072 ifp->if_oerrors++;
1073 break;
1074 }
1075
1076 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1077 BUS_DMASYNC_POSTWRITE);
1078 bus_dmamap_unload(sc->txq.data_dmat, data->map);
1079
1080 if (rateidx >= 0) {
1081 struct ieee80211_ratectl_res res;
1082
1083 res.rc_res_tries = data_retries + 1;
1084 res.rc_res_rateidx = rateidx;
1085 ieee80211_ratectl_tx_complete(ni, m->m_pkthdr.len,
1086 &res, 1, data_retries, 0, failed);
1087 }
1088
1089 m_freem(m);
1090 ieee80211_free_node(ni);
1091
1092 /* descriptor is no longer valid */
1093 desc->flags &= ~htole32(RT2560_TX_VALID);
1094
1095 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
1096
1097 sc->txq.queued--;
1098 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1099 }
1100
1101 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1102 BUS_DMASYNC_PREWRITE);
1103
1104 sc->sc_tx_timer = 0;
1105 ifp->if_flags &= ~IFF_OACTIVE;
1106 rt2560_start(ifp);
1107 }
1108
1109 static void
1110 rt2560_prio_intr(struct rt2560_softc *sc)
1111 {
1112 struct ieee80211com *ic = &sc->sc_ic;
1113 struct ifnet *ifp = ic->ic_ifp;
1114 struct rt2560_tx_desc *desc;
1115 struct rt2560_tx_data *data;
1116
1117 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1118 BUS_DMASYNC_POSTREAD);
1119
1120 for (;;) {
1121 desc = &sc->prioq.desc[sc->prioq.next];
1122 data = &sc->prioq.data[sc->prioq.next];
1123
1124 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1125 !(le32toh(desc->flags) & RT2560_TX_VALID))
1126 break;
1127
1128 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1129 case RT2560_TX_SUCCESS:
1130 DPRINTFN(10, ("mgt frame sent successfully\n"));
1131 break;
1132
1133 case RT2560_TX_SUCCESS_RETRY:
1134 DPRINTFN(9, ("mgt frame sent after %u retries\n",
1135 (le32toh(desc->flags) >> 5) & 0x7));
1136 break;
1137
1138 case RT2560_TX_FAIL_RETRY:
1139 DPRINTFN(9, ("sending mgt frame failed (too much "
1140 "retries)\n"));
1141 break;
1142
1143 case RT2560_TX_FAIL_INVALID:
1144 case RT2560_TX_FAIL_OTHER:
1145 default:
1146 device_printf(sc->sc_dev, "sending mgt frame failed "
1147 "0x%08x\n", le32toh(desc->flags));
1148 }
1149
1150 bus_dmamap_sync(sc->prioq.data_dmat, data->map,
1151 BUS_DMASYNC_POSTWRITE);
1152 bus_dmamap_unload(sc->prioq.data_dmat, data->map);
1153 m_freem(data->m);
1154 data->m = NULL;
1155
1156 KASSERT(data->ni == NULL, ("mgmt node is not empty\n"));
1157
1158 /* descriptor is no longer valid */
1159 desc->flags &= ~htole32(RT2560_TX_VALID);
1160
1161 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1162
1163 sc->prioq.queued--;
1164 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1165 }
1166
1167 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1168 BUS_DMASYNC_PREWRITE);
1169
1170 sc->sc_tx_timer = 0;
1171 ifp->if_flags &= ~IFF_OACTIVE;
1172 rt2560_start(ifp);
1173 }
1174
1175 /*
1176 * Some frames were processed by the hardware cipher engine and are ready for
1177 * transmission to the IEEE802.11 layer.
1178 */
1179 static void
1180 rt2560_decryption_intr(struct rt2560_softc *sc)
1181 {
1182 struct ieee80211com *ic = &sc->sc_ic;
1183 struct ifnet *ifp = ic->ic_ifp;
1184 struct rt2560_rx_desc *desc;
1185 struct rt2560_rx_data *data;
1186 bus_addr_t physaddr;
1187 struct ieee80211_frame *wh;
1188 struct ieee80211_node *ni;
1189 struct mbuf *mnew, *m;
1190 int hw, error;
1191
1192 /* retrieve last decriptor index processed by cipher engine */
1193 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr;
1194 hw /= RT2560_RX_DESC_SIZE;
1195
1196 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1197 BUS_DMASYNC_POSTREAD);
1198
1199 for (; sc->rxq.cur_decrypt != hw;) {
1200 int rssi;
1201
1202 desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1203 data = &sc->rxq.data[sc->rxq.cur_decrypt];
1204
1205 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1206 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1207 break;
1208
1209 if (data->drop) {
1210 ifp->if_ierrors++;
1211 goto skip;
1212 }
1213
1214 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1215 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1216 ifp->if_ierrors++;
1217 goto skip;
1218 }
1219
1220 /*
1221 * Try to allocate a new mbuf for this ring element and load it
1222 * before processing the current mbuf. If the ring element
1223 * cannot be loaded, drop the received packet and reuse the old
1224 * mbuf. In the unlikely case that the old mbuf can't be
1225 * reloaded either, explicitly panic.
1226 */
1227 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1228 if (mnew == NULL) {
1229 ifp->if_ierrors++;
1230 goto skip;
1231 }
1232
1233 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1234 BUS_DMASYNC_POSTREAD);
1235 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1236
1237 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1238 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr,
1239 &physaddr, 0);
1240 if (error != 0) {
1241 m_freem(mnew);
1242
1243 /* try to reload the old mbuf */
1244 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1245 mtod(data->m, void *), MCLBYTES,
1246 rt2560_dma_map_addr, &physaddr, 0);
1247 if (error != 0) {
1248 /* very unlikely that it will fail... */
1249 panic("%s: could not load old rx mbuf",
1250 device_get_name(sc->sc_dev));
1251 }
1252 ifp->if_ierrors++;
1253 goto skip;
1254 }
1255
1256 /*
1257 * New mbuf successfully loaded, update Rx ring and continue
1258 * processing.
1259 */
1260 m = data->m;
1261 data->m = mnew;
1262 desc->physaddr = htole32(physaddr);
1263
1264 /* finalize mbuf */
1265 m->m_pkthdr.rcvif = ifp;
1266 m->m_pkthdr.len = m->m_len =
1267 (le32toh(desc->flags) >> 16) & 0xfff;
1268
1269 rssi = RT2560_RSSI(sc, desc->rssi);
1270 if (sc->sc_avgrssi < 0)
1271 sc->sc_avgrssi = rssi;
1272 else
1273 sc->sc_avgrssi = ((sc->sc_avgrssi * 7) + rssi) >> 3;
1274
1275 if (sc->sc_drvbpf != NULL) {
1276 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1277 uint32_t tsf_lo, tsf_hi;
1278
1279 /* get timestamp (low and high 32 bits) */
1280 tsf_hi = RAL_READ(sc, RT2560_CSR17);
1281 tsf_lo = RAL_READ(sc, RT2560_CSR16);
1282
1283 tap->wr_tsf =
1284 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1285 tap->wr_flags = 0;
1286 tap->wr_rate = rt2560_rxrate(desc);
1287 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1288 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1289 tap->wr_antenna = sc->rx_ant;
1290 tap->wr_antsignal = rssi;
1291
1292 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1293 }
1294
1295 wh = mtod(m, struct ieee80211_frame *);
1296 ni = ieee80211_find_rxnode(ic,
1297 (struct ieee80211_frame_min *)wh);
1298
1299 /* send the frame to the 802.11 layer */
1300 ieee80211_input(ic, m, ni, rssi, 0);
1301
1302 /* node is no longer needed */
1303 ieee80211_free_node(ni);
1304
1305 skip: desc->flags = htole32(RT2560_RX_BUSY);
1306
1307 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1308
1309 sc->rxq.cur_decrypt =
1310 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1311 }
1312
1313 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1314 BUS_DMASYNC_PREWRITE);
1315 }
1316
1317 /*
1318 * Some frames were received. Pass them to the hardware cipher engine before
1319 * sending them to the 802.11 layer.
1320 */
1321 static void
1322 rt2560_rx_intr(struct rt2560_softc *sc)
1323 {
1324 struct rt2560_rx_desc *desc;
1325 struct rt2560_rx_data *data;
1326
1327 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1328 BUS_DMASYNC_POSTREAD);
1329
1330 for (;;) {
1331 desc = &sc->rxq.desc[sc->rxq.cur];
1332 data = &sc->rxq.data[sc->rxq.cur];
1333
1334 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1335 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1336 break;
1337
1338 data->drop = 0;
1339
1340 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) ||
1341 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) {
1342 /*
1343 * This should not happen since we did not request
1344 * to receive those frames when we filled RXCSR0.
1345 */
1346 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1347 le32toh(desc->flags)));
1348 data->drop = 1;
1349 }
1350
1351 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1352 DPRINTFN(5, ("bad length\n"));
1353 data->drop = 1;
1354 }
1355
1356 /* mark the frame for decryption */
1357 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1358
1359 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1360
1361 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1362 }
1363
1364 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1365 BUS_DMASYNC_PREWRITE);
1366
1367 /* kick decrypt */
1368 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1369 }
1370
1371 /*
1372 * This function is called periodically in IBSS mode when a new beacon must be
1373 * sent out.
1374 */
1375 static void
1376 rt2560_beacon_expire(struct rt2560_softc *sc)
1377 {
1378 struct ieee80211com *ic = &sc->sc_ic;
1379 struct rt2560_tx_data *data;
1380
1381 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1382 ic->ic_opmode != IEEE80211_M_HOSTAP)
1383 return;
1384
1385 data = &sc->bcnq.data[sc->bcnq.next];
1386
1387 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
1388 bus_dmamap_unload(sc->bcnq.data_dmat, data->map);
1389
1390 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1);
1391
1392 if (ic->ic_rawbpf != NULL)
1393 bpf_mtap(ic->ic_rawbpf, data->m);
1394
1395 rt2560_tx_bcn(sc, data->m, data->ni);
1396
1397 DPRINTFN(15, ("beacon expired\n"));
1398
1399 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1400 }
1401
1402 /* ARGSUSED */
1403 static void
1404 rt2560_wakeup_expire(struct rt2560_softc *sc)
1405 {
1406 DPRINTFN(2, ("wakeup expired\n"));
1407 }
1408
1409 static void
1410 rt2560_intr(void *arg)
1411 {
1412 struct rt2560_softc *sc = arg;
1413 struct ifnet *ifp = &sc->sc_ic.ic_if;
1414 uint32_t r;
1415
1416 /* disable interrupts */
1417 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1418
1419 /* don't re-enable interrupts if we're shutting down */
1420 if (!(ifp->if_flags & IFF_RUNNING))
1421 return;
1422
1423 r = RAL_READ(sc, RT2560_CSR7);
1424 RAL_WRITE(sc, RT2560_CSR7, r);
1425
1426 if (r & RT2560_BEACON_EXPIRE)
1427 rt2560_beacon_expire(sc);
1428
1429 if (r & RT2560_WAKEUP_EXPIRE)
1430 rt2560_wakeup_expire(sc);
1431
1432 if (r & RT2560_PRIO_DONE)
1433 rt2560_prio_intr(sc);
1434
1435 if (r & (RT2560_RX_DONE | RT2560_TX_DONE | RT2560_ENCRYPTION_DONE)) {
1436 int i;
1437
1438 for (i = 0; i < 2; ++i) {
1439 rt2560_tx_intr(sc);
1440 rt2560_encryption_intr(sc);
1441 }
1442 }
1443
1444 if (r & (RT2560_DECRYPTION_DONE | RT2560_RX_DONE)) {
1445 int i;
1446
1447 for (i = 0; i < 2; ++i) {
1448 rt2560_decryption_intr(sc);
1449 rt2560_rx_intr(sc);
1450 }
1451 }
1452
1453 /* re-enable interrupts */
1454 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1455 }
1456
1457 /* quickly determine if a given rate is CCK or OFDM */
1458 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1459
1460 #define RAL_ACK_SIZE (sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
1461 #define RAL_CTS_SIZE (sizeof(struct ieee80211_frame_cts) + IEEE80211_CRC_LEN)
1462
1463 #define RT2560_TXRX_TURNAROUND 10 /* us */
1464
1465 /*
1466 * This function is only used by the Rx radiotap code.
1467 */
1468 static uint8_t
1469 rt2560_rxrate(struct rt2560_rx_desc *desc)
1470 {
1471 if (le32toh(desc->flags) & RT2560_RX_OFDM) {
1472 /* reverse function of rt2560_plcp_signal */
1473 switch (desc->rate) {
1474 case 0xb: return 12;
1475 case 0xf: return 18;
1476 case 0xa: return 24;
1477 case 0xe: return 36;
1478 case 0x9: return 48;
1479 case 0xd: return 72;
1480 case 0x8: return 96;
1481 case 0xc: return 108;
1482 }
1483 } else {
1484 if (desc->rate == 10)
1485 return 2;
1486 if (desc->rate == 20)
1487 return 4;
1488 if (desc->rate == 55)
1489 return 11;
1490 if (desc->rate == 110)
1491 return 22;
1492 }
1493 return 2; /* should not get there */
1494 }
1495
1496 static uint8_t
1497 rt2560_plcp_signal(int rate)
1498 {
1499 switch (rate) {
1500 /* CCK rates (returned values are device-dependent) */
1501 case 2: return 0x0;
1502 case 4: return 0x1;
1503 case 11: return 0x2;
1504 case 22: return 0x3;
1505
1506 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1507 case 12: return 0xb;
1508 case 18: return 0xf;
1509 case 24: return 0xa;
1510 case 36: return 0xe;
1511 case 48: return 0x9;
1512 case 72: return 0xd;
1513 case 96: return 0x8;
1514 case 108: return 0xc;
1515
1516 /* unsupported rates (should not get there) */
1517 default: return 0xff;
1518 }
1519 }
1520
1521 static void
1522 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1523 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1524 {
1525 struct ieee80211com *ic = &sc->sc_ic;
1526 uint16_t plcp_length;
1527 int remainder;
1528
1529 desc->flags = htole32(flags);
1530 desc->flags |= htole32(len << 16);
1531 if (!encrypt)
1532 desc->flags |= htole32(RT2560_TX_VALID);
1533
1534 desc->physaddr = htole32(physaddr);
1535 desc->wme = htole16(
1536 RT2560_AIFSN(2) |
1537 RT2560_LOGCWMIN(3) |
1538 RT2560_LOGCWMAX(8));
1539
1540 /* setup PLCP fields */
1541 desc->plcp_signal = rt2560_plcp_signal(rate);
1542 desc->plcp_service = 4;
1543
1544 len += IEEE80211_CRC_LEN;
1545 if (RAL_RATE_IS_OFDM(rate)) {
1546 desc->flags |= htole32(RT2560_TX_OFDM);
1547
1548 plcp_length = len & 0xfff;
1549 desc->plcp_length_hi = plcp_length >> 6;
1550 desc->plcp_length_lo = plcp_length & 0x3f;
1551 } else {
1552 plcp_length = (16 * len + rate - 1) / rate;
1553 if (rate == 22) {
1554 remainder = (16 * len) % 22;
1555 if (remainder != 0 && remainder < 7)
1556 desc->plcp_service |= RT2560_PLCP_LENGEXT;
1557 }
1558 desc->plcp_length_hi = plcp_length >> 8;
1559 desc->plcp_length_lo = plcp_length & 0xff;
1560
1561 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1562 desc->plcp_signal |= 0x08;
1563 }
1564
1565 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY)
1566 : htole32(RT2560_TX_BUSY);
1567 }
1568
1569 static int
1570 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1571 struct ieee80211_node *ni)
1572 {
1573 struct ieee80211com *ic = &sc->sc_ic;
1574 struct rt2560_tx_desc *desc;
1575 struct rt2560_tx_data *data;
1576 bus_addr_t paddr;
1577 int rate, error;
1578
1579 desc = &sc->bcnq.desc[sc->bcnq.cur];
1580 data = &sc->bcnq.data[sc->bcnq.cur];
1581
1582 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1583
1584 error = bus_dmamap_load_mbuf(sc->bcnq.data_dmat, data->map, m0,
1585 rt2560_dma_map_mbuf, &paddr,
1586 BUS_DMA_NOWAIT);
1587 if (error != 0) {
1588 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1589 error);
1590 m_freem(m0);
1591 return error;
1592 }
1593
1594 if (sc->sc_drvbpf != NULL) {
1595 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1596
1597 tap->wt_flags = 0;
1598 tap->wt_rate = rate;
1599 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1600 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1601 tap->wt_antenna = sc->tx_ant;
1602
1603 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1604 }
1605
1606 data->m = m0;
1607 data->ni = ni;
1608
1609 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1610 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, paddr);
1611
1612 DPRINTFN(10, ("sending beacon frame len=%u idx=%u rate=%u\n",
1613 m0->m_pkthdr.len, sc->bcnq.cur, rate));
1614
1615 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1616 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map,
1617 BUS_DMASYNC_PREWRITE);
1618
1619 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT;
1620
1621 return 0;
1622 }
1623
1624 static int
1625 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1626 struct ieee80211_node *ni)
1627 {
1628 struct ieee80211com *ic = &sc->sc_ic;
1629 struct rt2560_tx_desc *desc;
1630 struct rt2560_tx_data *data;
1631 struct ieee80211_frame *wh;
1632 bus_addr_t paddr;
1633 uint16_t dur;
1634 uint32_t flags = 0;
1635 int rate, error;
1636
1637 desc = &sc->prioq.desc[sc->prioq.cur];
1638 data = &sc->prioq.data[sc->prioq.cur];
1639
1640 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1641
1642 error = bus_dmamap_load_mbuf(sc->prioq.data_dmat, data->map, m0,
1643 rt2560_dma_map_mbuf, &paddr, 0);
1644 if (error != 0) {
1645 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1646 error);
1647 ieee80211_free_node(ni);
1648 m_freem(m0);
1649 return error;
1650 }
1651
1652 if (sc->sc_drvbpf != NULL) {
1653 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1654
1655 tap->wt_flags = 0;
1656 tap->wt_rate = rate;
1657 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1658 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1659 tap->wt_antenna = sc->tx_ant;
1660
1661 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1662 }
1663
1664 data->m = m0;
1665 data->ni = NULL;
1666
1667 wh = mtod(m0, struct ieee80211_frame *);
1668
1669 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1670 flags |= RT2560_TX_ACK;
1671
1672 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, rate, ic->ic_flags) +
1673 sc->sc_sifs;
1674 *(uint16_t *)wh->i_dur = htole16(dur);
1675
1676 /* tell hardware to add timestamp for probe responses */
1677 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1678 IEEE80211_FC0_TYPE_MGT &&
1679 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1680 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1681 flags |= RT2560_TX_TIMESTAMP;
1682 }
1683
1684 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, paddr);
1685
1686 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1687 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1688 BUS_DMASYNC_PREWRITE);
1689
1690 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1691 m0->m_pkthdr.len, sc->prioq.cur, rate));
1692
1693 /* kick prio */
1694 sc->prioq.queued++;
1695 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1696 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1697
1698 ieee80211_free_node(ni);
1699
1700 return 0;
1701 }
1702
1703 /*
1704 * Build a RTS control frame.
1705 */
1706 static struct mbuf *
1707 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh,
1708 uint16_t dur)
1709 {
1710 struct ieee80211_frame_rts *rts;
1711 struct mbuf *m;
1712
1713 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1714 if (m == NULL) {
1715 sc->sc_ic.ic_stats.is_tx_nobuf++;
1716 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1717 return NULL;
1718 }
1719
1720 rts = mtod(m, struct ieee80211_frame_rts *);
1721
1722 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1723 IEEE80211_FC0_SUBTYPE_RTS;
1724 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1725 *(uint16_t *)rts->i_dur = htole16(dur);
1726 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1727 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1728
1729 m->m_pkthdr.len = m->m_len = sizeof(struct ieee80211_frame_rts);
1730
1731 return m;
1732 }
1733
1734 static int
1735 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1736 struct ieee80211_node *ni)
1737 {
1738 struct ieee80211com *ic = &sc->sc_ic;
1739 struct rt2560_tx_desc *desc;
1740 struct rt2560_tx_data *data;
1741 struct ieee80211_frame *wh;
1742 struct ieee80211_key *k;
1743 struct mbuf *mnew;
1744 bus_addr_t paddr;
1745 uint16_t dur;
1746 uint32_t flags = 0;
1747 int rate, error, ackrate, rateidx;
1748
1749 wh = mtod(m0, struct ieee80211_frame *);
1750 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1751 k = ieee80211_crypto_encap(ic, ni, m0);
1752 if (k == NULL) {
1753 m_freem(m0);
1754 return ENOBUFS;
1755 }
1756
1757 /* packet header may have moved, reset our local pointer */
1758 wh = mtod(m0, struct ieee80211_frame *);
1759 }
1760
1761 ieee80211_ratectl_findrate(ni, m0->m_pkthdr.len, &rateidx, 1);
1762 rate = IEEE80211_RS_RATE(&ni->ni_rates, rateidx);
1763
1764 ackrate = ieee80211_ack_rate(ni, rate);
1765
1766 /*
1767 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1768 * for directed frames only when the length of the MPDU is greater
1769 * than the length threshold indicated by [...]" ic_rtsthreshold.
1770 */
1771 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1772 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1773 struct mbuf *m;
1774 uint16_t dur;
1775 int rtsrate;
1776
1777 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1778 dur = ieee80211_txtime(ni, m0->m_pkthdr.len + IEEE80211_CRC_LEN,
1779 rate, ic->ic_flags) +
1780 ieee80211_txtime(ni, RAL_CTS_SIZE, rtsrate, ic->ic_flags)+
1781 ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1782 3 * sc->sc_sifs;
1783
1784 m = rt2560_get_rts(sc, wh, dur);
1785
1786 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1787 data = &sc->txq.data[sc->txq.cur_encrypt];
1788
1789 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map,
1790 m, rt2560_dma_map_mbuf, &paddr, 0);
1791 if (error != 0) {
1792 device_printf(sc->sc_dev,
1793 "could not map mbuf (error %d)\n", error);
1794 m_freem(m);
1795 m_freem(m0);
1796 return error;
1797 }
1798
1799 /* avoid multiple free() of the same node for each fragment */
1800 ieee80211_ref_node(ni);
1801
1802 data->m = m;
1803 data->ni = ni;
1804 data->rateidx = -1; /* don't count RTS */
1805
1806 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK |
1807 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, paddr);
1808
1809 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1810 BUS_DMASYNC_PREWRITE);
1811
1812 sc->txq.queued++;
1813 sc->txq.cur_encrypt =
1814 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1815
1816 /*
1817 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1818 * asynchronous data frame shall be transmitted after the CTS
1819 * frame and a SIFS period.
1820 */
1821 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1822 }
1823
1824 data = &sc->txq.data[sc->txq.cur_encrypt];
1825 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1826
1827 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map, m0,
1828 rt2560_dma_map_mbuf, &paddr, 0);
1829 if (error != 0 && error != EFBIG) {
1830 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1831 error);
1832 m_freem(m0);
1833 return error;
1834 }
1835 if (error != 0) {
1836 mnew = m_defrag(m0, MB_DONTWAIT);
1837 if (mnew == NULL) {
1838 device_printf(sc->sc_dev,
1839 "could not defragment mbuf\n");
1840 m_freem(m0);
1841 return ENOBUFS;
1842 }
1843 m0 = mnew;
1844
1845 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map,
1846 m0, rt2560_dma_map_mbuf, &paddr,
1847 0);
1848 if (error != 0) {
1849 device_printf(sc->sc_dev,
1850 "could not map mbuf (error %d)\n", error);
1851 m_freem(m0);
1852 return error;
1853 }
1854
1855 /* packet header may have moved, reset our local pointer */
1856 wh = mtod(m0, struct ieee80211_frame *);
1857 }
1858
1859 if (sc->sc_drvbpf != NULL) {
1860 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1861
1862 tap->wt_flags = 0;
1863 tap->wt_rate = rate;
1864 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1865 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1866 tap->wt_antenna = sc->tx_ant;
1867
1868 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1869 }
1870
1871 data->m = m0;
1872 data->ni = ni;
1873 data->rateidx = rateidx;
1874
1875 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1876 flags |= RT2560_TX_ACK;
1877 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1878 sc->sc_sifs;
1879 *(uint16_t *)wh->i_dur = htole16(dur);
1880 }
1881
1882 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, paddr);
1883
1884 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1885 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1886 BUS_DMASYNC_PREWRITE);
1887
1888 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1889 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate));
1890
1891 /* kick encrypt */
1892 sc->txq.queued++;
1893 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1894 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1895
1896 return 0;
1897 }
1898
1899 static void
1900 rt2560_start(struct ifnet *ifp)
1901 {
1902 struct rt2560_softc *sc = ifp->if_softc;
1903 struct ieee80211com *ic = &sc->sc_ic;
1904 struct mbuf *m0;
1905 struct ether_header *eh;
1906 struct ieee80211_node *ni;
1907
1908 /* prevent management frames from being sent if we're not ready */
1909 if (!(ifp->if_flags & IFF_RUNNING))
1910 return;
1911
1912 for (;;) {
1913 IF_POLL(&ic->ic_mgtq, m0);
1914 if (m0 != NULL) {
1915 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
1916 ifp->if_flags |= IFF_OACTIVE;
1917 break;
1918 }
1919 IF_DEQUEUE(&ic->ic_mgtq, m0);
1920
1921 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1922 m0->m_pkthdr.rcvif = NULL;
1923
1924 if (ic->ic_rawbpf != NULL)
1925 bpf_mtap(ic->ic_rawbpf, m0);
1926
1927 if (rt2560_tx_mgt(sc, m0, ni) != 0)
1928 break;
1929
1930 } else {
1931 if (ic->ic_state != IEEE80211_S_RUN)
1932 break;
1933 m0 = ifq_poll(&ifp->if_snd);
1934 if (m0 == NULL)
1935 break;
1936 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
1937 ifp->if_flags |= IFF_OACTIVE;
1938 break;
1939 }
1940 m0 = ifq_dequeue(&ifp->if_snd, m0);
1941
1942 if (m0->m_len < sizeof (struct ether_header) &&
1943 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1944 continue;
1945
1946 eh = mtod(m0, struct ether_header *);
1947 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1948 if (ni == NULL) {
1949 m_freem(m0);
1950 continue;
1951 }
1952 BPF_MTAP(ifp, m0);
1953
1954 m0 = ieee80211_encap(ic, m0, ni);
1955 if (m0 == NULL) {
1956 ieee80211_free_node(ni);
1957 continue;
1958 }
1959
1960 if (ic->ic_rawbpf != NULL)
1961 bpf_mtap(ic->ic_rawbpf, m0);
1962
1963 if (rt2560_tx_data(sc, m0, ni) != 0) {
1964 ieee80211_free_node(ni);
1965 ifp->if_oerrors++;
1966 break;
1967 }
1968 }
1969
1970 sc->sc_tx_timer = 5;
1971 ifp->if_timer = 1;
1972 }
1973 }
1974
1975 static void
1976 rt2560_watchdog(struct ifnet *ifp)
1977 {
1978 struct rt2560_softc *sc = ifp->if_softc;
1979 struct ieee80211com *ic = &sc->sc_ic;
1980
1981 ifp->if_timer = 0;
1982
1983 if (sc->sc_tx_timer > 0) {
1984 if (--sc->sc_tx_timer == 0) {
1985 device_printf(sc->sc_dev, "device timeout\n");
1986 rt2560_init(sc);
1987 ifp->if_oerrors++;
1988 return;
1989 }
1990 ifp->if_timer = 1;
1991 }
1992
1993 ieee80211_watchdog(ic);
1994 }
1995
1996 /*
1997 * This function allows for fast channel switching in monitor mode (used by
1998 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1999 * generate a new beacon frame.
2000 */
2001 static int
2002 rt2560_reset(struct ifnet *ifp)
2003 {
2004 struct rt2560_softc *sc = ifp->if_softc;
2005 struct ieee80211com *ic = &sc->sc_ic;
2006
2007 if (ic->ic_opmode != IEEE80211_M_MONITOR)
2008 return ENETRESET;
2009
2010 rt2560_set_chan(sc, ic->ic_curchan);
2011
2012 return 0;
2013 }
2014
2015 static int
2016 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
2017 {
2018 struct rt2560_softc *sc = ifp->if_softc;
2019 struct ieee80211com *ic = &sc->sc_ic;
2020 int error = 0;
2021
2022 switch (cmd) {
2023 case SIOCSIFFLAGS:
2024 if (ifp->if_flags & IFF_UP) {
2025 if (ifp->if_flags & IFF_RUNNING)
2026 rt2560_update_promisc(sc);
2027 else
2028 rt2560_init(sc);
2029 } else {
2030 if (ifp->if_flags & IFF_RUNNING)
2031 rt2560_stop(sc);
2032 }
2033 break;
2034
2035 default:
2036 error = ieee80211_ioctl(ic, cmd, data, cr);
2037 }
2038
2039 if (error == ENETRESET) {
2040 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2041 (IFF_UP | IFF_RUNNING) &&
2042 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
2043 rt2560_init(sc);
2044 error = 0;
2045 }
2046
2047 return error;
2048 }
2049
2050 static void
2051 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2052 {
2053 uint32_t tmp;
2054 int ntries;
2055
2056 for (ntries = 0; ntries < 100; ntries++) {
2057 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2058 break;
2059 DELAY(1);
2060 }
2061 if (ntries == 100) {
2062 device_printf(sc->sc_dev, "could not write to BBP\n");
2063 return;
2064 }
2065
2066 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2067 RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2068
2069 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2070
2071 /* XXX */
2072 if (reg == 17) {
2073 DPRINTF(("%s record bbp17 %#x\n", __func__, val));
2074 sc->sc_bbp17 = val;
2075 }
2076 }
2077
2078 static uint8_t
2079 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2080 {
2081 uint32_t val;
2082 int ntries;
2083
2084 for (ntries = 0; ntries < 100; ntries++) {
2085 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2086 break;
2087 DELAY(1);
2088 }
2089 if (ntries == 100) {
2090 device_printf(sc->sc_dev, "could not read from BBP\n");
2091 return 0;
2092 }
2093
2094 val = RT2560_BBP_BUSY | reg << 8;
2095 RAL_WRITE(sc, RT2560_BBPCSR, val);
2096
2097 for (ntries = 0; ntries < 100; ntries++) {
2098 val = RAL_READ(sc, RT2560_BBPCSR);
2099 if (!(val & RT2560_BBP_BUSY))
2100 return val & 0xff;
2101 DELAY(1);
2102 }
2103
2104 device_printf(sc->sc_dev, "could not read from BBP\n");
2105 return 0;
2106 }
2107
2108 static void
2109 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2110 {
2111 uint32_t tmp;
2112 int ntries;
2113
2114 for (ntries = 0; ntries < 100; ntries++) {
2115 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2116 break;
2117 DELAY(1);
2118 }
2119 if (ntries == 100) {
2120 device_printf(sc->sc_dev, "could not write to RF\n");
2121 return;
2122 }
2123
2124 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2125 (reg & 0x3);
2126 RAL_WRITE(sc, RT2560_RFCSR, tmp);
2127
2128 /* remember last written value in sc */
2129 sc->rf_regs[reg] = val;
2130
2131 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2132 }
2133
2134 static void
2135 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2136 {
2137 struct ieee80211com *ic = &sc->sc_ic;
2138 uint8_t power, tmp;
2139 u_int i, chan;
2140
2141 chan = ieee80211_chan2ieee(ic, c);
2142 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2143 return;
2144
2145 if (IEEE80211_IS_CHAN_2GHZ(c))
2146 power = min(sc->txpow[chan - 1], 31);
2147 else
2148 power = 31;
2149
2150 /* adjust txpower using ifconfig settings */
2151 power -= (100 - ic->ic_txpowlimit) / 8;
2152
2153 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2154
2155 switch (sc->rf_rev) {
2156 case RT2560_RF_2522:
2157 rt2560_rf_write(sc, RAL_RF1, 0x00814);
2158 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]);
2159 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2160 break;
2161
2162 case RT2560_RF_2523:
2163 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2164 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]);
2165 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
2166 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2167 break;
2168
2169 case RT2560_RF_2524:
2170 rt2560_rf_write(sc, RAL_RF1, 0x0c808);
2171 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]);
2172 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2173 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2174 break;
2175
2176 case RT2560_RF_2525:
2177 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2178 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2179 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2180 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2181
2182 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2183 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]);
2184 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2185 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2186 break;
2187
2188 case RT2560_RF_2525E:
2189 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2190 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]);
2191 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2192 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
2193 break;
2194
2195 case RT2560_RF_2526:
2196 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2197 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2198 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2199
2200 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]);
2201 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2202 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2203 break;
2204
2205 /* dual-band RF */
2206 case RT2560_RF_5222:
2207 for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2208
2209 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1);
2210 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2);
2211 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2212 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4);
2213 break;
2214 }
2215
2216 if (ic->ic_state != IEEE80211_S_SCAN) {
2217 /* set Japan filter bit for channel 14 */
2218 tmp = rt2560_bbp_read(sc, 70);
2219
2220 tmp &= ~RT2560_JAPAN_FILTER;
2221 if (chan == 14)
2222 tmp |= RT2560_JAPAN_FILTER;
2223
2224 rt2560_bbp_write(sc, 70, tmp);
2225
2226 /* clear CRC errors */
2227 RAL_READ(sc, RT2560_CNT0);
2228 }
2229
2230 sc->sc_sifs = IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS
2231 : IEEE80211_DUR_SIFS;
2232 }
2233
2234 /*
2235 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2236 * synchronization.
2237 */
2238 static void
2239 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2240 {
2241 struct ieee80211com *ic = &sc->sc_ic;
2242 uint16_t logcwmin, preload;
2243 uint32_t tmp;
2244
2245 /* first, disable TSF synchronization */
2246 RAL_WRITE(sc, RT2560_CSR14, 0);
2247
2248 tmp = 16 * ic->ic_bss->ni_intval;
2249 RAL_WRITE(sc, RT2560_CSR12, tmp);
2250
2251 RAL_WRITE(sc, RT2560_CSR13, 0);
2252
2253 logcwmin = 5;
2254 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2255 tmp = logcwmin << 16 | preload;
2256 RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2257
2258 /* finally, enable TSF synchronization */
2259 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2260 if (ic->ic_opmode == IEEE80211_M_STA)
2261 tmp |= RT2560_ENABLE_TSF_SYNC(1);
2262 else
2263 tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2264 RT2560_ENABLE_BEACON_GENERATOR;
2265 RAL_WRITE(sc, RT2560_CSR14, tmp);
2266
2267 DPRINTF(("enabling TSF synchronization\n"));
2268 }
2269
2270 static void
2271 rt2560_update_plcp(struct rt2560_softc *sc)
2272 {
2273 struct ieee80211com *ic = &sc->sc_ic;
2274
2275 /* no short preamble for 1Mbps */
2276 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2277
2278 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2279 /* values taken from the reference driver */
2280 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2281 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2282 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2283 } else {
2284 /* same values as above or'ed 0x8 */
2285 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2286 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2287 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2288 }
2289
2290 DPRINTF(("updating PLCP for %s preamble\n",
2291 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2292 }
2293
2294 /*
2295 * This function can be called by ieee80211_set_shortslottime(). Refer to
2296 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2297 */
2298 static void
2299 rt2560_update_slot(struct ifnet *ifp)
2300 {
2301 struct rt2560_softc *sc = ifp->if_softc;
2302 struct ieee80211com *ic = &sc->sc_ic;
2303 uint8_t slottime;
2304 uint16_t tx_sifs, tx_pifs, tx_difs, eifs;
2305 uint32_t tmp;
2306
2307 #ifdef foo
2308 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2309 #else
2310 /*
2311 * Setting slot time according to "short slot time" capability
2312 * in beacon/probe_resp seems to cause problem to acknowledge
2313 * certain AP's data frames transimitted at CCK/DS rates: the
2314 * problematic AP keeps retransmitting data frames, probably
2315 * because MAC level acks are not received by hardware.
2316 * So we cheat a little bit here by claiming we are capable of
2317 * "short slot time" but setting hardware slot time to the normal
2318 * slot time. ral(4) does not seem to have trouble to receive
2319 * frames transmitted using short slot time even if hardware
2320 * slot time is set to normal slot time. If we didn't use this
2321 * trick, we would have to claim that short slot time is not
2322 * supported; this would give relative poor TX performance
2323 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short
2324 * slot time.
2325 */
2326 slottime = (ic->ic_curmode == IEEE80211_MODE_11A) ? 9 : 20;
2327 #endif
2328
2329 /* update the MAC slot boundaries */
2330 tx_sifs = sc->sc_sifs - RT2560_TXRX_TURNAROUND;
2331 tx_pifs = tx_sifs + slottime;
2332 tx_difs = tx_sifs + 2 * slottime;
2333 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2334
2335 tmp = RAL_READ(sc, RT2560_CSR11);
2336 tmp = (tmp & ~0x1f00) | slottime << 8;
2337 RAL_WRITE(sc, RT2560_CSR11, tmp);
2338
2339 tmp = tx_pifs << 16 | tx_sifs;
2340 RAL_WRITE(sc, RT2560_CSR18, tmp);
2341
2342 tmp = eifs << 16 | tx_difs;
2343 RAL_WRITE(sc, RT2560_CSR19, tmp);
2344
2345 DPRINTF(("setting slottime to %uus\n", slottime));
2346 }
2347
2348 static void
2349 rt2560_set_basicrates(struct rt2560_softc *sc)
2350 {
2351 struct ieee80211com *ic = &sc->sc_ic;
2352
2353 /* update basic rate set */
2354 if (ic->ic_curmode == IEEE80211_MODE_11B) {
2355 /* 11b basic rates: 1, 2Mbps */
2356 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2357 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
2358 /* 11a basic rates: 6, 12, 24Mbps */
2359 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150);
2360 } else {
2361 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
2362 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f);
2363 }
2364 }
2365
2366 static void
2367 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2368 {
2369 uint32_t tmp;
2370
2371 /* set ON period to 70ms and OFF period to 30ms */
2372 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2373 RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2374 }
2375
2376 static void
2377 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2378 {
2379 uint32_t tmp;
2380
2381 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2382 RAL_WRITE(sc, RT2560_CSR5, tmp);
2383
2384 tmp = bssid[4] | bssid[5] << 8;
2385 RAL_WRITE(sc, RT2560_CSR6, tmp);
2386
2387 DPRINTF(("setting BSSID to %6D\n", bssid, ":"));
2388 }
2389
2390 static void
2391 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2392 {
2393 uint32_t tmp;
2394
2395 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2396 RAL_WRITE(sc, RT2560_CSR3, tmp);
2397
2398 tmp = addr[4] | addr[5] << 8;
2399 RAL_WRITE(sc, RT2560_CSR4, tmp);
2400
2401 DPRINTF(("setting MAC address to %6D\n", addr, ":"));
2402 }
2403
2404 static void
2405 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2406 {
2407 uint32_t tmp;
2408
2409 tmp = RAL_READ(sc, RT2560_CSR3);
2410 addr[0] = tmp & 0xff;
2411 addr[1] = (tmp >> 8) & 0xff;
2412 addr[2] = (tmp >> 16) & 0xff;
2413 addr[3] = (tmp >> 24);
2414
2415 tmp = RAL_READ(sc, RT2560_CSR4);
2416 addr[4] = tmp & 0xff;
2417 addr[5] = (tmp >> 8) & 0xff;
2418 }
2419
2420 static void
2421 rt2560_update_promisc(struct rt2560_softc *sc)
2422 {
2423 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2424 uint32_t tmp;
2425
2426 tmp = RAL_READ(sc, RT2560_RXCSR0);
2427
2428 tmp &= ~RT2560_DROP_NOT_TO_ME;
2429 if (!(ifp->if_flags & IFF_PROMISC))
2430 tmp |= RT2560_DROP_NOT_TO_ME;
2431
2432 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2433
2434 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2435 "entering" : "leaving"));
2436 }
2437
2438 static const char *
2439 rt2560_get_rf(int rev)
2440 {
2441 switch (rev) {
2442 case RT2560_RF_2522: return "RT2522";
2443 case RT2560_RF_2523: return "RT2523";
2444 case RT2560_RF_2524: return "RT2524";
2445 case RT2560_RF_2525: return "RT2525";
2446 case RT2560_RF_2525E: return "RT2525e";
2447 case RT2560_RF_2526: return "RT2526";
2448 case RT2560_RF_5222: return "RT5222";
2449 default: return "unknown";
2450 }
2451 }
2452
2453 static void
2454 rt2560_read_config(struct rt2560_softc *sc)
2455 {
2456 uint16_t val;
2457 int i, find_bbp17 = 0;
2458
2459 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2460 sc->rf_rev = (val >> 11) & 0x7;
2461 sc->hw_radio = (val >> 10) & 0x1;
2462 sc->led_mode = (val >> 6) & 0x7;
2463 sc->rx_ant = (val >> 4) & 0x3;
2464 sc->tx_ant = (val >> 2) & 0x3;
2465 sc->nb_ant = val & 0x3;
2466
2467 /* read default values for BBP registers */
2468 for (i = 0; i < 16; i++) {
2469 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2470 if (val == 0xffff || val == 0)
2471 continue;
2472 sc->bbp_prom[i].reg = val >> 8;
2473 sc->bbp_prom[i].val = val & 0xff;
2474 DPRINTF(("rom bbp reg:%u val:%#x\n",
2475 sc->bbp_prom[i].reg, sc->bbp_prom[i].val));
2476
2477 if (sc->bbp_prom[i].reg == 17) {
2478 if (sc->bbp_prom[i].val > 6)
2479 sc->sc_bbp17_dynmin = sc->bbp_prom[i].val - 6;
2480 else
2481 sc->sc_bbp17_dynmin = 0;
2482 find_bbp17 = 1;
2483 }
2484 }
2485
2486 sc->sc_bbp17_dynmax = 0x40;
2487 if (!find_bbp17)
2488 sc->sc_bbp17_dynmin = sc->sc_bbp17_dynmax - 6;
2489
2490 /* read Tx power for all b/g channels */
2491 for (i = 0; i < 14 / 2; i++) {
2492 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2493 sc->txpow[i * 2] = val & 0xff;
2494 sc->txpow[i * 2 + 1] = val >> 8;
2495 }
2496 for (i = 0; i < 14; ++i) {
2497 if (sc->txpow[i] > 31)
2498 sc->txpow[i] = 24;
2499 DPRINTF(("tx power chan %d: %u\n", i + 1, sc->txpow[i]));
2500 }
2501
2502 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);
2503 if ((val & 0xff) == 0xff)
2504 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR;
2505 else
2506 sc->rssi_corr = val & 0xff;
2507 DPRINTF(("rssi correction %d, calibrate 0x%02x\n",
2508 sc->rssi_corr, val));
2509
2510 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG1);
2511 if (val == 0xffff)
2512 val = 0;
2513 if ((val & 0x2) == 0 && sc->asic_rev >= RT2560_ASICREV_D) {
2514 DPRINTF(("capable of RX sensitivity calibration\n"));
2515 sc->sc_flags |= RT2560_FLAG_RXSNS;
2516 }
2517 }
2518
2519 static int
2520 rt2560_bbp_init(struct rt2560_softc *sc)
2521 {
2522 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2523 int i, ntries;
2524
2525 /* wait for BBP to be ready */
2526 for (ntries = 0; ntries < 100; ntries++) {
2527 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2528 break;
2529 DELAY(1);
2530 }
2531 if (ntries == 100) {
2532 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2533 return EIO;
2534 }
2535
2536 /* initialize BBP registers to default values */
2537 for (i = 0; i < N(rt2560_def_bbp); i++) {
2538 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2539 rt2560_def_bbp[i].val);
2540 }
2541
2542 /* initialize BBP registers to values stored in EEPROM */
2543 for (i = 0; i < 16; i++) {
2544 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)
2545 break;
2546 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2547 }
2548 rt2560_bbp_write(sc, 17, sc->sc_bbp17_dynmax);
2549
2550 return 0;
2551 #undef N
2552 }
2553
2554 static void
2555 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2556 {
2557 uint32_t tmp;
2558 uint8_t tx;
2559
2560 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2561 if (antenna == 1)
2562 tx |= RT2560_BBP_ANTA;
2563 else if (antenna == 2)
2564 tx |= RT2560_BBP_ANTB;
2565 else
2566 tx |= RT2560_BBP_DIVERSITY;
2567
2568 /* need to force I/Q flip for RF 2525e and 5222 */
2569 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_5222)
2570 tx |= RT2560_BBP_FLIPIQ;
2571
2572 rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2573
2574 /* update values for CCK and OFDM in BBPCSR1 */
2575 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2576 tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2577 RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2578 }
2579
2580 static void
2581 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2582 {
2583 uint8_t rx;
2584
2585 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2586 if (antenna == 1)
2587 rx |= RT2560_BBP_ANTA;
2588 else if (antenna == 2)
2589 rx |= RT2560_BBP_ANTB;
2590 else
2591 rx |= RT2560_BBP_DIVERSITY;
2592
2593 /* need to force no I/Q flip for RF 2525e */
2594 if (sc->rf_rev == RT2560_RF_2525E)
2595 rx &= ~RT2560_BBP_FLIPIQ;
2596
2597 rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2598 }
2599
2600 static void
2601 rt2560_init(void *priv)
2602 {
2603 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2604 struct rt2560_softc *sc = priv;
2605 struct ieee80211com *ic = &sc->sc_ic;
2606 struct ifnet *ifp = ic->ic_ifp;
2607 uint32_t tmp;
2608 int i;
2609
2610 rt2560_stop(sc);
2611
2612 /* setup tx rings */
2613 tmp = RT2560_PRIO_RING_COUNT << 24 |
2614 RT2560_ATIM_RING_COUNT << 16 |
2615 RT2560_TX_RING_COUNT << 8 |
2616 RT2560_TX_DESC_SIZE;
2617
2618 /* rings must be initialized in this exact order */
2619 RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2620 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2621 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2622 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2623 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2624
2625 /* setup rx ring */
2626 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2627
2628 RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2629 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2630
2631 /* initialize MAC registers to default values */
2632 for (i = 0; i < N(rt2560_def_mac); i++)
2633 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2634
2635 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2636 rt2560_set_macaddr(sc, ic->ic_myaddr);
2637
2638 /* set basic rate set (will be updated later) */
2639 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2640
2641 rt2560_update_slot(ifp);
2642 rt2560_update_plcp(sc);
2643 rt2560_update_led(sc, 0, 0);
2644
2645 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2646 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2647
2648 if (rt2560_bbp_init(sc) != 0) {
2649 rt2560_stop(sc);
2650 return;
2651 }
2652
2653 rt2560_set_txantenna(sc, sc->tx_ant);
2654 rt2560_set_rxantenna(sc, sc->rx_ant);
2655
2656 /* set default BSS channel */
2657 rt2560_set_chan(sc, ic->ic_curchan);
2658
2659 /* kick Rx */
2660 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2661 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2662 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2663 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2664 tmp |= RT2560_DROP_TODS;
2665 if (!(ifp->if_flags & IFF_PROMISC))
2666 tmp |= RT2560_DROP_NOT_TO_ME;
2667 }
2668 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2669
2670 /* clear old FCS and Rx FIFO errors */
2671 RAL_READ(sc, RT2560_CNT0);
2672 RAL_READ(sc, RT2560_CNT4);
2673
2674 /* clear any pending interrupts */
2675 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2676
2677 /* enable interrupts */
2678 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2679
2680 ifp->if_flags &= ~IFF_OACTIVE;
2681 ifp->if_flags |= IFF_RUNNING;
2682
2683 /* XXX */
2684 if (ic->ic_flags & IEEE80211_F_PRIVACY) {
2685 int i;
2686
2687 ic->ic_flags &= ~IEEE80211_F_DROPUNENC;
2688 for (i = 0; i < IEEE80211_WEP_NKID; ++i) {
2689 struct ieee80211_key *wk = &ic->ic_nw_keys[i];
2690
2691 if (wk->wk_keylen == 0)
2692 continue;
2693 if (wk->wk_flags & IEEE80211_KEY_XMIT)
2694 wk->wk_flags |= IEEE80211_KEY_SWCRYPT;
2695 }
2696 }
2697
2698 sc->sc_avgrssi = -1;
2699
2700 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2701 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2702 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2703 } else {
2704 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2705 }
2706 #undef N
2707 }
2708
2709 void
2710 rt2560_stop(void *priv)
2711 {
2712 struct rt2560_softc *sc = priv;
2713 struct ieee80211com *ic = &sc->sc_ic;
2714 struct ifnet *ifp = ic->ic_ifp;
2715
2716 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2717
2718 sc->sc_tx_timer = 0;
2719 ifp->if_timer = 0;
2720 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2721
2722 /* abort Tx */
2723 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2724
2725 /* disable Rx */
2726 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2727
2728 /* reset ASIC (imply reset BBP) */
2729 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2730 RAL_WRITE(sc, RT2560_CSR1, 0);
2731
2732 /* disable interrupts */
2733 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2734
2735 /* reset Tx and Rx rings */
2736 rt2560_reset_tx_ring(sc, &sc->txq);
2737 rt2560_reset_tx_ring(sc, &sc->atimq);
2738 rt2560_reset_tx_ring(sc, &sc->prioq);
2739 rt2560_reset_tx_ring(sc, &sc->bcnq);
2740 rt2560_reset_rx_ring(sc, &sc->rxq);
2741 }
2742
2743 static void
2744 rt2560_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2745 bus_size_t map_size __unused, int error)
2746 {
2747 if (error)
2748 return;
2749
2750 KASSERT(nseg == 1, ("too many dma segments\n"));
2751 *((bus_addr_t *)arg) = seg->ds_addr;
2752 }
2753
2754 static void *
2755 rt2560_ratectl_attach(struct ieee80211com *ic, u_int rc)
2756 {
2757 struct rt2560_softc *sc = ic->ic_if.if_softc;
2758
2759 switch (rc) {
2760 case IEEE80211_RATECTL_SAMPLE:
2761 return &sc->sc_sample_param;
2762 case IEEE80211_RATECTL_ONOE:
2763 return &sc->sc_onoe_param;
2764 case IEEE80211_RATECTL_NONE:
2765 /* This could only happen during detaching */
2766 return NULL;
2767 default:
2768 panic("unknown rate control algo %u\n", rc);
2769 return NULL;
2770 }
2771 }
2772
2773 static void
2774 rt2560_calib_rxsensitivity(struct rt2560_softc *sc, uint32_t false_cca)
2775 {
2776 #define MID_RX_SENSITIVITY 0x41
2777
2778 int rssi_dbm;
2779
2780 if (sc->sc_ic.ic_state != IEEE80211_S_RUN)
2781 return;
2782
2783 rssi_dbm = sc->sc_avgrssi + RT2560_NOISE_FLOOR;
2784 DPRINTF(("rssi dbm %d\n", rssi_dbm));
2785
2786 if (rssi_dbm < -80) {
2787 /* Signal is too weak */
2788 return;
2789 } else if (rssi_dbm >= -74) {
2790 uint8_t bbp17;
2791
2792 if (rssi_dbm >= -58)
2793 bbp17 = 0x50;
2794 else
2795 bbp17 = MID_RX_SENSITIVITY;
2796 if (sc->sc_bbp17 != bbp17)
2797 rt2560_bbp_write(sc, 17, bbp17);
2798 return;
2799 }
2800
2801 if (sc->sc_bbp17 > MID_RX_SENSITIVITY) {
2802 rt2560_bbp_write(sc, 17, MID_RX_SENSITIVITY);
2803 return;
2804 }
2805
2806 if (false_cca > 512 && sc->sc_bbp17 > sc->sc_bbp17_dynmin)
2807 rt2560_bbp_write(sc, 17, sc->sc_bbp17 - 1);
2808 else if (false_cca < 100 && sc->sc_bbp17 < sc->sc_bbp17_dynmax)
2809 rt2560_bbp_write(sc, 17, sc->sc_bbp17 + 1);
2810
2811 #undef MID_RX_SENSITIVITY
2812 }
2813
2814 static void
2815 rt2560_calibrate(void *xsc)
2816 {
2817 struct rt2560_softc *sc = xsc;
2818 struct ifnet *ifp = &sc->sc_ic.ic_if;
2819 uint32_t false_cca;
2820
2821 lwkt_serialize_enter(ifp->if_serializer);
2822
2823 false_cca = RAL_READ(sc, RT2560_CNT3) & 0xffff;
2824 DPRINTF(("false CCA %u\n", false_cca));
2825
2826 if (sc->sc_calib_rxsns)
2827 rt2560_calib_rxsensitivity(sc, false_cca);
2828
2829 callout_reset(&sc->calib_ch, hz, rt2560_calibrate, sc);
2830
2831 lwkt_serialize_exit(ifp->if_serializer);
2832 }
DragonFly BSD