sys/platform/vkernel/i386/swtch.s

   1 /*
   2  * Copyright (c) 2003,2004 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Matthew Dillon <dillon@backplane.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * Copyright (c) 1990 The Regents of the University of California.
  35  * All rights reserved.
  36  *
  37  * This code is derived from software contributed to Berkeley by
  38  * William Jolitz.
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in the
  47  *    documentation and/or other materials provided with the distribution.
  48  * 3. All advertising materials mentioning features or use of this software
  49  *    must display the following acknowledgement:
  50  *      This product includes software developed by the University of
  51  *      California, Berkeley and its contributors.
  52  * 4. Neither the name of the University nor the names of its contributors
  53  *    may be used to endorse or promote products derived from this software
  54  *    without specific prior written permission.
  55  *
  56  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  57  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  58  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  59  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  60  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  61  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  62  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  63  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  64  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  65  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  66  * SUCH DAMAGE.
  67  *
  68  * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
  69  * $DragonFly: src/sys/platform/vkernel/i386/swtch.s,v 1.8 2007/07/01 02:51:43 dillon Exp $
  70  */
  71
  72 #include "use_npx.h"
  73
  74 #include <sys/rtprio.h>
  75
  76 #include <machine/asmacros.h>
  77 #include <machine/segments.h>
  78
  79 #include <machine/pmap.h>
  80 #include <machine/lock.h>
  81
  82 #include "assym.s"
  83
  84 #if defined(SMP)
  85 #define MPLOCKED        lock ;
  86 #else
  87 #define MPLOCKED
  88 #endif
  89
  90         .data
  91
  92         .globl  panic
  93
  94 #if defined(SWTCH_OPTIM_STATS)
  95         .globl  swtch_optim_stats, tlb_flush_count
  96 swtch_optim_stats:      .long   0               /* number of _swtch_optims */
  97 tlb_flush_count:        .long   0
  98 #endif
  99
 100         .text
 101
 102
 103 /*
 104  * cpu_heavy_switch(next_thread)
 105  *
 106  *      Switch from the current thread to a new thread.  This entry
 107  *      is normally called via the thread->td_switch function, and will
 108  *      only be called when the current thread is a heavy weight process.
 109  *
 110  *      Some instructions have been reordered to reduce pipeline stalls.
 111  *
 112  *      YYY disable interrupts once giant is removed.
 113  */
 114 ENTRY(cpu_heavy_switch)
 115         /*
 116          * Save general regs
 117          */
 118         movl    PCPU(curthread),%ecx
 119         movl    (%esp),%eax                     /* (reorder optimization) */
 120         movl    TD_PCB(%ecx),%edx               /* EDX = PCB */
 121         movl    %eax,PCB_EIP(%edx)              /* return PC may be modified */
 122         movl    %ebx,PCB_EBX(%edx)
 123         movl    %esp,PCB_ESP(%edx)
 124         movl    %ebp,PCB_EBP(%edx)
 125         movl    %esi,PCB_ESI(%edx)
 126         movl    %edi,PCB_EDI(%edx)
 127
 128         movl    %ecx,%ebx                       /* EBX = curthread */
 129         movl    TD_LWP(%ecx),%ecx
 130         movl    PCPU(cpuid), %eax
 131         movl    LWP_VMSPACE(%ecx), %ecx         /* ECX = vmspace */
 132         MPLOCKED btrl   %eax, VM_PMAP+PM_ACTIVE(%ecx)
 133
 134         /*
 135          * Push the LWKT switch restore function, which resumes a heavy
 136          * weight process.  Note that the LWKT switcher is based on
 137          * TD_SP, while the heavy weight process switcher is based on
 138          * PCB_ESP.  TD_SP is usually two ints pushed relative to
 139          * PCB_ESP.  We push the flags for later restore by cpu_heavy_restore.
 140          */
 141         pushfl
 142         pushl   $cpu_heavy_restore
 143         movl    %esp,TD_SP(%ebx)
 144
 145         /*
 146          * Save debug regs if necessary
 147          */
 148         movb    PCB_FLAGS(%edx),%al
 149         andb    $PCB_DBREGS,%al
 150         jz      1f                              /* no, skip over */
 151         movl    %dr7,%eax                       /* yes, do the save */
 152         movl    %eax,PCB_DR7(%edx)
 153         andl    $0x0000fc00, %eax               /* disable all watchpoints */
 154         movl    %eax,%dr7
 155         movl    %dr6,%eax
 156         movl    %eax,PCB_DR6(%edx)
 157         movl    %dr3,%eax
 158         movl    %eax,PCB_DR3(%edx)
 159         movl    %dr2,%eax
 160         movl    %eax,PCB_DR2(%edx)
 161         movl    %dr1,%eax
 162         movl    %eax,PCB_DR1(%edx)
 163         movl    %dr0,%eax
 164         movl    %eax,PCB_DR0(%edx)
 165 1:
 166
 167 #if NNPX > 0
 168         /*
 169          * Save the FP state if we have used the FP.  Note that calling
 170          * npxsave will NULL out PCPU(npxthread).
 171          */
 172         cmpl    %ebx,PCPU(npxthread)
 173         jne     1f
 174         pushl   TD_SAVEFPU(%ebx)
 175         call    npxsave                 /* do it in a big C function */
 176         addl    $4,%esp                 /* EAX, ECX, EDX trashed */
 177 1:
 178 #endif  /* NNPX > 0 */
 179
 180         /*
 181          * Switch to the next thread, which was passed as an argument
 182          * to cpu_heavy_switch().  Due to the eflags and switch-restore
 183          * function we pushed, the argument is at 12(%esp).  Set the current
 184          * thread, load the stack pointer, and 'ret' into the switch-restore
 185          * function.
 186          *
 187          * The switch restore function expects the new thread to be in %eax
 188          * and the old one to be in %ebx.
 189          *
 190          * There is a one-instruction window where curthread is the new
 191          * thread but %esp still points to the old thread's stack, but
 192          * we are protected by a critical section so it is ok.
 193          */
 194         movl    12(%esp),%eax           /* EAX = newtd, EBX = oldtd */
 195         movl    %eax,PCPU(curthread)
 196         movl    TD_SP(%eax),%esp
 197         ret
 198
 199 /*
 200  *  cpu_exit_switch()
 201  *
 202  *      The switch function is changed to this when a thread is going away
 203  *      for good.  We have to ensure that the MMU state is not cached, and
 204  *      we don't bother saving the existing thread state before switching.
 205  *
 206  *      At this point we are in a critical section and this cpu owns the
 207  *      thread's token, which serves as an interlock until the switchout is
 208  *      complete.
 209  */
 210 ENTRY(cpu_exit_switch)
 211         /*
 212          * Get us out of the vmspace
 213          */
 214 #if 0
 215         movl    IdlePTD,%ecx
 216         movl    %cr3,%eax
 217         cmpl    %ecx,%eax
 218         je      1f
 219         movl    %ecx,%cr3
 220 1:
 221 #endif
 222         movl    PCPU(curthread),%ebx
 223
 224         /*
 225          * If this is a process/lwp, deactivate the pmap after we've
 226          * switched it out.
 227          */
 228         movl    TD_LWP(%ebx),%ecx
 229         testl   %ecx,%ecx
 230         jz      2f
 231         movl    PCPU(cpuid), %eax
 232         movl    LWP_VMSPACE(%ecx), %ecx         /* ECX = vmspace */
 233         MPLOCKED btrl   %eax, VM_PMAP+PM_ACTIVE(%ecx)
 234 2:
 235         /*
 236          * Switch to the next thread.  RET into the restore function, which
 237          * expects the new thread in EAX and the old in EBX.
 238          *
 239          * There is a one-instruction window where curthread is the new
 240          * thread but %esp still points to the old thread's stack, but
 241          * we are protected by a critical section so it is ok.
 242          */
 243         movl    4(%esp),%eax
 244         movl    %eax,PCPU(curthread)
 245         movl    TD_SP(%eax),%esp
 246         ret
 247
 248 /*
 249  * cpu_heavy_restore()  (current thread in %eax on entry)
 250  *
 251  *      Restore the thread after an LWKT switch.  This entry is normally
 252  *      called via the LWKT switch restore function, which was pulled
 253  *      off the thread stack and jumped to.
 254  *
 255  *      This entry is only called if the thread was previously saved
 256  *      using cpu_heavy_switch() (the heavy weight process thread switcher),
 257  *      or when a new process is initially scheduled.  The first thing we
 258  *      do is clear the TDF_RUNNING bit in the old thread and set it in the
 259  *      new thread.
 260  *
 261  *      NOTE: The lwp may be in any state, not necessarily LSRUN, because
 262  *      a preemption switch may interrupt the process and then return via
 263  *      cpu_heavy_restore.
 264  *
 265  *      YYY theoretically we do not have to restore everything here, a lot
 266  *      of this junk can wait until we return to usermode.  But for now
 267  *      we restore everything.
 268  *
 269  *      YYY the PCB crap is really crap, it makes startup a bitch because
 270  *      we can't switch away.
 271  *
 272  *      YYY note: spl check is done in mi_switch when it splx()'s.
 273  */
 274
 275 ENTRY(cpu_heavy_restore)
 276         popfl
 277         movl    TD_PCB(%eax),%edx               /* EDX = PCB */
 278         movl    TD_LWP(%eax),%ecx
 279
 280 #if defined(SWTCH_OPTIM_STATS)
 281         incl    _swtch_optim_stats
 282 #endif
 283         /*
 284          * Tell the pmap that our cpu is using the VMSPACE now.  We cannot
 285          * safely test/reload %cr3 until after we have set the bit in the
 286          * pmap (remember, we do not hold the MP lock in the switch code).
 287          */
 288         movl    LWP_VMSPACE(%ecx), %ecx         /* ECX = vmspace */
 289         movl    PCPU(cpuid), %esi
 290         MPLOCKED btsl   %esi, VM_PMAP+PM_ACTIVE(%ecx)
 291
 292         /*
 293          * Restore the MMU address space.  If it is the same as the last
 294          * thread we don't have to invalidate the tlb (i.e. reload cr3).
 295          * YYY which naturally also means that the PM_ACTIVE bit had better
 296          * already have been set before we set it above, check? YYY
 297          */
 298 #if 0
 299         movl    %cr3,%esi
 300         movl    PCB_CR3(%edx),%ecx
 301         cmpl    %esi,%ecx
 302         je      4f
 303 #if defined(SWTCH_OPTIM_STATS)
 304         decl    _swtch_optim_stats
 305         incl    _tlb_flush_count
 306 #endif
 307         movl    %ecx,%cr3
 308 4:
 309 #endif
 310         /*
 311          * Clear TDF_RUNNING flag in old thread only after cleaning up
 312          * %cr3.  The target thread is already protected by being TDF_RUNQ
 313          * so setting TDF_RUNNING isn't as big a deal.
 314          */
 315         andl    $~TDF_RUNNING,TD_FLAGS(%ebx)
 316         orl     $TDF_RUNNING,TD_FLAGS(%eax)
 317
 318 #if 0
 319         /*
 320          * Deal with the PCB extension, restore the private tss
 321          */
 322         movl    PCB_EXT(%edx),%edi      /* check for a PCB extension */
 323         movl    $1,%ebx                 /* maybe mark use of a private tss */
 324         testl   %edi,%edi
 325         jnz     2f
 326
 327         /*
 328          * Going back to the common_tss.  We may need to update TSS_ESP0
 329          * which sets the top of the supervisor stack when entering from
 330          * usermode.  The PCB is at the top of the stack but we need another
 331          * 16 bytes to take vm86 into account.
 332          */
 333         leal    -16(%edx),%ebx
 334         movl    %ebx, PCPU(common_tss) + TSS_ESP0
 335
 336         cmpl    $0,PCPU(private_tss)    /* don't have to reload if      */
 337         je      3f                      /* already using the common TSS */
 338
 339         subl    %ebx,%ebx               /* unmark use of private tss */
 340
 341         /*
 342          * Get the address of the common TSS descriptor for the ltr.
 343          * There is no way to get the address of a segment-accessed variable
 344          * so we store a self-referential pointer at the base of the per-cpu
 345          * data area and add the appropriate offset.
 346          */
 347         movl    $gd_common_tssd, %edi
 348         addl    %fs:0, %edi
 349
 350         /*
 351          * Move the correct TSS descriptor into the GDT slot, then reload
 352          * ltr.
 353          */
 354 2:
 355         movl    %ebx,PCPU(private_tss)          /* mark/unmark private tss */
 356         movl    PCPU(tss_gdt), %ebx             /* entry in GDT */
 357         movl    0(%edi), %eax
 358         movl    %eax, 0(%ebx)
 359         movl    4(%edi), %eax
 360         movl    %eax, 4(%ebx)
 361         movl    $GPROC0_SEL*8, %esi             /* GSEL(entry, SEL_KPL) */
 362         ltr     %si
 363 3:
 364 #endif
 365         /*
 366          * Restore general registers.
 367          */
 368         movl    PCB_EBX(%edx),%ebx
 369         movl    PCB_ESP(%edx),%esp
 370         movl    PCB_EBP(%edx),%ebp
 371         movl    PCB_ESI(%edx),%esi
 372         movl    PCB_EDI(%edx),%edi
 373         movl    PCB_EIP(%edx),%eax
 374         movl    %eax,(%esp)
 375
 376 #if 0
 377         /*
 378          * Restore the user LDT if we have one
 379          */
 380         cmpl    $0, PCB_USERLDT(%edx)
 381         jnz     1f
 382         movl    _default_ldt,%eax
 383         cmpl    PCPU(currentldt),%eax
 384         je      2f
 385         lldt    _default_ldt
 386         movl    %eax,PCPU(currentldt)
 387         jmp     2f
 388 1:      pushl   %edx
 389         call    set_user_ldt
 390         popl    %edx
 391 2:
 392 #endif
 393 #if 0
 394         /*
 395          * Restore the user TLS if we have one
 396          */
 397         pushl   %edx
 398         call    set_user_TLS
 399         popl    %edx
 400 #endif
 401
 402         /*
 403          * Restore the DEBUG register state if necessary.
 404          */
 405         movb    PCB_FLAGS(%edx),%al
 406         andb    $PCB_DBREGS,%al
 407         jz      1f                              /* no, skip over */
 408         movl    PCB_DR6(%edx),%eax              /* yes, do the restore */
 409         movl    %eax,%dr6
 410         movl    PCB_DR3(%edx),%eax
 411         movl    %eax,%dr3
 412         movl    PCB_DR2(%edx),%eax
 413         movl    %eax,%dr2
 414         movl    PCB_DR1(%edx),%eax
 415         movl    %eax,%dr1
 416         movl    PCB_DR0(%edx),%eax
 417         movl    %eax,%dr0
 418         movl    %dr7,%eax                /* load dr7 so as not to disturb */
 419         andl    $0x0000fc00,%eax         /*   reserved bits               */
 420         pushl   %ebx
 421         movl    PCB_DR7(%edx),%ebx
 422         andl    $~0x0000fc00,%ebx
 423         orl     %ebx,%eax
 424         popl    %ebx
 425         movl    %eax,%dr7
 426 1:
 427
 428         ret
 429
 430 /*
 431  * savectx(pcb)
 432  *
 433  * Update pcb, saving current processor state.
 434  */
 435 ENTRY(savectx)
 436         /* fetch PCB */
 437         movl    4(%esp),%ecx
 438
 439         /* caller's return address - child won't execute this routine */
 440         movl    (%esp),%eax
 441         movl    %eax,PCB_EIP(%ecx)
 442         movl    %ebx,PCB_EBX(%ecx)
 443         movl    %esp,PCB_ESP(%ecx)
 444         movl    %ebp,PCB_EBP(%ecx)
 445         movl    %esi,PCB_ESI(%ecx)
 446         movl    %edi,PCB_EDI(%ecx)
 447
 448 #if NNPX > 0
 449         /*
 450          * If npxthread == NULL, then the npx h/w state is irrelevant and the
 451          * state had better already be in the pcb.  This is true for forks
 452          * but not for dumps (the old book-keeping with FP flags in the pcb
 453          * always lost for dumps because the dump pcb has 0 flags).
 454          *
 455          * If npxthread != NULL, then we have to save the npx h/w state to
 456          * npxthread's pcb and copy it to the requested pcb, or save to the
 457          * requested pcb and reload.  Copying is easier because we would
 458          * have to handle h/w bugs for reloading.  We used to lose the
 459          * parent's npx state for forks by forgetting to reload.
 460          */
 461         movl    PCPU(npxthread),%eax
 462         testl   %eax,%eax
 463         je      1f
 464
 465         pushl   %ecx                    /* target pcb */
 466         movl    TD_SAVEFPU(%eax),%eax   /* originating savefpu area */
 467         pushl   %eax
 468
 469         pushl   %eax
 470         call    npxsave
 471         addl    $4,%esp
 472
 473         popl    %eax
 474         popl    %ecx
 475
 476         pushl   $PCB_SAVEFPU_SIZE
 477         leal    PCB_SAVEFPU(%ecx),%ecx
 478         pushl   %ecx
 479         pushl   %eax
 480         call    bcopy
 481         addl    $12,%esp
 482 #endif  /* NNPX > 0 */
 483
 484 1:
 485         ret
 486
 487 /*
 488  * cpu_idle_restore()   (current thread in %eax on entry) (one-time execution)
 489  *
 490  *      Don't bother setting up any regs other then %ebp so backtraces
 491  *      don't die.  This restore function is used to bootstrap into the
 492  *      cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
 493  *      switching.
 494  *
 495  *      Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
 496  *
 497  *      If we are an AP we have to call ap_init() before jumping to
 498  *      cpu_idle().  ap_init() will synchronize with the BP and finish
 499  *      setting up various ncpu-dependant globaldata fields.  This may
 500  *      happen on UP as well as SMP if we happen to be simulating multiple
 501  *      cpus.
 502  */
 503 ENTRY(cpu_idle_restore)
 504         /* cli */
 505         movl    $0,%ebp
 506         pushl   $0
 507         andl    $~TDF_RUNNING,TD_FLAGS(%ebx)
 508         orl     $TDF_RUNNING,TD_FLAGS(%eax)
 509 #ifdef SMP
 510         cmpl    $0,PCPU(cpuid)
 511         je      1f
 512         call    ap_init
 513 1:
 514 #endif
 515         /* sti */
 516         jmp     cpu_idle
 517
 518 /*
 519  * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
 520  *
 521  *      Don't bother setting up any regs other then %ebp so backtraces
 522  *      don't die.  This restore function is used to bootstrap into an
 523  *      LWKT based kernel thread only.  cpu_lwkt_switch() will be used
 524  *      after this.
 525  *
 526  *      Since all of our context is on the stack we are reentrant and
 527  *      we can release our critical section and enable interrupts early.
 528  */
 529 ENTRY(cpu_kthread_restore)
 530         /*sti*/
 531         movl    TD_PCB(%eax),%edx
 532         movl    $0,%ebp
 533         andl    $~TDF_RUNNING,TD_FLAGS(%ebx)
 534         orl     $TDF_RUNNING,TD_FLAGS(%eax)
 535         subl    $TDPRI_CRIT,TD_PRI(%eax)
 536         popl    %eax            /* kthread exit function */
 537         pushl   PCB_EBX(%edx)   /* argument to ESI function */
 538         pushl   %eax            /* set exit func as return address */
 539         movl    PCB_ESI(%edx),%eax
 540         jmp     *%eax
 541
 542 /*
 543  * cpu_lwkt_switch()
 544  *
 545  *      Standard LWKT switching function.  Only non-scratch registers are
 546  *      saved and we don't bother with the MMU state or anything else.
 547  *
 548  *      This function is always called while in a critical section.
 549  *
 550  *      There is a one-instruction window where curthread is the new
 551  *      thread but %esp still points to the old thread's stack, but
 552  *      we are protected by a critical section so it is ok.
 553  *
 554  *      YYY BGL, SPL
 555  */
 556 ENTRY(cpu_lwkt_switch)
 557         pushl   %ebp    /* note: GDB hacked to locate ebp relative to td_sp */
 558         pushl   %ebx
 559         movl    PCPU(curthread),%ebx
 560         pushl   %esi
 561         pushl   %edi
 562         pushfl
 563         /* warning: adjust movl into %eax below if you change the pushes */
 564
 565 #if NNPX > 0
 566         /*
 567          * Save the FP state if we have used the FP.  Note that calling
 568          * npxsave will NULL out PCPU(npxthread).
 569          *
 570          * We have to deal with the FP state for LWKT threads in case they
 571          * happen to get preempted or block while doing an optimized
 572          * bzero/bcopy/memcpy.
 573          */
 574         cmpl    %ebx,PCPU(npxthread)
 575         jne     1f
 576         pushl   TD_SAVEFPU(%ebx)
 577         call    npxsave                 /* do it in a big C function */
 578         addl    $4,%esp                 /* EAX, ECX, EDX trashed */
 579 1:
 580 #endif  /* NNPX > 0 */
 581
 582         movl    4+20(%esp),%eax         /* switch to this thread */
 583         pushl   $cpu_lwkt_restore
 584         movl    %esp,TD_SP(%ebx)
 585         movl    %eax,PCPU(curthread)
 586         movl    TD_SP(%eax),%esp
 587
 588         /*
 589          * eax contains new thread, ebx contains old thread.
 590          */
 591         ret
 592
 593 /*
 594  * cpu_lwkt_restore()   (current thread in %eax on entry)
 595  *
 596  *      Standard LWKT restore function.  This function is always called
 597  *      while in a critical section.
 598  *
 599  *      Warning: due to preemption the restore function can be used to
 600  *      'return' to the original thread.  Interrupt disablement must be
 601  *      protected through the switch so we cannot run splz here.
 602  */
 603 ENTRY(cpu_lwkt_restore)
 604         andl    $~TDF_RUNNING,TD_FLAGS(%ebx)
 605         orl     $TDF_RUNNING,TD_FLAGS(%eax)
 606         popfl
 607         popl    %edi
 608         popl    %esi
 609         popl    %ebx
 610         popl    %ebp
 611         ret
 612
 613 /*
 614  * bootstrap_idle()
 615  *
 616  * Make AP become the idle loop.
 617  */
 618 ENTRY(bootstrap_idle)
 619         movl    PCPU(curthread),%eax
 620         movl    %eax,%ebx
 621         movl    TD_SP(%eax),%esp
 622         ret