2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.42 2007/10/23 03:04:49 y0netan1 Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
64 #include <sys/module.h>
66 #include <sys/dkstat.h>
67 #include <sys/fcntl.h>
68 #include <sys/interrupt.h>
69 #include <sys/kernel.h>
70 #include <sys/syslog.h>
71 #include <sys/sysctl.h>
74 #include <sys/timepps.h>
75 #include <sys/thread2.h>
77 #include <machine/limits.h>
79 #include <bus/isa/isareg.h>
80 #include <bus/isa/isavar.h>
82 #include <bus/pci/pcireg.h>
83 #include <bus/pci/pcivar.h>
86 #include <dev/misc/puc/pucvar.h>
88 #include <machine/lock.h>
90 #include <machine/clock.h>
92 #include <machine/lock.h>
96 #include "sio_private.h"
99 #include "../ic_layer/esp.h"
102 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
104 #define CALLOUT_MASK 0x80
105 #define CONTROL_MASK 0x60
106 #define CONTROL_INIT_STATE 0x20
107 #define CONTROL_LOCK_STATE 0x40
108 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
109 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
111 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
114 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
116 #define sio_getreg(com, off) \
117 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
118 #define sio_setreg(com, off, value) \
119 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
123 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
124 * than the other bits so that they can be tested as a group without masking
127 * The following com and tty flags correspond closely:
128 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
130 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
131 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
132 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
133 * TS_FLUSH is not used.
134 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
135 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
137 #define CS_BUSY 0x80 /* output in progress */
138 #define CS_TTGO 0x40 /* output not stopped by XOFF */
139 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
140 #define CS_CHECKMSR 1 /* check of MSR scheduled */
141 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
142 #define CS_DTR_OFF 0x10 /* DTR held off */
143 #define CS_ODONE 4 /* output completed */
144 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
145 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
147 static char const * const error_desc
[] = {
150 #define CE_INTERRUPT_BUF_OVERFLOW 1
151 "interrupt-level buffer overflow",
152 #define CE_TTY_BUF_OVERFLOW 2
153 "tty-level buffer overflow",
157 static int espattach (struct com_s
*com
, Port_t esp_port
);
159 static int sio_isa_attach (device_t dev
);
161 static timeout_t siobusycheck
;
162 static u_int
siodivisor (u_long rclk
, speed_t speed
);
163 static timeout_t siodtrwakeup
;
164 static void comhardclose (struct com_s
*com
);
165 static void sioinput (struct com_s
*com
);
166 static void siointr1 (struct com_s
*com
);
167 static void siointr (void *arg
);
168 static int commctl (struct com_s
*com
, int bits
, int how
);
169 static int comparam (struct tty
*tp
, struct termios
*t
);
170 static inthand2_t siopoll
;
171 static int sio_isa_probe (device_t dev
);
172 static void siosettimeout (void);
173 static int siosetwater (struct com_s
*com
, speed_t speed
);
174 static void comstart (struct tty
*tp
);
175 static void comstop (struct tty
*tp
, int rw
);
176 static timeout_t comwakeup
;
177 static void disc_optim (struct tty
*tp
, struct termios
*t
,
181 static int sio_pci_attach (device_t dev
);
182 static void sio_pci_kludge_unit (device_t dev
);
183 static int sio_pci_probe (device_t dev
);
184 #endif /* NPCI > 0 */
187 static int sio_puc_attach (device_t dev
);
188 static int sio_puc_probe (device_t dev
);
189 #endif /* NPUC > 0 */
191 static char driver_name
[] = "sio";
193 /* table and macro for fast conversion from a unit number to its com struct */
194 devclass_t sio_devclass
;
195 #define com_addr(unit) ((struct com_s *) \
196 devclass_get_softc(sio_devclass, unit))
198 static device_method_t sio_isa_methods
[] = {
199 /* Device interface */
200 DEVMETHOD(device_probe
, sio_isa_probe
),
201 DEVMETHOD(device_attach
, sio_isa_attach
),
206 static driver_t sio_isa_driver
= {
209 sizeof(struct com_s
),
213 static device_method_t sio_pci_methods
[] = {
214 /* Device interface */
215 DEVMETHOD(device_probe
, sio_pci_probe
),
216 DEVMETHOD(device_attach
, sio_pci_attach
),
221 static driver_t sio_pci_driver
= {
224 sizeof(struct com_s
),
226 #endif /* NPCI > 0 */
229 static device_method_t sio_puc_methods
[] = {
230 /* Device interface */
231 DEVMETHOD(device_probe
, sio_puc_probe
),
232 DEVMETHOD(device_attach
, sio_puc_attach
),
237 static driver_t sio_puc_driver
= {
240 sizeof(struct com_s
),
242 #endif /* NPUC > 0 */
244 static d_open_t sioopen
;
245 static d_close_t sioclose
;
246 static d_read_t sioread
;
247 static d_write_t siowrite
;
248 static d_ioctl_t sioioctl
;
250 #define CDEV_MAJOR 28
251 static struct dev_ops sio_ops
= {
252 { driver_name
, CDEV_MAJOR
, D_TTY
| D_KQFILTER
},
259 .d_kqfilter
= ttykqfilter
263 static volatile speed_t comdefaultrate
= CONSPEED
;
264 static u_long comdefaultrclk
= DEFAULT_RCLK
;
265 SYSCTL_ULONG(_machdep
, OID_AUTO
, conrclk
, CTLFLAG_RW
, &comdefaultrclk
, 0, "");
266 static u_int com_events
; /* input chars + weighted output completions */
267 static Port_t siocniobase
;
268 static int siocnunit
;
269 static Port_t siogdbiobase
;
270 static int siogdbunit
= -1;
271 static bool_t sio_registered
;
272 static int sio_timeout
;
273 static int sio_timeouts_until_log
;
274 static struct callout sio_timeout_handle
;
275 static int sio_numunits
;
278 /* XXX configure this properly. */
279 static Port_t likely_com_ports
[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
280 static Port_t likely_esp_ports
[] = { 0x140, 0x180, 0x280, 0 };
284 * handle sysctl read/write requests for console speed
286 * In addition to setting comdefaultrate for I/O through /dev/console,
287 * also set the initial and lock values for the /dev/ttyXX device
288 * if there is one associated with the console. Finally, if the /dev/tty
289 * device has already been open, change the speed on the open running port
294 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS
)
301 newspeed
= comdefaultrate
;
303 error
= sysctl_handle_opaque(oidp
, &newspeed
, sizeof newspeed
, req
);
304 if (error
|| !req
->newptr
)
307 comdefaultrate
= newspeed
;
309 if (comconsole
< 0) /* serial console not selected? */
312 com
= com_addr(comconsole
);
317 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
318 * (note, the lock rates really are boolean -- if non-zero, disallow
321 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
=
322 com
->lt_in
.c_ispeed
= com
->lt_in
.c_ospeed
=
323 com
->it_out
.c_ispeed
= com
->it_out
.c_ospeed
=
324 com
->lt_out
.c_ispeed
= com
->lt_out
.c_ospeed
= comdefaultrate
;
327 * if we're open, change the running rate too
330 if (tp
&& (tp
->t_state
& TS_ISOPEN
)) {
331 tp
->t_termios
.c_ispeed
=
332 tp
->t_termios
.c_ospeed
= comdefaultrate
;
334 error
= comparam(tp
, &tp
->t_termios
);
340 SYSCTL_PROC(_machdep
, OID_AUTO
, conspeed
, CTLTYPE_INT
| CTLFLAG_RW
,
341 0, 0, sysctl_machdep_comdefaultrate
, "I", "");
350 static struct pci_ids pci_ids
[] = {
351 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
352 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
353 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
354 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
355 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
356 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
357 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
358 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
359 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
360 { 0x00000000, NULL
, 0 }
364 sio_pci_attach(device_t dev
)
369 type
= pci_get_devid(dev
);
371 while (id
->type
&& id
->type
!= type
)
373 if (id
->desc
== NULL
)
375 sio_pci_kludge_unit(dev
);
376 return (sioattach(dev
, id
->rid
, 0UL));
380 * Don't cut and paste this to other drivers. It is a horrible kludge
381 * which will fail to work and also be unnecessary in future versions.
384 sio_pci_kludge_unit(device_t dev
)
393 while (resource_int_value("sio", unit
, "port", &start
) == 0 &&
396 if (device_get_unit(dev
) < unit
) {
397 dc
= device_get_devclass(dev
);
398 while (devclass_get_device(dc
, unit
))
400 device_printf(dev
, "moving to sio%d\n", unit
);
401 err
= device_set_unit(dev
, unit
); /* EVIL DO NOT COPY */
403 device_printf(dev
, "error moving device %d\n", err
);
408 sio_pci_probe(device_t dev
)
413 type
= pci_get_devid(dev
);
415 while (id
->type
&& id
->type
!= type
)
417 if (id
->desc
== NULL
)
419 device_set_desc(dev
, id
->desc
);
420 return (sioprobe(dev
, id
->rid
, 0UL));
422 #endif /* NPCI > 0 */
426 sio_puc_attach(device_t dev
)
430 if (BUS_READ_IVAR(device_get_parent(dev
), dev
, PUC_IVAR_FREQ
,
433 return (sioattach(dev
, 0, rclk
));
437 sio_puc_probe(device_t dev
)
441 if (BUS_READ_IVAR(device_get_parent(dev
), dev
, PUC_IVAR_FREQ
,
444 return (sioprobe(dev
, 0, rclk
));
448 static struct isa_pnp_id sio_ids
[] = {
449 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
450 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
451 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
452 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
453 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
454 /* Devices that do not have a compatid */
455 {0x12206804, NULL
}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
456 {0x7602a904, NULL
}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
457 {0x00007905, NULL
}, /* AKY0000 - 56K Plug&Play Modem */
458 {0x21107905, NULL
}, /* AKY1021 - 56K Plug&Play Modem */
459 {0x01405407, NULL
}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
460 {0x56039008, NULL
}, /* BDP0356 - Best Data 56x2 */
461 {0x56159008, NULL
}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
462 {0x36339008, NULL
}, /* BDP3336 - Best Data Prods. 336F */
463 {0x0014490a, NULL
}, /* BRI1400 - Boca 33.6 PnP */
464 {0x0015490a, NULL
}, /* BRI1500 - Internal Fax Data */
465 {0x0034490a, NULL
}, /* BRI3400 - Internal ACF Modem */
466 {0x0094490a, NULL
}, /* BRI9400 - Boca K56Flex PnP */
467 {0x00b4490a, NULL
}, /* BRIB400 - Boca 56k PnP */
468 {0x0030320d, NULL
}, /* CIR3000 - Cirrus Logic V43 */
469 {0x0100440e, NULL
}, /* CRD0001 - Cardinal MVP288IV ? */
470 {0x01308c0e, NULL
}, /* CTL3001 - Creative Labs Phoneblaster */
471 {0x36033610, NULL
}, /* DAV0336 - DAVICOM 336PNP MODEM */
472 {0x01009416, NULL
}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
473 {0x0000aa1a, NULL
}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
474 {0x1200c31e, NULL
}, /* GVC0012 - VF1128HV-R9 (win modem?) */
475 {0x0303c31e, NULL
}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
476 {0x0505c31e, NULL
}, /* GVC0505 - GVC 56k Faxmodem */
477 {0x0116c31e, NULL
}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
478 {0x0050c31e, NULL
}, /* GVC5000 - some GVC modem */
479 {0x3800f91e, NULL
}, /* GWY0038 - Telepath with v.90 */
480 {0x9062f91e, NULL
}, /* GWY6290 - Telepath with x2 Technology */
481 {0x8100e425, NULL
}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
482 {0x21002534, NULL
}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
483 {0x0000f435, NULL
}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
484 {0x5015f435, NULL
}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
485 {0xf015f435, NULL
}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
486 {0x6045f435, NULL
}, /* MOT4560 - Motorola ? */
487 {0x61e7a338, NULL
}, /* NECE761 - 33.6Modem */
488 {0x08804f3f, NULL
}, /* OZO8008 - Zoom (33.6k Modem) */
489 {0x0f804f3f, NULL
}, /* OZO800f - Zoom 2812 (56k Modem) */
490 {0x39804f3f, NULL
}, /* OZO8039 - Zoom 56k flex */
491 {0x00914f3f, NULL
}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
492 {0x3024a341, NULL
}, /* PMC2430 - Pace 56 Voice Internal Modem */
493 {0x1000eb49, NULL
}, /* ROK0010 - Rockwell ? */
494 {0x1200b23d, NULL
}, /* RSS0012 - OMRON ME5614ISA */
495 {0x5002734a, NULL
}, /* RSS0250 - 5614Jx3(G) Internal Modem */
496 {0x6202734a, NULL
}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
497 {0x1010104d, NULL
}, /* SHP1010 - Rockwell 33600bps Modem */
498 {0xc100ad4d, NULL
}, /* SMM00C1 - Leopard 56k PnP */
499 {0x9012b04e, NULL
}, /* SUP1290 - Supra ? */
500 {0x1013b04e, NULL
}, /* SUP1310 - SupraExpress 336i PnP */
501 {0x8013b04e, NULL
}, /* SUP1380 - SupraExpress 288i PnP Voice */
502 {0x8113b04e, NULL
}, /* SUP1381 - SupraExpress 336i PnP Voice */
503 {0x5016b04e, NULL
}, /* SUP1650 - Supra 336i Sp Intl */
504 {0x7016b04e, NULL
}, /* SUP1670 - Supra 336i V+ Intl */
505 {0x7420b04e, NULL
}, /* SUP2070 - Supra ? */
506 {0x8020b04e, NULL
}, /* SUP2080 - Supra ? */
507 {0x8420b04e, NULL
}, /* SUP2084 - SupraExpress 56i PnP */
508 {0x7121b04e, NULL
}, /* SUP2171 - SupraExpress 56i Sp? */
509 {0x8024b04e, NULL
}, /* SUP2480 - Supra ? */
510 {0x01007256, NULL
}, /* USR0001 - U.S. Robotics Inc., Sportster W */
511 {0x02007256, NULL
}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
512 {0x04007256, NULL
}, /* USR0004 - USR Sportster 14.4k */
513 {0x06007256, NULL
}, /* USR0006 - USR Sportster 33.6k */
514 {0x11007256, NULL
}, /* USR0011 - USR ? */
515 {0x01017256, NULL
}, /* USR0101 - USR ? */
516 {0x30207256, NULL
}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
517 {0x50207256, NULL
}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
518 {0x70207256, NULL
}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
519 {0x30307256, NULL
}, /* USR3030 - U.S. Robotics 56K FAX INT */
520 {0x31307256, NULL
}, /* USR3031 - U.S. Robotics 56K FAX INT */
521 {0x50307256, NULL
}, /* USR3050 - U.S. Robotics 56K FAX INT */
522 {0x70307256, NULL
}, /* USR3070 - U.S. Robotics 56K Voice INT */
523 {0x90307256, NULL
}, /* USR3090 - USR ? */
524 {0x70917256, NULL
}, /* USR9170 - U.S. Robotics 56K FAX INT */
525 {0x90917256, NULL
}, /* USR9190 - USR 56k Voice INT */
526 {0x0300695c, NULL
}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
527 {0x01a0896a, NULL
}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
528 {0x61f7896a, NULL
}, /* ZTIF761 - Zoom ComStar 33.6 */
535 sio_isa_probe(device_t dev
)
537 /* Check isapnp ids */
538 if (ISA_PNP_PROBE(device_get_parent(dev
), dev
, sio_ids
) == ENXIO
)
540 return (sioprobe(dev
, 0, 0UL));
544 sioprobe(device_t dev
, int xrid
, u_long rclk
)
547 static bool_t already_init
;
556 intrmask_t irqmap
[4];
561 u_int flags
= device_get_flags(dev
);
563 struct resource
*port
;
566 port
= bus_alloc_resource(dev
, SYS_RES_IOPORT
, &rid
,
567 0, ~0, IO_COMSIZE
, RF_ACTIVE
);
571 com
= device_get_softc(dev
);
572 com
->bst
= rman_get_bustag(port
);
573 com
->bsh
= rman_get_bushandle(port
);
580 * XXX this is broken - when we are first called, there are no
581 * previously configured IO ports. We could hard code
582 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
583 * This code has been doing nothing since the conversion since
584 * "count" is zero the first time around.
588 * Turn off MCR_IENABLE for all likely serial ports. An unused
589 * port with its MCR_IENABLE gate open will inhibit interrupts
590 * from any used port that shares the interrupt vector.
591 * XXX the gate enable is elsewhere for some multiports.
594 int count
, i
, xioport
;
596 devclass_get_devices(sio_devclass
, &devs
, &count
);
597 for (i
= 0; i
< count
; i
++) {
599 if (device_is_enabled(xdev
) &&
600 bus_get_resource(xdev
, SYS_RES_IOPORT
, 0, &xioport
,
602 outb(xioport
+ com_mcr
, 0);
609 if (COM_LLCONSOLE(flags
)) {
610 kprintf("sio%d: reserved for low-level i/o\n",
611 device_get_unit(dev
));
612 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
617 * If the device is on a multiport card and has an AST/4
618 * compatible interrupt control register, initialize this
619 * register and prepare to leave MCR_IENABLE clear in the mcr.
620 * Otherwise, prepare to set MCR_IENABLE in the mcr.
621 * Point idev to the device struct giving the correct id_irq.
622 * This is the struct for the master device if there is one.
625 mcr_image
= MCR_IENABLE
;
627 if (COM_ISMULTIPORT(flags
)) {
631 idev
= devclass_get_device(sio_devclass
, COM_MPMASTER(flags
));
633 kprintf("sio%d: master device %d not configured\n",
634 device_get_unit(dev
), COM_MPMASTER(flags
));
637 if (!COM_NOTAST4(flags
)) {
638 if (bus_get_resource(idev
, SYS_RES_IOPORT
, 0, &io
,
641 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0,
643 outb(xiobase
+ com_scr
, 0x80);
645 outb(xiobase
+ com_scr
, 0);
650 #endif /* COM_MULTIPORT */
651 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0, NULL
, NULL
) != 0)
654 bzero(failures
, sizeof failures
);
655 iobase
= rman_get_start(port
);
658 * We don't want to get actual interrupts, just masked ones.
659 * Interrupts from this line should already be masked in the ICU,
660 * but mask them in the processor as well in case there are some
661 * (misconfigured) shared interrupts.
667 * For the TI16754 chips, set prescaler to 1 (4 is often the
668 * default after-reset value) as otherwise it's impossible to
669 * get highest baudrates.
671 if (COM_TI16754(flags
)) {
674 cfcr
= sio_getreg(com
, com_cfcr
);
675 sio_setreg(com
, com_cfcr
, CFCR_EFR_ENABLE
);
676 efr
= sio_getreg(com
, com_efr
);
677 /* Unlock extended features to turn off prescaler. */
678 sio_setreg(com
, com_efr
, efr
| EFR_EFE
);
680 sio_setreg(com
, com_cfcr
, (cfcr
!= CFCR_EFR_ENABLE
) ? cfcr
: 0);
681 /* Turn off prescaler. */
682 sio_setreg(com
, com_mcr
,
683 sio_getreg(com
, com_mcr
) & ~MCR_PRESCALE
);
684 sio_setreg(com
, com_cfcr
, CFCR_EFR_ENABLE
);
685 sio_setreg(com
, com_efr
, efr
);
686 sio_setreg(com
, com_cfcr
, cfcr
);
690 * Initialize the speed and the word size and wait long enough to
691 * drain the maximum of 16 bytes of junk in device output queues.
692 * The speed is undefined after a master reset and must be set
693 * before relying on anything related to output. There may be
694 * junk after a (very fast) soft reboot and (apparently) after
696 * XXX what about the UART bug avoided by waiting in comparam()?
697 * We don't want to to wait long enough to drain at 2 bps.
699 if (iobase
== siocniobase
) {
700 DELAY((16 + 1) * 1000000 / (comdefaultrate
/ 10));
702 sio_setreg(com
, com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
703 divisor
= siodivisor(rclk
, SIO_TEST_SPEED
);
704 sio_setreg(com
, com_dlbl
, divisor
& 0xff);
705 sio_setreg(com
, com_dlbh
, divisor
>> 8);
706 sio_setreg(com
, com_cfcr
, CFCR_8BITS
);
707 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED
/ 10));
711 * Make sure we can drain the receiver. If we can't, the serial
712 * port may not exist.
714 for (fn
= 0; fn
< 256; ++fn
) {
715 if ((sio_getreg(com
, com_lsr
) & LSR_RXRDY
) == 0)
717 (void)sio_getreg(com
, com_data
);
720 kprintf("sio%d: can't drain, serial port might "
721 "not exist, disabling\n", device_get_unit(dev
));
727 * Enable the interrupt gate and disable device interupts. This
728 * should leave the device driving the interrupt line low and
729 * guarantee an edge trigger if an interrupt can be generated.
732 sio_setreg(com
, com_mcr
, mcr_image
);
733 sio_setreg(com
, com_ier
, 0);
734 DELAY(1000); /* XXX */
735 irqmap
[0] = isa_irq_pending();
738 * Attempt to set loopback mode so that we can send a null byte
739 * without annoying any external device.
742 sio_setreg(com
, com_mcr
, mcr_image
| MCR_LOOPBACK
);
745 * Attempt to generate an output interrupt. On 8250's, setting
746 * IER_ETXRDY generates an interrupt independent of the current
747 * setting and independent of whether the THR is empty. On 16450's,
748 * setting IER_ETXRDY generates an interrupt independent of the
749 * current setting. On 16550A's, setting IER_ETXRDY only
750 * generates an interrupt when IER_ETXRDY is not already set.
752 sio_setreg(com
, com_ier
, IER_ETXRDY
);
755 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
756 * an interrupt. They'd better generate one for actually doing
757 * output. Loopback may be broken on the same incompatibles but
758 * it's unlikely to do more than allow the null byte out.
760 sio_setreg(com
, com_data
, 0);
761 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED
/ 10));
764 * Turn off loopback mode so that the interrupt gate works again
765 * (MCR_IENABLE was hidden). This should leave the device driving
766 * an interrupt line high. It doesn't matter if the interrupt
767 * line oscillates while we are not looking at it, since interrupts
771 sio_setreg(com
, com_mcr
, mcr_image
);
774 * Some pcmcia cards have the "TXRDY bug", so we check everyone
775 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
777 if (COM_NOPROBE(flags
)) {
778 /* Reading IIR register twice */
779 for (fn
= 0; fn
< 2; fn
++) {
781 failures
[6] = sio_getreg(com
, com_iir
);
783 /* Check IIR_TXRDY clear ? */
785 if (failures
[6] & IIR_TXRDY
) {
786 /* Nop, Double check with clearing IER */
787 sio_setreg(com
, com_ier
, 0);
788 if (sio_getreg(com
, com_iir
) & IIR_NOPEND
) {
789 /* Ok. we're familia this gang */
790 SET_FLAG(dev
, COM_C_IIR_TXRDYBUG
);
792 /* Unknown, Just omit this chip.. XXX */
794 sio_setreg(com
, com_mcr
, 0);
797 /* OK. this is well-known guys */
798 CLR_FLAG(dev
, COM_C_IIR_TXRDYBUG
);
800 sio_setreg(com
, com_ier
, 0);
801 sio_setreg(com
, com_cfcr
, CFCR_8BITS
);
803 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
804 return (iobase
== siocniobase
? 0 : result
);
809 * o the CFCR, IER and MCR in UART hold the values written to them
810 * (the values happen to be all distinct - this is good for
811 * avoiding false positive tests from bus echoes).
812 * o an output interrupt is generated and its vector is correct.
813 * o the interrupt goes away when the IIR in the UART is read.
816 failures
[0] = sio_getreg(com
, com_cfcr
) - CFCR_8BITS
;
817 failures
[1] = sio_getreg(com
, com_ier
) - IER_ETXRDY
;
818 failures
[2] = sio_getreg(com
, com_mcr
) - mcr_image
;
819 DELAY(10000); /* Some internal modems need this time */
820 irqmap
[1] = isa_irq_pending();
821 failures
[4] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_TXRDY
;
822 DELAY(1000); /* XXX */
823 irqmap
[2] = isa_irq_pending();
824 failures
[6] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_NOPEND
;
827 * Turn off all device interrupts and check that they go off properly.
828 * Leave MCR_IENABLE alone. For ports without a master port, it gates
829 * the OUT2 output of the UART to
830 * the ICU input. Closing the gate would give a floating ICU input
831 * (unless there is another device driving it) and spurious interrupts.
832 * (On the system that this was first tested on, the input floats high
833 * and gives a (masked) interrupt as soon as the gate is closed.)
835 sio_setreg(com
, com_ier
, 0);
836 sio_setreg(com
, com_cfcr
, CFCR_8BITS
); /* dummy to avoid bus echo */
837 failures
[7] = sio_getreg(com
, com_ier
);
838 DELAY(1000); /* XXX */
839 irqmap
[3] = isa_irq_pending();
840 failures
[9] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_NOPEND
;
844 irqs
= irqmap
[1] & ~irqmap
[0];
845 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0, &xirq
, NULL
) == 0 &&
846 ((1 << xirq
) & irqs
) == 0)
848 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
849 device_get_unit(dev
), xirq
, irqs
);
851 kprintf("sio%d: irq maps: %#x %#x %#x %#x\n",
852 device_get_unit(dev
),
853 irqmap
[0], irqmap
[1], irqmap
[2], irqmap
[3]);
856 for (fn
= 0; fn
< sizeof failures
; ++fn
)
858 sio_setreg(com
, com_mcr
, 0);
861 kprintf("sio%d: probe failed test(s):",
862 device_get_unit(dev
));
863 for (fn
= 0; fn
< sizeof failures
; ++fn
)
870 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
871 return (iobase
== siocniobase
? 0 : result
);
876 espattach(struct com_s
*com
, Port_t esp_port
)
882 * Check the ESP-specific I/O port to see if we're an ESP
883 * card. If not, return failure immediately.
885 if ((inb(esp_port
) & 0xf3) == 0) {
886 kprintf(" port 0x%x is not an ESP board?\n", esp_port
);
891 * We've got something that claims to be a Hayes ESP card.
895 /* Get the dip-switch configuration */
896 outb(esp_port
+ ESP_CMD1
, ESP_GETDIPS
);
897 dips
= inb(esp_port
+ ESP_STATUS1
);
900 * Bits 0,1 of dips say which COM port we are.
902 if (rman_get_start(com
->ioportres
) == likely_com_ports
[dips
& 0x03])
905 kprintf(" esp_port has com %d\n", dips
& 0x03);
910 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
912 outb(esp_port
+ ESP_CMD1
, ESP_GETTEST
);
913 val
= inb(esp_port
+ ESP_STATUS1
); /* clear reg 1 */
914 val
= inb(esp_port
+ ESP_STATUS2
);
915 if ((val
& 0x70) < 0x20) {
916 kprintf("-old (%o)", val
& 0x70);
921 * Check for ability to emulate 16550: bit 7 == 1
923 if ((dips
& 0x80) == 0) {
929 * Okay, we seem to be a Hayes ESP card. Whee.
932 com
->esp_port
= esp_port
;
938 sio_isa_attach(device_t dev
)
940 return (sioattach(dev
, 0, 0UL));
944 sioattach(device_t dev
, int xrid
, u_long rclk
)
955 struct resource
*port
;
961 callout_init(&sio_timeout_handle
);
965 port
= bus_alloc_resource(dev
, SYS_RES_IOPORT
, &rid
,
966 0, ~0, IO_COMSIZE
, RF_ACTIVE
);
970 iobase
= rman_get_start(port
);
971 unit
= device_get_unit(dev
);
972 com
= device_get_softc(dev
);
973 flags
= device_get_flags(dev
);
975 if (unit
>= sio_numunits
)
976 sio_numunits
= unit
+ 1;
978 * sioprobe() has initialized the device registers as follows:
979 * o cfcr = CFCR_8BITS.
980 * It is most important that CFCR_DLAB is off, so that the
981 * data port is not hidden when we enable interrupts.
983 * Interrupts are only enabled when the line is open.
984 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
985 * interrupt control register or the config specifies no irq.
986 * Keeping MCR_DTR and MCR_RTS off might stop the external
987 * device from sending before we are ready.
989 bzero(com
, sizeof *com
);
991 com
->ioportres
= port
;
992 com
->bst
= rman_get_bustag(port
);
993 com
->bsh
= rman_get_bushandle(port
);
994 com
->cfcr_image
= CFCR_8BITS
;
995 com
->dtr_wait
= 3 * hz
;
996 callout_init(&com
->dtr_ch
);
997 callout_init(&com
->busy_ch
);
998 com
->loses_outints
= COM_LOSESOUTINTS(flags
) != 0;
999 com
->no_irq
= bus_get_resource(dev
, SYS_RES_IRQ
, 0, NULL
, NULL
) != 0;
1000 com
->tx_fifo_size
= 1;
1001 com
->obufs
[0].l_head
= com
->obuf1
;
1002 com
->obufs
[1].l_head
= com
->obuf2
;
1004 com
->data_port
= iobase
+ com_data
;
1005 com
->int_id_port
= iobase
+ com_iir
;
1006 com
->modem_ctl_port
= iobase
+ com_mcr
;
1007 com
->mcr_image
= inb(com
->modem_ctl_port
);
1008 com
->line_status_port
= iobase
+ com_lsr
;
1009 com
->modem_status_port
= iobase
+ com_msr
;
1010 com
->intr_ctl_port
= iobase
+ com_ier
;
1013 rclk
= DEFAULT_RCLK
;
1017 * We don't use all the flags from <sys/ttydefaults.h> since they
1018 * are only relevant for logins. It's important to have echo off
1019 * initially so that the line doesn't start blathering before the
1020 * echo flag can be turned off.
1022 com
->it_in
.c_iflag
= 0;
1023 com
->it_in
.c_oflag
= 0;
1024 com
->it_in
.c_cflag
= TTYDEF_CFLAG
;
1025 com
->it_in
.c_lflag
= 0;
1026 if (unit
== comconsole
) {
1027 com
->it_in
.c_iflag
= TTYDEF_IFLAG
;
1028 com
->it_in
.c_oflag
= TTYDEF_OFLAG
;
1029 com
->it_in
.c_cflag
= TTYDEF_CFLAG
| CLOCAL
;
1030 com
->it_in
.c_lflag
= TTYDEF_LFLAG
;
1031 com
->lt_out
.c_cflag
= com
->lt_in
.c_cflag
= CLOCAL
;
1032 com
->lt_out
.c_ispeed
= com
->lt_out
.c_ospeed
=
1033 com
->lt_in
.c_ispeed
= com
->lt_in
.c_ospeed
=
1034 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
= comdefaultrate
;
1036 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
= TTYDEF_SPEED
;
1037 if (siosetwater(com
, com
->it_in
.c_ispeed
) != 0) {
1040 * Leave i/o resources allocated if this is a `cn'-level
1041 * console, so that other devices can't snarf them.
1043 if (iobase
!= siocniobase
)
1044 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
1048 termioschars(&com
->it_in
);
1049 com
->it_out
= com
->it_in
;
1051 /* attempt to determine UART type */
1052 kprintf("sio%d: type", unit
);
1055 #ifdef COM_MULTIPORT
1056 if (!COM_ISMULTIPORT(flags
) && !COM_IIR_TXRDYBUG(flags
))
1058 if (!COM_IIR_TXRDYBUG(flags
))
1065 scr
= sio_getreg(com
, com_scr
);
1066 sio_setreg(com
, com_scr
, 0xa5);
1067 scr1
= sio_getreg(com
, com_scr
);
1068 sio_setreg(com
, com_scr
, 0x5a);
1069 scr2
= sio_getreg(com
, com_scr
);
1070 sio_setreg(com
, com_scr
, scr
);
1071 if (scr1
!= 0xa5 || scr2
!= 0x5a) {
1073 goto determined_type
;
1076 sio_setreg(com
, com_fifo
, FIFO_ENABLE
| FIFO_RX_HIGH
);
1079 switch (inb(com
->int_id_port
) & IIR_FIFO_MASK
) {
1090 if (COM_NOFIFO(flags
)) {
1091 kprintf(" 16550A fifo disabled");
1093 com
->hasfifo
= TRUE
;
1094 if (COM_ST16650A(flags
)) {
1096 com
->tx_fifo_size
= 32;
1097 kprintf(" ST16650A");
1098 } else if (COM_TI16754(flags
)) {
1099 com
->tx_fifo_size
= 64;
1100 kprintf(" TI16754");
1102 com
->tx_fifo_size
= COM_FIFOSIZE(flags
);
1107 for (espp
= likely_esp_ports
; *espp
!= 0; espp
++)
1108 if (espattach(com
, *espp
)) {
1109 com
->tx_fifo_size
= 1024;
1113 if (!com
->st16650a
&& !COM_TI16754(flags
)) {
1114 if (!com
->tx_fifo_size
)
1115 com
->tx_fifo_size
= 16;
1117 kprintf(" lookalike with %d bytes FIFO",
1127 * Set 16550 compatibility mode.
1128 * We don't use the ESP_MODE_SCALE bit to increase the
1129 * fifo trigger levels because we can't handle large
1131 * XXX flow control should be set in comparam(), not here.
1133 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETMODE
);
1134 outb(com
->esp_port
+ ESP_CMD2
, ESP_MODE_RTS
| ESP_MODE_FIFO
);
1136 /* Set RTS/CTS flow control. */
1137 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETFLOWTYPE
);
1138 outb(com
->esp_port
+ ESP_CMD2
, ESP_FLOW_RTS
);
1139 outb(com
->esp_port
+ ESP_CMD2
, ESP_FLOW_CTS
);
1141 /* Set flow-control levels. */
1142 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETRXFLOW
);
1143 outb(com
->esp_port
+ ESP_CMD2
, HIBYTE(768));
1144 outb(com
->esp_port
+ ESP_CMD2
, LOBYTE(768));
1145 outb(com
->esp_port
+ ESP_CMD2
, HIBYTE(512));
1146 outb(com
->esp_port
+ ESP_CMD2
, LOBYTE(512));
1148 #endif /* COM_ESP */
1149 sio_setreg(com
, com_fifo
, 0);
1152 #ifdef COM_MULTIPORT
1153 if (COM_ISMULTIPORT(flags
)) {
1156 com
->multiport
= TRUE
;
1157 kprintf(" (multiport");
1158 if (unit
== COM_MPMASTER(flags
))
1161 masterdev
= devclass_get_device(sio_devclass
,
1162 COM_MPMASTER(flags
));
1163 com
->no_irq
= (masterdev
== NULL
|| bus_get_resource(masterdev
,
1164 SYS_RES_IRQ
, 0, NULL
, NULL
) != 0);
1166 #endif /* COM_MULTIPORT */
1167 if (unit
== comconsole
)
1168 kprintf(", console");
1169 if (COM_IIR_TXRDYBUG(flags
))
1170 kprintf(" with a bogus IIR_TXRDY register");
1173 if (!sio_registered
) {
1174 register_swi(SWI_TTY
, siopoll
, NULL
,"swi_siopoll", NULL
);
1175 sio_registered
= TRUE
;
1177 minorbase
= UNIT_TO_MINOR(unit
);
1178 dev_ops_add(&sio_ops
, UNIT_TO_MINOR(-1), minorbase
);
1179 make_dev(&sio_ops
, minorbase
,
1180 UID_ROOT
, GID_WHEEL
, 0600, "ttyd%r", unit
);
1181 make_dev(&sio_ops
, minorbase
| CONTROL_INIT_STATE
,
1182 UID_ROOT
, GID_WHEEL
, 0600, "ttyid%r", unit
);
1183 make_dev(&sio_ops
, minorbase
| CONTROL_LOCK_STATE
,
1184 UID_ROOT
, GID_WHEEL
, 0600, "ttyld%r", unit
);
1185 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
,
1186 UID_UUCP
, GID_DIALER
, 0660, "cuaa%r", unit
);
1187 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
| CONTROL_INIT_STATE
,
1188 UID_UUCP
, GID_DIALER
, 0660, "cuaia%r", unit
);
1189 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
| CONTROL_LOCK_STATE
,
1190 UID_UUCP
, GID_DIALER
, 0660, "cuala%r", unit
);
1192 com
->pps
.ppscap
= PPS_CAPTUREASSERT
| PPS_CAPTURECLEAR
;
1193 pps_init(&com
->pps
);
1196 com
->irqres
= bus_alloc_resource(dev
, SYS_RES_IRQ
, &rid
, 0ul, ~0ul, 1,
1199 ret
= BUS_SETUP_INTR(device_get_parent(dev
), dev
, com
->irqres
,
1200 INTR_FAST
, siointr
, com
,
1201 &com
->cookie
, NULL
);
1203 ret
= BUS_SETUP_INTR(device_get_parent(dev
), dev
,
1204 com
->irqres
, 0, siointr
, com
,
1205 &com
->cookie
, NULL
);
1207 device_printf(dev
, "unable to activate interrupt in fast mode - using normal mode\n");
1210 device_printf(dev
, "could not activate interrupt\n");
1211 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1212 defined(ALT_BREAK_TO_DEBUGGER))
1214 * Enable interrupts for early break-to-debugger support
1217 if (ret
== 0 && unit
== comconsole
)
1218 outb(siocniobase
+ com_ier
, IER_ERXRDY
| IER_ERLS
|
1227 sioopen(struct dev_open_args
*ap
)
1229 cdev_t dev
= ap
->a_head
.a_dev
;
1237 unit
= MINOR_TO_UNIT(mynor
);
1238 com
= com_addr(unit
);
1243 if (mynor
& CONTROL_MASK
)
1245 tp
= dev
->si_tty
= com
->tp
= ttymalloc(com
->tp
);
1248 * We jump to this label after all non-interrupted sleeps to pick
1249 * up any changes of the device state.
1252 while (com
->state
& CS_DTR_OFF
) {
1253 error
= tsleep(&com
->dtr_wait
, PCATCH
, "siodtr", 0);
1254 if (com_addr(unit
) == NULL
) {
1258 if (error
!= 0 || com
->gone
)
1261 if (tp
->t_state
& TS_ISOPEN
) {
1263 * The device is open, so everything has been initialized.
1266 if (mynor
& CALLOUT_MASK
) {
1267 if (!com
->active_out
) {
1272 if (com
->active_out
) {
1273 if (ap
->a_oflags
& O_NONBLOCK
) {
1277 error
= tsleep(&com
->active_out
,
1278 PCATCH
, "siobi", 0);
1279 if (com_addr(unit
) == NULL
) {
1283 if (error
!= 0 || com
->gone
)
1288 if (tp
->t_state
& TS_XCLUDE
&& suser_cred(ap
->a_cred
, 0)) {
1294 * The device isn't open, so there are no conflicts.
1295 * Initialize it. Initialization is done twice in many
1296 * cases: to preempt sleeping callin opens if we are
1297 * callout, and to complete a callin open after DCD rises.
1299 tp
->t_oproc
= comstart
;
1300 tp
->t_param
= comparam
;
1301 tp
->t_stop
= comstop
;
1303 tp
->t_termios
= mynor
& CALLOUT_MASK
1304 ? com
->it_out
: com
->it_in
;
1305 (void)commctl(com
, TIOCM_DTR
| TIOCM_RTS
, DMSET
);
1306 com
->poll
= com
->no_irq
;
1307 com
->poll_output
= com
->loses_outints
;
1309 error
= comparam(tp
, &tp
->t_termios
);
1314 * XXX we should goto open_top if comparam() slept.
1318 * (Re)enable and drain fifos.
1320 * Certain SMC chips cause problems if the fifos
1321 * are enabled while input is ready. Turn off the
1322 * fifo if necessary to clear the input. We test
1323 * the input ready bit after enabling the fifos
1324 * since we've already enabled them in comparam()
1325 * and to handle races between enabling and fresh
1329 sio_setreg(com
, com_fifo
,
1330 FIFO_RCV_RST
| FIFO_XMT_RST
1333 * XXX the delays are for superstitious
1334 * historical reasons. It must be less than
1335 * the character time at the maximum
1336 * supported speed (87 usec at 115200 bps
1337 * 8N1). Otherwise we might loop endlessly
1338 * if data is streaming in. We used to use
1339 * delays of 100. That usually worked
1340 * because DELAY(100) used to usually delay
1341 * for about 85 usec instead of 100.
1344 if (!(inb(com
->line_status_port
) & LSR_RXRDY
))
1346 sio_setreg(com
, com_fifo
, 0);
1348 (void) inb(com
->data_port
);
1353 (void) inb(com
->line_status_port
);
1354 (void) inb(com
->data_port
);
1355 com
->prev_modem_status
= com
->last_modem_status
1356 = inb(com
->modem_status_port
);
1357 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1358 outb(com
->intr_ctl_port
, IER_ERXRDY
| IER_ERLS
1361 outb(com
->intr_ctl_port
, IER_ERXRDY
| IER_ETXRDY
1362 | IER_ERLS
| IER_EMSC
);
1366 * Handle initial DCD. Callout devices get a fake initial
1367 * DCD (trapdoor DCD). If we are callout, then any sleeping
1368 * callin opens get woken up and resume sleeping on "siobi"
1369 * instead of "siodcd".
1372 * XXX `mynor & CALLOUT_MASK' should be
1373 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1374 * TRAPDOOR_CARRIER is the default initial state for callout
1375 * devices and SOFT_CARRIER is like CLOCAL except it hides
1378 if (com
->prev_modem_status
& MSR_DCD
|| mynor
& CALLOUT_MASK
)
1379 (*linesw
[tp
->t_line
].l_modem
)(tp
, 1);
1382 * Wait for DCD if necessary.
1384 if (!(tp
->t_state
& TS_CARR_ON
) && !(mynor
& CALLOUT_MASK
)
1385 && !(tp
->t_cflag
& CLOCAL
) && !(ap
->a_oflags
& O_NONBLOCK
)) {
1387 error
= tsleep(TSA_CARR_ON(tp
), PCATCH
, "siodcd", 0);
1388 if (com_addr(unit
) == NULL
) {
1393 if (error
!= 0 || com
->gone
)
1397 error
= (*linesw
[tp
->t_line
].l_open
)(dev
, tp
);
1398 disc_optim(tp
, &tp
->t_termios
, com
);
1399 if (tp
->t_state
& TS_ISOPEN
&& mynor
& CALLOUT_MASK
)
1400 com
->active_out
= TRUE
;
1404 if (!(tp
->t_state
& TS_ISOPEN
) && com
->wopeners
== 0)
1410 sioclose(struct dev_close_args
*ap
)
1412 cdev_t dev
= ap
->a_head
.a_dev
;
1418 if (mynor
& CONTROL_MASK
)
1420 com
= com_addr(MINOR_TO_UNIT(mynor
));
1425 (*linesw
[tp
->t_line
].l_close
)(tp
, ap
->a_fflag
);
1426 disc_optim(tp
, &tp
->t_termios
, com
);
1427 comstop(tp
, FREAD
| FWRITE
);
1433 kprintf("sio%d: gone\n", com
->unit
);
1435 if (com
->ibuf
!= NULL
)
1436 kfree(com
->ibuf
, M_DEVBUF
);
1437 bzero(tp
, sizeof *tp
);
1444 comhardclose(struct com_s
*com
)
1452 com
->poll_output
= FALSE
;
1453 com
->do_timestamp
= FALSE
;
1454 com
->do_dcd_timestamp
= FALSE
;
1455 com
->pps
.ppsparam
.mode
= 0;
1456 sio_setreg(com
, com_cfcr
, com
->cfcr_image
&= ~CFCR_SBREAK
);
1459 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1460 defined(ALT_BREAK_TO_DEBUGGER))
1462 * Leave interrupts enabled and don't clear DTR if this is the
1463 * console. This allows us to detect break-to-debugger events
1464 * while the console device is closed.
1466 if (com
->unit
!= comconsole
)
1469 sio_setreg(com
, com_ier
, 0);
1470 if (tp
->t_cflag
& HUPCL
1472 * XXX we will miss any carrier drop between here and the
1473 * next open. Perhaps we should watch DCD even when the
1474 * port is closed; it is not sufficient to check it at
1475 * the next open because it might go up and down while
1476 * we're not watching.
1478 || (!com
->active_out
1479 && !(com
->prev_modem_status
& MSR_DCD
)
1480 && !(com
->it_in
.c_cflag
& CLOCAL
))
1481 || !(tp
->t_state
& TS_ISOPEN
)) {
1482 (void)commctl(com
, TIOCM_DTR
, DMBIC
);
1483 if (com
->dtr_wait
!= 0 && !(com
->state
& CS_DTR_OFF
)) {
1484 callout_reset(&com
->dtr_ch
, com
->dtr_wait
,
1486 com
->state
|= CS_DTR_OFF
;
1492 * Disable fifos so that they are off after controlled
1493 * reboots. Some BIOSes fail to detect 16550s when the
1494 * fifos are enabled.
1496 sio_setreg(com
, com_fifo
, 0);
1498 com
->active_out
= FALSE
;
1499 wakeup(&com
->active_out
);
1500 wakeup(TSA_CARR_ON(tp
)); /* restart any wopeners */
1505 sioread(struct dev_read_args
*ap
)
1507 cdev_t dev
= ap
->a_head
.a_dev
;
1512 if (mynor
& CONTROL_MASK
)
1514 com
= com_addr(MINOR_TO_UNIT(mynor
));
1515 if (com
== NULL
|| com
->gone
)
1517 return ((*linesw
[com
->tp
->t_line
].l_read
)(com
->tp
, ap
->a_uio
, ap
->a_ioflag
));
1521 siowrite(struct dev_write_args
*ap
)
1523 cdev_t dev
= ap
->a_head
.a_dev
;
1529 if (mynor
& CONTROL_MASK
)
1532 unit
= MINOR_TO_UNIT(mynor
);
1533 com
= com_addr(unit
);
1534 if (com
== NULL
|| com
->gone
)
1537 * (XXX) We disallow virtual consoles if the physical console is
1538 * a serial port. This is in case there is a display attached that
1539 * is not the console. In that situation we don't need/want the X
1540 * server taking over the console.
1542 if (constty
!= NULL
&& unit
== comconsole
)
1544 return ((*linesw
[com
->tp
->t_line
].l_write
)(com
->tp
, ap
->a_uio
, ap
->a_ioflag
));
1548 siobusycheck(void *chan
)
1552 com
= (struct com_s
*)chan
;
1555 * Clear TS_BUSY if low-level output is complete.
1556 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1557 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1558 * called again. Reading the line status port outside of siointr1()
1559 * is safe because CS_BUSY is clear so there are no output interrupts
1563 if (com
->state
& CS_BUSY
)
1564 com
->extra_state
&= ~CSE_BUSYCHECK
; /* False alarm. */
1565 else if ((inb(com
->line_status_port
) & (LSR_TSRE
| LSR_TXRDY
))
1566 == (LSR_TSRE
| LSR_TXRDY
)) {
1567 com
->tp
->t_state
&= ~TS_BUSY
;
1569 com
->extra_state
&= ~CSE_BUSYCHECK
;
1571 callout_reset(&com
->busy_ch
, hz
/ 100, siobusycheck
, com
);
1577 siodivisor(u_long rclk
, speed_t speed
)
1583 if (speed
== 0 || speed
> (ULONG_MAX
- 1) / 8)
1585 divisor
= (rclk
/ (8UL * speed
) + 1) / 2;
1586 if (divisor
== 0 || divisor
>= 65536)
1588 actual_speed
= rclk
/ (16UL * divisor
);
1590 /* 10 times error in percent: */
1591 error
= ((actual_speed
- (long)speed
) * 2000 / (long)speed
+ 1) / 2;
1593 /* 3.0% maximum error tolerance: */
1594 if (error
< -30 || error
> 30)
1601 siodtrwakeup(void *chan
)
1605 com
= (struct com_s
*)chan
;
1606 com
->state
&= ~CS_DTR_OFF
;
1607 wakeup(&com
->dtr_wait
);
1611 sioinput(struct com_s
*com
)
1621 if (!(tp
->t_state
& TS_ISOPEN
) || !(tp
->t_cflag
& CREAD
)) {
1622 com_events
-= (com
->iptr
- com
->ibuf
);
1623 com
->iptr
= com
->ibuf
;
1626 if (tp
->t_state
& TS_CAN_BYPASS_L_RINT
) {
1628 * Avoid the grotesquely inefficient lineswitch routine
1629 * (ttyinput) in "raw" mode. It usually takes about 450
1630 * instructions (that's without canonical processing or echo!).
1631 * slinput is reasonably fast (usually 40 instructions plus
1636 incc
= com
->iptr
- buf
;
1637 if (tp
->t_rawq
.c_cc
+ incc
> tp
->t_ihiwat
1638 && (com
->state
& CS_RTS_IFLOW
1639 || tp
->t_iflag
& IXOFF
)
1640 && !(tp
->t_state
& TS_TBLOCK
))
1642 com
->delta_error_counts
[CE_TTY_BUF_OVERFLOW
]
1643 += b_to_q((char *)buf
, incc
, &tp
->t_rawq
);
1647 tp
->t_rawcc
+= incc
;
1649 if (tp
->t_state
& TS_TTSTOP
1650 && (tp
->t_iflag
& IXANY
1651 || tp
->t_cc
[VSTART
] == tp
->t_cc
[VSTOP
])) {
1652 tp
->t_state
&= ~TS_TTSTOP
;
1653 tp
->t_lflag
&= ~FLUSHO
;
1657 } while (buf
< com
->iptr
);
1661 line_status
= buf
[com
->ierroff
];
1664 & (LSR_BI
| LSR_FE
| LSR_OE
| LSR_PE
)) {
1665 if (line_status
& LSR_BI
)
1666 recv_data
|= TTY_BI
;
1667 if (line_status
& LSR_FE
)
1668 recv_data
|= TTY_FE
;
1669 if (line_status
& LSR_OE
)
1670 recv_data
|= TTY_OE
;
1671 if (line_status
& LSR_PE
)
1672 recv_data
|= TTY_PE
;
1674 (*linesw
[tp
->t_line
].l_rint
)(recv_data
, tp
);
1676 } while (buf
< com
->iptr
);
1678 com_events
-= (com
->iptr
- com
->ibuf
);
1679 com
->iptr
= com
->ibuf
;
1682 * There is now room for another low-level buffer full of input,
1683 * so enable RTS if it is now disabled and there is room in the
1684 * high-level buffer.
1686 if ((com
->state
& CS_RTS_IFLOW
) && !(com
->mcr_image
& MCR_RTS
) &&
1687 !(tp
->t_state
& TS_TBLOCK
))
1688 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
1694 #ifndef COM_MULTIPORT
1696 siointr1((struct com_s
*) arg
);
1698 #else /* COM_MULTIPORT */
1699 bool_t possibly_more_intrs
;
1704 * Loop until there is no activity on any port. This is necessary
1705 * to get an interrupt edge more than to avoid another interrupt.
1706 * If the IRQ signal is just an OR of the IRQ signals from several
1707 * devices, then the edge from one may be lost because another is
1712 possibly_more_intrs
= FALSE
;
1713 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
1714 com
= com_addr(unit
);
1717 * would it work here, or be counter-productive?
1721 && (inb(com
->int_id_port
) & IIR_IMASK
)
1724 possibly_more_intrs
= TRUE
;
1726 /* XXX com_unlock(); */
1728 } while (possibly_more_intrs
);
1730 #endif /* COM_MULTIPORT */
1734 siointr1(struct com_s
*com
)
1737 u_char modem_status
;
1744 int_ctl
= inb(com
->intr_ctl_port
);
1745 int_ctl_new
= int_ctl
;
1747 while (!com
->gone
) {
1748 if (com
->pps
.ppsparam
.mode
& PPS_CAPTUREBOTH
) {
1749 modem_status
= inb(com
->modem_status_port
);
1750 if ((modem_status
^ com
->last_modem_status
) & MSR_DCD
) {
1751 count
= sys_cputimer
->count();
1752 pps_event(&com
->pps
, count
,
1753 (modem_status
& MSR_DCD
) ?
1754 PPS_CAPTUREASSERT
: PPS_CAPTURECLEAR
);
1757 line_status
= inb(com
->line_status_port
);
1759 /* input event? (check first to help avoid overruns) */
1760 while (line_status
& LSR_RCV_MASK
) {
1761 /* break/unnattached error bits or real input? */
1762 if (!(line_status
& LSR_RXRDY
))
1765 recv_data
= inb(com
->data_port
);
1766 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1768 * Solaris implements a new BREAK which is initiated
1769 * by a character sequence CR ~ ^b which is similar
1770 * to a familiar pattern used on Sun servers by the
1773 #define KEY_CRTLB 2 /* ^B */
1774 #define KEY_CR 13 /* CR '\r' */
1775 #define KEY_TILDE 126 /* ~ */
1777 if (com
->unit
== comconsole
) {
1778 static int brk_state1
= 0, brk_state2
= 0;
1779 if (recv_data
== KEY_CR
) {
1780 brk_state1
= recv_data
;
1782 } else if (brk_state1
== KEY_CR
&& (recv_data
== KEY_TILDE
|| recv_data
== KEY_CRTLB
)) {
1783 if (recv_data
== KEY_TILDE
)
1784 brk_state2
= recv_data
;
1785 else if (brk_state2
== KEY_TILDE
&& recv_data
== KEY_CRTLB
) {
1787 brk_state1
= brk_state2
= 0;
1795 if (line_status
& (LSR_BI
| LSR_FE
| LSR_PE
)) {
1797 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1798 * Otherwise, push the work to a higher level
1799 * (to handle PARMRK) if we're bypassing.
1800 * Otherwise, convert BI/FE and PE+INPCK to 0.
1802 * This makes bypassing work right in the
1803 * usual "raw" case (IGNBRK set, and IGNPAR
1806 * Note: BI together with FE/PE means just BI.
1808 if (line_status
& LSR_BI
) {
1809 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1810 if (com
->unit
== comconsole
) {
1816 || com
->tp
->t_iflag
& IGNBRK
)
1820 || com
->tp
->t_iflag
& IGNPAR
)
1823 if (com
->tp
->t_state
& TS_CAN_BYPASS_L_RINT
1824 && (line_status
& (LSR_BI
| LSR_FE
)
1825 || com
->tp
->t_iflag
& INPCK
))
1829 if (com
->hotchar
!= 0 && recv_data
== com
->hotchar
)
1832 if (ioptr
>= com
->ibufend
)
1833 CE_RECORD(com
, CE_INTERRUPT_BUF_OVERFLOW
);
1835 if (com
->do_timestamp
)
1836 microtime(&com
->timestamp
);
1839 #if 0 /* for testing input latency vs efficiency */
1840 if (com
->iptr
- com
->ibuf
== 8)
1843 ioptr
[0] = recv_data
;
1844 ioptr
[com
->ierroff
] = line_status
;
1845 com
->iptr
= ++ioptr
;
1846 if (ioptr
== com
->ihighwater
1847 && com
->state
& CS_RTS_IFLOW
)
1848 outb(com
->modem_ctl_port
,
1849 com
->mcr_image
&= ~MCR_RTS
);
1850 if (line_status
& LSR_OE
)
1851 CE_RECORD(com
, CE_OVERRUN
);
1855 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1856 * jump from the top of the loop to here
1858 line_status
= inb(com
->line_status_port
) & 0x7F;
1861 /* modem status change? (always check before doing output) */
1862 modem_status
= inb(com
->modem_status_port
);
1863 if (modem_status
!= com
->last_modem_status
) {
1864 if (com
->do_dcd_timestamp
1865 && !(com
->last_modem_status
& MSR_DCD
)
1866 && modem_status
& MSR_DCD
)
1867 microtime(&com
->dcd_timestamp
);
1870 * Schedule high level to handle DCD changes. Note
1871 * that we don't use the delta bits anywhere. Some
1872 * UARTs mess them up, and it's easy to remember the
1873 * previous bits and calculate the delta.
1875 com
->last_modem_status
= modem_status
;
1876 if (!(com
->state
& CS_CHECKMSR
)) {
1877 com_events
+= LOTS_OF_EVENTS
;
1878 com
->state
|= CS_CHECKMSR
;
1882 /* handle CTS change immediately for crisp flow ctl */
1883 if (com
->state
& CS_CTS_OFLOW
) {
1884 if (modem_status
& MSR_CTS
)
1885 com
->state
|= CS_ODEVREADY
;
1887 com
->state
&= ~CS_ODEVREADY
;
1891 /* output queued and everything ready? */
1892 if (line_status
& LSR_TXRDY
1893 && com
->state
>= (CS_BUSY
| CS_TTGO
| CS_ODEVREADY
)) {
1894 ioptr
= com
->obufq
.l_head
;
1895 if (com
->tx_fifo_size
> 1) {
1898 ocount
= com
->obufq
.l_tail
- ioptr
;
1899 if (ocount
> com
->tx_fifo_size
)
1900 ocount
= com
->tx_fifo_size
;
1901 com
->bytes_out
+= ocount
;
1903 outb(com
->data_port
, *ioptr
++);
1904 while (--ocount
!= 0);
1906 outb(com
->data_port
, *ioptr
++);
1909 com
->obufq
.l_head
= ioptr
;
1910 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1911 int_ctl_new
= int_ctl
| IER_ETXRDY
;
1913 if (ioptr
>= com
->obufq
.l_tail
) {
1916 qp
= com
->obufq
.l_next
;
1917 qp
->l_queued
= FALSE
;
1920 com
->obufq
.l_head
= qp
->l_head
;
1921 com
->obufq
.l_tail
= qp
->l_tail
;
1922 com
->obufq
.l_next
= qp
;
1924 /* output just completed */
1925 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1926 int_ctl_new
= int_ctl
& ~IER_ETXRDY
;
1928 com
->state
&= ~CS_BUSY
;
1930 if (!(com
->state
& CS_ODONE
)) {
1931 com_events
+= LOTS_OF_EVENTS
;
1932 com
->state
|= CS_ODONE
;
1933 setsofttty(); /* handle at high level ASAP */
1936 if (COM_IIR_TXRDYBUG(com
->flags
) && (int_ctl
!= int_ctl_new
)) {
1937 outb(com
->intr_ctl_port
, int_ctl_new
);
1942 #ifndef COM_MULTIPORT
1943 if ((inb(com
->int_id_port
) & IIR_IMASK
) == IIR_NOPEND
)
1944 #endif /* COM_MULTIPORT */
1950 sioioctl(struct dev_ioctl_args
*ap
)
1952 cdev_t dev
= ap
->a_head
.a_dev
;
1953 caddr_t data
= ap
->a_data
;
1958 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1960 struct termios term
;
1964 com
= com_addr(MINOR_TO_UNIT(mynor
));
1965 if (com
== NULL
|| com
->gone
)
1967 if (mynor
& CONTROL_MASK
) {
1970 switch (mynor
& CONTROL_MASK
) {
1971 case CONTROL_INIT_STATE
:
1972 ct
= mynor
& CALLOUT_MASK
? &com
->it_out
: &com
->it_in
;
1974 case CONTROL_LOCK_STATE
:
1975 ct
= mynor
& CALLOUT_MASK
? &com
->lt_out
: &com
->lt_in
;
1978 return (ENODEV
); /* /dev/nodev */
1980 switch (ap
->a_cmd
) {
1982 error
= suser_cred(ap
->a_cred
, 0);
1985 *ct
= *(struct termios
*)data
;
1988 *(struct termios
*)data
= *ct
;
1991 *(int *)data
= TTYDISC
;
1994 bzero(data
, sizeof(struct winsize
));
2001 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2002 term
= tp
->t_termios
;
2004 error
= ttsetcompat(tp
, &ap
->a_cmd
, data
, &term
);
2007 if (ap
->a_cmd
!= oldcmd
)
2008 data
= (caddr_t
)&term
;
2010 if (ap
->a_cmd
== TIOCSETA
|| ap
->a_cmd
== TIOCSETAW
||
2011 ap
->a_cmd
== TIOCSETAF
) {
2013 struct termios
*dt
= (struct termios
*)data
;
2014 struct termios
*lt
= mynor
& CALLOUT_MASK
2015 ? &com
->lt_out
: &com
->lt_in
;
2017 dt
->c_iflag
= (tp
->t_iflag
& lt
->c_iflag
)
2018 | (dt
->c_iflag
& ~lt
->c_iflag
);
2019 dt
->c_oflag
= (tp
->t_oflag
& lt
->c_oflag
)
2020 | (dt
->c_oflag
& ~lt
->c_oflag
);
2021 dt
->c_cflag
= (tp
->t_cflag
& lt
->c_cflag
)
2022 | (dt
->c_cflag
& ~lt
->c_cflag
);
2023 dt
->c_lflag
= (tp
->t_lflag
& lt
->c_lflag
)
2024 | (dt
->c_lflag
& ~lt
->c_lflag
);
2025 for (cc
= 0; cc
< NCCS
; ++cc
)
2026 if (lt
->c_cc
[cc
] != 0)
2027 dt
->c_cc
[cc
] = tp
->t_cc
[cc
];
2028 if (lt
->c_ispeed
!= 0)
2029 dt
->c_ispeed
= tp
->t_ispeed
;
2030 if (lt
->c_ospeed
!= 0)
2031 dt
->c_ospeed
= tp
->t_ospeed
;
2033 error
= (*linesw
[tp
->t_line
].l_ioctl
)(tp
, ap
->a_cmd
, data
, ap
->a_fflag
, ap
->a_cred
);
2034 if (error
!= ENOIOCTL
)
2037 error
= ttioctl(tp
, ap
->a_cmd
, data
, ap
->a_fflag
);
2038 disc_optim(tp
, &tp
->t_termios
, com
);
2039 if (error
!= ENOIOCTL
) {
2043 switch (ap
->a_cmd
) {
2045 sio_setreg(com
, com_cfcr
, com
->cfcr_image
|= CFCR_SBREAK
);
2048 sio_setreg(com
, com_cfcr
, com
->cfcr_image
&= ~CFCR_SBREAK
);
2051 (void)commctl(com
, TIOCM_DTR
, DMBIS
);
2054 (void)commctl(com
, TIOCM_DTR
, DMBIC
);
2057 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2058 * changes get undone on the next call to comparam().
2061 (void)commctl(com
, *(int *)data
, DMSET
);
2064 (void)commctl(com
, *(int *)data
, DMBIS
);
2067 (void)commctl(com
, *(int *)data
, DMBIC
);
2070 *(int *)data
= commctl(com
, 0, DMGET
);
2073 /* must be root since the wait applies to following logins */
2074 error
= suser_cred(ap
->a_cred
, 0);
2079 com
->dtr_wait
= *(int *)data
* hz
/ 100;
2082 *(int *)data
= com
->dtr_wait
* 100 / hz
;
2085 com
->do_timestamp
= TRUE
;
2086 *(struct timeval
*)data
= com
->timestamp
;
2088 case TIOCDCDTIMESTAMP
:
2089 com
->do_dcd_timestamp
= TRUE
;
2090 *(struct timeval
*)data
= com
->dcd_timestamp
;
2094 error
= pps_ioctl(ap
->a_cmd
, data
, &com
->pps
);
2095 if (error
== ENODEV
)
2104 siopoll(void *dummy
, void *frame
)
2108 if (com_events
== 0)
2111 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2116 com
= com_addr(unit
);
2120 if (tp
== NULL
|| com
->gone
) {
2122 * Discard any events related to never-opened or
2123 * going-away devices.
2126 incc
= com
->iptr
- com
->ibuf
;
2127 com
->iptr
= com
->ibuf
;
2128 if (com
->state
& CS_CHECKMSR
) {
2129 incc
+= LOTS_OF_EVENTS
;
2130 com
->state
&= ~CS_CHECKMSR
;
2136 if (com
->iptr
!= com
->ibuf
) {
2141 if (com
->state
& CS_CHECKMSR
) {
2142 u_char delta_modem_status
;
2145 delta_modem_status
= com
->last_modem_status
2146 ^ com
->prev_modem_status
;
2147 com
->prev_modem_status
= com
->last_modem_status
;
2148 com_events
-= LOTS_OF_EVENTS
;
2149 com
->state
&= ~CS_CHECKMSR
;
2151 if (delta_modem_status
& MSR_DCD
)
2152 (*linesw
[tp
->t_line
].l_modem
)
2153 (tp
, com
->prev_modem_status
& MSR_DCD
);
2155 if (com
->state
& CS_ODONE
) {
2157 com_events
-= LOTS_OF_EVENTS
;
2158 com
->state
&= ~CS_ODONE
;
2160 if (!(com
->state
& CS_BUSY
)
2161 && !(com
->extra_state
& CSE_BUSYCHECK
)) {
2162 callout_reset(&com
->busy_ch
, hz
/ 100,
2164 com
->extra_state
|= CSE_BUSYCHECK
;
2166 (*linesw
[tp
->t_line
].l_start
)(tp
);
2168 if (com_events
== 0)
2171 if (com_events
>= LOTS_OF_EVENTS
)
2176 comparam(struct tty
*tp
, struct termios
*t
)
2186 unit
= DEV_TO_UNIT(tp
->t_dev
);
2187 com
= com_addr(unit
);
2191 /* do historical conversions */
2192 if (t
->c_ispeed
== 0)
2193 t
->c_ispeed
= t
->c_ospeed
;
2195 /* check requested parameters */
2196 if (t
->c_ospeed
== 0)
2199 if (t
->c_ispeed
!= t
->c_ospeed
)
2201 divisor
= siodivisor(com
->rclk
, t
->c_ispeed
);
2206 /* parameters are OK, convert them to the com struct and the device */
2209 (void)commctl(com
, TIOCM_DTR
, DMBIC
); /* hang up line */
2211 (void)commctl(com
, TIOCM_DTR
, DMBIS
);
2213 switch (cflag
& CSIZE
) {
2227 if (cflag
& PARENB
) {
2229 if (!(cflag
& PARODD
))
2235 if (com
->hasfifo
&& divisor
!= 0) {
2237 * Use a fifo trigger level low enough so that the input
2238 * latency from the fifo is less than about 16 msec and
2239 * the total latency is less than about 30 msec. These
2240 * latencies are reasonable for humans. Serial comms
2241 * protocols shouldn't expect anything better since modem
2242 * latencies are larger.
2244 * Interrupts can be held up for long periods of time
2245 * due to inefficiencies in other parts of the kernel,
2246 * certain video cards, etc. Setting the FIFO trigger
2247 * point to MEDH instead of HIGH gives us 694uS of slop
2248 * (8 character times) instead of 173uS (2 character times)
2251 com
->fifo_image
= t
->c_ospeed
<= 4800
2252 ? FIFO_ENABLE
: FIFO_ENABLE
| FIFO_RX_MEDH
;
2255 * The Hayes ESP card needs the fifo DMA mode bit set
2256 * in compatibility mode. If not, it will interrupt
2257 * for each character received.
2260 com
->fifo_image
|= FIFO_DMA_MODE
;
2262 sio_setreg(com
, com_fifo
, com
->fifo_image
);
2266 * This returns with interrupts disabled so that we can complete
2267 * the speed change atomically. Keeping interrupts disabled is
2268 * especially important while com_data is hidden.
2270 (void) siosetwater(com
, t
->c_ispeed
);
2273 sio_setreg(com
, com_cfcr
, cfcr
| CFCR_DLAB
);
2275 * Only set the divisor registers if they would change,
2276 * since on some 16550 incompatibles (UMC8669F), setting
2277 * them while input is arriving them loses sync until
2278 * data stops arriving.
2280 dlbl
= divisor
& 0xFF;
2281 if (sio_getreg(com
, com_dlbl
) != dlbl
)
2282 sio_setreg(com
, com_dlbl
, dlbl
);
2283 dlbh
= divisor
>> 8;
2284 if (sio_getreg(com
, com_dlbh
) != dlbh
)
2285 sio_setreg(com
, com_dlbh
, dlbh
);
2288 sio_setreg(com
, com_cfcr
, com
->cfcr_image
= cfcr
);
2290 if (!(tp
->t_state
& TS_TTSTOP
))
2291 com
->state
|= CS_TTGO
;
2293 if (cflag
& CRTS_IFLOW
) {
2294 if (com
->st16650a
) {
2295 sio_setreg(com
, com_cfcr
, 0xbf);
2296 sio_setreg(com
, com_fifo
,
2297 sio_getreg(com
, com_fifo
) | 0x40);
2299 com
->state
|= CS_RTS_IFLOW
;
2301 * If CS_RTS_IFLOW just changed from off to on, the change
2302 * needs to be propagated to MCR_RTS. This isn't urgent,
2303 * so do it later by calling comstart() instead of repeating
2304 * a lot of code from comstart() here.
2306 } else if (com
->state
& CS_RTS_IFLOW
) {
2307 com
->state
&= ~CS_RTS_IFLOW
;
2309 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2310 * on here, since comstart() won't do it later.
2312 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
2313 if (com
->st16650a
) {
2314 sio_setreg(com
, com_cfcr
, 0xbf);
2315 sio_setreg(com
, com_fifo
,
2316 sio_getreg(com
, com_fifo
) & ~0x40);
2322 * Set up state to handle output flow control.
2323 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2324 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2326 com
->state
|= CS_ODEVREADY
;
2327 com
->state
&= ~CS_CTS_OFLOW
;
2328 if (cflag
& CCTS_OFLOW
) {
2329 com
->state
|= CS_CTS_OFLOW
;
2330 if (!(com
->last_modem_status
& MSR_CTS
))
2331 com
->state
&= ~CS_ODEVREADY
;
2332 if (com
->st16650a
) {
2333 sio_setreg(com
, com_cfcr
, 0xbf);
2334 sio_setreg(com
, com_fifo
,
2335 sio_getreg(com
, com_fifo
) | 0x80);
2338 if (com
->st16650a
) {
2339 sio_setreg(com
, com_cfcr
, 0xbf);
2340 sio_setreg(com
, com_fifo
,
2341 sio_getreg(com
, com_fifo
) & ~0x80);
2345 sio_setreg(com
, com_cfcr
, com
->cfcr_image
);
2347 /* XXX shouldn't call functions while intrs are disabled. */
2348 disc_optim(tp
, t
, com
);
2350 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2351 * unconditionally, but that defeated the careful discarding of
2352 * stale input in sioopen().
2354 if (com
->state
>= (CS_BUSY
| CS_TTGO
))
2360 if (com
->ibufold
!= NULL
) {
2361 kfree(com
->ibufold
, M_DEVBUF
);
2362 com
->ibufold
= NULL
;
2368 siosetwater(struct com_s
*com
, speed_t speed
)
2376 * Make the buffer size large enough to handle a softtty interrupt
2377 * latency of about 2 ticks without loss of throughput or data
2378 * (about 3 ticks if input flow control is not used or not honoured,
2379 * but a bit less for CS5-CS7 modes).
2381 cp4ticks
= speed
/ 10 / hz
* 4;
2382 for (ibufsize
= 128; ibufsize
< cp4ticks
;)
2384 if (ibufsize
== com
->ibufsize
) {
2390 * Allocate input buffer. The extra factor of 2 in the size is
2391 * to allow for an error byte for each input byte.
2393 ibuf
= kmalloc(2 * ibufsize
, M_DEVBUF
, M_WAITOK
| M_ZERO
);
2395 /* Initialize non-critical variables. */
2396 com
->ibufold
= com
->ibuf
;
2397 com
->ibufsize
= ibufsize
;
2400 tp
->t_ififosize
= 2 * ibufsize
;
2401 tp
->t_ispeedwat
= (speed_t
)-1;
2402 tp
->t_ospeedwat
= (speed_t
)-1;
2406 * Read current input buffer, if any. Continue with interrupts
2410 if (com
->iptr
!= com
->ibuf
)
2414 * Initialize critical variables, including input buffer watermarks.
2415 * The external device is asked to stop sending when the buffer
2416 * exactly reaches high water, or when the high level requests it.
2417 * The high level is notified immediately (rather than at a later
2418 * clock tick) when this watermark is reached.
2419 * The buffer size is chosen so the watermark should almost never
2421 * The low watermark is invisibly 0 since the buffer is always
2422 * emptied all at once.
2424 com
->iptr
= com
->ibuf
= ibuf
;
2425 com
->ibufend
= ibuf
+ ibufsize
;
2426 com
->ierroff
= ibufsize
;
2427 com
->ihighwater
= ibuf
+ 3 * ibufsize
/ 4;
2432 comstart(struct tty
*tp
)
2437 unit
= DEV_TO_UNIT(tp
->t_dev
);
2438 com
= com_addr(unit
);
2443 if (tp
->t_state
& TS_TTSTOP
)
2444 com
->state
&= ~CS_TTGO
;
2446 com
->state
|= CS_TTGO
;
2447 if (tp
->t_state
& TS_TBLOCK
) {
2448 if (com
->mcr_image
& MCR_RTS
&& com
->state
& CS_RTS_IFLOW
)
2449 outb(com
->modem_ctl_port
, com
->mcr_image
&= ~MCR_RTS
);
2451 if (!(com
->mcr_image
& MCR_RTS
) && com
->iptr
< com
->ihighwater
2452 && com
->state
& CS_RTS_IFLOW
)
2453 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
2456 if (tp
->t_state
& (TS_TIMEOUT
| TS_TTSTOP
)) {
2461 if (tp
->t_outq
.c_cc
!= 0) {
2465 if (!com
->obufs
[0].l_queued
) {
2466 com
->obufs
[0].l_tail
2467 = com
->obuf1
+ q_to_b(&tp
->t_outq
, com
->obuf1
,
2469 com
->obufs
[0].l_next
= NULL
;
2470 com
->obufs
[0].l_queued
= TRUE
;
2472 if (com
->state
& CS_BUSY
) {
2473 qp
= com
->obufq
.l_next
;
2474 while ((next
= qp
->l_next
) != NULL
)
2476 qp
->l_next
= &com
->obufs
[0];
2478 com
->obufq
.l_head
= com
->obufs
[0].l_head
;
2479 com
->obufq
.l_tail
= com
->obufs
[0].l_tail
;
2480 com
->obufq
.l_next
= &com
->obufs
[0];
2481 com
->state
|= CS_BUSY
;
2485 if (tp
->t_outq
.c_cc
!= 0 && !com
->obufs
[1].l_queued
) {
2486 com
->obufs
[1].l_tail
2487 = com
->obuf2
+ q_to_b(&tp
->t_outq
, com
->obuf2
,
2489 com
->obufs
[1].l_next
= NULL
;
2490 com
->obufs
[1].l_queued
= TRUE
;
2492 if (com
->state
& CS_BUSY
) {
2493 qp
= com
->obufq
.l_next
;
2494 while ((next
= qp
->l_next
) != NULL
)
2496 qp
->l_next
= &com
->obufs
[1];
2498 com
->obufq
.l_head
= com
->obufs
[1].l_head
;
2499 com
->obufq
.l_tail
= com
->obufs
[1].l_tail
;
2500 com
->obufq
.l_next
= &com
->obufs
[1];
2501 com
->state
|= CS_BUSY
;
2505 tp
->t_state
|= TS_BUSY
;
2508 if (com
->state
>= (CS_BUSY
| CS_TTGO
))
2509 siointr1(com
); /* fake interrupt to start output */
2516 comstop(struct tty
*tp
, int rw
)
2520 com
= com_addr(DEV_TO_UNIT(tp
->t_dev
));
2521 if (com
== NULL
|| com
->gone
)
2527 /* XXX avoid h/w bug. */
2530 sio_setreg(com
, com_fifo
,
2531 FIFO_XMT_RST
| com
->fifo_image
);
2532 com
->obufs
[0].l_queued
= FALSE
;
2533 com
->obufs
[1].l_queued
= FALSE
;
2534 if (com
->state
& CS_ODONE
)
2535 com_events
-= LOTS_OF_EVENTS
;
2536 com
->state
&= ~(CS_ODONE
| CS_BUSY
);
2537 com
->tp
->t_state
&= ~TS_BUSY
;
2542 /* XXX avoid h/w bug. */
2545 sio_setreg(com
, com_fifo
,
2546 FIFO_RCV_RST
| com
->fifo_image
);
2547 com_events
-= (com
->iptr
- com
->ibuf
);
2548 com
->iptr
= com
->ibuf
;
2555 commctl(struct com_s
*com
, int bits
, int how
)
2561 bits
= TIOCM_LE
; /* XXX - always enabled while open */
2562 mcr
= com
->mcr_image
;
2567 msr
= com
->prev_modem_status
;
2575 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2576 * more volatile by reading the modem status a lot. Perhaps
2577 * we should latch both bits until the status is read here.
2579 if (msr
& (MSR_RI
| MSR_TERI
))
2584 if (bits
& TIOCM_DTR
)
2586 if (bits
& TIOCM_RTS
)
2593 outb(com
->modem_ctl_port
,
2594 com
->mcr_image
= mcr
| (com
->mcr_image
& MCR_IENABLE
));
2597 outb(com
->modem_ctl_port
, com
->mcr_image
|= mcr
);
2600 outb(com
->modem_ctl_port
, com
->mcr_image
&= ~mcr
);
2615 * Set our timeout period to 1 second if no polled devices are open.
2616 * Otherwise set it to max(1/200, 1/hz).
2617 * Enable timeouts iff some device is open.
2619 callout_stop(&sio_timeout_handle
);
2622 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2623 com
= com_addr(unit
);
2624 if (com
!= NULL
&& com
->tp
!= NULL
2625 && com
->tp
->t_state
& TS_ISOPEN
&& !com
->gone
) {
2627 if (com
->poll
|| com
->poll_output
) {
2628 sio_timeout
= hz
> 200 ? hz
/ 200 : 1;
2634 sio_timeouts_until_log
= hz
/ sio_timeout
;
2635 callout_reset(&sio_timeout_handle
, sio_timeout
,
2638 /* Flush error messages, if any. */
2639 sio_timeouts_until_log
= 1;
2640 comwakeup((void *)NULL
);
2641 callout_stop(&sio_timeout_handle
);
2646 comwakeup(void *chan
)
2651 callout_reset(&sio_timeout_handle
, sio_timeout
, comwakeup
, NULL
);
2654 * Recover from lost output interrupts.
2655 * Poll any lines that don't use interrupts.
2657 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2658 com
= com_addr(unit
);
2659 if (com
!= NULL
&& !com
->gone
2660 && (com
->state
>= (CS_BUSY
| CS_TTGO
) || com
->poll
)) {
2668 * Check for and log errors, but not too often.
2670 if (--sio_timeouts_until_log
> 0)
2672 sio_timeouts_until_log
= hz
/ sio_timeout
;
2673 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2676 com
= com_addr(unit
);
2681 for (errnum
= 0; errnum
< CE_NTYPES
; ++errnum
) {
2686 delta
= com
->delta_error_counts
[errnum
];
2687 com
->delta_error_counts
[errnum
] = 0;
2691 total
= com
->error_counts
[errnum
] += delta
;
2692 log(LOG_ERR
, "sio%d: %u more %s%s (total %lu)\n",
2693 unit
, delta
, error_desc
[errnum
],
2694 delta
== 1 ? "" : "s", total
);
2700 disc_optim(struct tty
*tp
, struct termios
*t
, struct com_s
*com
)
2702 if (!(t
->c_iflag
& (ICRNL
| IGNCR
| IMAXBEL
| INLCR
| ISTRIP
| IXON
))
2703 && (!(t
->c_iflag
& BRKINT
) || (t
->c_iflag
& IGNBRK
))
2704 && (!(t
->c_iflag
& PARMRK
)
2705 || (t
->c_iflag
& (IGNPAR
| IGNBRK
)) == (IGNPAR
| IGNBRK
))
2706 && !(t
->c_lflag
& (ECHO
| ICANON
| IEXTEN
| ISIG
| PENDIN
))
2707 && linesw
[tp
->t_line
].l_rint
== ttyinput
)
2708 tp
->t_state
|= TS_CAN_BYPASS_L_RINT
;
2710 tp
->t_state
&= ~TS_CAN_BYPASS_L_RINT
;
2711 com
->hotchar
= linesw
[tp
->t_line
].l_hotchar
;
2715 * Following are all routines needed for SIO to act as console
2717 #include <sys/cons.h>
2727 static speed_t
siocngetspeed (Port_t
, u_long rclk
);
2728 static void siocnclose (struct siocnstate
*sp
, Port_t iobase
);
2729 static void siocnopen (struct siocnstate
*sp
, Port_t iobase
, int speed
);
2730 static void siocntxwait (Port_t iobase
);
2732 static cn_probe_t siocnprobe
;
2733 static cn_init_t siocninit
;
2734 static cn_init_fini_t siocninit_fini
;
2735 static cn_checkc_t siocncheckc
;
2736 static cn_getc_t siocngetc
;
2737 static cn_putc_t siocnputc
;
2740 CONS_DRIVER(sio
, siocnprobe
, siocninit
, siocninit_fini
,
2741 NULL
, siocngetc
, siocncheckc
, siocnputc
, NULL
);
2744 /* To get the GDB related variables */
2746 #include <ddb/ddb.h>
2750 siocntxwait(Port_t iobase
)
2755 * Wait for any pending transmission to finish. Required to avoid
2756 * the UART lockup bug when the speed is changed, and for normal
2760 while ((inb(iobase
+ com_lsr
) & (LSR_TSRE
| LSR_TXRDY
))
2761 != (LSR_TSRE
| LSR_TXRDY
) && --timo
!= 0)
2766 * Read the serial port specified and try to figure out what speed
2767 * it's currently running at. We're assuming the serial port has
2768 * been initialized and is basicly idle. This routine is only intended
2769 * to be run at system startup.
2771 * If the value read from the serial port doesn't make sense, return 0.
2775 siocngetspeed(Port_t iobase
, u_long rclk
)
2782 cfcr
= inb(iobase
+ com_cfcr
);
2783 outb(iobase
+ com_cfcr
, CFCR_DLAB
| cfcr
);
2785 dlbl
= inb(iobase
+ com_dlbl
);
2786 dlbh
= inb(iobase
+ com_dlbh
);
2788 outb(iobase
+ com_cfcr
, cfcr
);
2790 divisor
= dlbh
<< 8 | dlbl
;
2792 /* XXX there should be more sanity checking. */
2795 return (rclk
/ (16UL * divisor
));
2799 siocnopen(struct siocnstate
*sp
, Port_t iobase
, int speed
)
2806 * Save all the device control registers except the fifo register
2807 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2808 * We can't save the fifo register since it is read-only.
2810 sp
->ier
= inb(iobase
+ com_ier
);
2811 outb(iobase
+ com_ier
, 0); /* spltty() doesn't stop siointr() */
2812 siocntxwait(iobase
);
2813 sp
->cfcr
= inb(iobase
+ com_cfcr
);
2814 outb(iobase
+ com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
2815 sp
->dlbl
= inb(iobase
+ com_dlbl
);
2816 sp
->dlbh
= inb(iobase
+ com_dlbh
);
2818 * Only set the divisor registers if they would change, since on
2819 * some 16550 incompatibles (Startech), setting them clears the
2820 * data input register. This also reduces the effects of the
2823 divisor
= siodivisor(comdefaultrclk
, speed
);
2824 dlbl
= divisor
& 0xFF;
2825 if (sp
->dlbl
!= dlbl
)
2826 outb(iobase
+ com_dlbl
, dlbl
);
2827 dlbh
= divisor
>> 8;
2828 if (sp
->dlbh
!= dlbh
)
2829 outb(iobase
+ com_dlbh
, dlbh
);
2830 outb(iobase
+ com_cfcr
, CFCR_8BITS
);
2831 sp
->mcr
= inb(iobase
+ com_mcr
);
2833 * We don't want interrupts, but must be careful not to "disable"
2834 * them by clearing the MCR_IENABLE bit, since that might cause
2835 * an interrupt by floating the IRQ line.
2837 outb(iobase
+ com_mcr
, (sp
->mcr
& MCR_IENABLE
) | MCR_DTR
| MCR_RTS
);
2841 siocnclose(struct siocnstate
*sp
, Port_t iobase
)
2844 * Restore the device control registers.
2846 siocntxwait(iobase
);
2847 outb(iobase
+ com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
2848 if (sp
->dlbl
!= inb(iobase
+ com_dlbl
))
2849 outb(iobase
+ com_dlbl
, sp
->dlbl
);
2850 if (sp
->dlbh
!= inb(iobase
+ com_dlbh
))
2851 outb(iobase
+ com_dlbh
, sp
->dlbh
);
2852 outb(iobase
+ com_cfcr
, sp
->cfcr
);
2854 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2856 outb(iobase
+ com_mcr
, sp
->mcr
| MCR_DTR
| MCR_RTS
);
2857 outb(iobase
+ com_ier
, sp
->ier
);
2861 siocnprobe(struct consdev
*cp
)
2867 struct siocnstate sp
;
2870 * Find our first enabled console, if any. If it is a high-level
2871 * console device, then initialize it and return successfully.
2872 * If it is a low-level console device, then initialize it and
2873 * return unsuccessfully. It must be initialized in both cases
2874 * for early use by console drivers and debuggers. Initializing
2875 * the hardware is not necessary in all cases, since the i/o
2876 * routines initialize it on the fly, but it is necessary if
2877 * input might arrive while the hardware is switched back to an
2878 * uninitialized state. We can't handle multiple console devices
2879 * yet because our low-level routines don't take a device arg.
2880 * We trust the user to set the console flags properly so that we
2881 * don't need to probe.
2883 cp
->cn_pri
= CN_DEAD
;
2885 for (unit
= 0; unit
< 16; unit
++) { /* XXX need to know how many */
2888 if (resource_int_value("sio", unit
, "disabled", &disabled
) == 0) {
2892 if (resource_int_value("sio", unit
, "flags", &flags
))
2894 if (COM_CONSOLE(flags
) || COM_DEBUGGER(flags
)) {
2898 if (resource_int_value("sio", unit
, "port", &port
))
2902 if (boothowto
& RB_SERIAL
) {
2904 siocngetspeed(iobase
, comdefaultrclk
);
2906 comdefaultrate
= boot_speed
;
2910 * Initialize the divisor latch. We can't rely on
2911 * siocnopen() to do this the first time, since it
2912 * avoids writing to the latch if the latch appears
2913 * to have the correct value. Also, if we didn't
2914 * just read the speed from the hardware, then we
2915 * need to set the speed in hardware so that
2916 * switching it later is null.
2918 cfcr
= inb(iobase
+ com_cfcr
);
2919 outb(iobase
+ com_cfcr
, CFCR_DLAB
| cfcr
);
2920 divisor
= siodivisor(comdefaultrclk
, comdefaultrate
);
2921 outb(iobase
+ com_dlbl
, divisor
& 0xff);
2922 outb(iobase
+ com_dlbh
, divisor
>> 8);
2923 outb(iobase
+ com_cfcr
, cfcr
);
2925 siocnopen(&sp
, iobase
, comdefaultrate
);
2928 if (COM_CONSOLE(flags
) && !COM_LLCONSOLE(flags
)) {
2929 cp
->cn_probegood
= 1;
2930 cp
->cn_private
= (void *)unit
;
2931 cp
->cn_pri
= COM_FORCECONSOLE(flags
)
2932 || boothowto
& RB_SERIAL
2933 ? CN_REMOTE
: CN_NORMAL
;
2934 siocniobase
= iobase
;
2937 if (COM_DEBUGGER(flags
) && gdb_tab
== NULL
) {
2938 kprintf("sio%d: gdb debugging port\n", unit
);
2939 siogdbiobase
= iobase
;
2942 cp
->cn_gdbprivate
= (void *)unit
;
2951 * XXX Ugly Compatability.
2952 * If no gdb port has been specified, set it to be the console
2953 * as some configuration files don't specify the gdb port.
2955 if (gdb_tab
== NULL
&& (boothowto
& RB_GDB
)) {
2956 kprintf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2958 kprintf("Set flag 0x80 on desired GDB port in your\n");
2959 kprintf("configuration file (currently sio only).\n");
2960 siogdbiobase
= siocniobase
;
2961 siogdbunit
= siocnunit
;
2962 cp
->cn_gdbprivate
= (void *)siocnunit
;
2970 siocninit(struct consdev
*cp
)
2972 comconsole
= (int)(intptr_t)cp
->cn_private
;
2976 siocninit_fini(struct consdev
*cp
)
2980 if (cp
->cn_probegood
) {
2981 unit
= (int)(intptr_t)cp
->cn_private
;
2982 cp
->cn_dev
= make_dev(&sio_ops
, unit
,
2983 UID_ROOT
, GID_WHEEL
, 0600,
2989 siocncheckc(void *private)
2992 int unit
= (int)(intptr_t)private;
2994 struct siocnstate sp
;
2996 if (unit
== siogdbunit
)
2997 iobase
= siogdbiobase
;
2999 iobase
= siocniobase
;
3001 siocnopen(&sp
, iobase
, comdefaultrate
);
3002 if (inb(iobase
+ com_lsr
) & LSR_RXRDY
)
3003 c
= inb(iobase
+ com_data
);
3006 siocnclose(&sp
, iobase
);
3013 siocngetc(void *private)
3016 int unit
= (int)(intptr_t)private;
3018 struct siocnstate sp
;
3020 if (unit
== siogdbunit
)
3021 iobase
= siogdbiobase
;
3023 iobase
= siocniobase
;
3025 siocnopen(&sp
, iobase
, comdefaultrate
);
3026 while (!(inb(iobase
+ com_lsr
) & LSR_RXRDY
))
3028 c
= inb(iobase
+ com_data
);
3029 siocnclose(&sp
, iobase
);
3035 siocnputc(void *private, int c
)
3037 int unit
= (int)(intptr_t)private;
3038 struct siocnstate sp
;
3041 if (unit
== siogdbunit
)
3042 iobase
= siogdbiobase
;
3044 iobase
= siocniobase
;
3046 siocnopen(&sp
, iobase
, comdefaultrate
);
3047 siocntxwait(iobase
);
3048 outb(iobase
+ com_data
, c
);
3049 siocnclose(&sp
, iobase
);
3053 DRIVER_MODULE(sio
, isa
, sio_isa_driver
, sio_devclass
, 0, 0);
3054 DRIVER_MODULE(sio
, acpi
, sio_isa_driver
, sio_devclass
, 0, 0);
3056 DRIVER_MODULE(sio
, pci
, sio_pci_driver
, sio_devclass
, 0, 0);
3059 DRIVER_MODULE(sio
, puc
, sio_puc_driver
, sio_devclass
, 0, 0);