Remove empty DragonFly CVS IDs.
[dragonfly.git] / sys / dev / netif / ath / hal / ath_hal / ar5312 / ar5315_gpio.c
blob45666bbc0fab0f97c5d6497cf68fee42a59c2bd2
1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c 188974 2009-02-24 00:12:16Z sam $
19 #include "opt_ah.h"
21 #if (AH_SUPPORT_2316 || AH_SUPPORT_2317)
23 #include "ah.h"
24 #include "ah_internal.h"
25 #include "ah_devid.h"
27 #include "ar5312/ar5312.h"
28 #include "ar5312/ar5312reg.h"
29 #include "ar5312/ar5312phy.h"
31 #define AR_NUM_GPIO 7 /* 6 GPIO pins */
32 #define AR5315_GPIOD_MASK 0x0000007F /* GPIO data reg r/w mask */
35 * Configure GPIO Output lines
37 HAL_BOOL
38 ar5315GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)
40 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
42 HALASSERT(gpio < AR_NUM_GPIO);
44 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR,
45 (OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))
46 | AR5315_GPIODIR_O(gpio));
48 return AH_TRUE;
52 * Configure GPIO Input lines
54 HAL_BOOL
55 ar5315GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
57 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
59 HALASSERT(gpio < AR_NUM_GPIO);
61 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR,
62 (OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))
63 | AR5315_GPIODIR_I(gpio));
65 return AH_TRUE;
69 * Once configured for I/O - set output lines
71 HAL_BOOL
72 ar5315GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
74 uint32_t reg;
75 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
77 HALASSERT(gpio < AR_NUM_GPIO);
79 reg = OS_REG_READ(ah, gpioOffset+AR5315_GPIODO);
80 reg &= ~(1 << gpio);
81 reg |= (val&1) << gpio;
83 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODO, reg);
84 return AH_TRUE;
88 * Once configured for I/O - get input lines
90 uint32_t
91 ar5315GpioGet(struct ath_hal *ah, uint32_t gpio)
93 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
95 if (gpio < AR_NUM_GPIO) {
96 uint32_t val = OS_REG_READ(ah, gpioOffset+AR5315_GPIODI);
97 val = ((val & AR5315_GPIOD_MASK) >> gpio) & 0x1;
98 return val;
99 } else {
100 return 0xffffffff;
105 * Set the GPIO Interrupt
107 void
108 ar5315GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
110 uint32_t val;
111 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
113 /* XXX bounds check gpio */
114 val = OS_REG_READ(ah, gpioOffset+AR5315_GPIOINT);
115 val &= ~(AR5315_GPIOINT_M | AR5315_GPIOINTLVL_M);
116 val |= gpio << AR5315_GPIOINT_S;
117 if (ilevel)
118 val |= 2 << AR5315_GPIOINTLVL_S; /* interrupt on pin high */
119 else
120 val |= 1 << AR5315_GPIOINTLVL_S; /* interrupt on pin low */
122 /* Don't need to change anything for low level interrupt. */
123 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIOINT, val);
125 /* Change the interrupt mask. */
126 (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);
130 #endif /* AH_SUPPORT_2316 || AH_SUPPORT_2317 */