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Remove empty DragonFly CVS IDs.
[dragonfly.git] / sys / dev / netif / ath / hal / ath_hal / ar5212 / ar5413.c
blob0568f39a3c519ebc0cbe0b3ef386126f7fbd132e
1 /*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5413.c 188979 2009-02-24 01:07:06Z sam $
18 */
19 #include "opt_ah.h"
20
21 #include "ah.h"
22 #include "ah_internal.h"
23
24 #include "ah_eeprom_v3.h"
25
26 #include "ar5212/ar5212.h"
27 #include "ar5212/ar5212reg.h"
28 #include "ar5212/ar5212phy.h"
29
30 #define AH_5212_5413
31 #include "ar5212/ar5212.ini"
32
33 struct ar5413State {
34 RF_HAL_FUNCS base; /* public state, must be first */
35 uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
36
37 uint32_t Bank1Data[NELEM(ar5212Bank1_5413)];
38 uint32_t Bank2Data[NELEM(ar5212Bank2_5413)];
39 uint32_t Bank3Data[NELEM(ar5212Bank3_5413)];
40 uint32_t Bank6Data[NELEM(ar5212Bank6_5413)];
41 uint32_t Bank7Data[NELEM(ar5212Bank7_5413)];
42
43 /*
44 * Private state for reduced stack usage.
45 */
46 /* filled out Vpd table for all pdGains (chanL) */
47 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
48 [MAX_PWR_RANGE_IN_HALF_DB];
49 /* filled out Vpd table for all pdGains (chanR) */
50 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
51 [MAX_PWR_RANGE_IN_HALF_DB];
52 /* filled out Vpd table for all pdGains (interpolated) */
53 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
54 [MAX_PWR_RANGE_IN_HALF_DB];
55 };
56 #define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal)
57
58 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
59 uint32_t numBits, uint32_t firstBit, uint32_t column);
60
61 static void
62 ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
63 int writes)
64 {
65 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
66 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
67 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
68 }
69
70 /*
71 * Take the MHz channel value and set the Channel value
72 *
73 * ASSUMES: Writes enabled to analog bus
74 */
75 static HAL_BOOL
76 ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
77 {
78 uint16_t freq = ath_hal_gethwchannel(ah, chan);
79 uint32_t channelSel = 0;
80 uint32_t bModeSynth = 0;
81 uint32_t aModeRefSel = 0;
82 uint32_t reg32 = 0;
83
84 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
85
86 if (freq < 4800) {
87 uint32_t txctl;
88
89 if (((freq - 2192) % 5) == 0) {
90 channelSel = ((freq - 672) * 2 - 3040)/10;
91 bModeSynth = 0;
92 } else if (((freq - 2224) % 5) == 0) {
93 channelSel = ((freq - 704) * 2 - 3040) / 10;
94 bModeSynth = 1;
95 } else {
96 HALDEBUG(ah, HAL_DEBUG_ANY,
97 "%s: invalid channel %u MHz\n",
98 __func__, freq);
99 return AH_FALSE;
100 }
101
102 channelSel = (channelSel << 2) & 0xff;
103 channelSel = ath_hal_reverseBits(channelSel, 8);
104
105 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
106 if (freq == 2484) {
107 /* Enable channel spreading for channel 14 */
108 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
109 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
110 } else {
111 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
112 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
113 }
114 } else if (((freq % 5) == 2) && (freq <= 5435)) {
115 freq = freq - 2; /* Align to even 5MHz raster */
116 channelSel = ath_hal_reverseBits(
117 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
118 aModeRefSel = ath_hal_reverseBits(0, 2);
119 } else if ((freq % 20) == 0 && freq >= 5120) {
120 channelSel = ath_hal_reverseBits(
121 ((freq - 4800) / 20 << 2), 8);
122 aModeRefSel = ath_hal_reverseBits(1, 2);
123 } else if ((freq % 10) == 0) {
124 channelSel = ath_hal_reverseBits(
125 ((freq - 4800) / 10 << 1), 8);
126 aModeRefSel = ath_hal_reverseBits(1, 2);
127 } else if ((freq % 5) == 0) {
128 channelSel = ath_hal_reverseBits(
129 (freq - 4800) / 5, 8);
130 aModeRefSel = ath_hal_reverseBits(1, 2);
131 } else {
132 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
133 __func__, freq);
134 return AH_FALSE;
135 }
136
137 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
138 (1 << 12) | 0x1;
139 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
140
141 reg32 >>= 8;
142 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
143
144 AH_PRIVATE(ah)->ah_curchan = chan;
145 return AH_TRUE;
146 }
147
148 /*
149 * Reads EEPROM header info from device structure and programs
150 * all rf registers
151 *
152 * REQUIRES: Access to the analog rf device
153 */
154 static HAL_BOOL
155 ar5413SetRfRegs(struct ath_hal *ah,
156 const struct ieee80211_channel *chan,
157 uint16_t modesIndex, uint16_t *rfXpdGain)
158 {
159 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
160 int i; \
161 for (i = 0; i < NELEM(ar5212Bank##_ix##_5413); i++) \
162 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
163 } while (0)
164 struct ath_hal_5212 *ahp = AH5212(ah);
165 uint16_t freq = ath_hal_gethwchannel(ah, chan);
166 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
167 uint16_t ob5GHz = 0, db5GHz = 0;
168 uint16_t ob2GHz = 0, db2GHz = 0;
169 struct ar5413State *priv = AR5413(ah);
170 int regWrites = 0;
171
172 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
173 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
174
175 HALASSERT(priv != AH_NULL);
176
177 /* Setup rf parameters */
178 switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
179 case IEEE80211_CHAN_A:
180 if (freq > 4000 && freq < 5260) {
181 ob5GHz = ee->ee_ob1;
182 db5GHz = ee->ee_db1;
183 } else if (freq >= 5260 && freq < 5500) {
184 ob5GHz = ee->ee_ob2;
185 db5GHz = ee->ee_db2;
186 } else if (freq >= 5500 && freq < 5725) {
187 ob5GHz = ee->ee_ob3;
188 db5GHz = ee->ee_db3;
189 } else if (freq >= 5725) {
190 ob5GHz = ee->ee_ob4;
191 db5GHz = ee->ee_db4;
192 } else {
193 /* XXX else */
194 }
195 break;
196 case IEEE80211_CHAN_B:
197 ob2GHz = ee->ee_obFor24;
198 db2GHz = ee->ee_dbFor24;
199 break;
200 case IEEE80211_CHAN_G:
201 case IEEE80211_CHAN_PUREG: /* NB: really 108G */
202 ob2GHz = ee->ee_obFor24g;
203 db2GHz = ee->ee_dbFor24g;
204 break;
205 default:
206 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
207 __func__, chan->ic_flags);
208 return AH_FALSE;
209 }
210
211 /* Bank 1 Write */
212 RF_BANK_SETUP(priv, 1, 1);
213
214 /* Bank 2 Write */
215 RF_BANK_SETUP(priv, 2, modesIndex);
216
217 /* Bank 3 Write */
218 RF_BANK_SETUP(priv, 3, modesIndex);
219
220 /* Bank 6 Write */
221 RF_BANK_SETUP(priv, 6, modesIndex);
222
223 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
224 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
225 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
226 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
227
228 /* TODO - only for Eagle 1.0 2GHz - remove for production */
229 /* XXX: but without this bit G doesn't work. */
230 ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
231
232 /* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
233 if (AH_PRIVATE(ah)->ah_ispcie) {
234 ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),
235 3, 131, 3);
236 }
237 } else {
238 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
239 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
240
241 }
242
243 /* Bank 7 Setup */
244 RF_BANK_SETUP(priv, 7, modesIndex);
245
246 /* Write Analog registers */
247 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
248 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
249 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
250 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
251 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
252
253 /* Now that we have reprogrammed rfgain value, clear the flag. */
254 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
255
256 return AH_TRUE;
257 #undef RF_BANK_SETUP
258 }
259
260 /*
261 * Return a reference to the requested RF Bank.
262 */
263 static uint32_t *
264 ar5413GetRfBank(struct ath_hal *ah, int bank)
265 {
266 struct ar5413State *priv = AR5413(ah);
267
268 HALASSERT(priv != AH_NULL);
269 switch (bank) {
270 case 1: return priv->Bank1Data;
271 case 2: return priv->Bank2Data;
272 case 3: return priv->Bank3Data;
273 case 6: return priv->Bank6Data;
274 case 7: return priv->Bank7Data;
275 }
276 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
277 __func__, bank);
278 return AH_NULL;
279 }
280
281 /*
282 * Return indices surrounding the value in sorted integer lists.
283 *
284 * NB: the input list is assumed to be sorted in ascending order
285 */
286 static void
287 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
288 uint32_t *vlo, uint32_t *vhi)
289 {
290 int16_t target = v;
291 const uint16_t *ep = lp+listSize;
292 const uint16_t *tp;
293
294 /*
295 * Check first and last elements for out-of-bounds conditions.
296 */
297 if (target < lp[0]) {
298 *vlo = *vhi = 0;
299 return;
300 }
301 if (target >= ep[-1]) {
302 *vlo = *vhi = listSize - 1;
303 return;
304 }
305
306 /* look for value being near or between 2 values in list */
307 for (tp = lp; tp < ep; tp++) {
308 /*
309 * If value is close to the current value of the list
310 * then target is not between values, it is one of the values
311 */
312 if (*tp == target) {
313 *vlo = *vhi = tp - (const uint16_t *) lp;
314 return;
315 }
316 /*
317 * Look for value being between current value and next value
318 * if so return these 2 values
319 */
320 if (target < tp[1]) {
321 *vlo = tp - (const uint16_t *) lp;
322 *vhi = *vlo + 1;
323 return;
324 }
325 }
326 }
327
328 /*
329 * Fill the Vpdlist for indices Pmax-Pmin
330 */
331 static HAL_BOOL
332 ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
333 const int16_t *pwrList, const uint16_t *VpdList,
334 uint16_t numIntercepts,
335 uint16_t retVpdList[][64])
336 {
337 uint16_t ii, jj, kk;
338 int16_t currPwr = (int16_t)(2*Pmin);
339 /* since Pmin is pwr*2 and pwrList is 4*pwr */
340 uint32_t idxL, idxR;
341
342 ii = 0;
343 jj = 0;
344
345 if (numIntercepts < 2)
346 return AH_FALSE;
347
348 while (ii <= (uint16_t)(Pmax - Pmin)) {
349 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
350 numIntercepts, &(idxL), &(idxR));
351 if (idxR < 1)
352 idxR = 1; /* extrapolate below */
353 if (idxL == (uint32_t)(numIntercepts - 1))
354 idxL = numIntercepts - 2; /* extrapolate above */
355 if (pwrList[idxL] == pwrList[idxR])
356 kk = VpdList[idxL];
357 else
358 kk = (uint16_t)
359 (((currPwr - pwrList[idxL])*VpdList[idxR]+
360 (pwrList[idxR] - currPwr)*VpdList[idxL])/
361 (pwrList[idxR] - pwrList[idxL]));
362 retVpdList[pdGainIdx][ii] = kk;
363 ii++;
364 currPwr += 2; /* half dB steps */
365 }
366
367 return AH_TRUE;
368 }
369
370 /*
371 * Returns interpolated or the scaled up interpolated value
372 */
373 static int16_t
374 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
375 int16_t targetLeft, int16_t targetRight)
376 {
377 int16_t rv;
378
379 if (srcRight != srcLeft) {
380 rv = ((target - srcLeft)*targetRight +
381 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
382 } else {
383 rv = targetLeft;
384 }
385 return rv;
386 }
387
388 /*
389 * Uses the data points read from EEPROM to reconstruct the pdadc power table
390 * Called by ar5413SetPowerTable()
391 */
392 static int
393 ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
394 const RAW_DATA_STRUCT_2413 *pRawDataset,
395 uint16_t pdGainOverlap_t2,
396 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
397 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
398 {
399 struct ar5413State *priv = AR5413(ah);
400 #define VpdTable_L priv->vpdTable_L
401 #define VpdTable_R priv->vpdTable_R
402 #define VpdTable_I priv->vpdTable_I
403 uint32_t ii, jj, kk;
404 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
405 uint32_t idxL, idxR;
406 uint32_t numPdGainsUsed = 0;
407 /*
408 * If desired to support -ve power levels in future, just
409 * change pwr_I_0 to signed 5-bits.
410 */
411 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
412 /* to accomodate -ve power levels later on. */
413 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
414 /* to accomodate -ve power levels later on */
415 uint16_t numVpd = 0;
416 uint16_t Vpd_step;
417 int16_t tmpVal ;
418 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
419
420 /* Get upper lower index */
421 GetLowerUpperIndex(channel, pRawDataset->pChannels,
422 pRawDataset->numChannels, &(idxL), &(idxR));
423
424 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
425 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
426 /* work backwards 'cause highest pdGain for lowest power */
427 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
428 if (numVpd > 0) {
429 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
430 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
431 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
432 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
433 }
434 Pmin_t2[numPdGainsUsed] = (int16_t)
435 (Pmin_t2[numPdGainsUsed] / 2);
436 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
437 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
438 Pmax_t2[numPdGainsUsed] =
439 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
440 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
441 ar5413FillVpdTable(
442 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
443 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
444 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
445 );
446 ar5413FillVpdTable(
447 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
448 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
449 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
450 );
451 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
452 VpdTable_I[numPdGainsUsed][kk] =
453 interpolate_signed(
454 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
455 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
456 }
457 /* fill VpdTable_I for this pdGain */
458 numPdGainsUsed++;
459 }
460 /* if this pdGain is used */
461 }
462
463 *pMinCalPower = Pmin_t2[0];
464 kk = 0; /* index for the final table */
465 for (ii = 0; ii < numPdGainsUsed; ii++) {
466 if (ii == (numPdGainsUsed - 1))
467 pPdGainBoundaries[ii] = Pmax_t2[ii] +
468 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
469 else
470 pPdGainBoundaries[ii] = (uint16_t)
471 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
472 if (pPdGainBoundaries[ii] > 63) {
473 HALDEBUG(ah, HAL_DEBUG_ANY,
474 "%s: clamp pPdGainBoundaries[%d] %d\n",
475 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
476 pPdGainBoundaries[ii] = 63;
477 }
478
479 /* Find starting index for this pdGain */
480 if (ii == 0)
481 ss = 0; /* for the first pdGain, start from index 0 */
482 else
483 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
484 pdGainOverlap_t2;
485 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
486 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
487 /*
488 *-ve ss indicates need to extrapolate data below for this pdGain
489 */
490 while (ss < 0) {
491 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
492 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
493 ss++;
494 }
495
496 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
497 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
498 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
499
500 while (ss < (int16_t)maxIndex)
501 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
502
503 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
504 VpdTable_I[ii][sizeCurrVpdTable-2]);
505 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
506 /*
507 * for last gain, pdGainBoundary == Pmax_t2, so will
508 * have to extrapolate
509 */
510 if (tgtIndex > maxIndex) { /* need to extrapolate above */
511 while(ss < (int16_t)tgtIndex) {
512 tmpVal = (uint16_t)
513 (VpdTable_I[ii][sizeCurrVpdTable-1] +
514 (ss-maxIndex)*Vpd_step);
515 pPDADCValues[kk++] = (tmpVal > 127) ?
516 127 : tmpVal;
517 ss++;
518 }
519 } /* extrapolated above */
520 } /* for all pdGainUsed */
521
522 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
523 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
524 ii++;
525 }
526 while (kk < 128) {
527 pPDADCValues[kk] = pPDADCValues[kk-1];
528 kk++;
529 }
530
531 return numPdGainsUsed;
532 #undef VpdTable_L
533 #undef VpdTable_R
534 #undef VpdTable_I
535 }
536
537 static HAL_BOOL
538 ar5413SetPowerTable(struct ath_hal *ah,
539 int16_t *minPower, int16_t *maxPower,
540 const struct ieee80211_channel *chan,
541 uint16_t *rfXpdGain)
542 {
543 struct ath_hal_5212 *ahp = AH5212(ah);
544 uint16_t freq = ath_hal_gethwchannel(ah, chan);
545 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
546 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
547 uint16_t pdGainOverlap_t2;
548 int16_t minCalPower5413_t2;
549 uint16_t *pdadcValues = ahp->ah_pcdacTable;
550 uint16_t gainBoundaries[4];
551 uint32_t reg32, regoffset;
552 int i, numPdGainsUsed;
553 #ifndef AH_USE_INIPDGAIN
554 uint32_t tpcrg1;
555 #endif
556
557 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
558 __func__, chan->ic_freq, chan->ic_flags);
559
560 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
561 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
562 else if (IEEE80211_IS_CHAN_B(chan))
563 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
564 else {
565 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
566 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
567 }
568
569 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
570 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
571
572 numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,
573 freq, pRawDataset, pdGainOverlap_t2,
574 &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
575 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
576
577 #ifdef AH_USE_INIPDGAIN
578 /*
579 * Use pd_gains curve from eeprom; Atheros always uses
580 * the default curve from the ini file but some vendors
581 * (e.g. Zcomax) want to override this curve and not
582 * honoring their settings results in tx power 5dBm low.
583 */
584 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
585 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
586 #else
587 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
588 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
589 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
590 switch (numPdGainsUsed) {
591 case 3:
592 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
593 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
594 /* fall thru... */
595 case 2:
596 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
597 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
598 /* fall thru... */
599 case 1:
600 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
601 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
602 break;
603 }
604 #ifdef AH_DEBUG
605 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
606 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
607 "pd_gains (default 0x%x, calculated 0x%x)\n",
608 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
609 #endif
610 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
611 #endif
612
613 /*
614 * Note the pdadc table may not start at 0 dBm power, could be
615 * negative or greater than 0. Need to offset the power
616 * values by the amount of minPower for griffin
617 */
618 if (minCalPower5413_t2 != 0)
619 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
620 else
621 ahp->ah_txPowerIndexOffset = 0;
622
623 /* Finally, write the power values into the baseband power table */
624 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
625 for (i = 0; i < 32; i++) {
626 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
627 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
628 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
629 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
630 OS_REG_WRITE(ah, regoffset, reg32);
631 regoffset += 4;
632 }
633
634 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
635 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
636 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
637 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
638 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
639 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
640
641 return AH_TRUE;
642 }
643
644 static int16_t
645 ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
646 {
647 uint32_t ii,jj;
648 uint16_t Pmin=0,numVpd;
649
650 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
651 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
652 /* work backwards 'cause highest pdGain for lowest power */
653 numVpd = data->pDataPerPDGain[jj].numVpd;
654 if (numVpd > 0) {
655 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
656 return(Pmin);
657 }
658 }
659 return(Pmin);
660 }
661
662 static int16_t
663 ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
664 {
665 uint32_t ii;
666 uint16_t Pmax=0,numVpd;
667
668 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
669 /* work forwards cuase lowest pdGain for highest power */
670 numVpd = data->pDataPerPDGain[ii].numVpd;
671 if (numVpd > 0) {
672 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
673 return(Pmax);
674 }
675 }
676 return(Pmax);
677 }
678
679 static HAL_BOOL
680 ar5413GetChannelMaxMinPower(struct ath_hal *ah,
681 const struct ieee80211_channel *chan,
682 int16_t *maxPow, int16_t *minPow)
683 {
684 uint16_t freq = chan->ic_freq; /* NB: never mapped */
685 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
686 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
687 const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;
688 uint16_t numChannels;
689 int totalD,totalF, totalMin,last, i;
690
691 *maxPow = 0;
692
693 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
694 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
695 else if (IEEE80211_IS_CHAN_B(chan))
696 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
697 else {
698 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
699 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
700 }
701
702 numChannels = pRawDataset->numChannels;
703 data = pRawDataset->pDataPerChannel;
704
705 /* Make sure the channel is in the range of the TP values
706 * (freq piers)
707 */
708 if (numChannels < 1)
709 return(AH_FALSE);
710
711 if ((freq < data[0].channelValue) ||
712 (freq > data[numChannels-1].channelValue)) {
713 if (freq < data[0].channelValue) {
714 *maxPow = ar5413GetMaxPower(ah, &data[0]);
715 *minPow = ar5413GetMinPower(ah, &data[0]);
716 return(AH_TRUE);
717 } else {
718 *maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
719 *minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
720 return(AH_TRUE);
721 }
722 }
723
724 /* Linearly interpolate the power value now */
725 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
726 last = i++);
727 totalD = data[i].channelValue - data[last].channelValue;
728 if (totalD > 0) {
729 totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
730 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
731 ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
732 totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
733 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
734 ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
735 return(AH_TRUE);
736 } else {
737 if (freq == data[i].channelValue) {
738 *maxPow = ar5413GetMaxPower(ah, &data[i]);
739 *minPow = ar5413GetMinPower(ah, &data[i]);
740 return(AH_TRUE);
741 } else
742 return(AH_FALSE);
743 }
744 }
745
746 /*
747 * Free memory for analog bank scratch buffers
748 */
749 static void
750 ar5413RfDetach(struct ath_hal *ah)
751 {
752 struct ath_hal_5212 *ahp = AH5212(ah);
753
754 HALASSERT(ahp->ah_rfHal != AH_NULL);
755 ath_hal_free(ahp->ah_rfHal);
756 ahp->ah_rfHal = AH_NULL;
757 }
758
759 /*
760 * Allocate memory for analog bank scratch buffers
761 * Scratch Buffer will be reinitialized every reset so no need to zero now
762 */
763 static HAL_BOOL
764 ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
765 {
766 struct ath_hal_5212 *ahp = AH5212(ah);
767 struct ar5413State *priv;
768
769 HALASSERT(ah->ah_magic == AR5212_MAGIC);
770
771 HALASSERT(ahp->ah_rfHal == AH_NULL);
772 priv = ath_hal_malloc(sizeof(struct ar5413State));
773 if (priv == AH_NULL) {
774 HALDEBUG(ah, HAL_DEBUG_ANY,
775 "%s: cannot allocate private state\n", __func__);
776 *status = HAL_ENOMEM; /* XXX */
777 return AH_FALSE;
778 }
779 priv->base.rfDetach = ar5413RfDetach;
780 priv->base.writeRegs = ar5413WriteRegs;
781 priv->base.getRfBank = ar5413GetRfBank;
782 priv->base.setChannel = ar5413SetChannel;
783 priv->base.setRfRegs = ar5413SetRfRegs;
784 priv->base.setPowerTable = ar5413SetPowerTable;
785 priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
786 priv->base.getNfAdjust = ar5212GetNfAdjust;
787
788 ahp->ah_pcdacTable = priv->pcdacTable;
789 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
790 ahp->ah_rfHal = &priv->base;
791
792 return AH_TRUE;
793 }
794
795 static HAL_BOOL
796 ar5413Probe(struct ath_hal *ah)
797 {
798 return IS_5413(ah);
799 }
800 AH_RF(RF5413, ar5413Probe, ar5413RfAttach);
DragonFly BSD