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Remove empty DragonFly CVS IDs.
[dragonfly.git] / sys / dev / netif / ath / hal / ath_hal / ar5212 / ar2425.c
blob48a3fd54814b1a91a050f3a3e7bcad66df4ff0ad
1 /*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar2425.c 188979 2009-02-24 01:07:06Z sam $
18 */
19 #include "opt_ah.h"
20
21 #include "ah.h"
22 #include "ah_internal.h"
23
24 #include "ar5212/ar5212.h"
25 #include "ar5212/ar5212reg.h"
26 #include "ar5212/ar5212phy.h"
27
28 #include "ah_eeprom_v3.h"
29
30 #define AH_5212_2425
31 #define AH_5212_2417
32 #include "ar5212/ar5212.ini"
33
34 struct ar2425State {
35 RF_HAL_FUNCS base; /* public state, must be first */
36 uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
37
38 uint32_t Bank1Data[NELEM(ar5212Bank1_2425)];
39 uint32_t Bank2Data[NELEM(ar5212Bank2_2425)];
40 uint32_t Bank3Data[NELEM(ar5212Bank3_2425)];
41 uint32_t Bank6Data[NELEM(ar5212Bank6_2425)]; /* 2417 is same size */
42 uint32_t Bank7Data[NELEM(ar5212Bank7_2425)];
43 };
44 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal)
45
46 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
47 uint32_t numBits, uint32_t firstBit, uint32_t column);
48
49 static void
50 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
51 int writes)
52 {
53 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
54 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes);
55 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes);
56 #if 0
57 /*
58 * for SWAN similar to Condor
59 * Bit 0 enables link to go to L1 when MAC goes to sleep.
60 * Bit 3 enables the loop back the link down to reset.
61 */
62 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) {
63 OS_REG_WRITE(ah, AR_PCIE_PMC,
64 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET);
65 }
66 /*
67 * for Standby issue in Swan/Condor.
68 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips
69 * before last Training Sequence 2 (TS2)
70 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert
71 * Power Reset along with PCI Reset
72 */
73 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2);
74 #endif
75 }
76
77 /*
78 * Take the MHz channel value and set the Channel value
79 *
80 * ASSUMES: Writes enabled to analog bus
81 */
82 static HAL_BOOL
83 ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
84 {
85 uint16_t freq = ath_hal_gethwchannel(ah, chan);
86 uint32_t channelSel = 0;
87 uint32_t bModeSynth = 0;
88 uint32_t aModeRefSel = 0;
89 uint32_t reg32 = 0;
90
91 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
92
93 if (freq < 4800) {
94 uint32_t txctl;
95
96 channelSel = freq - 2272;
97 channelSel = ath_hal_reverseBits(channelSel, 8);
98
99 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
100 if (freq == 2484) {
101 // Enable channel spreading for channel 14
102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
103 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
104 } else {
105 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
106 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
107 }
108
109 } else if (((freq % 5) == 2) && (freq <= 5435)) {
110 freq = freq - 2; /* Align to even 5MHz raster */
111 channelSel = ath_hal_reverseBits(
112 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
113 aModeRefSel = ath_hal_reverseBits(0, 2);
114 } else if ((freq % 20) == 0 && freq >= 5120) {
115 channelSel = ath_hal_reverseBits(
116 ((freq - 4800) / 20 << 2), 8);
117 aModeRefSel = ath_hal_reverseBits(1, 2);
118 } else if ((freq % 10) == 0) {
119 channelSel = ath_hal_reverseBits(
120 ((freq - 4800) / 10 << 1), 8);
121 aModeRefSel = ath_hal_reverseBits(1, 2);
122 } else if ((freq % 5) == 0) {
123 channelSel = ath_hal_reverseBits(
124 (freq - 4800) / 5, 8);
125 aModeRefSel = ath_hal_reverseBits(1, 2);
126 } else {
127 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
128 __func__, freq);
129 return AH_FALSE;
130 }
131
132 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
133 (1 << 12) | 0x1;
134 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
135
136 reg32 >>= 8;
137 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
138
139 AH_PRIVATE(ah)->ah_curchan = chan;
140 return AH_TRUE;
141 }
142
143 /*
144 * Reads EEPROM header info from device structure and programs
145 * all rf registers
146 *
147 * REQUIRES: Access to the analog rf device
148 */
149 static HAL_BOOL
150 ar2425SetRfRegs(struct ath_hal *ah,
151 const struct ieee80211_channel *chan,
152 uint16_t modesIndex, uint16_t *rfXpdGain)
153 {
154 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
155 int i; \
156 for (i = 0; i < NELEM(ar5212Bank##_ix##_2425); i++) \
157 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
158 } while (0)
159 struct ath_hal_5212 *ahp = AH5212(ah);
160 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
161 struct ar2425State *priv = AR2425(ah);
162 uint16_t ob2GHz = 0, db2GHz = 0;
163 int regWrites = 0;
164
165 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
166 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
167
168 HALASSERT(priv);
169
170 /* Setup rf parameters */
171 if (IEEE80211_IS_CHAN_B(chan)) {
172 ob2GHz = ee->ee_obFor24;
173 db2GHz = ee->ee_dbFor24;
174 } else {
175 ob2GHz = ee->ee_obFor24g;
176 db2GHz = ee->ee_dbFor24g;
177 }
178
179 /* Bank 1 Write */
180 RF_BANK_SETUP(priv, 1, 1);
181
182 /* Bank 2 Write */
183 RF_BANK_SETUP(priv, 2, modesIndex);
184
185 /* Bank 3 Write */
186 RF_BANK_SETUP(priv, 3, modesIndex);
187
188 /* Bank 6 Write */
189 RF_BANK_SETUP(priv, 6, modesIndex);
190
191 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
192 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
193
194 /* Bank 7 Setup */
195 RF_BANK_SETUP(priv, 7, modesIndex);
196
197 /* Write Analog registers */
198 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
199 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
200 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
201 if (IS_2417(ah)) {
202 HALASSERT(NELEM(ar5212Bank6_2425) == NELEM(ar5212Bank6_2417));
203 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data,
204 regWrites);
205 } else
206 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data,
207 regWrites);
208 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
209
210 /* Now that we have reprogrammed rfgain value, clear the flag. */
211 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
212
213 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
214 return AH_TRUE;
215 #undef RF_BANK_SETUP
216 }
217
218 /*
219 * Return a reference to the requested RF Bank.
220 */
221 static uint32_t *
222 ar2425GetRfBank(struct ath_hal *ah, int bank)
223 {
224 struct ar2425State *priv = AR2425(ah);
225
226 HALASSERT(priv != AH_NULL);
227 switch (bank) {
228 case 1: return priv->Bank1Data;
229 case 2: return priv->Bank2Data;
230 case 3: return priv->Bank3Data;
231 case 6: return priv->Bank6Data;
232 case 7: return priv->Bank7Data;
233 }
234 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
235 __func__, bank);
236 return AH_NULL;
237 }
238
239 /*
240 * Return indices surrounding the value in sorted integer lists.
241 *
242 * NB: the input list is assumed to be sorted in ascending order
243 */
244 static void
245 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
246 uint32_t *vlo, uint32_t *vhi)
247 {
248 int16_t target = v;
249 const uint16_t *ep = lp+listSize;
250 const uint16_t *tp;
251
252 /*
253 * Check first and last elements for out-of-bounds conditions.
254 */
255 if (target < lp[0]) {
256 *vlo = *vhi = 0;
257 return;
258 }
259 if (target >= ep[-1]) {
260 *vlo = *vhi = listSize - 1;
261 return;
262 }
263
264 /* look for value being near or between 2 values in list */
265 for (tp = lp; tp < ep; tp++) {
266 /*
267 * If value is close to the current value of the list
268 * then target is not between values, it is one of the values
269 */
270 if (*tp == target) {
271 *vlo = *vhi = tp - (const uint16_t *) lp;
272 return;
273 }
274 /*
275 * Look for value being between current value and next value
276 * if so return these 2 values
277 */
278 if (target < tp[1]) {
279 *vlo = tp - (const uint16_t *) lp;
280 *vhi = *vlo + 1;
281 return;
282 }
283 }
284 }
285
286 /*
287 * Fill the Vpdlist for indices Pmax-Pmin
288 */
289 static HAL_BOOL
290 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
291 const int16_t *pwrList, const uint16_t *VpdList,
292 uint16_t numIntercepts,
293 uint16_t retVpdList[][64])
294 {
295 uint16_t ii, jj, kk;
296 int16_t currPwr = (int16_t)(2*Pmin);
297 /* since Pmin is pwr*2 and pwrList is 4*pwr */
298 uint32_t idxL, idxR;
299
300 ii = 0;
301 jj = 0;
302
303 if (numIntercepts < 2)
304 return AH_FALSE;
305
306 while (ii <= (uint16_t)(Pmax - Pmin)) {
307 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
308 numIntercepts, &(idxL), &(idxR));
309 if (idxR < 1)
310 idxR = 1; /* extrapolate below */
311 if (idxL == (uint32_t)(numIntercepts - 1))
312 idxL = numIntercepts - 2; /* extrapolate above */
313 if (pwrList[idxL] == pwrList[idxR])
314 kk = VpdList[idxL];
315 else
316 kk = (uint16_t)
317 (((currPwr - pwrList[idxL])*VpdList[idxR]+
318 (pwrList[idxR] - currPwr)*VpdList[idxL])/
319 (pwrList[idxR] - pwrList[idxL]));
320 retVpdList[pdGainIdx][ii] = kk;
321 ii++;
322 currPwr += 2; /* half dB steps */
323 }
324
325 return AH_TRUE;
326 }
327
328 /*
329 * Returns interpolated or the scaled up interpolated value
330 */
331 static int16_t
332 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
333 int16_t targetLeft, int16_t targetRight)
334 {
335 int16_t rv;
336
337 if (srcRight != srcLeft) {
338 rv = ((target - srcLeft)*targetRight +
339 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
340 } else {
341 rv = targetLeft;
342 }
343 return rv;
344 }
345
346 /*
347 * Uses the data points read from EEPROM to reconstruct the pdadc power table
348 * Called by ar2425SetPowerTable()
349 */
350 static void
351 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
352 const RAW_DATA_STRUCT_2413 *pRawDataset,
353 uint16_t pdGainOverlap_t2,
354 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
355 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
356 {
357 /* Note the items statically allocated below are to reduce stack usage */
358 uint32_t ii, jj, kk;
359 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
360 uint32_t idxL, idxR;
361 uint32_t numPdGainsUsed = 0;
362 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
363 /* filled out Vpd table for all pdGains (chanL) */
364 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
365 /* filled out Vpd table for all pdGains (chanR) */
366 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
367 /* filled out Vpd table for all pdGains (interpolated) */
368 /*
369 * If desired to support -ve power levels in future, just
370 * change pwr_I_0 to signed 5-bits.
371 */
372 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
373 /* to accomodate -ve power levels later on. */
374 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
375 /* to accomodate -ve power levels later on */
376 uint16_t numVpd = 0;
377 uint16_t Vpd_step;
378 int16_t tmpVal ;
379 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
380
381 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__);
382
383 /* Get upper lower index */
384 GetLowerUpperIndex(channel, pRawDataset->pChannels,
385 pRawDataset->numChannels, &(idxL), &(idxR));
386
387 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
388 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
389 /* work backwards 'cause highest pdGain for lowest power */
390 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
391 if (numVpd > 0) {
392 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
393 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
394 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
395 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
396 }
397 Pmin_t2[numPdGainsUsed] = (int16_t)
398 (Pmin_t2[numPdGainsUsed] / 2);
399 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
400 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
401 Pmax_t2[numPdGainsUsed] =
402 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
403 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
404 ar2425FillVpdTable(
405 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
406 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
407 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
408 );
409 ar2425FillVpdTable(
410 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
411 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
412 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
413 );
414 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
415 VpdTable_I[numPdGainsUsed][kk] =
416 interpolate_signed(
417 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
418 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
419 }
420 /* fill VpdTable_I for this pdGain */
421 numPdGainsUsed++;
422 }
423 /* if this pdGain is used */
424 }
425
426 *pMinCalPower = Pmin_t2[0];
427 kk = 0; /* index for the final table */
428 for (ii = 0; ii < numPdGainsUsed; ii++) {
429 if (ii == (numPdGainsUsed - 1))
430 pPdGainBoundaries[ii] = Pmax_t2[ii] +
431 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
432 else
433 pPdGainBoundaries[ii] = (uint16_t)
434 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
435
436 /* Find starting index for this pdGain */
437 if (ii == 0)
438 ss = 0; /* for the first pdGain, start from index 0 */
439 else
440 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
441 pdGainOverlap_t2;
442 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
443 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
444 /*
445 *-ve ss indicates need to extrapolate data below for this pdGain
446 */
447 while (ss < 0) {
448 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
449 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
450 ss++;
451 }
452
453 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
454 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
455 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
456
457 while (ss < (int16_t)maxIndex)
458 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
459
460 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
461 VpdTable_I[ii][sizeCurrVpdTable-2]);
462 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
463 /*
464 * for last gain, pdGainBoundary == Pmax_t2, so will
465 * have to extrapolate
466 */
467 if (tgtIndex > maxIndex) { /* need to extrapolate above */
468 while(ss < (int16_t)tgtIndex) {
469 tmpVal = (uint16_t)
470 (VpdTable_I[ii][sizeCurrVpdTable-1] +
471 (ss-maxIndex)*Vpd_step);
472 pPDADCValues[kk++] = (tmpVal > 127) ?
473 127 : tmpVal;
474 ss++;
475 }
476 } /* extrapolated above */
477 } /* for all pdGainUsed */
478
479 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
480 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
481 ii++;
482 }
483 while (kk < 128) {
484 pPDADCValues[kk] = pPDADCValues[kk-1];
485 kk++;
486 }
487
488 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
489 }
490
491
492 /* Same as 2413 set power table */
493 static HAL_BOOL
494 ar2425SetPowerTable(struct ath_hal *ah,
495 int16_t *minPower, int16_t *maxPower,
496 const struct ieee80211_channel *chan,
497 uint16_t *rfXpdGain)
498 {
499 uint16_t freq = ath_hal_gethwchannel(ah, chan);
500 struct ath_hal_5212 *ahp = AH5212(ah);
501 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
502 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
503 uint16_t pdGainOverlap_t2;
504 int16_t minCalPower2413_t2;
505 uint16_t *pdadcValues = ahp->ah_pcdacTable;
506 uint16_t gainBoundaries[4];
507 uint32_t i, reg32, regoffset;
508
509 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n",
510 __func__, freq, chan->ic_flags);
511
512 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
513 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
514 else if (IEEE80211_IS_CHAN_B(chan))
515 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
516 else {
517 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__);
518 return AH_FALSE;
519 }
520
521 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
522 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
523
524 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq,
525 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries,
526 rfXpdGain, pdadcValues);
527
528 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
529 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
530
531 /*
532 * Note the pdadc table may not start at 0 dBm power, could be
533 * negative or greater than 0. Need to offset the power
534 * values by the amount of minPower for griffin
535 */
536 if (minCalPower2413_t2 != 0)
537 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
538 else
539 ahp->ah_txPowerIndexOffset = 0;
540
541 /* Finally, write the power values into the baseband power table */
542 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
543 for (i = 0; i < 32; i++) {
544 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
545 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
546 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
547 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
548 OS_REG_WRITE(ah, regoffset, reg32);
549 regoffset += 4;
550 }
551
552 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
553 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
554 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
555 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
556 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
557 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
558
559 return AH_TRUE;
560 }
561
562 static int16_t
563 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
564 {
565 uint32_t ii,jj;
566 uint16_t Pmin=0,numVpd;
567
568 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
569 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
570 /* work backwards 'cause highest pdGain for lowest power */
571 numVpd = data->pDataPerPDGain[jj].numVpd;
572 if (numVpd > 0) {
573 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
574 return(Pmin);
575 }
576 }
577 return(Pmin);
578 }
579
580 static int16_t
581 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
582 {
583 uint32_t ii;
584 uint16_t Pmax=0,numVpd;
585
586 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
587 /* work forwards cuase lowest pdGain for highest power */
588 numVpd = data->pDataPerPDGain[ii].numVpd;
589 if (numVpd > 0) {
590 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
591 return(Pmax);
592 }
593 }
594 return(Pmax);
595 }
596
597 static
598 HAL_BOOL
599 ar2425GetChannelMaxMinPower(struct ath_hal *ah,
600 const struct ieee80211_channel *chan,
601 int16_t *maxPow, int16_t *minPow)
602 {
603 uint16_t freq = chan->ic_freq; /* NB: never mapped */
604 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
605 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
606 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
607 uint16_t numChannels;
608 int totalD,totalF, totalMin,last, i;
609
610 *maxPow = 0;
611
612 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
613 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
614 else if (IEEE80211_IS_CHAN_B(chan))
615 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
616 else
617 return(AH_FALSE);
618
619 numChannels = pRawDataset->numChannels;
620 data = pRawDataset->pDataPerChannel;
621
622 /* Make sure the channel is in the range of the TP values
623 * (freq piers)
624 */
625 if (numChannels < 1)
626 return(AH_FALSE);
627
628 if ((freq < data[0].channelValue) ||
629 (freq > data[numChannels-1].channelValue)) {
630 if (freq < data[0].channelValue) {
631 *maxPow = ar2425GetMaxPower(ah, &data[0]);
632 *minPow = ar2425GetMinPower(ah, &data[0]);
633 return(AH_TRUE);
634 } else {
635 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]);
636 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]);
637 return(AH_TRUE);
638 }
639 }
640
641 /* Linearly interpolate the power value now */
642 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
643 last = i++);
644 totalD = data[i].channelValue - data[last].channelValue;
645 if (totalD > 0) {
646 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]);
647 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
648 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD);
649 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]);
650 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
651 ar2425GetMinPower(ah, &data[last])*totalD)/totalD);
652 return(AH_TRUE);
653 } else {
654 if (freq == data[i].channelValue) {
655 *maxPow = ar2425GetMaxPower(ah, &data[i]);
656 *minPow = ar2425GetMinPower(ah, &data[i]);
657 return(AH_TRUE);
658 } else
659 return(AH_FALSE);
660 }
661 }
662
663 /*
664 * Free memory for analog bank scratch buffers
665 */
666 static void
667 ar2425RfDetach(struct ath_hal *ah)
668 {
669 struct ath_hal_5212 *ahp = AH5212(ah);
670
671 HALASSERT(ahp->ah_rfHal != AH_NULL);
672 ath_hal_free(ahp->ah_rfHal);
673 ahp->ah_rfHal = AH_NULL;
674 }
675
676 /*
677 * Allocate memory for analog bank scratch buffers
678 * Scratch Buffer will be reinitialized every reset so no need to zero now
679 */
680 static HAL_BOOL
681 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status)
682 {
683 struct ath_hal_5212 *ahp = AH5212(ah);
684 struct ar2425State *priv;
685
686 HALASSERT(ah->ah_magic == AR5212_MAGIC);
687
688 HALASSERT(ahp->ah_rfHal == AH_NULL);
689 priv = ath_hal_malloc(sizeof(struct ar2425State));
690 if (priv == AH_NULL) {
691 HALDEBUG(ah, HAL_DEBUG_ANY,
692 "%s: cannot allocate private state\n", __func__);
693 *status = HAL_ENOMEM; /* XXX */
694 return AH_FALSE;
695 }
696 priv->base.rfDetach = ar2425RfDetach;
697 priv->base.writeRegs = ar2425WriteRegs;
698 priv->base.getRfBank = ar2425GetRfBank;
699 priv->base.setChannel = ar2425SetChannel;
700 priv->base.setRfRegs = ar2425SetRfRegs;
701 priv->base.setPowerTable = ar2425SetPowerTable;
702 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
703 priv->base.getNfAdjust = ar5212GetNfAdjust;
704
705 ahp->ah_pcdacTable = priv->pcdacTable;
706 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
707 ahp->ah_rfHal = &priv->base;
708
709 return AH_TRUE;
710 }
711
712 static HAL_BOOL
713 ar2425Probe(struct ath_hal *ah)
714 {
715 return IS_2425(ah) || IS_2417(ah);
716 }
717 AH_RF(RF2425, ar2425Probe, ar2425RfAttach);
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