Remove empty DragonFly CVS IDs.
[dragonfly.git] / sys / dev / netif / ath / hal / ath_hal / ar5212 / ar2316.c
blob1f938d8bc6d33fa61ebf37304444ed0ce25d95a7
1 /*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar2316.c 187831 2009-01-28 18:00:22Z sam $
19 #include "opt_ah.h"
21 #include "ah.h"
22 #include "ah_internal.h"
24 #include "ar5212/ar5212.h"
25 #include "ar5212/ar5212reg.h"
26 #include "ar5212/ar5212phy.h"
28 #include "ah_eeprom_v3.h"
30 #define AH_5212_2316
31 #include "ar5212/ar5212.ini"
33 typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2316;
34 typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2316;
35 #define PWR_TABLE_SIZE_2316 PWR_TABLE_SIZE_2413
37 struct ar2316State {
38 RF_HAL_FUNCS base; /* public state, must be first */
39 uint16_t pcdacTable[PWR_TABLE_SIZE_2316];
41 uint32_t Bank1Data[NELEM(ar5212Bank1_2316)];
42 uint32_t Bank2Data[NELEM(ar5212Bank2_2316)];
43 uint32_t Bank3Data[NELEM(ar5212Bank3_2316)];
44 uint32_t Bank6Data[NELEM(ar5212Bank6_2316)];
45 uint32_t Bank7Data[NELEM(ar5212Bank7_2316)];
48 * Private state for reduced stack usage.
50 /* filled out Vpd table for all pdGains (chanL) */
51 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
52 [MAX_PWR_RANGE_IN_HALF_DB];
53 /* filled out Vpd table for all pdGains (chanR) */
54 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
55 [MAX_PWR_RANGE_IN_HALF_DB];
56 /* filled out Vpd table for all pdGains (interpolated) */
57 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
58 [MAX_PWR_RANGE_IN_HALF_DB];
60 #define AR2316(ah) ((struct ar2316State *) AH5212(ah)->ah_rfHal)
62 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
63 uint32_t numBits, uint32_t firstBit, uint32_t column);
65 static void
66 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 int regWrites)
69 struct ath_hal_5212 *ahp = AH5212(ah);
71 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
72 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites);
73 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites);
75 /* For AP51 */
76 if (!ahp->ah_cwCalRequire) {
77 OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2));
78 } else {
79 ahp->ah_cwCalRequire = AH_FALSE;
84 * Take the MHz channel value and set the Channel value
86 * ASSUMES: Writes enabled to analog bus
88 static HAL_BOOL
89 ar2316SetChannel(struct ath_hal *ah, struct ieee80211_channel *chan)
91 uint16_t freq = ath_hal_gethwchannel(ah, chan);
92 uint32_t channelSel = 0;
93 uint32_t bModeSynth = 0;
94 uint32_t aModeRefSel = 0;
95 uint32_t reg32 = 0;
97 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
99 if (freq < 4800) {
100 uint32_t txctl;
102 if (((freq - 2192) % 5) == 0) {
103 channelSel = ((freq - 672) * 2 - 3040)/10;
104 bModeSynth = 0;
105 } else if (((freq - 2224) % 5) == 0) {
106 channelSel = ((freq - 704) * 2 - 3040) / 10;
107 bModeSynth = 1;
108 } else {
109 HALDEBUG(ah, HAL_DEBUG_ANY,
110 "%s: invalid channel %u MHz\n",
111 __func__, freq);
112 return AH_FALSE;
115 channelSel = (channelSel << 2) & 0xff;
116 channelSel = ath_hal_reverseBits(channelSel, 8);
118 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
119 if (freq == 2484) {
120 /* Enable channel spreading for channel 14 */
121 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
122 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
123 } else {
124 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
125 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
127 } else if ((freq % 20) == 0 && freq >= 5120) {
128 channelSel = ath_hal_reverseBits(
129 ((freq - 4800) / 20 << 2), 8);
130 aModeRefSel = ath_hal_reverseBits(3, 2);
131 } else if ((freq % 10) == 0) {
132 channelSel = ath_hal_reverseBits(
133 ((freq - 4800) / 10 << 1), 8);
134 aModeRefSel = ath_hal_reverseBits(2, 2);
135 } else if ((freq % 5) == 0) {
136 channelSel = ath_hal_reverseBits(
137 (freq - 4800) / 5, 8);
138 aModeRefSel = ath_hal_reverseBits(1, 2);
139 } else {
140 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
141 __func__, freq);
142 return AH_FALSE;
145 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
146 (1 << 12) | 0x1;
147 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
149 reg32 >>= 8;
150 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
152 AH_PRIVATE(ah)->ah_curchan = chan;
153 return AH_TRUE;
157 * Reads EEPROM header info from device structure and programs
158 * all rf registers
160 * REQUIRES: Access to the analog rf device
162 static HAL_BOOL
163 ar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
164 uint16_t modesIndex, uint16_t *rfXpdGain)
166 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
167 int i; \
168 for (i = 0; i < NELEM(ar5212Bank##_ix##_2316); i++) \
169 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\
170 } while (0)
171 struct ath_hal_5212 *ahp = AH5212(ah);
172 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
173 uint16_t ob2GHz = 0, db2GHz = 0;
174 struct ar2316State *priv = AR2316(ah);
175 int regWrites = 0;
177 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
178 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
180 HALASSERT(priv != AH_NULL);
182 /* Setup rf parameters */
183 if (IEEE80211_IS_CHAN_B(chan)) {
184 ob2GHz = ee->ee_obFor24;
185 db2GHz = ee->ee_dbFor24;
186 } else {
187 ob2GHz = ee->ee_obFor24g;
188 db2GHz = ee->ee_dbFor24g;
191 /* Bank 1 Write */
192 RF_BANK_SETUP(priv, 1, 1);
194 /* Bank 2 Write */
195 RF_BANK_SETUP(priv, 2, modesIndex);
197 /* Bank 3 Write */
198 RF_BANK_SETUP(priv, 3, modesIndex);
200 /* Bank 6 Write */
201 RF_BANK_SETUP(priv, 6, modesIndex);
203 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 178, 0);
204 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 175, 0);
206 /* Bank 7 Setup */
207 RF_BANK_SETUP(priv, 7, modesIndex);
209 /* Write Analog registers */
210 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites);
211 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites);
212 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites);
213 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites);
214 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites);
216 /* Now that we have reprogrammed rfgain value, clear the flag. */
217 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
219 return AH_TRUE;
220 #undef RF_BANK_SETUP
224 * Return a reference to the requested RF Bank.
226 static uint32_t *
227 ar2316GetRfBank(struct ath_hal *ah, int bank)
229 struct ar2316State *priv = AR2316(ah);
231 HALASSERT(priv != AH_NULL);
232 switch (bank) {
233 case 1: return priv->Bank1Data;
234 case 2: return priv->Bank2Data;
235 case 3: return priv->Bank3Data;
236 case 6: return priv->Bank6Data;
237 case 7: return priv->Bank7Data;
239 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
240 __func__, bank);
241 return AH_NULL;
245 * Return indices surrounding the value in sorted integer lists.
247 * NB: the input list is assumed to be sorted in ascending order
249 static void
250 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
251 uint32_t *vlo, uint32_t *vhi)
253 int16_t target = v;
254 const int16_t *ep = lp+listSize;
255 const int16_t *tp;
258 * Check first and last elements for out-of-bounds conditions.
260 if (target < lp[0]) {
261 *vlo = *vhi = 0;
262 return;
264 if (target >= ep[-1]) {
265 *vlo = *vhi = listSize - 1;
266 return;
269 /* look for value being near or between 2 values in list */
270 for (tp = lp; tp < ep; tp++) {
272 * If value is close to the current value of the list
273 * then target is not between values, it is one of the values
275 if (*tp == target) {
276 *vlo = *vhi = tp - (const int16_t *) lp;
277 return;
280 * Look for value being between current value and next value
281 * if so return these 2 values
283 if (target < tp[1]) {
284 *vlo = tp - (const int16_t *) lp;
285 *vhi = *vlo + 1;
286 return;
292 * Fill the Vpdlist for indices Pmax-Pmin
294 static HAL_BOOL
295 ar2316FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
296 const int16_t *pwrList, const int16_t *VpdList,
297 uint16_t numIntercepts, uint16_t retVpdList[][64])
299 uint16_t ii, jj, kk;
300 int16_t currPwr = (int16_t)(2*Pmin);
301 /* since Pmin is pwr*2 and pwrList is 4*pwr */
302 uint32_t idxL, idxR;
304 ii = 0;
305 jj = 0;
307 if (numIntercepts < 2)
308 return AH_FALSE;
310 while (ii <= (uint16_t)(Pmax - Pmin)) {
311 GetLowerUpperIndex(currPwr, pwrList, numIntercepts,
312 &(idxL), &(idxR));
313 if (idxR < 1)
314 idxR = 1; /* extrapolate below */
315 if (idxL == (uint32_t)(numIntercepts - 1))
316 idxL = numIntercepts - 2; /* extrapolate above */
317 if (pwrList[idxL] == pwrList[idxR])
318 kk = VpdList[idxL];
319 else
320 kk = (uint16_t)
321 (((currPwr - pwrList[idxL])*VpdList[idxR]+
322 (pwrList[idxR] - currPwr)*VpdList[idxL])/
323 (pwrList[idxR] - pwrList[idxL]));
324 retVpdList[pdGainIdx][ii] = kk;
325 ii++;
326 currPwr += 2; /* half dB steps */
329 return AH_TRUE;
333 * Returns interpolated or the scaled up interpolated value
335 static int16_t
336 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
337 int16_t targetLeft, int16_t targetRight)
339 int16_t rv;
341 if (srcRight != srcLeft) {
342 rv = ((target - srcLeft)*targetRight +
343 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
344 } else {
345 rv = targetLeft;
347 return rv;
351 * Uses the data points read from EEPROM to reconstruct the pdadc power table
352 * Called by ar2316SetPowerTable()
354 static int
355 ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
356 const RAW_DATA_STRUCT_2316 *pRawDataset,
357 uint16_t pdGainOverlap_t2,
358 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
359 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
361 struct ar2316State *priv = AR2316(ah);
362 #define VpdTable_L priv->vpdTable_L
363 #define VpdTable_R priv->vpdTable_R
364 #define VpdTable_I priv->vpdTable_I
365 uint32_t ii, jj, kk;
366 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
367 uint32_t idxL, idxR;
368 uint32_t numPdGainsUsed = 0;
370 * If desired to support -ve power levels in future, just
371 * change pwr_I_0 to signed 5-bits.
373 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
374 /* to accomodate -ve power levels later on. */
375 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
376 /* to accomodate -ve power levels later on */
377 uint16_t numVpd = 0;
378 uint16_t Vpd_step;
379 int16_t tmpVal ;
380 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
382 /* Get upper lower index */
383 GetLowerUpperIndex(channel, pRawDataset->pChannels,
384 pRawDataset->numChannels, &(idxL), &(idxR));
386 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
387 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
388 /* work backwards 'cause highest pdGain for lowest power */
389 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
390 if (numVpd > 0) {
391 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
392 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
393 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
394 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
396 Pmin_t2[numPdGainsUsed] = (int16_t)
397 (Pmin_t2[numPdGainsUsed] / 2);
398 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
399 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
400 Pmax_t2[numPdGainsUsed] =
401 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
402 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
403 ar2316FillVpdTable(
404 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
405 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
406 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
408 ar2316FillVpdTable(
409 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
410 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
411 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
413 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
414 VpdTable_I[numPdGainsUsed][kk] =
415 interpolate_signed(
416 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
417 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
419 /* fill VpdTable_I for this pdGain */
420 numPdGainsUsed++;
422 /* if this pdGain is used */
425 *pMinCalPower = Pmin_t2[0];
426 kk = 0; /* index for the final table */
427 for (ii = 0; ii < numPdGainsUsed; ii++) {
428 if (ii == (numPdGainsUsed - 1))
429 pPdGainBoundaries[ii] = Pmax_t2[ii] +
430 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
431 else
432 pPdGainBoundaries[ii] = (uint16_t)
433 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
434 if (pPdGainBoundaries[ii] > 63) {
435 HALDEBUG(ah, HAL_DEBUG_ANY,
436 "%s: clamp pPdGainBoundaries[%d] %d\n",
437 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
438 pPdGainBoundaries[ii] = 63;
441 /* Find starting index for this pdGain */
442 if (ii == 0)
443 ss = 0; /* for the first pdGain, start from index 0 */
444 else
445 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
446 pdGainOverlap_t2;
447 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
448 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
450 *-ve ss indicates need to extrapolate data below for this pdGain
452 while (ss < 0) {
453 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
454 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
455 ss++;
458 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
459 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
460 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
462 while (ss < (int16_t)maxIndex)
463 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
465 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
466 VpdTable_I[ii][sizeCurrVpdTable-2]);
467 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
469 * for last gain, pdGainBoundary == Pmax_t2, so will
470 * have to extrapolate
472 if (tgtIndex > maxIndex) { /* need to extrapolate above */
473 while(ss < (int16_t)tgtIndex) {
474 tmpVal = (uint16_t)
475 (VpdTable_I[ii][sizeCurrVpdTable-1] +
476 (ss-maxIndex)*Vpd_step);
477 pPDADCValues[kk++] = (tmpVal > 127) ?
478 127 : tmpVal;
479 ss++;
481 } /* extrapolated above */
482 } /* for all pdGainUsed */
484 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
485 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
486 ii++;
488 while (kk < 128) {
489 pPDADCValues[kk] = pPDADCValues[kk-1];
490 kk++;
493 return numPdGainsUsed;
494 #undef VpdTable_L
495 #undef VpdTable_R
496 #undef VpdTable_I
499 static HAL_BOOL
500 ar2316SetPowerTable(struct ath_hal *ah,
501 int16_t *minPower, int16_t *maxPower,
502 const struct ieee80211_channel *chan,
503 uint16_t *rfXpdGain)
505 struct ath_hal_5212 *ahp = AH5212(ah);
506 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
507 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;
508 uint16_t pdGainOverlap_t2;
509 int16_t minCalPower2316_t2;
510 uint16_t *pdadcValues = ahp->ah_pcdacTable;
511 uint16_t gainBoundaries[4];
512 uint32_t reg32, regoffset;
513 int i, numPdGainsUsed;
514 #ifndef AH_USE_INIPDGAIN
515 uint32_t tpcrg1;
516 #endif
518 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
519 __func__, chan->ic_freq, chan->ic_flags);
521 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
522 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
523 else if (IEEE80211_IS_CHAN_B(chan))
524 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
525 else {
526 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
527 return AH_FALSE;
530 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
531 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
533 numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah,
534 chan->channel, pRawDataset, pdGainOverlap_t2,
535 &minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues);
536 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
538 #ifdef AH_USE_INIPDGAIN
540 * Use pd_gains curve from eeprom; Atheros always uses
541 * the default curve from the ini file but some vendors
542 * (e.g. Zcomax) want to override this curve and not
543 * honoring their settings results in tx power 5dBm low.
545 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
546 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
547 #else
548 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
549 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
550 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
551 switch (numPdGainsUsed) {
552 case 3:
553 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
554 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
555 /* fall thru... */
556 case 2:
557 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
558 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
559 /* fall thru... */
560 case 1:
561 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
562 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
563 break;
565 #ifdef AH_DEBUG
566 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
567 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
568 "pd_gains (default 0x%x, calculated 0x%x)\n",
569 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
570 #endif
571 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
572 #endif
575 * Note the pdadc table may not start at 0 dBm power, could be
576 * negative or greater than 0. Need to offset the power
577 * values by the amount of minPower for griffin
579 if (minCalPower2316_t2 != 0)
580 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2);
581 else
582 ahp->ah_txPowerIndexOffset = 0;
584 /* Finally, write the power values into the baseband power table */
585 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
586 for (i = 0; i < 32; i++) {
587 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
588 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
589 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
590 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
591 OS_REG_WRITE(ah, regoffset, reg32);
592 regoffset += 4;
595 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
596 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
597 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
598 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
599 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
600 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
602 return AH_TRUE;
605 static int16_t
606 ar2316GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)
608 uint32_t ii,jj;
609 uint16_t Pmin=0,numVpd;
611 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
612 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
613 /* work backwards 'cause highest pdGain for lowest power */
614 numVpd = data->pDataPerPDGain[jj].numVpd;
615 if (numVpd > 0) {
616 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
617 return(Pmin);
620 return(Pmin);
623 static int16_t
624 ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)
626 uint32_t ii;
627 uint16_t Pmax=0,numVpd;
629 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
630 /* work forwards cuase lowest pdGain for highest power */
631 numVpd = data->pDataPerPDGain[ii].numVpd;
632 if (numVpd > 0) {
633 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
634 return(Pmax);
637 return(Pmax);
640 static HAL_BOOL
641 ar2316GetChannelMaxMinPower(struct ath_hal *ah,
642 const struct ieee80211_channel *chan,
643 int16_t *maxPow, int16_t *minPow)
645 uint16_t freq = chan->ic_freq; /* NB: never mapped */
646 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
647 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;
648 const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL;
649 uint16_t numChannels;
650 int totalD,totalF, totalMin,last, i;
652 *maxPow = 0;
654 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
655 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
656 else if (IEEE80211_IS_CHAN_B(chan))
657 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
658 else
659 return(AH_FALSE);
661 numChannels = pRawDataset->numChannels;
662 data = pRawDataset->pDataPerChannel;
664 /* Make sure the channel is in the range of the TP values
665 * (freq piers)
667 if (numChannels < 1)
668 return(AH_FALSE);
670 if ((freq < data[0].channelValue) ||
671 (freq > data[numChannels-1].channelValue)) {
672 if (freq < data[0].channelValue) {
673 *maxPow = ar2316GetMaxPower(ah, &data[0]);
674 *minPow = ar2316GetMinPower(ah, &data[0]);
675 return(AH_TRUE);
676 } else {
677 *maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]);
678 *minPow = ar2316GetMinPower(ah, &data[numChannels - 1]);
679 return(AH_TRUE);
683 /* Linearly interpolate the power value now */
684 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
685 last = i++);
686 totalD = data[i].channelValue - data[last].channelValue;
687 if (totalD > 0) {
688 totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]);
689 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
690 ar2316GetMaxPower(ah, &data[last])*totalD)/totalD);
691 totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]);
692 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
693 ar2316GetMinPower(ah, &data[last])*totalD)/totalD);
694 return(AH_TRUE);
695 } else {
696 if (freq == data[i].channelValue) {
697 *maxPow = ar2316GetMaxPower(ah, &data[i]);
698 *minPow = ar2316GetMinPower(ah, &data[i]);
699 return(AH_TRUE);
700 } else
701 return(AH_FALSE);
706 * Free memory for analog bank scratch buffers
708 static void
709 ar2316RfDetach(struct ath_hal *ah)
711 struct ath_hal_5212 *ahp = AH5212(ah);
713 HALASSERT(ahp->ah_rfHal != AH_NULL);
714 ath_hal_free(ahp->ah_rfHal);
715 ahp->ah_rfHal = AH_NULL;
719 * Allocate memory for private state.
720 * Scratch Buffer will be reinitialized every reset so no need to zero now
722 static HAL_BOOL
723 ar2316RfAttach(struct ath_hal *ah, HAL_STATUS *status)
725 struct ath_hal_5212 *ahp = AH5212(ah);
726 struct ar2316State *priv;
728 HALASSERT(ah->ah_magic == AR5212_MAGIC);
730 HALASSERT(ahp->ah_rfHal == AH_NULL);
731 priv = ath_hal_malloc(sizeof(struct ar2316State));
732 if (priv == AH_NULL) {
733 HALDEBUG(ah, HAL_DEBUG_ANY,
734 "%s: cannot allocate private state\n", __func__);
735 *status = HAL_ENOMEM; /* XXX */
736 return AH_FALSE;
738 priv->base.rfDetach = ar2316RfDetach;
739 priv->base.writeRegs = ar2316WriteRegs;
740 priv->base.getRfBank = ar2316GetRfBank;
741 priv->base.setChannel = ar2316SetChannel;
742 priv->base.setRfRegs = ar2316SetRfRegs;
743 priv->base.setPowerTable = ar2316SetPowerTable;
744 priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower;
745 priv->base.getNfAdjust = ar5212GetNfAdjust;
747 ahp->ah_pcdacTable = priv->pcdacTable;
748 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
749 ahp->ah_rfHal = &priv->base;
751 ahp->ah_cwCalRequire = AH_TRUE; /* force initial cal */
753 return AH_TRUE;
756 static HAL_BOOL
757 ar2316Probe(struct ath_hal *ah)
759 return IS_2316(ah);
761 AH_RF(RF2316, ar2316Probe, ar2316RfAttach);