2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 void ahci_port_interrupt_enable(struct ahci_port
*ap
);
56 int ahci_load_prdt(struct ahci_ccb
*);
57 void ahci_unload_prdt(struct ahci_ccb
*);
58 static void ahci_load_prdt_callback(void *info
, bus_dma_segment_t
*segs
,
59 int nsegs
, int error
);
60 void ahci_start(struct ahci_ccb
*);
61 int ahci_port_softreset(struct ahci_port
*ap
);
62 int ahci_port_hardreset(struct ahci_port
*ap
, int hard
);
63 void ahci_port_hardstop(struct ahci_port
*ap
);
65 static void ahci_ata_cmd_timeout_unserialized(void *);
66 void ahci_check_active_timeouts(struct ahci_port
*ap
);
68 void ahci_beg_exclusive_access(struct ahci_port
*ap
, struct ata_port
*at
);
69 void ahci_end_exclusive_access(struct ahci_port
*ap
, struct ata_port
*at
);
70 void ahci_issue_pending_commands(struct ahci_port
*ap
, struct ahci_ccb
*ccb
);
71 void ahci_issue_saved_commands(struct ahci_port
*ap
, u_int32_t mask
);
73 int ahci_port_read_ncq_error(struct ahci_port
*, int);
75 struct ahci_dmamem
*ahci_dmamem_alloc(struct ahci_softc
*, bus_dma_tag_t tag
);
76 void ahci_dmamem_free(struct ahci_softc
*, struct ahci_dmamem
*);
77 static void ahci_dmamem_saveseg(void *info
, bus_dma_segment_t
*segs
, int nsegs
, int error
);
79 static void ahci_dummy_done(struct ata_xfer
*xa
);
80 static void ahci_empty_done(struct ahci_ccb
*ccb
);
81 static void ahci_ata_cmd_done(struct ahci_ccb
*ccb
);
84 * Initialize the global AHCI hardware. This code does not set up any of
88 ahci_init(struct ahci_softc
*sc
)
90 u_int32_t cap
, pi
, pleft
;
94 DPRINTF(AHCI_D_VERBOSE
, " GHC 0x%b",
95 ahci_read(sc
, AHCI_REG_GHC
), AHCI_FMT_GHC
);
97 /* save BIOS initialised parameters, enable staggered spin up */
98 cap
= ahci_read(sc
, AHCI_REG_CAP
);
99 cap
&= AHCI_REG_CAP_SMPS
;
100 cap
|= AHCI_REG_CAP_SSS
;
101 pi
= ahci_read(sc
, AHCI_REG_PI
);
104 * This is a hack that currently does not appear to have
105 * a significant effect, but I noticed the port registers
106 * do not appear to be completely cleared after the host
107 * controller is reset.
109 * Use a temporary ap structure so we can call ahci_pwrite().
111 ap
= kmalloc(sizeof(*ap
), M_DEVBUF
, M_WAITOK
| M_ZERO
);
114 for (i
= 0; i
< AHCI_MAX_PORTS
; ++i
) {
117 if ((pi
& (1 << i
)) == 0)
119 if (bus_space_subregion(sc
->sc_iot
, sc
->sc_ioh
,
120 AHCI_PORT_REGION(i
), AHCI_PORT_SIZE
, &ap
->ap_ioh
) != 0) {
121 device_printf(sc
->sc_dev
, "can't map port\n");
124 ahci_pwrite(ap
, AHCI_PREG_SCTL
, AHCI_PREG_SCTL_IPM_DISABLED
|
125 AHCI_PREG_SCTL_DET_DISABLE
);
126 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
127 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
128 ahci_write(ap
->ap_sc
, AHCI_REG_IS
, 1 << i
);
129 ahci_pwrite(ap
, AHCI_PREG_CMD
, 0);
130 ahci_pwrite(ap
, AHCI_PREG_IS
, -1);
131 sc
->sc_portmask
|= (1 << i
);
138 * Unconditionally reset the controller, do not conditionalize on
139 * trying to figure it if it was previously active or not.
143 * If you have a port multiplier and it does not have a device
144 * in target 0, and it probes normally, but a later operation
145 * mis-probes a target behind that PM, it is possible for the
146 * port to brick such that only (a) a power cycle of the host
147 * or (b) placing a device in target 0 will fix the problem.
148 * Power cycling the PM has no effect (it works fine on another
149 * host port). This issue is unrelated to CLO.
151 ahci_write(sc
, AHCI_REG_GHC
, AHCI_REG_GHC_HR
);
152 if (ahci_wait_ne(sc
, AHCI_REG_GHC
,
153 AHCI_REG_GHC_HR
, AHCI_REG_GHC_HR
) != 0) {
154 device_printf(sc
->sc_dev
,
155 "unable to reset controller\n");
160 /* enable ahci (global interrupts disabled) */
161 ahci_write(sc
, AHCI_REG_GHC
, AHCI_REG_GHC_AE
);
163 /* restore parameters */
164 ahci_write(sc
, AHCI_REG_CAP
, cap
);
165 ahci_write(sc
, AHCI_REG_PI
, pi
);
171 * Allocate and initialize an AHCI port.
174 ahci_port_alloc(struct ahci_softc
*sc
, u_int port
)
176 struct ahci_port
*ap
;
178 struct ahci_ccb
*ccb
;
182 struct ahci_cmd_hdr
*hdr
;
183 struct ahci_cmd_table
*table
;
188 ap
= kmalloc(sizeof(*ap
), M_DEVBUF
, M_WAITOK
| M_ZERO
);
189 ap
->ap_err_scratch
= kmalloc(512, M_DEVBUF
, M_WAITOK
| M_ZERO
);
191 ksnprintf(ap
->ap_name
, sizeof(ap
->ap_name
), "%s%d.%d",
192 device_get_name(sc
->sc_dev
),
193 device_get_unit(sc
->sc_dev
),
195 sc
->sc_ports
[port
] = ap
;
198 * Allocate enough so we never have to reallocate, it makes
201 * ap_pmcount will be reduced by the scan if we encounter the
202 * port multiplier port prior to target 15.
204 if (ap
->ap_ata
== NULL
) {
205 ap
->ap_ata
= kmalloc(sizeof(*ap
->ap_ata
) * AHCI_MAX_PMPORTS
,
206 M_DEVBUF
, M_INTWAIT
| M_ZERO
);
207 for (i
= 0; i
< AHCI_MAX_PMPORTS
; ++i
) {
209 at
->at_ahci_port
= ap
;
211 at
->at_probe
= ATA_PROBE_NEED_INIT
;
212 at
->at_features
|= ATA_PORT_F_RESCAN
;
213 ksnprintf(at
->at_name
, sizeof(at
->at_name
),
214 "%s.%d", ap
->ap_name
, i
);
217 if (bus_space_subregion(sc
->sc_iot
, sc
->sc_ioh
,
218 AHCI_PORT_REGION(port
), AHCI_PORT_SIZE
, &ap
->ap_ioh
) != 0) {
219 device_printf(sc
->sc_dev
,
220 "unable to create register window for port %d\n",
227 ap
->ap_probe
= ATA_PROBE_NEED_INIT
;
228 TAILQ_INIT(&ap
->ap_ccb_free
);
229 TAILQ_INIT(&ap
->ap_ccb_pending
);
230 lockinit(&ap
->ap_ccb_lock
, "ahcipo", 0, 0);
232 /* Disable port interrupts */
233 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
234 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
237 * Sec 10.1.2 - deinitialise port if it is already running
239 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
);
240 if ((cmd
& (AHCI_PREG_CMD_ST
| AHCI_PREG_CMD_CR
|
241 AHCI_PREG_CMD_FRE
| AHCI_PREG_CMD_FR
)) ||
242 (ahci_pread(ap
, AHCI_PREG_SCTL
) & AHCI_PREG_SCTL_DET
)) {
245 r
= ahci_port_stop(ap
, 1);
247 device_printf(sc
->sc_dev
,
248 "unable to disable %s, ignoring port %d\n",
249 ((r
== 2) ? "CR" : "FR"), port
);
254 /* Write DET to zero */
255 ahci_pwrite(ap
, AHCI_PREG_SCTL
, AHCI_PREG_SCTL_IPM_DISABLED
);
259 ap
->ap_dmamem_rfis
= ahci_dmamem_alloc(sc
, sc
->sc_tag_rfis
);
260 if (ap
->ap_dmamem_rfis
== NULL
) {
261 kprintf("%s: NORFIS\n", PORTNAME(ap
));
265 /* Setup RFIS base address */
266 ap
->ap_rfis
= (struct ahci_rfis
*) AHCI_DMA_KVA(ap
->ap_dmamem_rfis
);
267 dva
= AHCI_DMA_DVA(ap
->ap_dmamem_rfis
);
268 ahci_pwrite(ap
, AHCI_PREG_FBU
, (u_int32_t
)(dva
>> 32));
269 ahci_pwrite(ap
, AHCI_PREG_FB
, (u_int32_t
)dva
);
271 /* Clear SERR before starting FIS reception or ST or anything */
273 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
275 /* Enable FIS reception and activate port. */
276 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
) & ~AHCI_PREG_CMD_ICC
;
277 cmd
&= ~(AHCI_PREG_CMD_CLO
| AHCI_PREG_CMD_PMA
);
278 cmd
|= AHCI_PREG_CMD_FRE
| AHCI_PREG_CMD_POD
| AHCI_PREG_CMD_SUD
;
279 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
| AHCI_PREG_CMD_ICC_ACTIVE
);
281 /* Check whether port activated. Skip it if not. */
282 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
) & ~AHCI_PREG_CMD_ICC
;
283 if ((cmd
& AHCI_PREG_CMD_FRE
) == 0) {
284 kprintf("%s: NOT-ACTIVATED\n", PORTNAME(ap
));
289 /* Allocate a CCB for each command slot */
290 ap
->ap_ccbs
= kmalloc(sizeof(struct ahci_ccb
) * sc
->sc_ncmds
, M_DEVBUF
,
292 if (ap
->ap_ccbs
== NULL
) {
293 device_printf(sc
->sc_dev
,
294 "unable to allocate command list for port %d\n",
299 /* Command List Structures and Command Tables */
300 ap
->ap_dmamem_cmd_list
= ahci_dmamem_alloc(sc
, sc
->sc_tag_cmdh
);
301 ap
->ap_dmamem_cmd_table
= ahci_dmamem_alloc(sc
, sc
->sc_tag_cmdt
);
302 if (ap
->ap_dmamem_cmd_table
== NULL
||
303 ap
->ap_dmamem_cmd_list
== NULL
) {
305 device_printf(sc
->sc_dev
,
306 "unable to allocate DMA memory for port %d\n",
311 /* Setup command list base address */
312 dva
= AHCI_DMA_DVA(ap
->ap_dmamem_cmd_list
);
313 ahci_pwrite(ap
, AHCI_PREG_CLBU
, (u_int32_t
)(dva
>> 32));
314 ahci_pwrite(ap
, AHCI_PREG_CLB
, (u_int32_t
)dva
);
316 /* Split CCB allocation into CCBs and assign to command header/table */
317 hdr
= AHCI_DMA_KVA(ap
->ap_dmamem_cmd_list
);
318 table
= AHCI_DMA_KVA(ap
->ap_dmamem_cmd_table
);
319 for (i
= 0; i
< sc
->sc_ncmds
; i
++) {
320 ccb
= &ap
->ap_ccbs
[i
];
322 error
= bus_dmamap_create(sc
->sc_tag_data
, BUS_DMA_ALLOCNOW
,
325 device_printf(sc
->sc_dev
,
326 "unable to create dmamap for port %d "
327 "ccb %d\n", port
, i
);
331 callout_init(&ccb
->ccb_timeout
);
334 ccb
->ccb_cmd_hdr
= &hdr
[i
];
335 ccb
->ccb_cmd_table
= &table
[i
];
336 dva
= AHCI_DMA_DVA(ap
->ap_dmamem_cmd_table
) +
337 ccb
->ccb_slot
* sizeof(struct ahci_cmd_table
);
338 ccb
->ccb_cmd_hdr
->ctba_hi
= htole32((u_int32_t
)(dva
>> 32));
339 ccb
->ccb_cmd_hdr
->ctba_lo
= htole32((u_int32_t
)dva
);
342 (struct ata_fis_h2d
*)ccb
->ccb_cmd_table
->cfis
;
343 ccb
->ccb_xa
.packetcmd
= ccb
->ccb_cmd_table
->acmd
;
346 ccb
->ccb_xa
.state
= ATA_S_COMPLETE
;
349 * CCB[1] is the error CCB and is not get or put. It is
350 * also used for probing. Numerous HBAs only load the
351 * signature from CCB[1] so it MUST be used for the second
355 ap
->ap_err_ccb
= ccb
;
361 * Wait for ICC change to complete
363 ahci_pwait_clr(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_ICC
);
366 * Calculate the interrupt mask
368 data
= AHCI_PREG_IE_TFEE
| AHCI_PREG_IE_HBFE
|
369 AHCI_PREG_IE_IFE
| AHCI_PREG_IE_OFE
|
370 AHCI_PREG_IE_DPE
| AHCI_PREG_IE_UFE
|
371 AHCI_PREG_IE_PCE
| AHCI_PREG_IE_PRCE
|
372 AHCI_PREG_IE_DHRE
| AHCI_PREG_IE_SDBE
;
373 if (ap
->ap_sc
->sc_cap
& AHCI_REG_CAP_SSNTF
)
374 data
|= AHCI_PREG_IE_IPME
;
376 if (sc
->sc_ccc_ports
& (1 << port
)
377 data
&= ~(AHCI_PREG_IE_SDBE
| AHCI_PREG_IE_DHRE
);
379 ap
->ap_intmask
= data
;
382 * Start the port. The helper thread will call ahci_port_init()
383 * so the ports can all be started in parallel. A failure by
384 * ahci_port_init() does not deallocate the port since we still
385 * want hot-plug events.
387 ahci_os_start_port(ap
);
390 ahci_port_free(sc
, port
);
395 * [re]initialize an idle port. No CCBs should be active.
397 * This function is called during the initial port allocation sequence
398 * and is also called on hot-plug insertion. We take no chances and
399 * use a portreset instead of a softreset.
401 * This function is the only way to move a failed port back to active
404 * Returns 0 if a device is successfully detected.
407 ahci_port_init(struct ahci_port
*ap
)
410 * Register [re]initialization
412 if (ap
->ap_sc
->sc_cap
& AHCI_REG_CAP_SSNTF
)
413 ahci_pwrite(ap
, AHCI_PREG_SNTF
, -1);
414 ap
->ap_probe
= ATA_PROBE_NEED_HARD_RESET
;
416 ahci_port_interrupt_enable(ap
);
421 * Enable or re-enable interrupts on a port.
423 * This routine is called from the port initialization code or from the
424 * helper thread as the real interrupt may be forced to turn off certain
428 ahci_port_interrupt_enable(struct ahci_port
*ap
)
430 ahci_pwrite(ap
, AHCI_PREG_IE
, ap
->ap_intmask
);
434 * Run the port / target state machine from a main context.
436 * The state machine for the port is always run.
438 * If atx is non-NULL run the state machine for a particular target.
439 * If atx is NULL run the state machine for all targets.
442 ahci_port_state_machine(struct ahci_port
*ap
, int initial
)
451 * State machine for port. Note that CAM is not yet associated
452 * during the initial parallel probe and the port's probe state
453 * will not get past ATA_PROBE_NEED_IDENT.
456 if (initial
== 0 && ap
->ap_probe
<= ATA_PROBE_NEED_HARD_RESET
) {
457 kprintf("%s: Waiting 10 seconds on insertion\n",
459 ahci_os_sleep(10000);
462 if (ap
->ap_probe
== ATA_PROBE_NEED_INIT
)
464 if (ap
->ap_probe
== ATA_PROBE_NEED_HARD_RESET
)
465 ahci_port_reset(ap
, NULL
, 1);
466 if (ap
->ap_probe
== ATA_PROBE_NEED_SOFT_RESET
)
467 ahci_port_reset(ap
, NULL
, 0);
468 if (ap
->ap_probe
== ATA_PROBE_NEED_IDENT
)
469 ahci_cam_probe(ap
, NULL
);
471 if (ap
->ap_type
!= ATA_PORT_T_PM
) {
472 if (ap
->ap_probe
== ATA_PROBE_FAILED
) {
473 ahci_cam_changed(ap
, NULL
, 0);
474 } else if (ap
->ap_probe
>= ATA_PROBE_NEED_IDENT
) {
475 ahci_cam_changed(ap
, NULL
, 1);
481 * Port Multiplier state machine.
483 * Get a mask of changed targets and combine with any runnable
484 * states already present.
486 for (loop
= 0; ;++loop
) {
487 if (ahci_pm_read(ap
, 15, SATA_PMREG_EINFO
, &data
)) {
488 kprintf("%s: PM unable to read hot-plug bitmap\n",
494 * Do at least one loop, then stop if no more state changes
495 * have occured. The PM might not generate a new
496 * notification until we clear the entire bitmap.
498 if (loop
&& data
== 0)
502 * New devices showing up in the bitmap require some spin-up
503 * time before we start probing them. Reset didsleep. The
504 * first new device we detect will sleep before probing.
506 * This only applies to devices whos change bit is set in
507 * the data, and does not apply to the initial boot-time
512 for (target
= 0; target
< ap
->ap_pmcount
; ++target
) {
513 at
= &ap
->ap_ata
[target
];
516 * Check the target state for targets behind the PM
517 * which have changed state. This will adjust
518 * at_probe and set ATA_PORT_F_RESCAN
520 * We want to wait at least 10 seconds before probing
521 * a newly inserted device. If the check status
522 * indicates a device is present and in need of a
523 * hard reset, we make sure we have slept before
526 * We also need to wait at least 1 second for the
527 * PHY state to change after insertion, if we
528 * haven't already waited the 10 seconds.
530 * NOTE: When pm_check_good finds a good port it
531 * typically starts us in probe state
532 * NEED_HARD_RESET rather than INIT.
534 if (data
& (1 << target
)) {
535 if (initial
== 0 && didsleep
== 0)
537 ahci_pm_check_good(ap
, target
);
538 if (initial
== 0 && didsleep
== 0 &&
539 at
->at_probe
<= ATA_PROBE_NEED_HARD_RESET
542 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap
));
543 ahci_os_sleep(10000);
548 * Report hot-plug events before the probe state
549 * really gets hot. Only actual events are reported
550 * here to reduce spew.
552 if (data
& (1 << target
)) {
553 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap
, at
));
554 switch(at
->at_probe
) {
555 case ATA_PROBE_NEED_INIT
:
556 case ATA_PROBE_NEED_HARD_RESET
:
557 kprintf("Device inserted\n");
559 case ATA_PROBE_FAILED
:
560 kprintf("Device removed\n");
563 kprintf("Device probe in progress\n");
569 * Run through the state machine as necessary if
570 * the port is not marked failed.
572 * The state machine may stop at NEED_IDENT if
573 * CAM is not yet attached.
575 * Acquire exclusive access to the port while we
576 * are doing this. This prevents command-completion
577 * from queueing commands for non-polled targets
578 * inbetween our probe steps. We need to do this
579 * because the reset probes can generate severe PHY
580 * and protocol errors and soft-brick the port.
582 if (at
->at_probe
!= ATA_PROBE_FAILED
&&
583 at
->at_probe
!= ATA_PROBE_GOOD
) {
584 ahci_beg_exclusive_access(ap
, at
);
585 if (at
->at_probe
== ATA_PROBE_NEED_INIT
)
586 ahci_pm_port_init(ap
, at
);
587 if (at
->at_probe
== ATA_PROBE_NEED_HARD_RESET
)
588 ahci_port_reset(ap
, at
, 1);
589 if (at
->at_probe
== ATA_PROBE_NEED_SOFT_RESET
)
590 ahci_port_reset(ap
, at
, 0);
591 if (at
->at_probe
== ATA_PROBE_NEED_IDENT
)
592 ahci_cam_probe(ap
, at
);
593 ahci_end_exclusive_access(ap
, at
);
597 * Add or remove from CAM
599 if (at
->at_features
& ATA_PORT_F_RESCAN
) {
600 at
->at_features
&= ~ATA_PORT_F_RESCAN
;
601 if (at
->at_probe
== ATA_PROBE_FAILED
) {
602 ahci_cam_changed(ap
, at
, 0);
603 } else if (at
->at_probe
>= ATA_PROBE_NEED_IDENT
) {
604 ahci_cam_changed(ap
, at
, 1);
607 data
&= ~(1 << target
);
610 kprintf("%s: WARNING (PM): extra bits set in "
611 "EINFO: %08x\n", PORTNAME(ap
), data
);
612 while (target
< AHCI_MAX_PMPORTS
) {
613 ahci_pm_check_good(ap
, target
);
622 * De-initialize and detach a port.
625 ahci_port_free(struct ahci_softc
*sc
, u_int port
)
627 struct ahci_port
*ap
= sc
->sc_ports
[port
];
628 struct ahci_ccb
*ccb
;
631 * Ensure port is disabled and its interrupts are all flushed.
634 ahci_port_stop(ap
, 1);
635 ahci_os_stop_port(ap
);
636 ahci_pwrite(ap
, AHCI_PREG_CMD
, 0);
637 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
638 ahci_pwrite(ap
, AHCI_PREG_IS
, ahci_pread(ap
, AHCI_PREG_IS
));
639 ahci_write(sc
, AHCI_REG_IS
, 1 << port
);
643 while ((ccb
= ahci_get_ccb(ap
)) != NULL
) {
644 if (ccb
->ccb_dmamap
) {
645 bus_dmamap_destroy(sc
->sc_tag_data
,
647 ccb
->ccb_dmamap
= NULL
;
650 if ((ccb
= ap
->ap_err_ccb
) != NULL
) {
651 if (ccb
->ccb_dmamap
) {
652 bus_dmamap_destroy(sc
->sc_tag_data
,
654 ccb
->ccb_dmamap
= NULL
;
656 ap
->ap_err_ccb
= NULL
;
658 kfree(ap
->ap_ccbs
, M_DEVBUF
);
662 if (ap
->ap_dmamem_cmd_list
) {
663 ahci_dmamem_free(sc
, ap
->ap_dmamem_cmd_list
);
664 ap
->ap_dmamem_cmd_list
= NULL
;
666 if (ap
->ap_dmamem_rfis
) {
667 ahci_dmamem_free(sc
, ap
->ap_dmamem_rfis
);
668 ap
->ap_dmamem_rfis
= NULL
;
670 if (ap
->ap_dmamem_cmd_table
) {
671 ahci_dmamem_free(sc
, ap
->ap_dmamem_cmd_table
);
672 ap
->ap_dmamem_cmd_table
= NULL
;
675 kfree(ap
->ap_ata
, M_DEVBUF
);
678 if (ap
->ap_err_scratch
) {
679 kfree(ap
->ap_err_scratch
, M_DEVBUF
);
680 ap
->ap_err_scratch
= NULL
;
683 /* bus_space(9) says we dont free the subregions handle */
686 sc
->sc_ports
[port
] = NULL
;
690 * Start high-level command processing on the port
693 ahci_port_start(struct ahci_port
*ap
)
695 u_int32_t r
, s
, is
, tfd
;
698 * FRE must be turned on before ST. Wait for FR to go active
699 * before turning on ST. The spec doesn't seem to think this
700 * is necessary but waiting here avoids an on-off race in the
701 * ahci_port_stop() code.
703 r
= ahci_pread(ap
, AHCI_PREG_CMD
);
704 if ((r
& AHCI_PREG_CMD_FRE
) == 0) {
705 r
|= AHCI_PREG_CMD_FRE
;
706 ahci_pwrite(ap
, AHCI_PREG_CMD
, r
);
708 if ((ap
->ap_sc
->sc_flags
& AHCI_F_IGN_FR
) == 0) {
709 if (ahci_pwait_set(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_FR
)) {
710 kprintf("%s: Cannot start FIS reception\n",
717 * Turn on ST, wait for CR to come up.
719 r
|= AHCI_PREG_CMD_ST
;
720 ahci_pwrite(ap
, AHCI_PREG_CMD
, r
);
721 if (ahci_pwait_set(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_CR
)) {
722 s
= ahci_pread(ap
, AHCI_PREG_SERR
);
723 is
= ahci_pread(ap
, AHCI_PREG_IS
);
724 tfd
= ahci_pread(ap
, AHCI_PREG_TFD
);
725 kprintf("%s: Cannot start command DMA\n"
730 r
, AHCI_PFMT_CMD
, s
, AHCI_PFMT_SERR
,
732 tfd
, AHCI_PFMT_TFD_STS
);
738 * (Re-)enable coalescing on the port.
740 if (ap
->ap_sc
->sc_ccc_ports
& (1 << ap
->ap_num
)) {
741 ap
->ap_sc
->sc_ccc_ports_cur
|= (1 << ap
->ap_num
);
742 ahci_write(ap
->ap_sc
, AHCI_REG_CCC_PORTS
,
743 ap
->ap_sc
->sc_ccc_ports_cur
);
751 * Stop high-level command processing on a port
753 * WARNING! If the port is stopped while CR is still active our saved
754 * CI/SACT will race any commands completed by the command
755 * processor prior to being able to stop. Thus we never call
756 * this function unless we intend to dispose of any remaining
757 * active commands. In particular, this complicates the timeout
761 ahci_port_stop(struct ahci_port
*ap
, int stop_fis_rx
)
767 * Disable coalescing on the port while it is stopped.
769 if (ap
->ap_sc
->sc_ccc_ports
& (1 << ap
->ap_num
)) {
770 ap
->ap_sc
->sc_ccc_ports_cur
&= ~(1 << ap
->ap_num
);
771 ahci_write(ap
->ap_sc
, AHCI_REG_CCC_PORTS
,
772 ap
->ap_sc
->sc_ccc_ports_cur
);
777 * Turn off ST, then wait for CR to go off.
779 r
= ahci_pread(ap
, AHCI_PREG_CMD
) & ~AHCI_PREG_CMD_ICC
;
780 r
&= ~AHCI_PREG_CMD_ST
;
781 ahci_pwrite(ap
, AHCI_PREG_CMD
, r
);
783 if (ahci_pwait_clr(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_CR
)) {
784 kprintf("%s: Port bricked, unable to stop (ST)\n",
791 * Turn off FRE, then wait for FR to go off. FRE cannot
792 * be turned off until CR transitions to 0.
794 if ((r
& AHCI_PREG_CMD_FR
) == 0) {
795 kprintf("%s: FR stopped, clear FRE for next start\n",
801 r
&= ~AHCI_PREG_CMD_FRE
;
802 ahci_pwrite(ap
, AHCI_PREG_CMD
, r
);
803 if (ahci_pwait_clr(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_FR
)) {
804 kprintf("%s: Port bricked, unable to stop (FRE)\n",
814 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
817 ahci_port_clo(struct ahci_port
*ap
)
819 struct ahci_softc
*sc
= ap
->ap_sc
;
822 /* Only attempt CLO if supported by controller */
823 if ((ahci_read(sc
, AHCI_REG_CAP
) & AHCI_REG_CAP_SCLO
) == 0)
827 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
) & ~AHCI_PREG_CMD_ICC
;
828 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
| AHCI_PREG_CMD_CLO
);
830 /* Wait for completion */
831 if (ahci_pwait_clr(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_CLO
)) {
832 kprintf("%s: CLO did not complete\n", PORTNAME(ap
));
842 * If hard is 0 perform a softreset of the port.
843 * If hard is 1 perform a hard reset of the port.
844 * If hard is 2 perform a hard reset of the port and cycle the phy.
846 * If at is non-NULL an indirect port via a port-multiplier is being
847 * reset, otherwise a direct port is being reset.
849 * NOTE: Indirect ports can only be soft-reset.
852 ahci_port_reset(struct ahci_port
*ap
, struct ata_port
*at
, int hard
)
858 rc
= ahci_pm_hardreset(ap
, at
->at_target
, hard
);
860 rc
= ahci_port_hardreset(ap
, hard
);
863 rc
= ahci_pm_softreset(ap
, at
->at_target
);
865 rc
= ahci_port_softreset(ap
);
871 * AHCI soft reset, Section 10.4.1
873 * (at) will be NULL when soft-resetting a directly-attached device, and
874 * non-NULL when soft-resetting a device through a port multiplier.
876 * This function keeps port communications intact and attempts to generate
877 * a reset to the connected device using device commands.
880 ahci_port_softreset(struct ahci_port
*ap
)
882 struct ahci_ccb
*ccb
= NULL
;
883 struct ahci_cmd_hdr
*cmd_slot
;
890 kprintf("%s: START SOFTRESET %b\n", PORTNAME(ap
),
891 ahci_pread(ap
, AHCI_PREG_CMD
), AHCI_PFMT_CMD
);
894 DPRINTF(AHCI_D_VERBOSE
, "%s: soft reset\n", PORTNAME(ap
));
897 ap
->ap_flags
|= AP_F_IN_RESET
;
898 ap
->ap_state
= AP_S_NORMAL
;
901 * Remember port state in cmd (main to restore start/stop)
905 if (ahci_port_stop(ap
, 0)) {
906 kprintf("%s: failed to stop port, cannot softreset\n",
912 * Request CLO if device appears hung.
914 if (ahci_pread(ap
, AHCI_PREG_TFD
) &
915 (AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
920 * This is an attempt to clear errors so a new signature will
921 * be latched. It isn't working properly. XXX
924 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
927 if (ahci_port_start(ap
)) {
928 kprintf("%s: failed to start port, cannot softreset\n",
933 /* Check whether CLO worked */
934 if (ahci_pwait_clr(ap
, AHCI_PREG_TFD
,
935 AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
936 kprintf("%s: CLO %s, need port reset\n",
938 (ahci_read(ap
->ap_sc
, AHCI_REG_CAP
) & AHCI_REG_CAP_SCLO
)
939 ? "failed" : "unsupported");
945 * Prep first D2H command with SRST feature & clear busy/reset flags
947 * It is unclear which other fields in the FIS are used. Just zero
950 * NOTE! This CCB is used for both the first and second commands.
951 * The second command must use CCB slot 1 to properly load
954 ccb
= ahci_get_err_ccb(ap
);
955 ccb
->ccb_xa
.complete
= ahci_dummy_done
;
956 ccb
->ccb_xa
.flags
= ATA_F_POLL
| ATA_F_EXCLUSIVE
;
957 KKASSERT(ccb
->ccb_slot
== 1);
958 ccb
->ccb_xa
.at
= NULL
;
959 cmd_slot
= ccb
->ccb_cmd_hdr
;
961 fis
= ccb
->ccb_cmd_table
->cfis
;
962 bzero(fis
, sizeof(ccb
->ccb_cmd_table
->cfis
));
963 fis
[0] = ATA_FIS_TYPE_H2D
;
964 fis
[15] = ATA_FIS_CONTROL_SRST
|ATA_FIS_CONTROL_4BIT
;
967 cmd_slot
->flags
= htole16(5); /* FIS length: 5 DWORDS */
968 cmd_slot
->flags
|= htole16(AHCI_CMD_LIST_FLAG_C
); /* Clear busy on OK */
969 cmd_slot
->flags
|= htole16(AHCI_CMD_LIST_FLAG_R
); /* Reset */
971 ccb
->ccb_xa
.state
= ATA_S_PENDING
;
973 if (ahci_poll(ccb
, 1000, ahci_quick_timeout
) != ATA_S_COMPLETE
) {
974 kprintf("%s: First FIS failed\n", PORTNAME(ap
));
979 * WARNING! TIME SENSITIVE SPACE! WARNING!
981 * The two FISes are supposed to be back to back. Don't issue other
982 * commands or even delay if we can help it.
986 * Prep second D2H command to read status and complete reset sequence
987 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
988 * Rev 2.6 and it is unclear how the second FIS should be set up
989 * from the AHCI document.
991 * Give the device 3ms before sending the second FIS.
993 * It is unclear which other fields in the FIS are used. Just zero
996 ccb
->ccb_xa
.flags
= ATA_F_POLL
| ATA_F_AUTOSENSE
| ATA_F_EXCLUSIVE
;
998 bzero(fis
, sizeof(ccb
->ccb_cmd_table
->cfis
));
999 fis
[0] = ATA_FIS_TYPE_H2D
;
1000 fis
[15] = ATA_FIS_CONTROL_4BIT
;
1002 cmd_slot
->prdtl
= 0;
1003 cmd_slot
->flags
= htole16(5); /* FIS length: 5 DWORDS */
1005 ccb
->ccb_xa
.state
= ATA_S_PENDING
;
1006 if (ahci_poll(ccb
, 1000, ahci_quick_timeout
) != ATA_S_COMPLETE
) {
1007 kprintf("%s: Second FIS failed\n", PORTNAME(ap
));
1011 if (ahci_pwait_clr(ap
, AHCI_PREG_TFD
,
1012 AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
1013 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
1015 ahci_pread(ap
, AHCI_PREG_TFD
), AHCI_PFMT_TFD_STS
);
1022 * If the softreset is trying to clear a BSY condition after a
1023 * normal portreset we assign the port type.
1025 * If the softreset is being run first as part of the ccb error
1026 * processing code then report if the device signature changed
1029 if (ap
->ap_type
== ATA_PORT_T_NONE
) {
1030 ap
->ap_type
= ahci_port_signature_detect(ap
, NULL
);
1032 if (ahci_port_signature_detect(ap
, NULL
) != ap
->ap_type
) {
1033 kprintf("%s: device signature unexpectedly "
1034 "changed\n", PORTNAME(ap
));
1035 error
= EBUSY
; /* XXX */
1043 ahci_put_err_ccb(ccb
);
1046 * If the target is busy use CLO to clear the busy
1047 * condition. The BSY should be cleared on the next
1050 if (ahci_pread(ap
, AHCI_PREG_TFD
) &
1051 (AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
1057 * If we failed to softreset make the port quiescent, otherwise
1058 * make sure the port's start/stop state matches what it was on
1061 * Don't kill the port if the softreset is on a port multiplier
1062 * target, that would kill all the targets!
1065 ahci_port_hardstop(ap
);
1066 /* ap_probe set to failed */
1068 ap
->ap_probe
= ATA_PROBE_NEED_IDENT
;
1070 ahci_port_start(ap
);
1072 ap
->ap_flags
&= ~AP_F_IN_RESET
;
1076 kprintf("%s: END SOFTRESET\n", PORTNAME(ap
));
1082 * AHCI port reset, Section 10.4.2
1084 * This function does a hard reset of the port. Note that the device
1085 * connected to the port could still end-up hung.
1088 ahci_port_hardreset(struct ahci_port
*ap
, int hard
)
1096 kprintf("%s: START HARDRESET\n", PORTNAME(ap
));
1097 ap
->ap_flags
|= AP_F_IN_RESET
;
1102 ahci_port_stop(ap
, 0);
1103 ap
->ap_state
= AP_S_NORMAL
;
1106 * The port may have been quiescent with its SUD bit cleared, so
1107 * set the SUD (spin up device).
1109 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
) & ~AHCI_PREG_CMD_ICC
;
1110 cmd
|= AHCI_PREG_CMD_SUD
;
1111 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
);
1114 * Perform device detection. Cycle the PHY off, wait 10ms.
1115 * This simulates the SATA cable being physically unplugged.
1117 * NOTE: hard reset mode 2 (cycling the PHY) is not reliable
1118 * and not currently used.
1120 ap
->ap_type
= ATA_PORT_T_NONE
;
1122 r
= AHCI_PREG_SCTL_IPM_DISABLED
;
1124 r
|= AHCI_PREG_SCTL_DET_DISABLE
;
1125 ahci_pwrite(ap
, AHCI_PREG_SCTL
, r
);
1129 * Start transmitting COMRESET. COMRESET must be sent for at
1132 r
= AHCI_PREG_SCTL_IPM_DISABLED
| AHCI_PREG_SCTL_DET_INIT
;
1133 if (AhciForceGen1
& (1 << ap
->ap_num
))
1134 r
|= AHCI_PREG_SCTL_SPD_GEN1
;
1136 r
|= AHCI_PREG_SCTL_SPD_ANY
;
1137 ahci_pwrite(ap
, AHCI_PREG_SCTL
, r
);
1140 * Through trial and error it seems to take around 100ms
1141 * for the detect logic to settle down. If this is too
1142 * short the softreset code will fail.
1147 * Only SERR_DIAG_X needs to be cleared for TFD updates, but
1148 * since we are hard-resetting the port we might as well clear
1149 * the whole enchillada
1152 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
1153 r
&= ~AHCI_PREG_SCTL_DET_INIT
;
1154 r
|= AHCI_PREG_SCTL_DET_NONE
;
1155 ahci_pwrite(ap
, AHCI_PREG_SCTL
, r
);
1158 * Try to determine if there is a device on the port.
1160 * Give the device 3/10 second to at least be detected.
1161 * If we fail clear PRCS (phy detect) since we may cycled
1162 * the phy and probably caused another PRCS interrupt.
1166 r
= ahci_pread(ap
, AHCI_PREG_SSTS
);
1167 if (r
& AHCI_PREG_SSTS_DET
)
1169 loop
-= ahci_os_softsleep();
1172 ahci_pwrite(ap
, AHCI_PREG_IS
, AHCI_PREG_IS_PRCS
);
1174 kprintf("%s: Port appears to be unplugged\n",
1182 * There is something on the port. Give the device 3 seconds
1183 * to fully negotiate.
1185 if (ahci_pwait_eq(ap
, 3000, AHCI_PREG_SSTS
,
1186 AHCI_PREG_SSTS_DET
, AHCI_PREG_SSTS_DET_DEV
)) {
1188 kprintf("%s: Device may be powered down\n",
1196 * We got something that definitely looks like a device. Give
1197 * the device time to send us its first D2H FIS. Waiting for
1198 * BSY to clear accomplishes this.
1200 * NOTE that a port multiplier may or may not clear BSY here,
1201 * depending on what is sitting in target 0 behind it.
1205 if (ahci_pwait_clr_to(ap
, 3000, AHCI_PREG_TFD
,
1206 AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
1214 * Do the PM port probe regardless of how things turned out on
1217 if (ap
->ap_sc
->sc_cap
& AHCI_REG_CAP_SPM
)
1218 error
= ahci_pm_port_probe(ap
, error
);
1227 * All good, make sure the port is running and set the
1228 * probe state. Ignore the signature junk (it's unreliable)
1229 * until we get to the softreset code.
1231 if (ahci_port_start(ap
)) {
1232 kprintf("%s: failed to start command DMA on port, "
1233 "disabling\n", PORTNAME(ap
));
1237 if (ap
->ap_type
== ATA_PORT_T_PM
)
1238 ap
->ap_probe
= ATA_PROBE_GOOD
;
1240 ap
->ap_probe
= ATA_PROBE_NEED_SOFT_RESET
;
1244 * Normal device probe failure
1246 data
= ahci_pread(ap
, AHCI_PREG_SSTS
);
1248 switch(data
& AHCI_PREG_SSTS_DET
) {
1249 case AHCI_PREG_SSTS_DET_DEV_NE
:
1250 kprintf("%s: Device not communicating\n",
1253 case AHCI_PREG_SSTS_DET_PHYOFFLINE
:
1254 kprintf("%s: PHY offline\n",
1258 kprintf("%s: No device detected\n",
1262 ahci_port_hardstop(ap
);
1266 * Abnormal probe (EBUSY)
1268 kprintf("%s: Device on port is bricked\n",
1270 ahci_port_hardstop(ap
);
1272 rc
= ahci_port_reset(ap
, atx
, 0);
1274 kprintf("%s: Unable unbrick device\n",
1277 kprintf("%s: Successfully unbricked\n",
1287 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
1288 ahci_pwrite(ap
, AHCI_PREG_IS
, AHCI_PREG_IS_PCS
| AHCI_PREG_IS_PRCS
);
1290 ap
->ap_flags
&= ~AP_F_IN_RESET
;
1293 kprintf("%s: END HARDRESET %d\n", PORTNAME(ap
), error
);
1298 * Hard-stop on hot-swap device removal. See 10.10.1
1300 * Place the port in a mode that will allow it to detect hot-swap insertions.
1301 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1302 * seem to do the job.
1305 ahci_port_hardstop(struct ahci_port
*ap
)
1307 struct ahci_ccb
*ccb
;
1308 struct ata_port
*at
;
1315 * Stop the port. We can't modify things like SUD if the port
1318 ap
->ap_state
= AP_S_FATAL_ERROR
;
1319 ap
->ap_probe
= ATA_PROBE_FAILED
;
1320 ap
->ap_type
= ATA_PORT_T_NONE
;
1321 ahci_port_stop(ap
, 0);
1322 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
);
1325 * Clean up AT sub-ports on SATA port.
1327 for (i
= 0; ap
->ap_ata
&& i
< AHCI_MAX_PMPORTS
; ++i
) {
1328 at
= &ap
->ap_ata
[i
];
1329 at
->at_type
= ATA_PORT_T_NONE
;
1330 at
->at_probe
= ATA_PROBE_FAILED
;
1334 * Turn off port-multiplier control bit
1336 if (cmd
& AHCI_PREG_CMD_PMA
) {
1337 cmd
&= ~AHCI_PREG_CMD_PMA
;
1338 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
);
1342 * Make sure FRE is active. There isn't anything we can do if it
1343 * fails so just ignore errors.
1345 if ((cmd
& AHCI_PREG_CMD_FRE
) == 0) {
1346 cmd
|= AHCI_PREG_CMD_FRE
;
1347 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
);
1348 if ((ap
->ap_sc
->sc_flags
& AHCI_F_IGN_FR
) == 0)
1349 ahci_pwait_set(ap
, AHCI_PREG_CMD
, AHCI_PREG_CMD_FR
);
1353 * 10.10.3 DET must be set to 0 before setting SUD to 0.
1354 * 10.10.1 place us in the Listen state.
1356 * Deactivating SUD only applies if the controller supports SUD.
1358 ahci_pwrite(ap
, AHCI_PREG_SCTL
, AHCI_PREG_SCTL_IPM_DISABLED
);
1360 if (cmd
& AHCI_PREG_CMD_SUD
) {
1361 cmd
&= ~AHCI_PREG_CMD_SUD
;
1362 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
);
1367 * Transition su to the spin-up state. HVA shall send COMRESET and
1368 * begin initialization sequence (whatever that means).
1370 * This only applies if the controller supports SUD.
1372 cmd
|= AHCI_PREG_CMD_SUD
;
1373 ahci_pwrite(ap
, AHCI_PREG_CMD
, cmd
);
1377 * Transition us to the Reset state. Theoretically we send a
1378 * continuous stream of COMRESETs in this state.
1380 r
= AHCI_PREG_SCTL_IPM_DISABLED
| AHCI_PREG_SCTL_DET_INIT
;
1381 if (AhciForceGen1
& (1 << ap
->ap_num
)) {
1382 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap
));
1383 r
|= AHCI_PREG_SCTL_SPD_GEN1
;
1385 r
|= AHCI_PREG_SCTL_SPD_ANY
;
1387 ahci_pwrite(ap
, AHCI_PREG_SCTL
, r
);
1391 * Flush SERR_DIAG_X so the TFD can update.
1396 * Clean out pending ccbs
1398 while (ap
->ap_active
) {
1399 slot
= ffs(ap
->ap_active
) - 1;
1400 ap
->ap_active
&= ~(1 << slot
);
1401 ap
->ap_expired
&= ~(1 << slot
);
1402 --ap
->ap_active_cnt
;
1403 ccb
= &ap
->ap_ccbs
[slot
];
1404 if (ccb
->ccb_xa
.flags
& ATA_F_TIMEOUT_RUNNING
) {
1405 callout_stop(&ccb
->ccb_timeout
);
1406 ccb
->ccb_xa
.flags
&= ~ATA_F_TIMEOUT_RUNNING
;
1408 ccb
->ccb_xa
.flags
&= ~(ATA_F_TIMEOUT_DESIRED
|
1409 ATA_F_TIMEOUT_EXPIRED
);
1410 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
1412 ccb
->ccb_xa
.complete(&ccb
->ccb_xa
);
1414 while (ap
->ap_sactive
) {
1415 slot
= ffs(ap
->ap_sactive
) - 1;
1416 ap
->ap_sactive
&= ~(1 << slot
);
1417 ap
->ap_expired
&= ~(1 << slot
);
1418 ccb
= &ap
->ap_ccbs
[slot
];
1419 if (ccb
->ccb_xa
.flags
& ATA_F_TIMEOUT_RUNNING
) {
1420 callout_stop(&ccb
->ccb_timeout
);
1421 ccb
->ccb_xa
.flags
&= ~ATA_F_TIMEOUT_RUNNING
;
1423 ccb
->ccb_xa
.flags
&= ~(ATA_F_TIMEOUT_DESIRED
|
1424 ATA_F_TIMEOUT_EXPIRED
);
1425 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
1427 ccb
->ccb_xa
.complete(&ccb
->ccb_xa
);
1429 KKASSERT(ap
->ap_active_cnt
== 0);
1431 while ((ccb
= TAILQ_FIRST(&ap
->ap_ccb_pending
)) != NULL
) {
1432 TAILQ_REMOVE(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
1433 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
1434 ccb
->ccb_xa
.flags
&= ~ATA_F_TIMEOUT_DESIRED
;
1436 ccb
->ccb_xa
.complete(&ccb
->ccb_xa
);
1440 * Leave us in COMRESET (both SUD and INIT active), the HBA should
1441 * hopefully send us a DIAG_X-related interrupt if it receives
1442 * a COMINIT, and if not that then at least a Phy transition
1445 * If we transition INIT from 1->0 to begin the initalization
1446 * sequence it is unclear if that sequence will remain active
1447 * until the next device insertion.
1449 * If we go back to the listen state it is unclear if the
1450 * device will actually send us a COMINIT, since we aren't
1451 * sending any COMRESET's
1457 * We can't loop on the X bit, a continuous COMINIT received will make
1458 * it loop forever. Just assume one event has built up and clear X
1459 * so the task file descriptor can update.
1462 ahci_flush_tfd(struct ahci_port
*ap
)
1466 r
= ahci_pread(ap
, AHCI_PREG_SERR
);
1467 if (r
& AHCI_PREG_SERR_DIAG_X
)
1468 ahci_pwrite(ap
, AHCI_PREG_SERR
, AHCI_PREG_SERR_DIAG_X
);
1472 * Figure out what type of device is connected to the port, ATAPI or
1476 ahci_port_signature_detect(struct ahci_port
*ap
, struct ata_port
*at
)
1480 sig
= ahci_pread(ap
, AHCI_PREG_SIG
);
1482 kprintf("%s: sig %08x\n", ATANAME(ap
, at
), sig
);
1483 if ((sig
& 0xffff0000) == (SATA_SIGNATURE_ATAPI
& 0xffff0000)) {
1484 return(ATA_PORT_T_ATAPI
);
1485 } else if ((sig
& 0xffff0000) ==
1486 (SATA_SIGNATURE_PORT_MULTIPLIER
& 0xffff0000)) {
1487 return(ATA_PORT_T_PM
);
1489 return(ATA_PORT_T_DISK
);
1494 * Load the DMA descriptor table for a CCB's buffer.
1497 ahci_load_prdt(struct ahci_ccb
*ccb
)
1499 struct ahci_port
*ap
= ccb
->ccb_port
;
1500 struct ahci_softc
*sc
= ap
->ap_sc
;
1501 struct ata_xfer
*xa
= &ccb
->ccb_xa
;
1502 struct ahci_prdt
*prdt
= ccb
->ccb_cmd_table
->prdt
;
1503 bus_dmamap_t dmap
= ccb
->ccb_dmamap
;
1504 struct ahci_cmd_hdr
*cmd_slot
= ccb
->ccb_cmd_hdr
;
1507 if (xa
->datalen
== 0) {
1508 ccb
->ccb_cmd_hdr
->prdtl
= 0;
1512 error
= bus_dmamap_load(sc
->sc_tag_data
, dmap
,
1513 xa
->data
, xa
->datalen
,
1514 ahci_load_prdt_callback
,
1516 ((xa
->flags
& ATA_F_NOWAIT
) ?
1517 BUS_DMA_NOWAIT
: BUS_DMA_WAITOK
));
1519 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap
), error
);
1523 if (xa
->flags
& ATA_F_PIO
)
1524 prdt
->flags
|= htole32(AHCI_PRDT_FLAG_INTR
);
1527 cmd_slot
->prdtl
= htole16(prdt
- ccb
->ccb_cmd_table
->prdt
+ 1);
1529 bus_dmamap_sync(sc
->sc_tag_data
, dmap
,
1530 (xa
->flags
& ATA_F_READ
) ?
1531 BUS_DMASYNC_PREREAD
: BUS_DMASYNC_PREWRITE
);
1537 * Callback from BUSDMA system to load the segment list. The passed segment
1538 * list is a temporary structure.
1542 ahci_load_prdt_callback(void *info
, bus_dma_segment_t
*segs
, int nsegs
,
1545 struct ahci_prdt
*prd
= *(void **)info
;
1548 KKASSERT(nsegs
<= AHCI_MAX_PRDT
);
1551 addr
= segs
->ds_addr
;
1552 prd
->dba_hi
= htole32((u_int32_t
)(addr
>> 32));
1553 prd
->dba_lo
= htole32((u_int32_t
)addr
);
1554 prd
->flags
= htole32(segs
->ds_len
- 1);
1560 *(void **)info
= prd
; /* return last valid segment */
1564 ahci_unload_prdt(struct ahci_ccb
*ccb
)
1566 struct ahci_port
*ap
= ccb
->ccb_port
;
1567 struct ahci_softc
*sc
= ap
->ap_sc
;
1568 struct ata_xfer
*xa
= &ccb
->ccb_xa
;
1569 bus_dmamap_t dmap
= ccb
->ccb_dmamap
;
1571 if (xa
->datalen
!= 0) {
1572 bus_dmamap_sync(sc
->sc_tag_data
, dmap
,
1573 (xa
->flags
& ATA_F_READ
) ?
1574 BUS_DMASYNC_POSTREAD
: BUS_DMASYNC_POSTWRITE
);
1576 bus_dmamap_unload(sc
->sc_tag_data
, dmap
);
1578 if (ccb
->ccb_cmd_hdr
->prdbc
== 0) {
1579 kprintf("%s: UNLOAD RESID WAS ZERO! tag=%d\n",
1580 ATANAME(ap
, xa
->at
), ccb
->ccb_slot
);
1582 if (ccb
->ccb_xa
.flags
& ATA_F_NCQ
)
1585 xa
->resid
= xa
->datalen
-
1586 le32toh(ccb
->ccb_cmd_hdr
->prdbc
);
1591 * Start a command and poll for completion.
1593 * timeout is in ms and only counts once the command gets on-chip.
1595 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine
1596 * that no error occured.
1598 * NOTE: If the caller specifies a NULL timeout function the caller is
1599 * responsible for clearing hardware state on failure, but we will
1600 * deal with removing the ccb from any pending queue.
1602 * NOTE: NCQ should never be used with this function.
1604 * NOTE: If the port is in a failed state and stopped we do not try
1605 * to activate the ccb.
1608 ahci_poll(struct ahci_ccb
*ccb
, int timeout
,
1609 void (*timeout_fn
)(struct ahci_ccb
*))
1611 struct ahci_port
*ap
= ccb
->ccb_port
;
1613 if (ccb
->ccb_port
->ap_state
== AP_S_FATAL_ERROR
) {
1614 ccb
->ccb_xa
.state
= ATA_S_ERROR
;
1615 return(ccb
->ccb_xa
.state
);
1619 kprintf("%s: Start command %02x tag=%d\n",
1620 ATANAME(ccb
->ccb_port
, ccb
->ccb_xa
.at
),
1621 ccb
->ccb_xa
.fis
->command
, ccb
->ccb_slot
);
1626 ahci_port_intr(ap
, 1);
1627 switch(ccb
->ccb_xa
.state
) {
1629 timeout
-= ahci_os_softsleep();
1632 ahci_os_softsleep();
1633 ahci_check_active_timeouts(ap
);
1637 return (ccb
->ccb_xa
.state
);
1639 } while (timeout
> 0);
1641 kprintf("%s: Poll timeout slot %d CMD: %b TFD: 0x%b SERR: %b\n",
1642 ATANAME(ap
, ccb
->ccb_xa
.at
), ccb
->ccb_slot
,
1643 ahci_pread(ap
, AHCI_PREG_CMD
), AHCI_PFMT_CMD
,
1644 ahci_pread(ap
, AHCI_PREG_TFD
), AHCI_PFMT_TFD_STS
,
1645 ahci_pread(ap
, AHCI_PREG_SERR
), AHCI_PFMT_SERR
);
1651 return(ccb
->ccb_xa
.state
);
1655 * When polling we have to check if the currently active CCB(s)
1656 * have timed out as the callout will be deadlocked while we
1657 * hold the port lock.
1660 ahci_check_active_timeouts(struct ahci_port
*ap
)
1662 struct ahci_ccb
*ccb
;
1666 mask
= ap
->ap_active
| ap
->ap_sactive
;
1668 tag
= ffs(mask
) - 1;
1669 mask
&= ~(1 << tag
);
1670 ccb
= &ap
->ap_ccbs
[tag
];
1671 if (ccb
->ccb_xa
.flags
& ATA_F_TIMEOUT_EXPIRED
) {
1672 ahci_ata_cmd_timeout(ccb
);
1680 ahci_start_timeout(struct ahci_ccb
*ccb
)
1682 if (ccb
->ccb_xa
.flags
& ATA_F_TIMEOUT_DESIRED
) {
1683 ccb
->ccb_xa
.flags
|= ATA_F_TIMEOUT_RUNNING
;
1684 callout_reset(&ccb
->ccb_timeout
,
1685 (ccb
->ccb_xa
.timeout
* hz
+ 999) / 1000,
1686 ahci_ata_cmd_timeout_unserialized
, ccb
);
1691 ahci_start(struct ahci_ccb
*ccb
)
1693 struct ahci_port
*ap
= ccb
->ccb_port
;
1694 struct ahci_softc
*sc
= ap
->ap_sc
;
1696 KKASSERT(ccb
->ccb_xa
.state
== ATA_S_PENDING
);
1698 /* Zero transferred byte count before transfer */
1699 ccb
->ccb_cmd_hdr
->prdbc
= 0;
1701 /* Sync command list entry and corresponding command table entry */
1702 bus_dmamap_sync(sc
->sc_tag_cmdh
,
1703 AHCI_DMA_MAP(ap
->ap_dmamem_cmd_list
),
1704 BUS_DMASYNC_PREWRITE
);
1705 bus_dmamap_sync(sc
->sc_tag_cmdt
,
1706 AHCI_DMA_MAP(ap
->ap_dmamem_cmd_table
),
1707 BUS_DMASYNC_PREWRITE
);
1709 /* Prepare RFIS area for write by controller */
1710 bus_dmamap_sync(sc
->sc_tag_rfis
,
1711 AHCI_DMA_MAP(ap
->ap_dmamem_rfis
),
1712 BUS_DMASYNC_PREREAD
);
1715 * There's no point trying to optimize this, it only shaves a few
1716 * nanoseconds so just queue the command and call our generic issue.
1718 ahci_issue_pending_commands(ap
, ccb
);
1722 * While holding the port lock acquire exclusive access to the port.
1724 * This is used when running the state machine to initialize and identify
1725 * targets over a port multiplier. Setting exclusive access prevents
1726 * ahci_port_intr() from activating any requests sitting on the pending
1730 ahci_beg_exclusive_access(struct ahci_port
*ap
, struct ata_port
*at
)
1732 KKASSERT((ap
->ap_flags
& AP_F_EXCLUSIVE_ACCESS
) == 0);
1733 ap
->ap_flags
|= AP_F_EXCLUSIVE_ACCESS
;
1734 while (ap
->ap_active
|| ap
->ap_sactive
) {
1735 ahci_port_intr(ap
, 1);
1736 ahci_os_softsleep();
1741 ahci_end_exclusive_access(struct ahci_port
*ap
, struct ata_port
*at
)
1743 KKASSERT((ap
->ap_flags
& AP_F_EXCLUSIVE_ACCESS
) != 0);
1744 ap
->ap_flags
&= ~AP_F_EXCLUSIVE_ACCESS
;
1745 ahci_issue_pending_commands(ap
, NULL
);
1751 fubar(struct ahci_ccb
*ccb
)
1753 struct ahci_port
*ap
= ccb
->ccb_port
;
1754 struct ahci_cmd_hdr
*cmd
;
1755 struct ahci_cmd_table
*tab
;
1756 struct ahci_prdt
*prdt
;
1759 kprintf("%s: ISSUE %02x\n",
1760 ATANAME(ap
, ccb
->ccb_xa
.at
),
1761 ccb
->ccb_xa
.fis
->command
);
1762 cmd
= ccb
->ccb_cmd_hdr
;
1763 tab
= ccb
->ccb_cmd_table
;
1764 prdt
= ccb
->ccb_cmd_table
->prdt
;
1765 kprintf("cmd flags=%04x prdtl=%d prdbc=%d ctba=%08x%08x\n",
1766 cmd
->flags
, cmd
->prdtl
, cmd
->prdbc
,
1767 cmd
->ctba_hi
, cmd
->ctba_lo
);
1768 for (i
= 0; i
< cmd
->prdtl
; ++i
) {
1769 kprintf("\t%d dba=%08x%08x res=%08x flags=%08x\n",
1770 i
, prdt
->dba_hi
, prdt
->dba_lo
, prdt
->reserved
,
1779 * If ccb is not NULL enqueue and/or issue it.
1781 * If ccb is NULL issue whatever we can from the queue. However, nothing
1782 * new is issued if the exclusive access flag is set or expired ccb's are
1785 * If existing commands are still active (ap_active/ap_sactive) we can only
1786 * issue matching new commands.
1789 ahci_issue_pending_commands(struct ahci_port
*ap
, struct ahci_ccb
*ccb
)
1797 * If just running the queue and in exclusive access mode we
1798 * just return. Also in this case if there are any expired ccb's
1799 * we want to clear the queue so the port can be safely stopped.
1802 TAILQ_INSERT_TAIL(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
1803 } else if ((ap
->ap_flags
& AP_F_EXCLUSIVE_ACCESS
) || ap
->ap_expired
) {
1808 * Pull the next ccb off the queue and run it if possible.
1810 if ((ccb
= TAILQ_FIRST(&ap
->ap_ccb_pending
)) == NULL
)
1814 * Handle exclusivity requirements.
1816 * ATA_F_EXCLUSIVE is used when we want to be the only command
1819 * ATA_F_AUTOSENSE is used when we want the D2H rfis loaded
1820 * back into the ccb on a normal (non-errored) command completion.
1821 * For example, for PM requests to target 15. Because the AHCI
1822 * spec does not stop the command processor and has only one rfis
1823 * area (for non-FBSS anyway), AUTOSENSE currently implies EXCLUSIVE.
1824 * Otherwise multiple completions can destroy the rfis data before
1825 * we have a chance to copy it.
1827 if (ap
->ap_active
& ~ap
->ap_expired
) {
1829 * There may be multiple ccb's already running,
1830 * if any are running and ap_run_flags sets
1831 * one of these flags then we know only one is
1834 * XXX Current AUTOSENSE code forces exclusivity
1835 * to simplify the code.
1837 if (ap
->ap_run_flags
&
1838 (ATA_F_EXCLUSIVE
| ATA_F_AUTOSENSE
)) {
1842 if (ccb
->ccb_xa
.flags
&
1843 (ATA_F_EXCLUSIVE
| ATA_F_AUTOSENSE
)) {
1849 if (ccb
->ccb_xa
.flags
& ATA_F_NCQ
) {
1851 * The next command is a NCQ command and can be issued as
1852 * long as currently active commands are not standard.
1854 if (ap
->ap_active
) {
1855 KKASSERT(ap
->ap_active_cnt
> 0);
1858 KKASSERT(ap
->ap_active_cnt
== 0);
1862 TAILQ_REMOVE(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
1863 mask
|= 1 << ccb
->ccb_slot
;
1864 ccb
->ccb_xa
.state
= ATA_S_ONCHIP
;
1865 ahci_start_timeout(ccb
);
1866 ap
->ap_run_flags
= ccb
->ccb_xa
.flags
;
1867 ccb
= TAILQ_FIRST(&ap
->ap_ccb_pending
);
1868 } while (ccb
&& (ccb
->ccb_xa
.flags
& ATA_F_NCQ
) &&
1870 (ATA_F_EXCLUSIVE
| ATA_F_AUTOSENSE
)) == 0);
1872 ap
->ap_sactive
|= mask
;
1873 ahci_pwrite(ap
, AHCI_PREG_SACT
, mask
);
1874 ahci_pwrite(ap
, AHCI_PREG_CI
, mask
);
1877 * The next command is a standard command and can be issued
1878 * as long as currently active commands are not NCQ.
1880 * We limit ourself to 1 command if we have a port multiplier,
1881 * (at least without FBSS support), otherwise timeouts on
1882 * one port can race completions on other ports (see
1883 * ahci_ata_cmd_timeout() for more information).
1885 * If not on a port multiplier generally allow up to 4
1886 * standard commands to be enqueued. Remember that the
1887 * command processor will still process them sequentially.
1891 if (ap
->ap_type
== ATA_PORT_T_PM
)
1893 else if (ap
->ap_sc
->sc_ncmds
> 4)
1898 while (ap
->ap_active_cnt
< limit
&& ccb
&&
1899 (ccb
->ccb_xa
.flags
& ATA_F_NCQ
) == 0) {
1900 TAILQ_REMOVE(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
1904 ap
->ap_active
|= 1 << ccb
->ccb_slot
;
1905 ap
->ap_active_cnt
++;
1906 ap
->ap_run_flags
= ccb
->ccb_xa
.flags
;
1907 ccb
->ccb_xa
.state
= ATA_S_ONCHIP
;
1908 ahci_pwrite(ap
, AHCI_PREG_CI
, 1 << ccb
->ccb_slot
);
1909 ahci_start_timeout(ccb
);
1910 ccb
= TAILQ_FIRST(&ap
->ap_ccb_pending
);
1911 if (ccb
&& (ccb
->ccb_xa
.flags
&
1912 (ATA_F_EXCLUSIVE
| ATA_F_AUTOSENSE
))) {
1920 ahci_intr(void *arg
)
1922 struct ahci_softc
*sc
= arg
;
1923 struct ahci_port
*ap
;
1929 * Check if the master enable is up, and whether any interrupts are
1932 if ((sc
->sc_flags
& AHCI_F_INT_GOOD
) == 0)
1934 is
= ahci_read(sc
, AHCI_REG_IS
);
1935 if (is
== 0 || is
== 0xffffffff) {
1938 is
&= sc
->sc_portmask
;
1940 #ifdef AHCI_COALESCE
1941 /* Check coalescing interrupt first */
1942 if (is
& sc
->sc_ccc_mask
) {
1943 DPRINTF(AHCI_D_INTR
, "%s: command coalescing interrupt\n",
1945 is
&= ~sc
->sc_ccc_mask
;
1946 is
|= sc
->sc_ccc_ports_cur
;
1951 * Process interrupts for each port in a non-blocking fashion.
1953 * The global IS bit is forced on if any unmasked port interrupts
1954 * are pending, even if we clear.
1956 for (ack
= 0; is
; is
&= ~(1 << port
)) {
1960 ap
= sc
->sc_ports
[port
];
1964 if (ahci_os_lock_port_nb(ap
) == 0) {
1965 ahci_port_intr(ap
, 0);
1966 ahci_os_unlock_port(ap
);
1968 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
1969 ahci_os_signal_port_thread(ap
, AP_SIGF_PORTINT
);
1972 ahci_write(sc
, AHCI_REG_IS
, ack
);
1976 * Core called from helper thread.
1979 ahci_port_thread_core(struct ahci_port
*ap
, int mask
)
1982 * Process any expired timedouts.
1984 ahci_os_lock_port(ap
);
1985 if (mask
& AP_SIGF_TIMEOUT
) {
1986 ahci_check_active_timeouts(ap
);
1990 * Process port interrupts which require a higher level of
1993 if (mask
& AP_SIGF_PORTINT
) {
1994 ahci_port_intr(ap
, 1);
1995 ahci_port_interrupt_enable(ap
);
1996 ahci_os_unlock_port(ap
);
1997 } else if (ap
->ap_probe
!= ATA_PROBE_FAILED
) {
1998 ahci_port_intr(ap
, 1);
1999 ahci_port_interrupt_enable(ap
);
2000 ahci_os_unlock_port(ap
);
2002 ahci_os_unlock_port(ap
);
2007 * Core per-port interrupt handler.
2009 * If blockable is 0 we cannot call ahci_os_sleep() at all and we can only
2010 * deal with normal command completions which do not require blocking.
2013 ahci_port_intr(struct ahci_port
*ap
, int blockable
)
2015 struct ahci_softc
*sc
= ap
->ap_sc
;
2016 u_int32_t is
, ci_saved
, ci_masked
;
2018 struct ahci_ccb
*ccb
= NULL
;
2019 struct ata_port
*ccb_at
= NULL
;
2020 volatile u_int32_t
*active
;
2021 const u_int32_t blockable_mask
= AHCI_PREG_IS_TFES
|
2029 enum { NEED_NOTHING
, NEED_RESTART
, NEED_HOTPLUG_INSERT
,
2030 NEED_HOTPLUG_REMOVE
} need
= NEED_NOTHING
;
2033 * All basic command completions are always processed.
2035 is
= ahci_pread(ap
, AHCI_PREG_IS
);
2036 if (is
& AHCI_PREG_IS_DPS
)
2037 ahci_pwrite(ap
, AHCI_PREG_IS
, is
& AHCI_PREG_IS_DPS
);
2040 * If we can't block then we can't handle these here. Disable
2041 * the interrupts in question so we don't live-lock, the helper
2042 * thread will re-enable them.
2044 * If the port is in a completely failed state we do not want
2045 * to drop through to failed-command-processing if blockable is 0,
2046 * just let the thread deal with it all.
2048 * Otherwise we fall through and still handle DHRS and any commands
2049 * which completed normally. Even if we are errored we haven't
2050 * stopped the port yet so CI/SACT are still good.
2052 if (blockable
== 0) {
2053 if (ap
->ap_state
== AP_S_FATAL_ERROR
) {
2054 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
2055 ahci_os_signal_port_thread(ap
, AP_SIGF_PORTINT
);
2058 if (is
& blockable_mask
) {
2059 ahci_pwrite(ap
, AHCI_PREG_IE
, 0);
2060 ahci_os_signal_port_thread(ap
, AP_SIGF_PORTINT
);
2066 * Either NCQ or non-NCQ commands will be active, never both.
2068 if (ap
->ap_sactive
) {
2069 KKASSERT(ap
->ap_active
== 0);
2070 KKASSERT(ap
->ap_active_cnt
== 0);
2071 ci_saved
= ahci_pread(ap
, AHCI_PREG_SACT
);
2072 active
= &ap
->ap_sactive
;
2074 ci_saved
= ahci_pread(ap
, AHCI_PREG_CI
);
2075 active
= &ap
->ap_active
;
2077 KKASSERT(!(ap
->ap_sactive
&& ap
->ap_active
));
2079 kprintf("CHECK act=%08x/%08x sact=%08x/%08x\n",
2080 ap
->ap_active
, ahci_pread(ap
, AHCI_PREG_CI
),
2081 ap
->ap_sactive
, ahci_pread(ap
, AHCI_PREG_SACT
));
2084 if (is
& AHCI_PREG_IS_TFES
) {
2086 * Command failed (blockable).
2088 * See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2.
2090 * This stops command processing.
2092 u_int32_t tfd
, serr
;
2096 tfd
= ahci_pread(ap
, AHCI_PREG_TFD
);
2097 serr
= ahci_pread(ap
, AHCI_PREG_SERR
);
2100 * Load the error slot and restart command processing.
2101 * CLO if we need to. The error slot may not be valid.
2102 * MUST BE DONE BEFORE CLEARING ST!
2106 * It is unclear but we may have to clear SERR to reenable
2109 err_slot
= AHCI_PREG_CMD_CCS(ahci_pread(ap
, AHCI_PREG_CMD
));
2110 ahci_pwrite(ap
, AHCI_PREG_IS
, AHCI_PREG_IS_TFES
|
2114 is
&= ~(AHCI_PREG_IS_TFES
| AHCI_PREG_IS_PSS
|
2115 AHCI_PREG_IS_DHRS
| AHCI_PREG_IS_SDBS
);
2116 ahci_pwrite(ap
, AHCI_PREG_SERR
, serr
);
2117 ahci_port_stop(ap
, 0);
2118 ahci_os_hardsleep(10);
2119 if (tfd
& (AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
2120 kprintf("%s: Issuing CLO\n", PORTNAME(ap
));
2123 ahci_port_start(ap
);
2124 need
= NEED_RESTART
;
2126 kprintf("%s: TFES slot %d ci_saved = %08x\n",
2127 PORTNAME(ap
), err_slot
, ci_saved
);
2130 * If we got an error on an error CCB just complete it
2131 * with an error. ci_saved has the mask to restart
2132 * (the err_ccb will be removed from it by finish_error).
2134 if (ap
->ap_flags
& AP_F_ERR_CCB_RESERVED
) {
2135 err_slot
= ap
->ap_err_ccb
->ccb_slot
;
2140 * If NCQ commands were active get the error slot from
2141 * the log page. NCQ is not supported for PM's so this
2142 * is a direct-attached target.
2144 * Otherwise if no commands were active we have a problem.
2146 * Otherwise if the error slot is bad we have a problem.
2148 * Otherwise process the error for the slot.
2150 if (ap
->ap_sactive
) {
2151 err_slot
= ahci_port_read_ncq_error(ap
, 0);
2152 } else if (ap
->ap_active
== 0) {
2153 kprintf("%s: TFES with no commands pending\n",
2156 } else if (err_slot
< 0 || err_slot
>= ap
->ap_sc
->sc_ncmds
) {
2157 kprintf("%s: bad error slot %d\n",
2158 PORTNAME(ap
), err_slot
);
2161 ccb
= &ap
->ap_ccbs
[err_slot
];
2164 * Validate the errored ccb. Note that ccb_at can
2165 * be NULL for direct-attached ccb's.
2167 * Copy received taskfile data from the RFIS.
2169 if (ccb
->ccb_xa
.state
== ATA_S_ONCHIP
) {
2170 ccb_at
= ccb
->ccb_xa
.at
;
2171 memcpy(&ccb
->ccb_xa
.rfis
, ap
->ap_rfis
->rfis
,
2172 sizeof(struct ata_fis_d2h
));
2173 kprintf("%s: Copying error rfis slot %d\n",
2174 ATANAME(ap
, ccb_at
), err_slot
);
2176 kprintf("%s: Cannot copy rfis, CCB slot "
2177 "%d is not on-chip (state=%d)\n",
2178 ATANAME(ap
, ccb
->ccb_xa
.at
),
2179 err_slot
, ccb
->ccb_xa
.state
);
2185 * If we could not determine the errored slot then
2189 kprintf("%s: TFES: Unable to determine errored slot\n",
2191 if (ap
->ap_flags
& AP_F_IN_RESET
)
2197 * Finish error on slot. We will restart ci_saved
2198 * commands except the errored slot which we generate
2202 ccb
= &ap
->ap_ccbs
[err_slot
];
2203 ci_saved
&= ~(1 << err_slot
);
2204 KKASSERT(ccb
->ccb_xa
.state
== ATA_S_ONCHIP
);
2205 ccb
->ccb_xa
.state
= ATA_S_ERROR
;
2206 } else if (is
& AHCI_PREG_IS_DHRS
) {
2208 * Command posted D2H register FIS to the rfis (non-blocking).
2210 * A normal completion with an error may set DHRS instead
2211 * of TFES. The CCS bits are only valid if ERR was set.
2212 * If ERR is set command processing was probably stopped.
2214 * If ERR was not set we can only copy-back data for
2215 * exclusive-mode commands because otherwise we won't know
2216 * which tag the rfis belonged to.
2218 * err_slot must be read from the CCS before any other port
2219 * action, such as stopping the port.
2221 * WARNING! This is not well documented in the AHCI spec.
2222 * It can be found in the state machine tables
2223 * but not in the explanations.
2229 tfd
= ahci_pread(ap
, AHCI_PREG_TFD
);
2230 cmd
= ahci_pread(ap
, AHCI_PREG_CMD
);
2232 if ((tfd
& AHCI_PREG_TFD_STS_ERR
) &&
2233 (cmd
& AHCI_PREG_CMD_CR
) == 0) {
2234 err_slot
= AHCI_PREG_CMD_CCS(
2235 ahci_pread(ap
, AHCI_PREG_CMD
));
2236 ccb
= &ap
->ap_ccbs
[err_slot
];
2237 kprintf("%s: DHRS tfd=%b err_slot=%d cmd=%02x\n",
2239 tfd
, AHCI_PFMT_TFD_STS
,
2240 err_slot
, ccb
->ccb_xa
.fis
->command
);
2244 * NO ELSE... copy back is in the normal command completion
2245 * code and only if no error occured and ATA_F_AUTOSENSE
2248 ahci_pwrite(ap
, AHCI_PREG_IS
, AHCI_PREG_IS_DHRS
);
2252 * Device notification to us (non-blocking)
2254 * NOTE! On some parts notification bits can cause an IPMS
2255 * interrupt instead of a SDBS interrupt.
2257 * NOTE! On some parts (e.g. VBOX, probably intel ICHx),
2258 * SDBS notifies us of the completion of a NCQ command
2261 if (is
& (AHCI_PREG_IS_SDBS
| AHCI_PREG_IS_IPMS
)) {
2264 ahci_pwrite(ap
, AHCI_PREG_IS
,
2265 AHCI_PREG_IS_SDBS
| AHCI_PREG_IS_IPMS
);
2266 if (sc
->sc_cap
& AHCI_REG_CAP_SSNTF
) {
2267 data
= ahci_pread(ap
, AHCI_PREG_SNTF
);
2269 ahci_pwrite(ap
, AHCI_PREG_IS
,
2271 kprintf("%s: NOTIFY %08x\n",
2272 PORTNAME(ap
), data
);
2273 ahci_pwrite(ap
, AHCI_PREG_SERR
,
2274 AHCI_PREG_SERR_DIAG_N
);
2275 ahci_pwrite(ap
, AHCI_PREG_SNTF
, data
);
2276 ahci_cam_changed(ap
, NULL
, -1);
2279 is
&= ~(AHCI_PREG_IS_SDBS
| AHCI_PREG_IS_IPMS
);
2283 * Spurious IFS errors (blockable).
2285 * Spurious IFS errors can occur while we are doing a reset
2286 * sequence through a PM. Try to recover if we are being asked
2287 * to ignore IFS errors during these periods.
2289 if ((is
& AHCI_PREG_IS_IFS
) && (ap
->ap_flags
& AP_F_IGNORE_IFS
)) {
2290 u_int32_t serr
= ahci_pread(ap
, AHCI_PREG_SERR
);
2291 if ((ap
->ap_flags
& AP_F_IFS_IGNORED
) == 0) {
2292 kprintf("%s: Ignoring IFS (XXX) (IS: %b, SERR: %b)\n",
2295 serr
, AHCI_PFMT_SERR
);
2296 ap
->ap_flags
|= AP_F_IFS_IGNORED
;
2298 ap
->ap_flags
|= AP_F_IFS_OCCURED
;
2299 ahci_pwrite(ap
, AHCI_PREG_SERR
, -1);
2300 ahci_pwrite(ap
, AHCI_PREG_IS
, AHCI_PREG_IS_IFS
);
2301 is
&= ~AHCI_PREG_IS_IFS
;
2302 ahci_port_stop(ap
, 0);
2303 ahci_port_start(ap
);
2304 kprintf("%s: Spurious IFS error\n", PORTNAME(ap
));
2306 /* need = NEED_RESTART; */
2310 * Port change (hot-plug) (blockable).
2312 * A PCS interrupt will occur on hot-plug once communication is
2315 * A PRCS interrupt will occur on hot-unplug (and possibly also
2318 * XXX We can then check the CPS (Cold Presence State) bit, if
2319 * supported, to determine if a device is plugged in or not and do
2322 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and
2323 * can also occur if an unsolicited COMINIT is received.
2324 * If this occurs command processing is automatically
2325 * stopped (CR goes inactive) and the port must be stopped
2328 if (is
& (AHCI_PREG_IS_PCS
| AHCI_PREG_IS_PRCS
)) {
2329 kprintf("%s: Transient Errors: %b\n",
2330 PORTNAME(ap
), is
, AHCI_PFMT_IS
);
2331 ahci_pwrite(ap
, AHCI_PREG_SERR
,
2332 (AHCI_PREG_SERR_DIAG_N
| AHCI_PREG_SERR_DIAG_X
));
2333 ahci_pwrite(ap
, AHCI_PREG_IS
,
2334 is
& (AHCI_PREG_IS_PCS
| AHCI_PREG_IS_PRCS
));
2335 is
&= ~(AHCI_PREG_IS_PCS
| AHCI_PREG_IS_PRCS
);
2336 ahci_port_stop(ap
, 0);
2337 switch (ahci_pread(ap
, AHCI_PREG_SSTS
) & AHCI_PREG_SSTS_DET
) {
2338 case AHCI_PREG_SSTS_DET_DEV
:
2339 if (ap
->ap_probe
== ATA_PROBE_FAILED
) {
2340 need
= NEED_HOTPLUG_INSERT
;
2343 need
= NEED_RESTART
;
2346 if (ap
->ap_type
!= ATA_PROBE_FAILED
) {
2347 need
= NEED_HOTPLUG_REMOVE
;
2350 need
= NEED_RESTART
;
2356 * Check for remaining errors - they are fatal. (blockable)
2358 if (is
& (AHCI_PREG_IS_TFES
| AHCI_PREG_IS_HBFS
| AHCI_PREG_IS_IFS
|
2359 AHCI_PREG_IS_OFS
| AHCI_PREG_IS_UFS
)) {
2362 ahci_pwrite(ap
, AHCI_PREG_IS
,
2363 is
& (AHCI_PREG_IS_TFES
| AHCI_PREG_IS_HBFS
|
2364 AHCI_PREG_IS_IFS
| AHCI_PREG_IS_OFS
|
2366 serr
= ahci_pread(ap
, AHCI_PREG_SERR
);
2367 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), "
2368 "disabling port.\n",
2371 serr
, AHCI_PFMT_SERR
2373 is
&= ~(AHCI_PREG_IS_TFES
| AHCI_PREG_IS_HBFS
|
2374 AHCI_PREG_IS_IFS
| AHCI_PREG_IS_OFS
|
2376 /* XXX try recovery first */
2381 * Fail all outstanding commands if we know the port won't recover.
2383 * We may have a ccb_at if the failed command is known and was
2384 * being sent to a device over a port multiplier (PM). In this
2385 * case if the port itself has not completely failed we fail just
2386 * the commands related to that target.
2388 * ci_saved contains the mask of active commands as of when the
2389 * error occured, prior to any port stops.
2391 if (ap
->ap_state
== AP_S_FATAL_ERROR
) {
2393 ap
->ap_state
= AP_S_FATAL_ERROR
;
2394 ahci_port_stop(ap
, 0);
2396 kprintf("%s: Failing all commands\n", PORTNAME(ap
));
2399 * Error all the active slots not already errored. If
2400 * running across a PM try to error out just the slots
2401 * related to the target.
2403 ci_masked
= ci_saved
& *active
& ~ap
->ap_expired
;
2405 slot
= ffs(ci_masked
) - 1;
2406 ccb
= &ap
->ap_ccbs
[slot
];
2407 if (ccb_at
== ccb
->ccb_xa
.at
||
2408 ap
->ap_state
== AP_S_FATAL_ERROR
) {
2409 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
2410 ap
->ap_expired
|= 1 << slot
;
2411 ci_saved
&= ~(1 << slot
);
2413 ci_masked
&= ~(1 << slot
);
2417 * Clear bits in ci_saved (cause completions to be run)
2418 * for all slots which are not active.
2420 ci_saved
&= ~*active
;
2423 * Don't restart the port if our problems were deemed fatal.
2425 * Also acknowlege all fatal interrupt sources to prevent
2428 if (ap
->ap_state
== AP_S_FATAL_ERROR
) {
2429 if (need
== NEED_RESTART
)
2430 need
= NEED_NOTHING
;
2431 ahci_pwrite(ap
, AHCI_PREG_IS
,
2432 AHCI_PREG_IS_TFES
| AHCI_PREG_IS_HBFS
|
2433 AHCI_PREG_IS_IFS
| AHCI_PREG_IS_OFS
|
2439 * CCB completion (non blocking).
2441 * CCB completion is detected by noticing its slot's bit in CI has
2442 * changed to zero some time after we activated it.
2443 * If we are polling, we may only be interested in particular slot(s).
2445 * Any active bits not saved are completed within the restrictions
2446 * imposed by the caller.
2448 ci_masked
= ~ci_saved
& *active
;
2450 slot
= ffs(ci_masked
) - 1;
2451 ccb
= &ap
->ap_ccbs
[slot
];
2452 ci_masked
&= ~(1 << slot
);
2454 DPRINTF(AHCI_D_INTR
, "%s: slot %d is complete%s\n",
2455 PORTNAME(ap
), slot
, ccb
->ccb_xa
.state
== ATA_S_ERROR
?
2458 bus_dmamap_sync(sc
->sc_tag_cmdh
,
2459 AHCI_DMA_MAP(ap
->ap_dmamem_cmd_list
),
2460 BUS_DMASYNC_POSTWRITE
);
2462 bus_dmamap_sync(sc
->sc_tag_cmdt
,
2463 AHCI_DMA_MAP(ap
->ap_dmamem_cmd_table
),
2464 BUS_DMASYNC_POSTWRITE
);
2466 bus_dmamap_sync(sc
->sc_tag_rfis
,
2467 AHCI_DMA_MAP(ap
->ap_dmamem_rfis
),
2468 BUS_DMASYNC_POSTREAD
);
2470 *active
&= ~(1 << ccb
->ccb_slot
);
2471 if (active
== &ap
->ap_active
) {
2472 KKASSERT(ap
->ap_active_cnt
> 0);
2473 --ap
->ap_active_cnt
;
2477 * Complete the ccb. If the ccb was marked expired it
2478 * was probably already removed from the command processor,
2479 * so don't take the clear ci_saved bit as meaning the
2480 * command actually succeeded, it didn't.
2482 if (ap
->ap_expired
& (1 << ccb
->ccb_slot
)) {
2483 ap
->ap_expired
&= ~(1 << ccb
->ccb_slot
);
2484 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
2486 ccb
->ccb_xa
.complete(&ccb
->ccb_xa
);
2488 if (ccb
->ccb_xa
.state
== ATA_S_ONCHIP
) {
2489 ccb
->ccb_xa
.state
= ATA_S_COMPLETE
;
2490 if (ccb
->ccb_xa
.flags
& ATA_F_AUTOSENSE
) {
2491 memcpy(&ccb
->ccb_xa
.rfis
,
2493 sizeof(struct ata_fis_d2h
));
2494 if (ccb
->ccb_xa
.state
== ATA_S_TIMEOUT
)
2495 ccb
->ccb_xa
.state
= ATA_S_ERROR
;
2501 ahci_issue_pending_commands(ap
, NULL
);
2504 * Cleanup. Will not be set if non-blocking.
2509 * A recoverable error occured and we can restart outstanding
2510 * commands on the port.
2512 ci_saved
&= ~ap
->ap_expired
;
2514 kprintf("%s: Restart %08x\n", PORTNAME(ap
), ci_saved
);
2515 ahci_issue_saved_commands(ap
, ci_saved
);
2518 case NEED_HOTPLUG_INSERT
:
2520 * A hot-plug insertion event has occured and all
2521 * outstanding commands have already been revoked.
2523 * Don't recurse if this occurs while we are
2524 * resetting the port.
2526 if ((ap
->ap_flags
& AP_F_IN_RESET
) == 0) {
2527 kprintf("%s: HOTPLUG - Device inserted\n",
2529 ap
->ap_probe
= ATA_PROBE_NEED_INIT
;
2530 ahci_cam_changed(ap
, NULL
, -1);
2533 case NEED_HOTPLUG_REMOVE
:
2535 * A hot-plug removal event has occured and all
2536 * outstanding commands have already been revoked.
2538 * Don't recurse if this occurs while we are
2539 * resetting the port.
2541 if ((ap
->ap_flags
& AP_F_IN_RESET
) == 0) {
2542 kprintf("%s: HOTPLUG - Device removed\n",
2544 ahci_port_hardstop(ap
);
2545 /* ap_probe set to failed */
2546 ahci_cam_changed(ap
, NULL
, -1);
2555 ahci_get_ccb(struct ahci_port
*ap
)
2557 struct ahci_ccb
*ccb
;
2559 lockmgr(&ap
->ap_ccb_lock
, LK_EXCLUSIVE
);
2560 ccb
= TAILQ_FIRST(&ap
->ap_ccb_free
);
2562 KKASSERT(ccb
->ccb_xa
.state
== ATA_S_PUT
);
2563 TAILQ_REMOVE(&ap
->ap_ccb_free
, ccb
, ccb_entry
);
2564 ccb
->ccb_xa
.state
= ATA_S_SETUP
;
2565 ccb
->ccb_xa
.at
= NULL
;
2567 lockmgr(&ap
->ap_ccb_lock
, LK_RELEASE
);
2573 ahci_put_ccb(struct ahci_ccb
*ccb
)
2575 struct ahci_port
*ap
= ccb
->ccb_port
;
2577 ccb
->ccb_xa
.state
= ATA_S_PUT
;
2578 lockmgr(&ap
->ap_ccb_lock
, LK_EXCLUSIVE
);
2579 TAILQ_INSERT_TAIL(&ap
->ap_ccb_free
, ccb
, ccb_entry
);
2580 lockmgr(&ap
->ap_ccb_lock
, LK_RELEASE
);
2584 ahci_get_err_ccb(struct ahci_port
*ap
)
2586 struct ahci_ccb
*err_ccb
;
2589 /* No commands may be active on the chip. */
2590 sact
= ahci_pread(ap
, AHCI_PREG_SACT
);
2592 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact
);
2593 KKASSERT(ahci_pread(ap
, AHCI_PREG_CI
) == 0);
2594 KKASSERT((ap
->ap_flags
& AP_F_ERR_CCB_RESERVED
) == 0);
2595 ap
->ap_flags
|= AP_F_ERR_CCB_RESERVED
;
2597 /* Save outstanding command state. */
2598 ap
->ap_err_saved_active
= ap
->ap_active
;
2599 ap
->ap_err_saved_active_cnt
= ap
->ap_active_cnt
;
2600 ap
->ap_err_saved_sactive
= ap
->ap_sactive
;
2603 * Pretend we have no commands outstanding, so that completions won't
2606 ap
->ap_active
= ap
->ap_active_cnt
= ap
->ap_sactive
= 0;
2609 * Grab a CCB to use for error recovery. This should never fail, as
2610 * we ask atascsi to reserve one for us at init time.
2612 err_ccb
= ap
->ap_err_ccb
;
2613 KKASSERT(err_ccb
!= NULL
);
2614 err_ccb
->ccb_xa
.flags
= 0;
2615 err_ccb
->ccb_done
= ahci_empty_done
;
2621 ahci_put_err_ccb(struct ahci_ccb
*ccb
)
2623 struct ahci_port
*ap
= ccb
->ccb_port
;
2627 KKASSERT((ap
->ap_flags
& AP_F_ERR_CCB_RESERVED
) != 0);
2630 * No commands may be active on the chip
2632 sact
= ahci_pread(ap
, AHCI_PREG_SACT
);
2634 panic("ahci_port_err_ccb(%d) but SACT %08x != 0\n",
2635 ccb
->ccb_slot
, sact
);
2637 ci
= ahci_pread(ap
, AHCI_PREG_CI
);
2639 panic("ahci_put_err_ccb(%d) but CI %08x != 0 "
2640 "(act=%08x sact=%08x)\n",
2642 ap
->ap_active
, ap
->ap_sactive
);
2645 KKASSERT(ccb
== ap
->ap_err_ccb
);
2647 /* Restore outstanding command state */
2648 ap
->ap_sactive
= ap
->ap_err_saved_sactive
;
2649 ap
->ap_active_cnt
= ap
->ap_err_saved_active_cnt
;
2650 ap
->ap_active
= ap
->ap_err_saved_active
;
2652 ap
->ap_flags
&= ~AP_F_ERR_CCB_RESERVED
;
2656 * Read log page to get NCQ error.
2658 * NOTE: NCQ not currently supported on port multipliers. XXX
2661 ahci_port_read_ncq_error(struct ahci_port
*ap
, int target
)
2663 struct ata_log_page_10h
*log
;
2664 struct ahci_ccb
*ccb
;
2665 struct ahci_cmd_hdr
*cmd_slot
;
2666 struct ata_fis_h2d
*fis
;
2670 kprintf("%s: READ LOG PAGE target %d\n", PORTNAME(ap
),
2675 * Prep error CCB for READ LOG EXT, page 10h, 1 sector.
2677 * Getting err_ccb clears active/sactive/active_cnt, putting
2678 * it back restores the fields.
2680 ccb
= ahci_get_err_ccb(ap
);
2681 ccb
->ccb_xa
.flags
= ATA_F_READ
| ATA_F_POLL
;
2682 ccb
->ccb_xa
.data
= ap
->ap_err_scratch
;
2683 ccb
->ccb_xa
.datalen
= 512;
2684 ccb
->ccb_xa
.complete
= ahci_dummy_done
;
2685 ccb
->ccb_xa
.at
= &ap
->ap_ata
[target
];
2687 fis
= (struct ata_fis_h2d
*)ccb
->ccb_cmd_table
->cfis
;
2688 bzero(fis
, sizeof(*fis
));
2689 fis
->type
= ATA_FIS_TYPE_H2D
;
2690 fis
->flags
= ATA_H2D_FLAGS_CMD
| target
;
2691 fis
->command
= ATA_C_READ_LOG_EXT
;
2692 fis
->lba_low
= 0x10; /* queued error log page (10h) */
2693 fis
->sector_count
= 1; /* number of sectors (1) */
2694 fis
->sector_count_exp
= 0;
2695 fis
->lba_mid
= 0; /* starting offset */
2696 fis
->lba_mid_exp
= 0;
2699 cmd_slot
= ccb
->ccb_cmd_hdr
;
2700 cmd_slot
->flags
= htole16(5); /* FIS length: 5 DWORDS */
2702 if (ahci_load_prdt(ccb
) != 0) {
2707 ccb
->ccb_xa
.state
= ATA_S_PENDING
;
2708 if (ahci_poll(ccb
, 1000, ahci_quick_timeout
) != ATA_S_COMPLETE
) {
2710 ahci_unload_prdt(ccb
);
2713 ahci_unload_prdt(ccb
);
2716 * Success, extract failed register set and tags from the scratch
2719 log
= (struct ata_log_page_10h
*)ap
->ap_err_scratch
;
2720 if (log
->err_regs
.type
& ATA_LOG_10H_TYPE_NOTQUEUED
) {
2721 /* Not queued bit was set - wasn't an NCQ error? */
2722 kprintf("%s: read NCQ error page, but not an NCQ error?\n",
2726 /* Copy back the log record as a D2H register FIS. */
2727 err_slot
= log
->err_regs
.type
& ATA_LOG_10H_TYPE_TAG_MASK
;
2729 ccb
= &ap
->ap_ccbs
[err_slot
];
2730 if (ccb
->ccb_xa
.state
== ATA_S_ONCHIP
) {
2731 kprintf("%s: read NCQ error page slot=%d\n",
2732 ATANAME(ap
, ccb
->ccb_xa
.at
),
2734 memcpy(&ccb
->ccb_xa
.rfis
, &log
->err_regs
,
2735 sizeof(struct ata_fis_d2h
));
2736 ccb
->ccb_xa
.rfis
.type
= ATA_FIS_TYPE_D2H
;
2737 ccb
->ccb_xa
.rfis
.flags
= 0;
2739 kprintf("%s: read NCQ error page slot=%d, "
2740 "slot does not match any cmds\n",
2741 ATANAME(ccb
->ccb_port
, ccb
->ccb_xa
.at
),
2747 ahci_put_err_ccb(ccb
);
2748 kprintf("%s: DONE log page target %d err_slot=%d\n",
2749 PORTNAME(ap
), target
, err_slot
);
2754 * Allocate memory for various structures DMAd by hardware. The maximum
2755 * number of segments for these tags is 1 so the DMA memory will have a
2756 * single physical base address.
2758 struct ahci_dmamem
*
2759 ahci_dmamem_alloc(struct ahci_softc
*sc
, bus_dma_tag_t tag
)
2761 struct ahci_dmamem
*adm
;
2764 adm
= kmalloc(sizeof(*adm
), M_DEVBUF
, M_INTWAIT
| M_ZERO
);
2766 error
= bus_dmamem_alloc(tag
, (void **)&adm
->adm_kva
,
2767 BUS_DMA_ZERO
, &adm
->adm_map
);
2770 error
= bus_dmamap_load(tag
, adm
->adm_map
,
2772 bus_dma_tag_getmaxsize(tag
),
2773 ahci_dmamem_saveseg
, &adm
->adm_busaddr
,
2778 bus_dmamap_destroy(tag
, adm
->adm_map
);
2779 adm
->adm_map
= NULL
;
2780 adm
->adm_tag
= NULL
;
2781 adm
->adm_kva
= NULL
;
2783 kfree(adm
, M_DEVBUF
);
2791 ahci_dmamem_saveseg(void *info
, bus_dma_segment_t
*segs
, int nsegs
, int error
)
2793 KKASSERT(error
== 0);
2794 KKASSERT(nsegs
== 1);
2795 *(bus_addr_t
*)info
= segs
->ds_addr
;
2800 ahci_dmamem_free(struct ahci_softc
*sc
, struct ahci_dmamem
*adm
)
2803 bus_dmamap_unload(adm
->adm_tag
, adm
->adm_map
);
2804 bus_dmamap_destroy(adm
->adm_tag
, adm
->adm_map
);
2805 adm
->adm_map
= NULL
;
2806 adm
->adm_tag
= NULL
;
2807 adm
->adm_kva
= NULL
;
2809 kfree(adm
, M_DEVBUF
);
2813 ahci_read(struct ahci_softc
*sc
, bus_size_t r
)
2815 bus_space_barrier(sc
->sc_iot
, sc
->sc_ioh
, r
, 4,
2816 BUS_SPACE_BARRIER_READ
);
2817 return (bus_space_read_4(sc
->sc_iot
, sc
->sc_ioh
, r
));
2821 ahci_write(struct ahci_softc
*sc
, bus_size_t r
, u_int32_t v
)
2823 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, r
, v
);
2824 bus_space_barrier(sc
->sc_iot
, sc
->sc_ioh
, r
, 4,
2825 BUS_SPACE_BARRIER_WRITE
);
2829 ahci_pread(struct ahci_port
*ap
, bus_size_t r
)
2831 bus_space_barrier(ap
->ap_sc
->sc_iot
, ap
->ap_ioh
, r
, 4,
2832 BUS_SPACE_BARRIER_READ
);
2833 return (bus_space_read_4(ap
->ap_sc
->sc_iot
, ap
->ap_ioh
, r
));
2837 ahci_pwrite(struct ahci_port
*ap
, bus_size_t r
, u_int32_t v
)
2839 bus_space_write_4(ap
->ap_sc
->sc_iot
, ap
->ap_ioh
, r
, v
);
2840 bus_space_barrier(ap
->ap_sc
->sc_iot
, ap
->ap_ioh
, r
, 4,
2841 BUS_SPACE_BARRIER_WRITE
);
2845 * Wait up to (timeout) milliseconds for the masked port register to
2848 * Timeout is in milliseconds.
2851 ahci_pwait_eq(struct ahci_port
*ap
, int timeout
,
2852 bus_size_t r
, u_int32_t mask
, u_int32_t target
)
2857 * Loop hard up to 100uS
2859 for (t
= 0; t
< 100; ++t
) {
2860 if ((ahci_pread(ap
, r
) & mask
) == target
)
2862 ahci_os_hardsleep(1); /* us */
2866 timeout
-= ahci_os_softsleep();
2867 if ((ahci_pread(ap
, r
) & mask
) == target
)
2869 } while (timeout
> 0);
2874 ahci_wait_ne(struct ahci_softc
*sc
, bus_size_t r
, u_int32_t mask
,
2880 * Loop hard up to 100uS
2882 for (t
= 0; t
< 100; ++t
) {
2883 if ((ahci_read(sc
, r
) & mask
) != target
)
2885 ahci_os_hardsleep(1); /* us */
2889 * And one millisecond the slow way
2893 t
-= ahci_os_softsleep();
2894 if ((ahci_read(sc
, r
) & mask
) != target
)
2903 * Acquire an ata transfer.
2905 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
2906 * targets that go through the port multiplier.
2909 ahci_ata_get_xfer(struct ahci_port
*ap
, struct ata_port
*at
)
2911 struct ahci_ccb
*ccb
;
2913 ccb
= ahci_get_ccb(ap
);
2915 DPRINTF(AHCI_D_XFER
, "%s: ahci_ata_get_xfer: NULL ccb\n",
2920 DPRINTF(AHCI_D_XFER
, "%s: ahci_ata_get_xfer got slot %d\n",
2921 PORTNAME(ap
), ccb
->ccb_slot
);
2923 bzero(ccb
->ccb_xa
.fis
, sizeof(*ccb
->ccb_xa
.fis
));
2924 ccb
->ccb_xa
.at
= at
;
2925 ccb
->ccb_xa
.fis
->type
= ATA_FIS_TYPE_H2D
;
2927 return (&ccb
->ccb_xa
);
2931 ahci_ata_put_xfer(struct ata_xfer
*xa
)
2933 struct ahci_ccb
*ccb
= (struct ahci_ccb
*)xa
;
2935 DPRINTF(AHCI_D_XFER
, "ahci_ata_put_xfer slot %d\n", ccb
->ccb_slot
);
2941 ahci_ata_cmd(struct ata_xfer
*xa
)
2943 struct ahci_ccb
*ccb
= (struct ahci_ccb
*)xa
;
2944 struct ahci_cmd_hdr
*cmd_slot
;
2946 KKASSERT(xa
->state
== ATA_S_SETUP
);
2948 if (ccb
->ccb_port
->ap_state
== AP_S_FATAL_ERROR
)
2950 ccb
->ccb_done
= ahci_ata_cmd_done
;
2952 cmd_slot
= ccb
->ccb_cmd_hdr
;
2953 cmd_slot
->flags
= htole16(5); /* FIS length (in DWORDs) */
2954 if (ccb
->ccb_xa
.at
) {
2955 cmd_slot
->flags
|= htole16(ccb
->ccb_xa
.at
->at_target
<<
2956 AHCI_CMD_LIST_FLAG_PMP_SHIFT
);
2959 if (xa
->flags
& ATA_F_WRITE
)
2960 cmd_slot
->flags
|= htole16(AHCI_CMD_LIST_FLAG_W
);
2962 if (xa
->flags
& ATA_F_PACKET
)
2963 cmd_slot
->flags
|= htole16(AHCI_CMD_LIST_FLAG_A
);
2965 if (ahci_load_prdt(ccb
) != 0)
2968 xa
->state
= ATA_S_PENDING
;
2970 if (xa
->flags
& ATA_F_POLL
)
2971 return (ahci_poll(ccb
, xa
->timeout
, ahci_ata_cmd_timeout
));
2974 KKASSERT((xa
->flags
& ATA_F_TIMEOUT_EXPIRED
) == 0);
2975 xa
->flags
|= ATA_F_TIMEOUT_DESIRED
;
2982 xa
->state
= ATA_S_ERROR
;
2985 return (ATA_S_ERROR
);
2989 ahci_ata_cmd_done(struct ahci_ccb
*ccb
)
2991 struct ata_xfer
*xa
= &ccb
->ccb_xa
;
2994 * NOTE: callout does not lock port and may race us modifying
2995 * the flags, so make sure its stopped.
2997 if (xa
->flags
& ATA_F_TIMEOUT_RUNNING
) {
2998 callout_stop(&ccb
->ccb_timeout
);
2999 xa
->flags
&= ~ATA_F_TIMEOUT_RUNNING
;
3001 xa
->flags
&= ~(ATA_F_TIMEOUT_DESIRED
| ATA_F_TIMEOUT_EXPIRED
);
3003 KKASSERT(xa
->state
!= ATA_S_ONCHIP
);
3004 ahci_unload_prdt(ccb
);
3006 if (xa
->state
!= ATA_S_TIMEOUT
)
3011 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
3012 * while the callout is runing.
3014 * We can't safely get the port lock here or delay, we could block
3015 * the callout thread.
3018 ahci_ata_cmd_timeout_unserialized(void *arg
)
3020 struct ahci_ccb
*ccb
= arg
;
3021 struct ahci_port
*ap
= ccb
->ccb_port
;
3023 ccb
->ccb_xa
.flags
&= ~ATA_F_TIMEOUT_RUNNING
;
3024 ccb
->ccb_xa
.flags
|= ATA_F_TIMEOUT_EXPIRED
;
3025 ahci_os_signal_port_thread(ap
, AP_SIGF_TIMEOUT
);
3029 * Timeout code, typically called when the port command processor is running.
3031 * We have to be very very careful here. We cannot stop the port unless
3032 * CR is already clear or the only active commands remaining are timed-out
3033 * ones. Otherwise stopping the port will race the command processor and
3034 * we can lose events. While we can theoretically just restart everything
3035 * that could result in a double-issue which will not work for ATAPI commands.
3038 ahci_ata_cmd_timeout(struct ahci_ccb
*ccb
)
3040 struct ata_xfer
*xa
= &ccb
->ccb_xa
;
3041 struct ahci_port
*ap
= ccb
->ccb_port
;
3042 struct ata_port
*at
;
3046 at
= ccb
->ccb_xa
.at
;
3048 kprintf("%s: CMD TIMEOUT state=%d slot=%d\n"
3050 "\tsactive=%08x active=%08x expired=%08x\n"
3051 "\t sact=%08x ci=%08x\n"
3054 ccb
->ccb_xa
.state
, ccb
->ccb_slot
,
3055 ahci_pread(ap
, AHCI_PREG_CMD
), AHCI_PFMT_CMD
,
3056 ap
->ap_sactive
, ap
->ap_active
, ap
->ap_expired
,
3057 ahci_pread(ap
, AHCI_PREG_SACT
),
3058 ahci_pread(ap
, AHCI_PREG_CI
),
3059 ahci_pread(ap
, AHCI_PREG_TFD
), AHCI_PFMT_TFD_STS
3064 * NOTE: Timeout will not be running if the command was polled.
3065 * If we got here at least one of these flags should be set.
3067 KKASSERT(xa
->flags
& (ATA_F_POLL
| ATA_F_TIMEOUT_DESIRED
|
3068 ATA_F_TIMEOUT_RUNNING
));
3069 xa
->flags
&= ~(ATA_F_TIMEOUT_RUNNING
| ATA_F_TIMEOUT_EXPIRED
);
3071 if (ccb
->ccb_xa
.state
== ATA_S_PENDING
) {
3072 TAILQ_REMOVE(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
3073 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
3076 ahci_issue_pending_commands(ap
, NULL
);
3079 if (ccb
->ccb_xa
.state
!= ATA_S_ONCHIP
) {
3080 kprintf("%s: Unexpected state during timeout: %d\n",
3081 ATANAME(ap
, at
), ccb
->ccb_xa
.state
);
3086 * Ok, we can only get this command off the chip if CR is inactive
3087 * or if the only commands running on the chip are all expired.
3088 * Otherwise we have to wait until the port is in a safe state.
3090 * Do not set state here, it will cause polls to return when the
3091 * ccb is not yet off the chip.
3093 ap
->ap_expired
|= 1 << ccb
->ccb_slot
;
3095 if ((ahci_pread(ap
, AHCI_PREG_CMD
) & AHCI_PREG_CMD_CR
) &&
3096 (ap
->ap_active
| ap
->ap_sactive
) != ap
->ap_expired
) {
3098 * If using FBSS or NCQ we can't safely stop the port
3101 kprintf("%s: Deferred timeout until its safe, slot %d\n",
3102 ATANAME(ap
, at
), ccb
->ccb_slot
);
3107 * We can safely stop the port and process all expired ccb's,
3108 * which will include our current ccb.
3110 ci_saved
= (ap
->ap_sactive
) ? ahci_pread(ap
, AHCI_PREG_SACT
) :
3111 ahci_pread(ap
, AHCI_PREG_CI
);
3112 ahci_port_stop(ap
, 0);
3114 while (ap
->ap_expired
) {
3115 slot
= ffs(ap
->ap_expired
) - 1;
3116 ap
->ap_expired
&= ~(1 << slot
);
3117 ci_saved
&= ~(1 << slot
);
3118 ccb
= &ap
->ap_ccbs
[slot
];
3119 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
3120 if (ccb
->ccb_xa
.flags
& ATA_F_NCQ
) {
3121 KKASSERT(ap
->ap_sactive
& (1 << slot
));
3122 ap
->ap_sactive
&= ~(1 << slot
);
3124 KKASSERT(ap
->ap_active
& (1 << slot
));
3125 ap
->ap_active
&= ~(1 << slot
);
3126 --ap
->ap_active_cnt
;
3129 ccb
->ccb_xa
.complete(&ccb
->ccb_xa
);
3131 /* ccb invalid now */
3134 * We can safely CLO the port to clear any BSY/DRQ, a case which
3135 * can occur with port multipliers. This will unbrick the port
3136 * and allow commands to other targets behind the PM continue.
3139 * Finally, once the port has been restarted we can issue any
3140 * previously saved pending commands, and run the port interrupt
3141 * code to handle any completions which may have occured when
3144 if (ahci_pread(ap
, AHCI_PREG_TFD
) &
3145 (AHCI_PREG_TFD_STS_BSY
| AHCI_PREG_TFD_STS_DRQ
)) {
3146 kprintf("%s: Warning, issuing CLO after timeout\n",
3150 ahci_port_start(ap
);
3151 ahci_issue_saved_commands(ap
, ci_saved
& ~ap
->ap_expired
);
3152 ahci_issue_pending_commands(ap
, NULL
);
3153 ahci_port_intr(ap
, 0);
3157 * Issue a previously saved set of commands
3160 ahci_issue_saved_commands(struct ahci_port
*ap
, u_int32_t ci_saved
)
3163 KKASSERT(!((ap
->ap_active
& ci_saved
) &&
3164 (ap
->ap_sactive
& ci_saved
)));
3165 KKASSERT((ci_saved
& ap
->ap_expired
) == 0);
3166 if (ap
->ap_sactive
& ci_saved
)
3167 ahci_pwrite(ap
, AHCI_PREG_SACT
, ci_saved
);
3168 ahci_pwrite(ap
, AHCI_PREG_CI
, ci_saved
);
3173 * Used by the softreset, pmprobe, and read_ncq_error only, in very
3174 * specialized, controlled circumstances.
3176 * Only one command may be pending.
3179 ahci_quick_timeout(struct ahci_ccb
*ccb
)
3181 struct ahci_port
*ap
= ccb
->ccb_port
;
3183 switch (ccb
->ccb_xa
.state
) {
3185 TAILQ_REMOVE(&ap
->ap_ccb_pending
, ccb
, ccb_entry
);
3186 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
3189 KKASSERT(ap
->ap_active
== (1 << ccb
->ccb_slot
) &&
3190 ap
->ap_sactive
== 0);
3191 ahci_port_stop(ap
, 0);
3192 ahci_port_start(ap
);
3194 ccb
->ccb_xa
.state
= ATA_S_TIMEOUT
;
3195 ap
->ap_active
&= ~(1 << ccb
->ccb_slot
);
3196 KKASSERT(ap
->ap_active_cnt
> 0);
3197 --ap
->ap_active_cnt
;
3200 panic("%s: ahci_quick_timeout: ccb in bad state %d",
3201 ATANAME(ap
, ccb
->ccb_xa
.at
), ccb
->ccb_xa
.state
);
3206 ahci_dummy_done(struct ata_xfer
*xa
)
3211 ahci_empty_done(struct ahci_ccb
*ccb
)