Externals/Bochs_disasm/syntax.cpp

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: syntax.cc,v 1.10 2006/04/27 15:11:45 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 #include <stdio.h>
   5 #include "disasm.h"
   6
   7 //////////////////
   8 // Intel STYLE
   9 //////////////////
  10
  11 #define BX_DISASM_SUPPORT_X86_64
  12
  13 #ifdef BX_DISASM_SUPPORT_X86_64
  14
  15 static const char *intel_general_16bit_regname[16] = {
  16     "ax",  "cx",  "dx",   "bx",   "sp",   "bp",   "si",   "di",
  17     "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
  18 };
  19
  20 static const char *intel_general_32bit_regname[16] = {
  21     "eax", "ecx", "edx",  "ebx",  "esp",  "ebp",  "esi",  "edi",
  22     "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
  23 };
  24
  25 static const char *intel_general_64bit_regname[16] = {
  26     "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
  27     "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15"
  28 };
  29
  30 static const char *intel_general_8bit_regname_rex[16] = {
  31     "al",  "cl",  "dl",   "bl",   "spl",  "bpl",  "sil",  "dil",
  32     "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
  33 };
  34
  35 #else
  36
  37 static const char *intel_general_16bit_regname[8] = {
  38     "ax",  "cx",  "dx",  "bx",  "sp",  "bp",  "si",  "di"
  39 };
  40
  41 static const char *intel_general_32bit_regname[8] = {
  42     "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"
  43 };
  44
  45 #endif
  46
  47 static const char *intel_general_8bit_regname[8] = {
  48     "al",  "cl",  "dl",  "bl",  "ah",  "ch",  "dh",  "bh"
  49 };
  50
  51 static const char *intel_segment_name[8] = {
  52     "es",  "cs",  "ss",  "ds",  "fs",  "gs",  "??",  "??"
  53 };
  54
  55 static const char *intel_index16[8] = {
  56     "bx+si",
  57     "bx+di",
  58     "bp+si",
  59     "bp+di",
  60     "si",
  61     "di",
  62     "bp",
  63     "bx"
  64 };
  65
  66
  67 //////////////////
  68 // AT&T STYLE
  69 //////////////////
  70
  71 #ifdef BX_DISASM_SUPPORT_X86_64
  72
  73 static const char *att_general_16bit_regname[16] = {
  74     "%ax",  "%cx",  "%dx",   "%bx",   "%sp",   "%bp",   "%si",   "%di",
  75     "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
  76 };
  77
  78 static const char *att_general_32bit_regname[16] = {
  79     "%eax", "%ecx", "%edx",  "%ebx",  "%esp",  "%ebp",  "%esi",  "%edi",
  80     "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
  81 };
  82
  83 static const char *att_general_64bit_regname[16] = {
  84     "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
  85     "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
  86 };
  87
  88 static const char *att_general_8bit_regname_rex[16] = {
  89     "%al",  "%cl",  "%dl",   "%bl",   "%spl",  "%bpl",  "%sil",  "%dil",
  90     "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
  91 };
  92
  93 #else
  94
  95 static const char *att_general_16bit_regname[8] = {
  96     "%ax",  "%cx",  "%dx",  "%bx",  "%sp",  "%bp",  "%si",  "%di"
  97 };
  98
  99 static const char *att_general_32bit_regname[8] = {
 100     "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi"
 101 };
 102
 103 #endif
 104
 105 static const char *att_general_8bit_regname[8] = {
 106     "%al",  "%cl",  "%dl",  "%bl",  "%ah",  "%ch",  "%dh",  "%bh"
 107 };
 108
 109 static const char *att_segment_name[8] = {
 110     "%es",  "%cs",  "%ss",  "%ds",  "%fs",  "%gs",  "%??",  "%??"
 111 };
 112
 113 static const char *att_index16[8] = {
 114     "%bx, %si",
 115     "%bx, %di",
 116     "%bp, %si",
 117     "%bp, %di",
 118     "%si",
 119     "%di",
 120     "%bp",
 121     "%bx"
 122 };
 123
 124 #define NULL_SEGMENT_REGISTER 7
 125
 126 void disassembler::initialize_modrm_segregs()
 127 {
 128   sreg_mod00_rm16[0] = segment_name[DS_REG];
 129   sreg_mod00_rm16[1] = segment_name[DS_REG];
 130   sreg_mod00_rm16[2] = segment_name[SS_REG];
 131   sreg_mod00_rm16[3] = segment_name[SS_REG];
 132   sreg_mod00_rm16[4] = segment_name[DS_REG];
 133   sreg_mod00_rm16[5] = segment_name[DS_REG];
 134   sreg_mod00_rm16[6] = segment_name[DS_REG];
 135   sreg_mod00_rm16[7] = segment_name[DS_REG];
 136
 137   sreg_mod01or10_rm16[0] = segment_name[DS_REG];
 138   sreg_mod01or10_rm16[1] = segment_name[DS_REG];
 139   sreg_mod01or10_rm16[2] = segment_name[SS_REG];
 140   sreg_mod01or10_rm16[3] = segment_name[SS_REG];
 141   sreg_mod01or10_rm16[4] = segment_name[DS_REG];
 142   sreg_mod01or10_rm16[5] = segment_name[DS_REG];
 143   sreg_mod01or10_rm16[6] = segment_name[SS_REG];
 144   sreg_mod01or10_rm16[7] = segment_name[DS_REG];
 145
 146   sreg_mod01or10_rm32[0] = segment_name[DS_REG];
 147   sreg_mod01or10_rm32[1] = segment_name[DS_REG];
 148   sreg_mod01or10_rm32[2] = segment_name[DS_REG];
 149   sreg_mod01or10_rm32[3] = segment_name[DS_REG];
 150   sreg_mod01or10_rm32[4] = segment_name[NULL_SEGMENT_REGISTER];
 151   sreg_mod01or10_rm32[5] = segment_name[SS_REG];
 152   sreg_mod01or10_rm32[6] = segment_name[DS_REG];
 153   sreg_mod01or10_rm32[7] = segment_name[DS_REG];
 154
 155   sreg_mod00_base32[0] = segment_name[DS_REG];
 156   sreg_mod00_base32[1] = segment_name[DS_REG];
 157   sreg_mod00_base32[2] = segment_name[DS_REG];
 158   sreg_mod00_base32[3] = segment_name[DS_REG];
 159   sreg_mod00_base32[4] = segment_name[SS_REG];
 160   sreg_mod00_base32[5] = segment_name[DS_REG];
 161   sreg_mod00_base32[6] = segment_name[DS_REG];
 162   sreg_mod00_base32[7] = segment_name[DS_REG];
 163
 164   sreg_mod01or10_base32[0] = segment_name[DS_REG];
 165   sreg_mod01or10_base32[1] = segment_name[DS_REG];
 166   sreg_mod01or10_base32[2] = segment_name[DS_REG];
 167   sreg_mod01or10_base32[3] = segment_name[DS_REG];
 168   sreg_mod01or10_base32[4] = segment_name[SS_REG];
 169   sreg_mod01or10_base32[5] = segment_name[SS_REG];
 170   sreg_mod01or10_base32[6] = segment_name[DS_REG];
 171   sreg_mod01or10_base32[7] = segment_name[DS_REG];
 172 }
 173
 174 //////////////////
 175 // Intel STYLE
 176 //////////////////
 177
 178 void disassembler::set_syntax_intel()
 179 {
 180   intel_mode = 1;
 181
 182   general_16bit_regname = intel_general_16bit_regname;
 183   general_8bit_regname = intel_general_8bit_regname;
 184   general_32bit_regname = intel_general_32bit_regname;
 185   general_8bit_regname_rex = intel_general_8bit_regname_rex;
 186   general_64bit_regname = intel_general_64bit_regname;
 187
 188   segment_name = intel_segment_name;
 189   index16 = intel_index16;
 190
 191   initialize_modrm_segregs();
 192 }
 193
 194 void disassembler::print_disassembly_intel(const x86_insn *insn, const BxDisasmOpcodeInfo_t *entry)
 195 {
 196   // print opcode
 197   dis_sprintf("%s ", entry->IntelOpcode);
 198
 199   if (entry->Operand1) {
 200     (this->*entry->Operand1)(insn);
 201   }
 202   if (entry->Operand2) {
 203     dis_sprintf(", ");
 204     (this->*entry->Operand2)(insn);
 205   }
 206   if (entry->Operand3) {
 207     dis_sprintf(", ");
 208     (this->*entry->Operand3)(insn);
 209   }
 210 }
 211
 212 //////////////////
 213 // AT&T STYLE
 214 //////////////////
 215
 216 void disassembler::set_syntax_att()
 217 {
 218   intel_mode = 0;
 219
 220   general_16bit_regname = att_general_16bit_regname;
 221   general_8bit_regname = att_general_8bit_regname;
 222   general_32bit_regname = att_general_32bit_regname;
 223   general_8bit_regname_rex = att_general_8bit_regname_rex;
 224   general_64bit_regname = att_general_64bit_regname;
 225
 226   segment_name = att_segment_name;
 227   index16 = att_index16;
 228
 229   initialize_modrm_segregs();
 230 }
 231
 232 void disassembler::toggle_syntax_mode()
 233 {
 234   if (intel_mode) set_syntax_att();
 235   else set_syntax_intel();
 236 }
 237
 238 void disassembler::print_disassembly_att(const x86_insn *insn, const BxDisasmOpcodeInfo_t *entry)
 239 {
 240   // print opcode
 241   dis_sprintf("%s ", entry->AttOpcode);
 242
 243   if (entry->Operand3) {
 244     (this->*entry->Operand3)(insn);
 245     dis_sprintf(", ");
 246   }
 247   if (entry->Operand2) {
 248     (this->*entry->Operand2)(insn);
 249     dis_sprintf(", ");
 250   }
 251   if (entry->Operand1) {
 252     (this->*entry->Operand1)(insn);
 253   }
 254 }