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Add sysctl node to set RX sensitivity, useful when operating in non-STA mode,
[dfdiff.git] / sys / dev / netif / ral / rt2560.c
blobf3db277448be6ec1b564d61a1c2b00b990de80bf
1 /*
2 * Copyright (c) 2005, 2006
3 * Damien Bergamini <damien.bergamini@free.fr>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: src/sys/dev/ral/rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2560.c,v 1.28 2008/01/25 08:57:36 sephe Exp $
19 */
20
21 /*
22 * Ralink Technology RT2560 chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/param.h>
27 #include <sys/bus.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/mbuf.h>
32 #include <sys/module.h>
33 #include <sys/rman.h>
34 #include <sys/socket.h>
35 #include <sys/sockio.h>
36 #include <sys/sysctl.h>
37 #include <sys/serialize.h>
38
39 #include <net/bpf.h>
40 #include <net/if.h>
41 #include <net/if_arp.h>
42 #include <net/ethernet.h>
43 #include <net/if_dl.h>
44 #include <net/if_media.h>
45 #include <net/ifq_var.h>
46
47 #include <netproto/802_11/ieee80211_var.h>
48 #include <netproto/802_11/ieee80211_radiotap.h>
49 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
50 #include <netproto/802_11/wlan_ratectl/sample/ieee80211_sample_param.h>
51
52 #include <dev/netif/ral/rt2560reg.h>
53 #include <dev/netif/ral/rt2560var.h>
54
55 #define RT2560_RSSI(sc, rssi) \
56 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \
57 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0)
58
59 #ifdef RAL_DEBUG
60 #define DPRINTF(x) do { if (ral_debug > 0) kprintf x; } while (0)
61 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) kprintf x; } while (0)
62 extern int ral_debug;
63 #else
64 #define DPRINTF(x)
65 #define DPRINTFN(n, x)
66 #endif
67
68 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int,
69 int);
70 static void rt2560_dma_map_mbuf(void *, bus_dma_segment_t *, int,
71 bus_size_t, int);
72 static int rt2560_alloc_tx_ring(struct rt2560_softc *,
73 struct rt2560_tx_ring *, int);
74 static void rt2560_reset_tx_ring(struct rt2560_softc *,
75 struct rt2560_tx_ring *);
76 static void rt2560_free_tx_ring(struct rt2560_softc *,
77 struct rt2560_tx_ring *);
78 static int rt2560_alloc_rx_ring(struct rt2560_softc *,
79 struct rt2560_rx_ring *, int);
80 static void rt2560_reset_rx_ring(struct rt2560_softc *,
81 struct rt2560_rx_ring *);
82 static void rt2560_free_rx_ring(struct rt2560_softc *,
83 struct rt2560_rx_ring *);
84 static int rt2560_media_change(struct ifnet *);
85 static void rt2560_next_scan(void *);
86 static int rt2560_newstate(struct ieee80211com *,
87 enum ieee80211_state, int);
88 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
89 static void rt2560_encryption_intr(struct rt2560_softc *);
90 static void rt2560_tx_intr(struct rt2560_softc *);
91 static void rt2560_prio_intr(struct rt2560_softc *);
92 static void rt2560_decryption_intr(struct rt2560_softc *);
93 static void rt2560_rx_intr(struct rt2560_softc *);
94 static void rt2560_beacon_expire(struct rt2560_softc *);
95 static void rt2560_wakeup_expire(struct rt2560_softc *);
96 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *);
97 static uint8_t rt2560_plcp_signal(int);
98 static void rt2560_setup_tx_desc(struct rt2560_softc *,
99 struct rt2560_tx_desc *, uint32_t, int, int, int,
100 bus_addr_t);
101 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
102 struct ieee80211_node *);
103 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
104 struct ieee80211_node *);
105 static struct mbuf *rt2560_get_rts(struct rt2560_softc *,
106 struct ieee80211_frame *, uint16_t);
107 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
108 struct ieee80211_node *);
109 static void rt2560_start(struct ifnet *);
110 static void rt2560_watchdog(struct ifnet *);
111 static int rt2560_reset(struct ifnet *);
112 static int rt2560_ioctl(struct ifnet *, u_long, caddr_t,
113 struct ucred *);
114 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t,
115 uint8_t);
116 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
117 static void rt2560_rf_write(struct rt2560_softc *, uint8_t,
118 uint32_t);
119 static void rt2560_set_chan(struct rt2560_softc *,
120 struct ieee80211_channel *);
121 static void rt2560_enable_tsf_sync(struct rt2560_softc *);
122 static void rt2560_update_plcp(struct rt2560_softc *);
123 static void rt2560_update_slot(struct ifnet *);
124 static void rt2560_set_basicrates(struct rt2560_softc *);
125 static void rt2560_update_led(struct rt2560_softc *, int, int);
126 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
127 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
128 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
129 static void rt2560_update_promisc(struct rt2560_softc *);
130 static const char *rt2560_get_rf(int);
131 static void rt2560_read_config(struct rt2560_softc *);
132 static int rt2560_bbp_init(struct rt2560_softc *);
133 static void rt2560_set_txantenna(struct rt2560_softc *, int);
134 static void rt2560_set_rxantenna(struct rt2560_softc *, int);
135 static void rt2560_init(void *);
136 static void rt2560_stop(void *);
137 static void rt2560_intr(void *);
138 static void *rt2560_ratectl_attach(struct ieee80211com *, u_int);
139 static void rt2560_calibrate(void *);
140 static void rt2560_calib_rxsensitivity(struct rt2560_softc *,
141 uint32_t);
142 static int rt2560_sysctl_rxsns(SYSCTL_HANDLER_ARGS);
143
144 /*
145 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
146 */
147 static const struct ieee80211_rateset rt2560_rateset_11a =
148 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
149
150 static const struct ieee80211_rateset rt2560_rateset_11b =
151 { 4, { 2, 4, 11, 22 } };
152
153 static const struct ieee80211_rateset rt2560_rateset_11g =
154 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
155
156 static const struct {
157 uint32_t reg;
158 uint32_t val;
159 } rt2560_def_mac[] = {
160 RT2560_DEF_MAC
161 };
162
163 static const struct {
164 uint8_t reg;
165 uint8_t val;
166 } rt2560_def_bbp[] = {
167 RT2560_DEF_BBP
168 };
169
170 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2;
171 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2;
172 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2;
173 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2;
174 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
175 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2;
176 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2;
177 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
178
179 static const struct {
180 uint8_t chan;
181 uint32_t r1, r2, r4;
182 } rt2560_rf5222[] = {
183 RT2560_RF5222
184 };
185
186 int
187 rt2560_attach(device_t dev, int id)
188 {
189 struct rt2560_softc *sc = device_get_softc(dev);
190 struct ieee80211com *ic = &sc->sc_ic;
191 struct ifnet *ifp = &ic->ic_if;
192 int error, i;
193
194 callout_init(&sc->scan_ch);
195 callout_init(&sc->calib_ch);
196
197 sc->sc_irq_rid = 0;
198 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
199 RF_ACTIVE | RF_SHAREABLE);
200 if (sc->sc_irq == NULL) {
201 device_printf(dev, "could not allocate interrupt resource\n");
202 return ENXIO;
203 }
204
205 /* retrieve RT2560 rev. no */
206 sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
207
208 /* retrieve MAC address */
209 rt2560_get_macaddr(sc, ic->ic_myaddr);
210
211 /* retrieve RF rev. no and various other things from EEPROM */
212 rt2560_read_config(sc);
213
214 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
215 sc->asic_rev, rt2560_get_rf(sc->rf_rev));
216
217 /*
218 * Allocate Tx and Rx rings.
219 */
220 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
221 if (error != 0) {
222 device_printf(sc->sc_dev, "could not allocate Tx ring\n");
223 goto fail;
224 }
225
226 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
227 if (error != 0) {
228 device_printf(sc->sc_dev, "could not allocate ATIM ring\n");
229 goto fail;
230 }
231
232 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
233 if (error != 0) {
234 device_printf(sc->sc_dev, "could not allocate Prio ring\n");
235 goto fail;
236 }
237
238 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
239 if (error != 0) {
240 device_printf(sc->sc_dev, "could not allocate Beacon ring\n");
241 goto fail;
242 }
243
244 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
245 if (error != 0) {
246 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
247 goto fail;
248 }
249
250 sysctl_ctx_init(&sc->sysctl_ctx);
251 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
252 SYSCTL_STATIC_CHILDREN(_hw),
253 OID_AUTO,
254 device_get_nameunit(dev),
255 CTLFLAG_RD, 0, "");
256 if (sc->sysctl_tree == NULL) {
257 device_printf(dev, "could not add sysctl node\n");
258 error = ENXIO;
259 goto fail;
260 }
261
262 ifp->if_softc = sc;
263 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
264 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
265 ifp->if_init = rt2560_init;
266 ifp->if_ioctl = rt2560_ioctl;
267 ifp->if_start = rt2560_start;
268 ifp->if_watchdog = rt2560_watchdog;
269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
270 ifq_set_ready(&ifp->if_snd);
271
272 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
273 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
274 ic->ic_state = IEEE80211_S_INIT;
275
276 IEEE80211_ONOE_PARAM_SETUP(&sc->sc_onoe_param);
277 IEEE80211_SAMPLE_PARAM_SETUP(&sc->sc_sample_param);
278 ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE |
279 IEEE80211_RATECTL_CAP_SAMPLE;
280 ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_SAMPLE;
281 ic->ic_ratectl.rc_st_attach = rt2560_ratectl_attach;
282
283 /* set device capabilities */
284 ic->ic_caps =
285 IEEE80211_C_IBSS | /* IBSS mode supported */
286 IEEE80211_C_MONITOR | /* monitor mode supported */
287 IEEE80211_C_HOSTAP | /* HostAp mode supported */
288 IEEE80211_C_TXPMGT | /* tx power management */
289 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
290 IEEE80211_C_SHSLOT | /* short slot time supported */
291 IEEE80211_C_WEP | /* WEP */
292 IEEE80211_C_WPA; /* 802.11i */
293
294 if (sc->rf_rev == RT2560_RF_5222) {
295 /* set supported .11a rates */
296 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a;
297
298 /* set supported .11a channels */
299 for (i = 36; i <= 64; i += 4) {
300 ic->ic_channels[i].ic_freq =
301 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
302 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
303 }
304 for (i = 100; i <= 140; i += 4) {
305 ic->ic_channels[i].ic_freq =
306 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
307 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
308 }
309 for (i = 149; i <= 161; i += 4) {
310 ic->ic_channels[i].ic_freq =
311 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
312 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
313 }
314 }
315
316 /* set supported .11b and .11g rates */
317 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b;
318 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g;
319
320 /* set supported .11b and .11g channels (1 through 14) */
321 for (i = 1; i <= 14; i++) {
322 ic->ic_channels[i].ic_freq =
323 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
324 ic->ic_channels[i].ic_flags =
325 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
326 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
327 }
328
329 sc->sc_sifs = IEEE80211_DUR_SIFS; /* Default SIFS */
330
331 ieee80211_ifattach(ic);
332 ic->ic_updateslot = rt2560_update_slot;
333 ic->ic_reset = rt2560_reset;
334 /* enable s/w bmiss handling in sta mode */
335 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
336
337 /* override state transition machine */
338 sc->sc_newstate = ic->ic_newstate;
339 ic->ic_newstate = rt2560_newstate;
340 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status);
341
342 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
343 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
344
345 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
346 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
347 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
348
349 sc->sc_txtap_len = sizeof sc->sc_txtapu;
350 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
351 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
352
353 /*
354 * Add a few sysctl knobs.
355 */
356 sc->sc_dwelltime = 200; /* milliseconds */
357 sc->sc_calib_rxsns = 1; /* Enable */
358 sc->sc_rxsns = sc->sc_bbp17_dynmax;
359
360 SYSCTL_ADD_INT(&sc->sysctl_ctx,
361 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO,
362 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)");
363
364 SYSCTL_ADD_INT(&sc->sysctl_ctx,
365 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO,
366 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)");
367
368 SYSCTL_ADD_INT(&sc->sysctl_ctx,
369 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
370 CTLFLAG_RW, &sc->sc_dwelltime, 0,
371 "channel dwell time (ms) for AP/station scanning");
372
373 SYSCTL_ADD_PROC(&sc->sysctl_ctx,
374 SYSCTL_CHILDREN(sc->sysctl_tree),
375 OID_AUTO, "rx_sensitivity", CTLTYPE_INT | CTLFLAG_RW,
376 sc, 0, rt2560_sysctl_rxsns, "I",
377 "initial RX sensitivity");
378
379 if (sc->sc_flags & RT2560_FLAG_RXSNS) {
380 SYSCTL_ADD_INT(&sc->sysctl_ctx,
381 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "calib_rxsns",
382 CTLFLAG_RW, &sc->sc_calib_rxsns, 0,
383 "calibrate RX sensitivity (sta mode)");
384 }
385
386 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2560_intr,
387 sc, &sc->sc_ih, ifp->if_serializer);
388 if (error != 0) {
389 device_printf(dev, "could not set up interrupt\n");
390 bpfdetach(ifp);
391 ieee80211_ifdetach(ic);
392 goto fail;
393 }
394
395 if (bootverbose)
396 ieee80211_announce(ic);
397 return 0;
398 fail:
399 rt2560_detach(sc);
400 return error;
401 }
402
403 int
404 rt2560_detach(void *xsc)
405 {
406 struct rt2560_softc *sc = xsc;
407 struct ieee80211com *ic = &sc->sc_ic;
408 struct ifnet *ifp = ic->ic_ifp;
409
410 if (device_is_attached(sc->sc_dev)) {
411 lwkt_serialize_enter(ifp->if_serializer);
412
413 callout_stop(&sc->scan_ch);
414
415 rt2560_stop(sc);
416 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
417
418 lwkt_serialize_exit(ifp->if_serializer);
419
420 bpfdetach(ifp);
421 ieee80211_ifdetach(ic);
422 }
423
424 rt2560_free_tx_ring(sc, &sc->txq);
425 rt2560_free_tx_ring(sc, &sc->atimq);
426 rt2560_free_tx_ring(sc, &sc->prioq);
427 rt2560_free_tx_ring(sc, &sc->bcnq);
428 rt2560_free_rx_ring(sc, &sc->rxq);
429
430 if (sc->sc_irq != NULL) {
431 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
432 sc->sc_irq);
433 }
434
435 if (sc->sysctl_tree != NULL)
436 sysctl_ctx_free(&sc->sysctl_ctx);
437
438 return 0;
439 }
440
441 void
442 rt2560_shutdown(void *xsc)
443 {
444 struct rt2560_softc *sc = xsc;
445 struct ifnet *ifp = &sc->sc_ic.ic_if;
446
447 lwkt_serialize_enter(ifp->if_serializer);
448 rt2560_stop(sc);
449 lwkt_serialize_exit(ifp->if_serializer);
450 }
451
452 void
453 rt2560_suspend(void *xsc)
454 {
455 struct rt2560_softc *sc = xsc;
456 struct ifnet *ifp = &sc->sc_ic.ic_if;
457
458 lwkt_serialize_enter(ifp->if_serializer);
459 rt2560_stop(sc);
460 lwkt_serialize_exit(ifp->if_serializer);
461 }
462
463 void
464 rt2560_resume(void *xsc)
465 {
466 struct rt2560_softc *sc = xsc;
467 struct ifnet *ifp = sc->sc_ic.ic_ifp;
468
469 lwkt_serialize_enter(ifp->if_serializer);
470 if (ifp->if_flags & IFF_UP) {
471 ifp->if_init(ifp->if_softc);
472 if (ifp->if_flags & IFF_RUNNING)
473 ifp->if_start(ifp);
474 }
475 lwkt_serialize_exit(ifp->if_serializer);
476 }
477
478 static void
479 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
480 {
481 if (error != 0)
482 return;
483
484 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
485
486 *(bus_addr_t *)arg = segs[0].ds_addr;
487 }
488
489 static int
490 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
491 int count)
492 {
493 int i, error;
494
495 ring->count = count;
496 ring->queued = 0;
497 ring->cur = ring->next = 0;
498 ring->cur_encrypt = ring->next_encrypt = 0;
499
500 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
501 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2560_TX_DESC_SIZE, 1,
502 count * RT2560_TX_DESC_SIZE, 0, &ring->desc_dmat);
503 if (error != 0) {
504 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
505 goto fail;
506 }
507
508 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
509 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
510 if (error != 0) {
511 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
512 goto fail;
513 }
514
515 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
516 count * RT2560_TX_DESC_SIZE,
517 rt2560_dma_map_addr, &ring->physaddr, 0);
518 if (error != 0) {
519 device_printf(sc->sc_dev, "could not load desc DMA map\n");
520
521 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
522 ring->desc = NULL;
523 goto fail;
524 }
525
526 ring->data = kmalloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
527 M_WAITOK | M_ZERO);
528
529 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
530 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, RT2560_MAX_SCATTER,
531 MCLBYTES, 0, &ring->data_dmat);
532 if (error != 0) {
533 device_printf(sc->sc_dev, "could not create data DMA tag\n");
534 goto fail;
535 }
536
537 for (i = 0; i < count; i++) {
538 error = bus_dmamap_create(ring->data_dmat, 0,
539 &ring->data[i].map);
540 if (error != 0) {
541 device_printf(sc->sc_dev, "could not create DMA map\n");
542 goto fail;
543 }
544 }
545 return 0;
546
547 fail: rt2560_free_tx_ring(sc, ring);
548 return error;
549 }
550
551 static void
552 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
553 {
554 struct rt2560_tx_desc *desc;
555 struct rt2560_tx_data *data;
556 int i;
557
558 for (i = 0; i < ring->count; i++) {
559 desc = &ring->desc[i];
560 data = &ring->data[i];
561
562 if (data->m != NULL) {
563 bus_dmamap_sync(ring->data_dmat, data->map,
564 BUS_DMASYNC_POSTWRITE);
565 bus_dmamap_unload(ring->data_dmat, data->map);
566 m_freem(data->m);
567 data->m = NULL;
568 }
569
570 if (data->ni != NULL) {
571 ieee80211_free_node(data->ni);
572 data->ni = NULL;
573 }
574
575 desc->flags = 0;
576 }
577
578 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
579
580 ring->queued = 0;
581 ring->cur = ring->next = 0;
582 ring->cur_encrypt = ring->next_encrypt = 0;
583 }
584
585 static void
586 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
587 {
588 struct rt2560_tx_data *data;
589 int i;
590
591 if (ring->desc != NULL) {
592 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
593 BUS_DMASYNC_POSTWRITE);
594 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
595 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
596 ring->desc = NULL;
597 }
598
599 if (ring->desc_dmat != NULL) {
600 bus_dma_tag_destroy(ring->desc_dmat);
601 ring->desc_dmat = NULL;
602 }
603
604 if (ring->data != NULL) {
605 for (i = 0; i < ring->count; i++) {
606 data = &ring->data[i];
607
608 if (data->m != NULL) {
609 bus_dmamap_sync(ring->data_dmat, data->map,
610 BUS_DMASYNC_POSTWRITE);
611 bus_dmamap_unload(ring->data_dmat, data->map);
612 m_freem(data->m);
613 data->m = NULL;
614 }
615
616 if (data->ni != NULL) {
617 ieee80211_free_node(data->ni);
618 data->ni = NULL;
619 }
620
621 if (data->map != NULL) {
622 bus_dmamap_destroy(ring->data_dmat, data->map);
623 data->map = NULL;
624 }
625 }
626
627 kfree(ring->data, M_DEVBUF);
628 ring->data = NULL;
629 }
630
631 if (ring->data_dmat != NULL) {
632 bus_dma_tag_destroy(ring->data_dmat);
633 ring->data_dmat = NULL;
634 }
635 }
636
637 static int
638 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
639 int count)
640 {
641 struct rt2560_rx_desc *desc;
642 struct rt2560_rx_data *data;
643 bus_addr_t physaddr;
644 int i, error;
645
646 ring->count = count;
647 ring->cur = ring->next = 0;
648 ring->cur_decrypt = 0;
649
650 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
651 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2560_RX_DESC_SIZE, 1,
652 count * RT2560_RX_DESC_SIZE, 0, &ring->desc_dmat);
653 if (error != 0) {
654 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
655 goto fail;
656 }
657
658 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
659 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
660 if (error != 0) {
661 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
662 goto fail;
663 }
664
665 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
666 count * RT2560_RX_DESC_SIZE,
667 rt2560_dma_map_addr, &ring->physaddr, 0);
668 if (error != 0) {
669 device_printf(sc->sc_dev, "could not load desc DMA map\n");
670
671 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
672 ring->desc = NULL;
673 goto fail;
674 }
675
676 ring->data = kmalloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
677 M_WAITOK | M_ZERO);
678
679 /*
680 * Pre-allocate Rx buffers and populate Rx ring.
681 */
682 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
683 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
684 &ring->data_dmat);
685 if (error != 0) {
686 device_printf(sc->sc_dev, "could not create data DMA tag\n");
687 goto fail;
688 }
689
690 for (i = 0; i < count; i++) {
691 desc = &sc->rxq.desc[i];
692 data = &sc->rxq.data[i];
693
694 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
695 if (error != 0) {
696 device_printf(sc->sc_dev, "could not create DMA map\n");
697 goto fail;
698 }
699
700 data->m = m_getcl(MB_WAIT, MT_DATA, M_PKTHDR);
701 if (data->m == NULL) {
702 device_printf(sc->sc_dev,
703 "could not allocate rx mbuf\n");
704 error = ENOMEM;
705 goto fail;
706 }
707
708 error = bus_dmamap_load(ring->data_dmat, data->map,
709 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr,
710 &physaddr, 0);
711 if (error != 0) {
712 device_printf(sc->sc_dev,
713 "could not load rx buf DMA map");
714
715 m_freem(data->m);
716 data->m = NULL;
717 goto fail;
718 }
719
720 desc->flags = htole32(RT2560_RX_BUSY);
721 desc->physaddr = htole32(physaddr);
722 }
723
724 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
725
726 return 0;
727
728 fail: rt2560_free_rx_ring(sc, ring);
729 return error;
730 }
731
732 static void
733 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
734 {
735 int i;
736
737 for (i = 0; i < ring->count; i++) {
738 ring->desc[i].flags = htole32(RT2560_RX_BUSY);
739 ring->data[i].drop = 0;
740 }
741
742 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
743
744 ring->cur = ring->next = 0;
745 ring->cur_decrypt = 0;
746 }
747
748 static void
749 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
750 {
751 struct rt2560_rx_data *data;
752
753 if (ring->desc != NULL) {
754 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
755 BUS_DMASYNC_POSTWRITE);
756 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
757 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
758 ring->desc = NULL;
759 }
760
761 if (ring->desc_dmat != NULL) {
762 bus_dma_tag_destroy(ring->desc_dmat);
763 ring->desc_dmat = NULL;
764 }
765
766 if (ring->data != NULL) {
767 int i;
768
769 for (i = 0; i < ring->count; i++) {
770 data = &ring->data[i];
771
772 if (data->m != NULL) {
773 bus_dmamap_sync(ring->data_dmat, data->map,
774 BUS_DMASYNC_POSTREAD);
775 bus_dmamap_unload(ring->data_dmat, data->map);
776 m_freem(data->m);
777 data->m = NULL;
778 }
779
780 if (data->map != NULL) {
781 bus_dmamap_destroy(ring->data_dmat, data->map);
782 data->map = NULL;
783 }
784 }
785
786 kfree(ring->data, M_DEVBUF);
787 ring->data = NULL;
788 }
789
790 if (ring->data_dmat != NULL) {
791 bus_dma_tag_destroy(ring->data_dmat);
792 ring->data_dmat = NULL;
793 }
794 }
795
796 static int
797 rt2560_media_change(struct ifnet *ifp)
798 {
799 struct rt2560_softc *sc = ifp->if_softc;
800 int error;
801
802 error = ieee80211_media_change(ifp);
803 if (error != ENETRESET)
804 return error;
805
806 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
807 rt2560_init(sc);
808 return 0;
809 }
810
811 /*
812 * This function is called periodically (every 200ms) during scanning to
813 * switch from one channel to another.
814 */
815 static void
816 rt2560_next_scan(void *arg)
817 {
818 struct rt2560_softc *sc = arg;
819 struct ieee80211com *ic = &sc->sc_ic;
820 struct ifnet *ifp = ic->ic_ifp;
821
822 lwkt_serialize_enter(ifp->if_serializer);
823 if (ic->ic_state == IEEE80211_S_SCAN)
824 ieee80211_next_scan(ic);
825 lwkt_serialize_exit(ifp->if_serializer);
826 }
827
828 static int
829 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
830 {
831 struct rt2560_softc *sc = ic->ic_ifp->if_softc;
832 enum ieee80211_state ostate;
833 struct ieee80211_node *ni;
834 struct mbuf *m;
835 int error = 0;
836
837 ostate = ic->ic_state;
838 callout_stop(&sc->scan_ch);
839 callout_stop(&sc->calib_ch);
840 ieee80211_ratectl_newstate(ic, nstate);
841
842 switch (nstate) {
843 case IEEE80211_S_INIT:
844 if (ostate == IEEE80211_S_RUN) {
845 /* abort TSF synchronization */
846 RAL_WRITE(sc, RT2560_CSR14, 0);
847
848 /* turn association led off */
849 rt2560_update_led(sc, 0, 0);
850 }
851 break;
852
853 case IEEE80211_S_SCAN:
854 rt2560_set_chan(sc, ic->ic_curchan);
855 callout_reset(&sc->scan_ch, (sc->sc_dwelltime * hz) / 1000,
856 rt2560_next_scan, sc);
857 break;
858
859 case IEEE80211_S_AUTH:
860 rt2560_set_chan(sc, ic->ic_curchan);
861 break;
862
863 case IEEE80211_S_ASSOC:
864 rt2560_set_chan(sc, ic->ic_curchan);
865 break;
866
867 case IEEE80211_S_RUN:
868 sc->sc_avgrssi = -1;
869 rt2560_set_chan(sc, ic->ic_curchan);
870
871 ni = ic->ic_bss;
872
873 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
874 rt2560_update_plcp(sc);
875 rt2560_set_basicrates(sc);
876 rt2560_set_bssid(sc, ni->ni_bssid);
877 }
878
879 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
880 ic->ic_opmode == IEEE80211_M_IBSS) {
881 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
882 if (m == NULL) {
883 device_printf(sc->sc_dev,
884 "could not allocate beacon\n");
885 error = ENOBUFS;
886 break;
887 }
888
889 ieee80211_ref_node(ni);
890 error = rt2560_tx_bcn(sc, m, ni);
891 if (error != 0)
892 break;
893 }
894
895 /* turn assocation led on */
896 rt2560_update_led(sc, 1, 0);
897
898 if (ic->ic_opmode != IEEE80211_M_MONITOR)
899 rt2560_enable_tsf_sync(sc);
900 if (ic->ic_opmode == IEEE80211_M_STA) {
901 /* Clear false CCA counter */
902 RAL_READ(sc, RT2560_CNT3);
903 callout_reset(&sc->calib_ch, hz, rt2560_calibrate, sc);
904 }
905 break;
906 }
907
908 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
909 }
910
911 /*
912 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
913 * 93C66).
914 */
915 static uint16_t
916 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
917 {
918 uint32_t tmp;
919 uint16_t val;
920 int n;
921
922 /* clock C once before the first command */
923 RT2560_EEPROM_CTL(sc, 0);
924
925 RT2560_EEPROM_CTL(sc, RT2560_S);
926 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
927 RT2560_EEPROM_CTL(sc, RT2560_S);
928
929 /* write start bit (1) */
930 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
931 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
932
933 /* write READ opcode (10) */
934 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
935 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
936 RT2560_EEPROM_CTL(sc, RT2560_S);
937 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
938
939 /* write address (A5-A0 or A7-A0) */
940 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
941 for (; n >= 0; n--) {
942 RT2560_EEPROM_CTL(sc, RT2560_S |
943 (((addr >> n) & 1) << RT2560_SHIFT_D));
944 RT2560_EEPROM_CTL(sc, RT2560_S |
945 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
946 }
947
948 RT2560_EEPROM_CTL(sc, RT2560_S);
949
950 /* read data Q15-Q0 */
951 val = 0;
952 for (n = 15; n >= 0; n--) {
953 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
954 tmp = RAL_READ(sc, RT2560_CSR21);
955 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
956 RT2560_EEPROM_CTL(sc, RT2560_S);
957 }
958
959 RT2560_EEPROM_CTL(sc, 0);
960
961 /* clear Chip Select and clock C */
962 RT2560_EEPROM_CTL(sc, RT2560_S);
963 RT2560_EEPROM_CTL(sc, 0);
964 RT2560_EEPROM_CTL(sc, RT2560_C);
965
966 return val;
967 }
968
969 /*
970 * Some frames were processed by the hardware cipher engine and are ready for
971 * transmission.
972 */
973 static void
974 rt2560_encryption_intr(struct rt2560_softc *sc)
975 {
976 struct rt2560_tx_desc *desc;
977 int hw;
978
979 /* retrieve last descriptor index processed by cipher engine */
980 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr;
981 hw /= RT2560_TX_DESC_SIZE;
982
983 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
984 BUS_DMASYNC_POSTREAD);
985
986 for (; sc->txq.next_encrypt != hw;) {
987 desc = &sc->txq.desc[sc->txq.next_encrypt];
988
989 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
990 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY))
991 break;
992
993 /* for TKIP, swap eiv field to fix a bug in ASIC */
994 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
995 RT2560_TX_CIPHER_TKIP)
996 desc->eiv = bswap32(desc->eiv);
997
998 /* mark the frame ready for transmission */
999 desc->flags |= htole32(RT2560_TX_VALID);
1000 desc->flags |= htole32(RT2560_TX_BUSY);
1001
1002 DPRINTFN(15, ("encryption done idx=%u\n",
1003 sc->txq.next_encrypt));
1004
1005 sc->txq.next_encrypt =
1006 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
1007 }
1008
1009 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1010 BUS_DMASYNC_PREWRITE);
1011
1012 /* kick Tx */
1013 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
1014 }
1015
1016 static void
1017 rt2560_tx_intr(struct rt2560_softc *sc)
1018 {
1019 struct ieee80211com *ic = &sc->sc_ic;
1020 struct ifnet *ifp = ic->ic_ifp;
1021
1022 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1023 BUS_DMASYNC_POSTREAD);
1024
1025 for (;;) {
1026 struct rt2560_tx_desc *desc;
1027 struct rt2560_tx_data *data;
1028 struct ieee80211_node *ni;
1029 int rateidx, data_retries, failed;
1030 struct mbuf *m;
1031 uint32_t flags;
1032
1033 desc = &sc->txq.desc[sc->txq.next];
1034 data = &sc->txq.data[sc->txq.next];
1035
1036 flags = le32toh(desc->flags);
1037
1038 if ((flags & RT2560_TX_BUSY) ||
1039 (flags & RT2560_TX_CIPHER_BUSY) ||
1040 !(flags & RT2560_TX_VALID))
1041 break;
1042
1043 rateidx = data->rateidx;
1044 ni = data->ni;
1045 m = data->m;
1046
1047 data->ni = NULL;
1048 data->m = NULL;
1049
1050 failed = 0;
1051 switch (flags & RT2560_TX_RESULT_MASK) {
1052 case RT2560_TX_SUCCESS:
1053 DPRINTFN(10, ("data frame sent successfully\n"));
1054 ifp->if_opackets++;
1055 data_retries = 0;
1056 break;
1057
1058 case RT2560_TX_SUCCESS_RETRY:
1059 data_retries = (flags >> 5) & 0x7;
1060 DPRINTFN(9, ("data frame sent after %u retries\n",
1061 data_retries));
1062 ifp->if_opackets++;
1063 break;
1064
1065 case RT2560_TX_FAIL_RETRY:
1066 DPRINTFN(9, ("sending data frame failed (too much "
1067 "retries)\n"));
1068 ifp->if_oerrors++;
1069 data_retries = 7;
1070 failed = 1;
1071 break;
1072
1073 case RT2560_TX_FAIL_INVALID:
1074 case RT2560_TX_FAIL_OTHER:
1075 default:
1076 data_retries = 7;
1077 failed = 1;
1078 device_printf(sc->sc_dev, "sending data frame failed "
1079 "0x%08x\n", flags);
1080 ifp->if_oerrors++;
1081 break;
1082 }
1083
1084 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1085 BUS_DMASYNC_POSTWRITE);
1086 bus_dmamap_unload(sc->txq.data_dmat, data->map);
1087
1088 if (rateidx >= 0) {
1089 struct ieee80211_ratectl_res res;
1090
1091 res.rc_res_tries = data_retries + 1;
1092 res.rc_res_rateidx = rateidx;
1093 ieee80211_ratectl_tx_complete(ni, m->m_pkthdr.len,
1094 &res, 1, data_retries, 0, failed);
1095 }
1096
1097 m_freem(m);
1098 ieee80211_free_node(ni);
1099
1100 /* descriptor is no longer valid */
1101 desc->flags &= ~htole32(RT2560_TX_VALID);
1102
1103 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
1104
1105 sc->txq.queued--;
1106 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1107 }
1108
1109 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1110 BUS_DMASYNC_PREWRITE);
1111
1112 sc->sc_tx_timer = 0;
1113 ifp->if_flags &= ~IFF_OACTIVE;
1114 rt2560_start(ifp);
1115 }
1116
1117 static void
1118 rt2560_prio_intr(struct rt2560_softc *sc)
1119 {
1120 struct ieee80211com *ic = &sc->sc_ic;
1121 struct ifnet *ifp = ic->ic_ifp;
1122 struct rt2560_tx_desc *desc;
1123 struct rt2560_tx_data *data;
1124
1125 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1126 BUS_DMASYNC_POSTREAD);
1127
1128 for (;;) {
1129 desc = &sc->prioq.desc[sc->prioq.next];
1130 data = &sc->prioq.data[sc->prioq.next];
1131
1132 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1133 !(le32toh(desc->flags) & RT2560_TX_VALID))
1134 break;
1135
1136 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1137 case RT2560_TX_SUCCESS:
1138 DPRINTFN(10, ("mgt frame sent successfully\n"));
1139 break;
1140
1141 case RT2560_TX_SUCCESS_RETRY:
1142 DPRINTFN(9, ("mgt frame sent after %u retries\n",
1143 (le32toh(desc->flags) >> 5) & 0x7));
1144 break;
1145
1146 case RT2560_TX_FAIL_RETRY:
1147 DPRINTFN(9, ("sending mgt frame failed (too much "
1148 "retries)\n"));
1149 break;
1150
1151 case RT2560_TX_FAIL_INVALID:
1152 case RT2560_TX_FAIL_OTHER:
1153 default:
1154 device_printf(sc->sc_dev, "sending mgt frame failed "
1155 "0x%08x\n", le32toh(desc->flags));
1156 }
1157
1158 bus_dmamap_sync(sc->prioq.data_dmat, data->map,
1159 BUS_DMASYNC_POSTWRITE);
1160 bus_dmamap_unload(sc->prioq.data_dmat, data->map);
1161 m_freem(data->m);
1162 data->m = NULL;
1163
1164 KASSERT(data->ni == NULL, ("mgmt node is not empty\n"));
1165
1166 /* descriptor is no longer valid */
1167 desc->flags &= ~htole32(RT2560_TX_VALID);
1168
1169 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1170
1171 sc->prioq.queued--;
1172 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1173 }
1174
1175 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1176 BUS_DMASYNC_PREWRITE);
1177
1178 sc->sc_tx_timer = 0;
1179 ifp->if_flags &= ~IFF_OACTIVE;
1180 rt2560_start(ifp);
1181 }
1182
1183 /*
1184 * Some frames were processed by the hardware cipher engine and are ready for
1185 * transmission to the IEEE802.11 layer.
1186 */
1187 static void
1188 rt2560_decryption_intr(struct rt2560_softc *sc)
1189 {
1190 struct ieee80211com *ic = &sc->sc_ic;
1191 struct ifnet *ifp = ic->ic_ifp;
1192 struct rt2560_rx_desc *desc;
1193 struct rt2560_rx_data *data;
1194 bus_addr_t physaddr;
1195 struct ieee80211_frame *wh;
1196 struct ieee80211_node *ni;
1197 struct mbuf *mnew, *m;
1198 int hw, error;
1199
1200 /* retrieve last decriptor index processed by cipher engine */
1201 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr;
1202 hw /= RT2560_RX_DESC_SIZE;
1203
1204 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1205 BUS_DMASYNC_POSTREAD);
1206
1207 for (; sc->rxq.cur_decrypt != hw;) {
1208 int rssi;
1209
1210 desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1211 data = &sc->rxq.data[sc->rxq.cur_decrypt];
1212
1213 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1214 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1215 break;
1216
1217 if (data->drop) {
1218 ifp->if_ierrors++;
1219 goto skip;
1220 }
1221
1222 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1223 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1224 ifp->if_ierrors++;
1225 goto skip;
1226 }
1227
1228 /*
1229 * Try to allocate a new mbuf for this ring element and load it
1230 * before processing the current mbuf. If the ring element
1231 * cannot be loaded, drop the received packet and reuse the old
1232 * mbuf. In the unlikely case that the old mbuf can't be
1233 * reloaded either, explicitly panic.
1234 */
1235 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1236 if (mnew == NULL) {
1237 ifp->if_ierrors++;
1238 goto skip;
1239 }
1240
1241 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1242 BUS_DMASYNC_POSTREAD);
1243 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1244
1245 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1246 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr,
1247 &physaddr, 0);
1248 if (error != 0) {
1249 m_freem(mnew);
1250
1251 /* try to reload the old mbuf */
1252 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1253 mtod(data->m, void *), MCLBYTES,
1254 rt2560_dma_map_addr, &physaddr, 0);
1255 if (error != 0) {
1256 /* very unlikely that it will fail... */
1257 panic("%s: could not load old rx mbuf",
1258 device_get_name(sc->sc_dev));
1259 }
1260 ifp->if_ierrors++;
1261 goto skip;
1262 }
1263
1264 /*
1265 * New mbuf successfully loaded, update Rx ring and continue
1266 * processing.
1267 */
1268 m = data->m;
1269 data->m = mnew;
1270 desc->physaddr = htole32(physaddr);
1271
1272 /* finalize mbuf */
1273 m->m_pkthdr.rcvif = ifp;
1274 m->m_pkthdr.len = m->m_len =
1275 (le32toh(desc->flags) >> 16) & 0xfff;
1276
1277 rssi = RT2560_RSSI(sc, desc->rssi);
1278 if (sc->sc_avgrssi < 0)
1279 sc->sc_avgrssi = rssi;
1280 else
1281 sc->sc_avgrssi = ((sc->sc_avgrssi * 7) + rssi) >> 3;
1282
1283 if (sc->sc_drvbpf != NULL) {
1284 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1285 uint32_t tsf_lo, tsf_hi;
1286
1287 /* get timestamp (low and high 32 bits) */
1288 tsf_hi = RAL_READ(sc, RT2560_CSR17);
1289 tsf_lo = RAL_READ(sc, RT2560_CSR16);
1290
1291 tap->wr_tsf =
1292 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1293 tap->wr_flags = 0;
1294 tap->wr_rate = rt2560_rxrate(desc);
1295 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1296 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1297 tap->wr_antenna = sc->rx_ant;
1298 tap->wr_antsignal = rssi;
1299
1300 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1301 }
1302
1303 wh = mtod(m, struct ieee80211_frame *);
1304 ni = ieee80211_find_rxnode(ic,
1305 (struct ieee80211_frame_min *)wh);
1306
1307 /* send the frame to the 802.11 layer */
1308 ieee80211_input(ic, m, ni, rssi, 0);
1309
1310 /* node is no longer needed */
1311 ieee80211_free_node(ni);
1312
1313 skip: desc->flags = htole32(RT2560_RX_BUSY);
1314
1315 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1316
1317 sc->rxq.cur_decrypt =
1318 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1319 }
1320
1321 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1322 BUS_DMASYNC_PREWRITE);
1323 }
1324
1325 /*
1326 * Some frames were received. Pass them to the hardware cipher engine before
1327 * sending them to the 802.11 layer.
1328 */
1329 static void
1330 rt2560_rx_intr(struct rt2560_softc *sc)
1331 {
1332 struct rt2560_rx_desc *desc;
1333 struct rt2560_rx_data *data;
1334
1335 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1336 BUS_DMASYNC_POSTREAD);
1337
1338 for (;;) {
1339 desc = &sc->rxq.desc[sc->rxq.cur];
1340 data = &sc->rxq.data[sc->rxq.cur];
1341
1342 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1343 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1344 break;
1345
1346 data->drop = 0;
1347
1348 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) ||
1349 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) {
1350 /*
1351 * This should not happen since we did not request
1352 * to receive those frames when we filled RXCSR0.
1353 */
1354 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1355 le32toh(desc->flags)));
1356 data->drop = 1;
1357 }
1358
1359 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1360 DPRINTFN(5, ("bad length\n"));
1361 data->drop = 1;
1362 }
1363
1364 /* mark the frame for decryption */
1365 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1366
1367 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1368
1369 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1370 }
1371
1372 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1373 BUS_DMASYNC_PREWRITE);
1374
1375 /* kick decrypt */
1376 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1377 }
1378
1379 /*
1380 * This function is called periodically in IBSS mode when a new beacon must be
1381 * sent out.
1382 */
1383 static void
1384 rt2560_beacon_expire(struct rt2560_softc *sc)
1385 {
1386 struct ieee80211com *ic = &sc->sc_ic;
1387 struct rt2560_tx_data *data;
1388
1389 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1390 ic->ic_opmode != IEEE80211_M_HOSTAP)
1391 return;
1392
1393 data = &sc->bcnq.data[sc->bcnq.next];
1394
1395 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
1396 bus_dmamap_unload(sc->bcnq.data_dmat, data->map);
1397
1398 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1);
1399
1400 if (ic->ic_rawbpf != NULL)
1401 bpf_mtap(ic->ic_rawbpf, data->m);
1402
1403 rt2560_tx_bcn(sc, data->m, data->ni);
1404
1405 DPRINTFN(15, ("beacon expired\n"));
1406
1407 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1408 }
1409
1410 /* ARGSUSED */
1411 static void
1412 rt2560_wakeup_expire(struct rt2560_softc *sc)
1413 {
1414 DPRINTFN(2, ("wakeup expired\n"));
1415 }
1416
1417 static void
1418 rt2560_intr(void *arg)
1419 {
1420 struct rt2560_softc *sc = arg;
1421 struct ifnet *ifp = &sc->sc_ic.ic_if;
1422 uint32_t r;
1423
1424 /* disable interrupts */
1425 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1426
1427 /* don't re-enable interrupts if we're shutting down */
1428 if (!(ifp->if_flags & IFF_RUNNING))
1429 return;
1430
1431 r = RAL_READ(sc, RT2560_CSR7);
1432 RAL_WRITE(sc, RT2560_CSR7, r);
1433
1434 if (r & RT2560_BEACON_EXPIRE)
1435 rt2560_beacon_expire(sc);
1436
1437 if (r & RT2560_WAKEUP_EXPIRE)
1438 rt2560_wakeup_expire(sc);
1439
1440 if (r & RT2560_PRIO_DONE)
1441 rt2560_prio_intr(sc);
1442
1443 if (r & (RT2560_RX_DONE | RT2560_TX_DONE | RT2560_ENCRYPTION_DONE)) {
1444 int i;
1445
1446 for (i = 0; i < 2; ++i) {
1447 rt2560_tx_intr(sc);
1448 rt2560_encryption_intr(sc);
1449 }
1450 }
1451
1452 if (r & (RT2560_DECRYPTION_DONE | RT2560_RX_DONE)) {
1453 int i;
1454
1455 for (i = 0; i < 2; ++i) {
1456 rt2560_decryption_intr(sc);
1457 rt2560_rx_intr(sc);
1458 }
1459 }
1460
1461 /* re-enable interrupts */
1462 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1463 }
1464
1465 /* quickly determine if a given rate is CCK or OFDM */
1466 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1467
1468 #define RAL_ACK_SIZE (sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
1469 #define RAL_CTS_SIZE (sizeof(struct ieee80211_frame_cts) + IEEE80211_CRC_LEN)
1470
1471 #define RT2560_TXRX_TURNAROUND 10 /* us */
1472
1473 /*
1474 * This function is only used by the Rx radiotap code.
1475 */
1476 static uint8_t
1477 rt2560_rxrate(struct rt2560_rx_desc *desc)
1478 {
1479 if (le32toh(desc->flags) & RT2560_RX_OFDM) {
1480 /* reverse function of rt2560_plcp_signal */
1481 switch (desc->rate) {
1482 case 0xb: return 12;
1483 case 0xf: return 18;
1484 case 0xa: return 24;
1485 case 0xe: return 36;
1486 case 0x9: return 48;
1487 case 0xd: return 72;
1488 case 0x8: return 96;
1489 case 0xc: return 108;
1490 }
1491 } else {
1492 if (desc->rate == 10)
1493 return 2;
1494 if (desc->rate == 20)
1495 return 4;
1496 if (desc->rate == 55)
1497 return 11;
1498 if (desc->rate == 110)
1499 return 22;
1500 }
1501 return 2; /* should not get there */
1502 }
1503
1504 static uint8_t
1505 rt2560_plcp_signal(int rate)
1506 {
1507 switch (rate) {
1508 /* CCK rates (returned values are device-dependent) */
1509 case 2: return 0x0;
1510 case 4: return 0x1;
1511 case 11: return 0x2;
1512 case 22: return 0x3;
1513
1514 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1515 case 12: return 0xb;
1516 case 18: return 0xf;
1517 case 24: return 0xa;
1518 case 36: return 0xe;
1519 case 48: return 0x9;
1520 case 72: return 0xd;
1521 case 96: return 0x8;
1522 case 108: return 0xc;
1523
1524 /* unsupported rates (should not get there) */
1525 default: return 0xff;
1526 }
1527 }
1528
1529 static void
1530 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1531 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1532 {
1533 struct ieee80211com *ic = &sc->sc_ic;
1534 uint16_t plcp_length;
1535 int remainder;
1536
1537 desc->flags = htole32(flags);
1538 desc->flags |= htole32(len << 16);
1539
1540 desc->physaddr = htole32(physaddr);
1541 desc->wme = htole16(
1542 RT2560_AIFSN(2) |
1543 RT2560_LOGCWMIN(3) |
1544 RT2560_LOGCWMAX(8));
1545
1546 /* setup PLCP fields */
1547 desc->plcp_signal = rt2560_plcp_signal(rate);
1548 desc->plcp_service = 4;
1549
1550 len += IEEE80211_CRC_LEN;
1551 if (RAL_RATE_IS_OFDM(rate)) {
1552 desc->flags |= htole32(RT2560_TX_OFDM);
1553
1554 plcp_length = len & 0xfff;
1555 desc->plcp_length_hi = plcp_length >> 6;
1556 desc->plcp_length_lo = plcp_length & 0x3f;
1557 } else {
1558 plcp_length = (16 * len + rate - 1) / rate;
1559 if (rate == 22) {
1560 remainder = (16 * len) % 22;
1561 if (remainder != 0 && remainder < 7)
1562 desc->plcp_service |= RT2560_PLCP_LENGEXT;
1563 }
1564 desc->plcp_length_hi = plcp_length >> 8;
1565 desc->plcp_length_lo = plcp_length & 0xff;
1566
1567 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1568 desc->plcp_signal |= 0x08;
1569 }
1570
1571 if (!encrypt)
1572 desc->flags |= htole32(RT2560_TX_VALID);
1573 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY)
1574 : htole32(RT2560_TX_BUSY);
1575 }
1576
1577 static int
1578 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1579 struct ieee80211_node *ni)
1580 {
1581 struct ieee80211com *ic = &sc->sc_ic;
1582 struct rt2560_tx_desc *desc;
1583 struct rt2560_tx_data *data;
1584 bus_addr_t paddr;
1585 int rate, error;
1586
1587 desc = &sc->bcnq.desc[sc->bcnq.cur];
1588 data = &sc->bcnq.data[sc->bcnq.cur];
1589
1590 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1591
1592 error = bus_dmamap_load_mbuf(sc->bcnq.data_dmat, data->map, m0,
1593 rt2560_dma_map_mbuf, &paddr,
1594 BUS_DMA_NOWAIT);
1595 if (error != 0) {
1596 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1597 error);
1598 m_freem(m0);
1599 return error;
1600 }
1601
1602 if (sc->sc_drvbpf != NULL) {
1603 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1604
1605 tap->wt_flags = 0;
1606 tap->wt_rate = rate;
1607 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1608 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1609 tap->wt_antenna = sc->tx_ant;
1610
1611 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1612 }
1613
1614 data->m = m0;
1615 data->ni = ni;
1616
1617 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1618 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, paddr);
1619
1620 DPRINTFN(10, ("sending beacon frame len=%u idx=%u rate=%u\n",
1621 m0->m_pkthdr.len, sc->bcnq.cur, rate));
1622
1623 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1624 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map,
1625 BUS_DMASYNC_PREWRITE);
1626
1627 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT;
1628
1629 return 0;
1630 }
1631
1632 static int
1633 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1634 struct ieee80211_node *ni)
1635 {
1636 struct ieee80211com *ic = &sc->sc_ic;
1637 struct rt2560_tx_desc *desc;
1638 struct rt2560_tx_data *data;
1639 struct ieee80211_frame *wh;
1640 bus_addr_t paddr;
1641 uint16_t dur;
1642 uint32_t flags = 0;
1643 int rate, error;
1644
1645 desc = &sc->prioq.desc[sc->prioq.cur];
1646 data = &sc->prioq.data[sc->prioq.cur];
1647
1648 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1649
1650 error = bus_dmamap_load_mbuf(sc->prioq.data_dmat, data->map, m0,
1651 rt2560_dma_map_mbuf, &paddr, 0);
1652 if (error != 0) {
1653 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1654 error);
1655 ieee80211_free_node(ni);
1656 m_freem(m0);
1657 return error;
1658 }
1659
1660 if (sc->sc_drvbpf != NULL) {
1661 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1662
1663 tap->wt_flags = 0;
1664 tap->wt_rate = rate;
1665 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1666 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1667 tap->wt_antenna = sc->tx_ant;
1668
1669 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1670 }
1671
1672 data->m = m0;
1673 data->ni = NULL;
1674
1675 wh = mtod(m0, struct ieee80211_frame *);
1676
1677 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1678 flags |= RT2560_TX_ACK;
1679
1680 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, rate, ic->ic_flags) +
1681 sc->sc_sifs;
1682 *(uint16_t *)wh->i_dur = htole16(dur);
1683
1684 /* tell hardware to add timestamp for probe responses */
1685 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1686 IEEE80211_FC0_TYPE_MGT &&
1687 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1688 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1689 flags |= RT2560_TX_TIMESTAMP;
1690 }
1691
1692 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, paddr);
1693
1694 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1695 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1696 BUS_DMASYNC_PREWRITE);
1697
1698 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1699 m0->m_pkthdr.len, sc->prioq.cur, rate));
1700
1701 /* kick prio */
1702 sc->prioq.queued++;
1703 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1704 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1705
1706 ieee80211_free_node(ni);
1707
1708 return 0;
1709 }
1710
1711 /*
1712 * Build a RTS control frame.
1713 */
1714 static struct mbuf *
1715 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh,
1716 uint16_t dur)
1717 {
1718 struct ieee80211_frame_rts *rts;
1719 struct mbuf *m;
1720
1721 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1722 if (m == NULL) {
1723 sc->sc_ic.ic_stats.is_tx_nobuf++;
1724 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1725 return NULL;
1726 }
1727
1728 rts = mtod(m, struct ieee80211_frame_rts *);
1729
1730 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1731 IEEE80211_FC0_SUBTYPE_RTS;
1732 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1733 *(uint16_t *)rts->i_dur = htole16(dur);
1734 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1735 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1736
1737 m->m_pkthdr.len = m->m_len = sizeof(struct ieee80211_frame_rts);
1738
1739 return m;
1740 }
1741
1742 static int
1743 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1744 struct ieee80211_node *ni)
1745 {
1746 struct ieee80211com *ic = &sc->sc_ic;
1747 struct rt2560_tx_desc *desc;
1748 struct rt2560_tx_data *data;
1749 struct ieee80211_frame *wh;
1750 struct ieee80211_key *k;
1751 struct mbuf *mnew;
1752 bus_addr_t paddr;
1753 uint16_t dur;
1754 uint32_t flags = 0;
1755 int rate, error, ackrate, rateidx;
1756
1757 wh = mtod(m0, struct ieee80211_frame *);
1758 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1759 k = ieee80211_crypto_encap(ic, ni, m0);
1760 if (k == NULL) {
1761 m_freem(m0);
1762 return ENOBUFS;
1763 }
1764
1765 /* packet header may have moved, reset our local pointer */
1766 wh = mtod(m0, struct ieee80211_frame *);
1767 }
1768
1769 ieee80211_ratectl_findrate(ni, m0->m_pkthdr.len, &rateidx, 1);
1770 rate = IEEE80211_RS_RATE(&ni->ni_rates, rateidx);
1771
1772 ackrate = ieee80211_ack_rate(ni, rate);
1773
1774 /*
1775 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1776 * for directed frames only when the length of the MPDU is greater
1777 * than the length threshold indicated by [...]" ic_rtsthreshold.
1778 */
1779 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1780 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1781 struct mbuf *m;
1782 uint16_t dur;
1783 int rtsrate;
1784
1785 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1786 dur = ieee80211_txtime(ni, m0->m_pkthdr.len + IEEE80211_CRC_LEN,
1787 rate, ic->ic_flags) +
1788 ieee80211_txtime(ni, RAL_CTS_SIZE, rtsrate, ic->ic_flags)+
1789 ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1790 3 * sc->sc_sifs;
1791
1792 m = rt2560_get_rts(sc, wh, dur);
1793
1794 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1795 data = &sc->txq.data[sc->txq.cur_encrypt];
1796
1797 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map,
1798 m, rt2560_dma_map_mbuf, &paddr, 0);
1799 if (error != 0) {
1800 device_printf(sc->sc_dev,
1801 "could not map mbuf (error %d)\n", error);
1802 m_freem(m);
1803 m_freem(m0);
1804 return error;
1805 }
1806
1807 /* avoid multiple free() of the same node for each fragment */
1808 ieee80211_ref_node(ni);
1809
1810 data->m = m;
1811 data->ni = ni;
1812 data->rateidx = -1; /* don't count RTS */
1813
1814 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK |
1815 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, paddr);
1816
1817 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1818 BUS_DMASYNC_PREWRITE);
1819
1820 sc->txq.queued++;
1821 sc->txq.cur_encrypt =
1822 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1823
1824 /*
1825 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1826 * asynchronous data frame shall be transmitted after the CTS
1827 * frame and a SIFS period.
1828 */
1829 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1830 }
1831
1832 data = &sc->txq.data[sc->txq.cur_encrypt];
1833 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1834
1835 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map, m0,
1836 rt2560_dma_map_mbuf, &paddr, 0);
1837 if (error != 0 && error != EFBIG) {
1838 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1839 error);
1840 m_freem(m0);
1841 return error;
1842 }
1843 if (error != 0) {
1844 mnew = m_defrag(m0, MB_DONTWAIT);
1845 if (mnew == NULL) {
1846 device_printf(sc->sc_dev,
1847 "could not defragment mbuf\n");
1848 m_freem(m0);
1849 return ENOBUFS;
1850 }
1851 m0 = mnew;
1852
1853 error = bus_dmamap_load_mbuf(sc->txq.data_dmat, data->map,
1854 m0, rt2560_dma_map_mbuf, &paddr,
1855 0);
1856 if (error != 0) {
1857 device_printf(sc->sc_dev,
1858 "could not map mbuf (error %d)\n", error);
1859 m_freem(m0);
1860 return error;
1861 }
1862
1863 /* packet header may have moved, reset our local pointer */
1864 wh = mtod(m0, struct ieee80211_frame *);
1865 }
1866
1867 if (sc->sc_drvbpf != NULL) {
1868 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1869
1870 tap->wt_flags = 0;
1871 tap->wt_rate = rate;
1872 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1873 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1874 tap->wt_antenna = sc->tx_ant;
1875
1876 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1877 }
1878
1879 data->m = m0;
1880 data->ni = ni;
1881 data->rateidx = rateidx;
1882
1883 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1884 flags |= RT2560_TX_ACK;
1885 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1886 sc->sc_sifs;
1887 *(uint16_t *)wh->i_dur = htole16(dur);
1888 }
1889
1890 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, paddr);
1891
1892 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1893 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1894 BUS_DMASYNC_PREWRITE);
1895
1896 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1897 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate));
1898
1899 /* kick encrypt */
1900 sc->txq.queued++;
1901 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1902 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1903
1904 return 0;
1905 }
1906
1907 static void
1908 rt2560_start(struct ifnet *ifp)
1909 {
1910 struct rt2560_softc *sc = ifp->if_softc;
1911 struct ieee80211com *ic = &sc->sc_ic;
1912 struct mbuf *m0;
1913 struct ether_header *eh;
1914 struct ieee80211_node *ni;
1915
1916 /* prevent management frames from being sent if we're not ready */
1917 if (!(ifp->if_flags & IFF_RUNNING))
1918 return;
1919
1920 for (;;) {
1921 IF_POLL(&ic->ic_mgtq, m0);
1922 if (m0 != NULL) {
1923 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
1924 ifp->if_flags |= IFF_OACTIVE;
1925 break;
1926 }
1927 IF_DEQUEUE(&ic->ic_mgtq, m0);
1928
1929 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1930 m0->m_pkthdr.rcvif = NULL;
1931
1932 if (ic->ic_rawbpf != NULL)
1933 bpf_mtap(ic->ic_rawbpf, m0);
1934
1935 if (rt2560_tx_mgt(sc, m0, ni) != 0)
1936 break;
1937
1938 } else {
1939 if (ic->ic_state != IEEE80211_S_RUN)
1940 break;
1941 m0 = ifq_poll(&ifp->if_snd);
1942 if (m0 == NULL)
1943 break;
1944 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
1945 ifp->if_flags |= IFF_OACTIVE;
1946 break;
1947 }
1948 m0 = ifq_dequeue(&ifp->if_snd, m0);
1949
1950 if (m0->m_len < sizeof (struct ether_header) &&
1951 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1952 continue;
1953
1954 eh = mtod(m0, struct ether_header *);
1955 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1956 if (ni == NULL) {
1957 m_freem(m0);
1958 continue;
1959 }
1960 BPF_MTAP(ifp, m0);
1961
1962 m0 = ieee80211_encap(ic, m0, ni);
1963 if (m0 == NULL) {
1964 ieee80211_free_node(ni);
1965 continue;
1966 }
1967
1968 if (ic->ic_rawbpf != NULL)
1969 bpf_mtap(ic->ic_rawbpf, m0);
1970
1971 if (rt2560_tx_data(sc, m0, ni) != 0) {
1972 ieee80211_free_node(ni);
1973 ifp->if_oerrors++;
1974 break;
1975 }
1976 }
1977
1978 sc->sc_tx_timer = 5;
1979 ifp->if_timer = 1;
1980 }
1981 }
1982
1983 static void
1984 rt2560_watchdog(struct ifnet *ifp)
1985 {
1986 struct rt2560_softc *sc = ifp->if_softc;
1987 struct ieee80211com *ic = &sc->sc_ic;
1988
1989 ifp->if_timer = 0;
1990
1991 if (sc->sc_tx_timer > 0) {
1992 if (--sc->sc_tx_timer == 0) {
1993 device_printf(sc->sc_dev, "device timeout\n");
1994 rt2560_init(sc);
1995 ifp->if_oerrors++;
1996 return;
1997 }
1998 ifp->if_timer = 1;
1999 }
2000
2001 ieee80211_watchdog(ic);
2002 }
2003
2004 /*
2005 * This function allows for fast channel switching in monitor mode (used by
2006 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
2007 * generate a new beacon frame.
2008 */
2009 static int
2010 rt2560_reset(struct ifnet *ifp)
2011 {
2012 struct rt2560_softc *sc = ifp->if_softc;
2013 struct ieee80211com *ic = &sc->sc_ic;
2014
2015 if (ic->ic_opmode != IEEE80211_M_MONITOR)
2016 return ENETRESET;
2017
2018 rt2560_set_chan(sc, ic->ic_curchan);
2019
2020 return 0;
2021 }
2022
2023 static int
2024 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
2025 {
2026 struct rt2560_softc *sc = ifp->if_softc;
2027 struct ieee80211com *ic = &sc->sc_ic;
2028 int error = 0;
2029
2030 switch (cmd) {
2031 case SIOCSIFFLAGS:
2032 if (ifp->if_flags & IFF_UP) {
2033 if (ifp->if_flags & IFF_RUNNING)
2034 rt2560_update_promisc(sc);
2035 else
2036 rt2560_init(sc);
2037 } else {
2038 if (ifp->if_flags & IFF_RUNNING)
2039 rt2560_stop(sc);
2040 }
2041 break;
2042
2043 default:
2044 error = ieee80211_ioctl(ic, cmd, data, cr);
2045 }
2046
2047 if (error == ENETRESET) {
2048 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2049 (IFF_UP | IFF_RUNNING) &&
2050 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
2051 rt2560_init(sc);
2052 error = 0;
2053 }
2054
2055 return error;
2056 }
2057
2058 static void
2059 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2060 {
2061 uint32_t tmp;
2062 int ntries;
2063
2064 for (ntries = 0; ntries < 100; ntries++) {
2065 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2066 break;
2067 DELAY(1);
2068 }
2069 if (ntries == 100) {
2070 device_printf(sc->sc_dev, "could not write to BBP\n");
2071 return;
2072 }
2073
2074 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2075 RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2076
2077 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2078
2079 /* XXX */
2080 if (reg == 17) {
2081 DPRINTF(("%s record bbp17 %#x\n", __func__, val));
2082 sc->sc_bbp17 = val;
2083 }
2084 }
2085
2086 static uint8_t
2087 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2088 {
2089 uint32_t val;
2090 int ntries;
2091
2092 for (ntries = 0; ntries < 100; ntries++) {
2093 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2094 break;
2095 DELAY(1);
2096 }
2097 if (ntries == 100) {
2098 device_printf(sc->sc_dev, "could not read from BBP\n");
2099 return 0;
2100 }
2101
2102 val = RT2560_BBP_BUSY | reg << 8;
2103 RAL_WRITE(sc, RT2560_BBPCSR, val);
2104
2105 for (ntries = 0; ntries < 100; ntries++) {
2106 val = RAL_READ(sc, RT2560_BBPCSR);
2107 if (!(val & RT2560_BBP_BUSY))
2108 return val & 0xff;
2109 DELAY(1);
2110 }
2111
2112 device_printf(sc->sc_dev, "could not read from BBP\n");
2113 return 0;
2114 }
2115
2116 static void
2117 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2118 {
2119 uint32_t tmp;
2120 int ntries;
2121
2122 for (ntries = 0; ntries < 100; ntries++) {
2123 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2124 break;
2125 DELAY(1);
2126 }
2127 if (ntries == 100) {
2128 device_printf(sc->sc_dev, "could not write to RF\n");
2129 return;
2130 }
2131
2132 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2133 (reg & 0x3);
2134 RAL_WRITE(sc, RT2560_RFCSR, tmp);
2135
2136 /* remember last written value in sc */
2137 sc->rf_regs[reg] = val;
2138
2139 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2140 }
2141
2142 static void
2143 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2144 {
2145 struct ieee80211com *ic = &sc->sc_ic;
2146 uint8_t power, tmp;
2147 u_int i, chan;
2148
2149 chan = ieee80211_chan2ieee(ic, c);
2150 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2151 return;
2152
2153 if (IEEE80211_IS_CHAN_2GHZ(c))
2154 sc->sc_curtxpow = sc->txpow[chan - 1];
2155 else
2156 sc->sc_curtxpow = 31;
2157
2158 if (ic->ic_txpowlimit > sc->sc_curtxpow)
2159 ic->ic_txpowlimit = sc->sc_curtxpow;
2160 else
2161 sc->sc_curtxpow = ic->ic_txpowlimit;
2162 ic->ic_bss->ni_txpower = sc->sc_curtxpow;
2163
2164 power = sc->sc_curtxpow;
2165
2166 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2167
2168 switch (sc->rf_rev) {
2169 case RT2560_RF_2522:
2170 rt2560_rf_write(sc, RAL_RF1, 0x00814);
2171 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]);
2172 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2173 break;
2174
2175 case RT2560_RF_2523:
2176 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2177 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]);
2178 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
2179 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2180 break;
2181
2182 case RT2560_RF_2524:
2183 rt2560_rf_write(sc, RAL_RF1, 0x0c808);
2184 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]);
2185 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2186 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2187 break;
2188
2189 case RT2560_RF_2525:
2190 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2191 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2192 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2193 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2194
2195 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2196 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]);
2197 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2198 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2199 break;
2200
2201 case RT2560_RF_2525E:
2202 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2203 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]);
2204 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2205 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
2206 break;
2207
2208 case RT2560_RF_2526:
2209 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2210 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2211 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2212
2213 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]);
2214 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2215 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2216 break;
2217
2218 /* dual-band RF */
2219 case RT2560_RF_5222:
2220 for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2221
2222 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1);
2223 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2);
2224 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2225 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4);
2226 break;
2227 }
2228
2229 if (ic->ic_state != IEEE80211_S_SCAN) {
2230 /* set Japan filter bit for channel 14 */
2231 tmp = rt2560_bbp_read(sc, 70);
2232
2233 tmp &= ~RT2560_JAPAN_FILTER;
2234 if (chan == 14)
2235 tmp |= RT2560_JAPAN_FILTER;
2236
2237 rt2560_bbp_write(sc, 70, tmp);
2238
2239 /* clear CRC errors */
2240 RAL_READ(sc, RT2560_CNT0);
2241 }
2242
2243 sc->sc_sifs = IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS
2244 : IEEE80211_DUR_SIFS;
2245 }
2246
2247 /*
2248 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2249 * synchronization.
2250 */
2251 static void
2252 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2253 {
2254 struct ieee80211com *ic = &sc->sc_ic;
2255 uint16_t logcwmin, preload;
2256 uint32_t tmp;
2257
2258 /* first, disable TSF synchronization */
2259 RAL_WRITE(sc, RT2560_CSR14, 0);
2260
2261 tmp = 16 * ic->ic_bss->ni_intval;
2262 RAL_WRITE(sc, RT2560_CSR12, tmp);
2263
2264 RAL_WRITE(sc, RT2560_CSR13, 0);
2265
2266 logcwmin = 5;
2267 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2268 tmp = logcwmin << 16 | preload;
2269 RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2270
2271 /* finally, enable TSF synchronization */
2272 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2273 if (ic->ic_opmode == IEEE80211_M_STA)
2274 tmp |= RT2560_ENABLE_TSF_SYNC(1);
2275 else
2276 tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2277 RT2560_ENABLE_BEACON_GENERATOR;
2278 RAL_WRITE(sc, RT2560_CSR14, tmp);
2279
2280 DPRINTF(("enabling TSF synchronization\n"));
2281 }
2282
2283 static void
2284 rt2560_update_plcp(struct rt2560_softc *sc)
2285 {
2286 struct ieee80211com *ic = &sc->sc_ic;
2287
2288 /* no short preamble for 1Mbps */
2289 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2290
2291 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2292 /* values taken from the reference driver */
2293 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2294 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2295 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2296 } else {
2297 /* same values as above or'ed 0x8 */
2298 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2299 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2300 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2301 }
2302
2303 DPRINTF(("updating PLCP for %s preamble\n",
2304 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2305 }
2306
2307 /*
2308 * This function can be called by ieee80211_set_shortslottime(). Refer to
2309 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2310 */
2311 static void
2312 rt2560_update_slot(struct ifnet *ifp)
2313 {
2314 struct rt2560_softc *sc = ifp->if_softc;
2315 struct ieee80211com *ic = &sc->sc_ic;
2316 uint8_t slottime;
2317 uint16_t tx_sifs, tx_pifs, tx_difs, eifs;
2318 uint32_t tmp;
2319
2320 #ifdef foo
2321 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2322 #else
2323 /*
2324 * Setting slot time according to "short slot time" capability
2325 * in beacon/probe_resp seems to cause problem to acknowledge
2326 * certain AP's data frames transimitted at CCK/DS rates: the
2327 * problematic AP keeps retransmitting data frames, probably
2328 * because MAC level acks are not received by hardware.
2329 * So we cheat a little bit here by claiming we are capable of
2330 * "short slot time" but setting hardware slot time to the normal
2331 * slot time. ral(4) does not seem to have trouble to receive
2332 * frames transmitted using short slot time even if hardware
2333 * slot time is set to normal slot time. If we didn't use this
2334 * trick, we would have to claim that short slot time is not
2335 * supported; this would give relative poor TX performance
2336 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short
2337 * slot time.
2338 */
2339 slottime = (ic->ic_curmode == IEEE80211_MODE_11A) ? 9 : 20;
2340 #endif
2341
2342 /* update the MAC slot boundaries */
2343 tx_sifs = sc->sc_sifs - RT2560_TXRX_TURNAROUND;
2344 tx_pifs = tx_sifs + slottime;
2345 tx_difs = tx_sifs + 2 * slottime;
2346 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2347
2348 tmp = RAL_READ(sc, RT2560_CSR11);
2349 tmp = (tmp & ~0x1f00) | slottime << 8;
2350 RAL_WRITE(sc, RT2560_CSR11, tmp);
2351
2352 tmp = tx_pifs << 16 | tx_sifs;
2353 RAL_WRITE(sc, RT2560_CSR18, tmp);
2354
2355 tmp = eifs << 16 | tx_difs;
2356 RAL_WRITE(sc, RT2560_CSR19, tmp);
2357
2358 DPRINTF(("setting slottime to %uus\n", slottime));
2359 }
2360
2361 static void
2362 rt2560_set_basicrates(struct rt2560_softc *sc)
2363 {
2364 struct ieee80211com *ic = &sc->sc_ic;
2365
2366 /* update basic rate set */
2367 if (ic->ic_curmode == IEEE80211_MODE_11B) {
2368 /* 11b basic rates: 1, 2Mbps */
2369 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2370 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
2371 /* 11a basic rates: 6, 12, 24Mbps */
2372 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150);
2373 } else {
2374 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
2375 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f);
2376 }
2377 }
2378
2379 static void
2380 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2381 {
2382 uint32_t tmp;
2383
2384 /* set ON period to 70ms and OFF period to 30ms */
2385 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2386 RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2387 }
2388
2389 static void
2390 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2391 {
2392 uint32_t tmp;
2393
2394 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2395 RAL_WRITE(sc, RT2560_CSR5, tmp);
2396
2397 tmp = bssid[4] | bssid[5] << 8;
2398 RAL_WRITE(sc, RT2560_CSR6, tmp);
2399
2400 DPRINTF(("setting BSSID to %6D\n", bssid, ":"));
2401 }
2402
2403 static void
2404 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2405 {
2406 uint32_t tmp;
2407
2408 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2409 RAL_WRITE(sc, RT2560_CSR3, tmp);
2410
2411 tmp = addr[4] | addr[5] << 8;
2412 RAL_WRITE(sc, RT2560_CSR4, tmp);
2413
2414 DPRINTF(("setting MAC address to %6D\n", addr, ":"));
2415 }
2416
2417 static void
2418 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2419 {
2420 uint32_t tmp;
2421
2422 tmp = RAL_READ(sc, RT2560_CSR3);
2423 addr[0] = tmp & 0xff;
2424 addr[1] = (tmp >> 8) & 0xff;
2425 addr[2] = (tmp >> 16) & 0xff;
2426 addr[3] = (tmp >> 24);
2427
2428 tmp = RAL_READ(sc, RT2560_CSR4);
2429 addr[4] = tmp & 0xff;
2430 addr[5] = (tmp >> 8) & 0xff;
2431 }
2432
2433 static void
2434 rt2560_update_promisc(struct rt2560_softc *sc)
2435 {
2436 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2437 uint32_t tmp;
2438
2439 tmp = RAL_READ(sc, RT2560_RXCSR0);
2440
2441 tmp &= ~RT2560_DROP_NOT_TO_ME;
2442 if (!(ifp->if_flags & IFF_PROMISC))
2443 tmp |= RT2560_DROP_NOT_TO_ME;
2444
2445 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2446
2447 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2448 "entering" : "leaving"));
2449 }
2450
2451 static const char *
2452 rt2560_get_rf(int rev)
2453 {
2454 switch (rev) {
2455 case RT2560_RF_2522: return "RT2522";
2456 case RT2560_RF_2523: return "RT2523";
2457 case RT2560_RF_2524: return "RT2524";
2458 case RT2560_RF_2525: return "RT2525";
2459 case RT2560_RF_2525E: return "RT2525e";
2460 case RT2560_RF_2526: return "RT2526";
2461 case RT2560_RF_5222: return "RT5222";
2462 default: return "unknown";
2463 }
2464 }
2465
2466 static void
2467 rt2560_read_config(struct rt2560_softc *sc)
2468 {
2469 uint16_t val;
2470 int i, find_bbp17 = 0;
2471
2472 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2473 sc->rf_rev = (val >> 11) & 0x7;
2474 sc->hw_radio = (val >> 10) & 0x1;
2475 sc->led_mode = (val >> 6) & 0x7;
2476 sc->rx_ant = (val >> 4) & 0x3;
2477 sc->tx_ant = (val >> 2) & 0x3;
2478 sc->nb_ant = val & 0x3;
2479
2480 /* read default values for BBP registers */
2481 for (i = 0; i < 16; i++) {
2482 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2483 if (val == 0xffff || val == 0)
2484 continue;
2485 sc->bbp_prom[i].reg = val >> 8;
2486 sc->bbp_prom[i].val = val & 0xff;
2487 DPRINTF(("rom bbp reg:%u val:%#x\n",
2488 sc->bbp_prom[i].reg, sc->bbp_prom[i].val));
2489
2490 if (sc->bbp_prom[i].reg == 17) {
2491 if (sc->bbp_prom[i].val > 6)
2492 sc->sc_bbp17_dynmin = sc->bbp_prom[i].val - 6;
2493 else
2494 sc->sc_bbp17_dynmin = 0;
2495 find_bbp17 = 1;
2496 }
2497 }
2498
2499 sc->sc_bbp17_dynmax = 0x40;
2500 if (!find_bbp17)
2501 sc->sc_bbp17_dynmin = sc->sc_bbp17_dynmax - 6;
2502
2503 /* read Tx power for all b/g channels */
2504 for (i = 0; i < 14 / 2; i++) {
2505 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2506 sc->txpow[i * 2] = val & 0xff;
2507 sc->txpow[i * 2 + 1] = val >> 8;
2508 }
2509 for (i = 0; i < 14; ++i) {
2510 if (sc->txpow[i] > 31)
2511 sc->txpow[i] = 24;
2512 DPRINTF(("tx power chan %d: %u\n", i + 1, sc->txpow[i]));
2513 }
2514
2515 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);
2516 if ((val & 0xff) == 0xff)
2517 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR;
2518 else
2519 sc->rssi_corr = val & 0xff;
2520 DPRINTF(("rssi correction %d, calibrate 0x%02x\n",
2521 sc->rssi_corr, val));
2522
2523 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG1);
2524 if (val == 0xffff)
2525 val = 0;
2526 if ((val & 0x2) == 0 && sc->asic_rev >= RT2560_ASICREV_D) {
2527 DPRINTF(("capable of RX sensitivity calibration\n"));
2528 sc->sc_flags |= RT2560_FLAG_RXSNS;
2529 }
2530 }
2531
2532 static int
2533 rt2560_bbp_init(struct rt2560_softc *sc)
2534 {
2535 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2536 int i, ntries;
2537
2538 /* wait for BBP to be ready */
2539 for (ntries = 0; ntries < 100; ntries++) {
2540 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2541 break;
2542 DELAY(1);
2543 }
2544 if (ntries == 100) {
2545 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2546 return EIO;
2547 }
2548
2549 /* initialize BBP registers to default values */
2550 for (i = 0; i < N(rt2560_def_bbp); i++) {
2551 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2552 rt2560_def_bbp[i].val);
2553 }
2554
2555 /* initialize BBP registers to values stored in EEPROM */
2556 for (i = 0; i < 16; i++) {
2557 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)
2558 break;
2559 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2560 }
2561 /* Set rx sensitivity to user specified value */
2562 rt2560_bbp_write(sc, 17, sc->sc_rxsns);
2563
2564 return 0;
2565 #undef N
2566 }
2567
2568 static void
2569 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2570 {
2571 uint32_t tmp;
2572 uint8_t tx;
2573
2574 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2575 if (antenna == 1)
2576 tx |= RT2560_BBP_ANTA;
2577 else if (antenna == 2)
2578 tx |= RT2560_BBP_ANTB;
2579 else
2580 tx |= RT2560_BBP_DIVERSITY;
2581
2582 /* need to force I/Q flip for RF 2525e and 5222 */
2583 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_5222)
2584 tx |= RT2560_BBP_FLIPIQ;
2585
2586 rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2587
2588 /* update values for CCK and OFDM in BBPCSR1 */
2589 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2590 tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2591 RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2592 }
2593
2594 static void
2595 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2596 {
2597 uint8_t rx;
2598
2599 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2600 if (antenna == 1)
2601 rx |= RT2560_BBP_ANTA;
2602 else if (antenna == 2)
2603 rx |= RT2560_BBP_ANTB;
2604 else
2605 rx |= RT2560_BBP_DIVERSITY;
2606
2607 /* need to force no I/Q flip for RF 2525e */
2608 if (sc->rf_rev == RT2560_RF_2525E)
2609 rx &= ~RT2560_BBP_FLIPIQ;
2610
2611 rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2612 }
2613
2614 static void
2615 rt2560_init(void *priv)
2616 {
2617 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2618 struct rt2560_softc *sc = priv;
2619 struct ieee80211com *ic = &sc->sc_ic;
2620 struct ifnet *ifp = ic->ic_ifp;
2621 uint32_t tmp;
2622 int i;
2623
2624 rt2560_stop(sc);
2625
2626 /* setup tx rings */
2627 tmp = RT2560_PRIO_RING_COUNT << 24 |
2628 RT2560_ATIM_RING_COUNT << 16 |
2629 RT2560_TX_RING_COUNT << 8 |
2630 RT2560_TX_DESC_SIZE;
2631
2632 /* rings must be initialized in this exact order */
2633 RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2634 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2635 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2636 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2637 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2638
2639 /* setup rx ring */
2640 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2641
2642 RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2643 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2644
2645 /* initialize MAC registers to default values */
2646 for (i = 0; i < N(rt2560_def_mac); i++)
2647 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2648
2649 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2650 rt2560_set_macaddr(sc, ic->ic_myaddr);
2651
2652 /* set basic rate set (will be updated later) */
2653 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2654
2655 rt2560_update_slot(ifp);
2656 rt2560_update_plcp(sc);
2657 rt2560_update_led(sc, 0, 0);
2658
2659 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2660 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2661
2662 if (rt2560_bbp_init(sc) != 0) {
2663 rt2560_stop(sc);
2664 return;
2665 }
2666
2667 rt2560_set_txantenna(sc, sc->tx_ant);
2668 rt2560_set_rxantenna(sc, sc->rx_ant);
2669
2670 /* set default BSS channel */
2671 rt2560_set_chan(sc, ic->ic_curchan);
2672
2673 /* kick Rx */
2674 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2675 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2676 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2677 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2678 tmp |= RT2560_DROP_TODS;
2679 if (!(ifp->if_flags & IFF_PROMISC))
2680 tmp |= RT2560_DROP_NOT_TO_ME;
2681 }
2682 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2683
2684 /* clear old FCS and Rx FIFO errors */
2685 RAL_READ(sc, RT2560_CNT0);
2686 RAL_READ(sc, RT2560_CNT4);
2687
2688 /* clear any pending interrupts */
2689 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2690
2691 /* enable interrupts */
2692 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2693
2694 ifp->if_flags &= ~IFF_OACTIVE;
2695 ifp->if_flags |= IFF_RUNNING;
2696
2697 /* XXX */
2698 if (ic->ic_flags & IEEE80211_F_PRIVACY) {
2699 int i;
2700
2701 ic->ic_flags &= ~IEEE80211_F_DROPUNENC;
2702 for (i = 0; i < IEEE80211_WEP_NKID; ++i) {
2703 struct ieee80211_key *wk = &ic->ic_nw_keys[i];
2704
2705 if (wk->wk_keylen == 0)
2706 continue;
2707 if (wk->wk_flags & IEEE80211_KEY_XMIT)
2708 wk->wk_flags |= IEEE80211_KEY_SWCRYPT;
2709 }
2710 }
2711
2712 sc->sc_avgrssi = -1;
2713
2714 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2715 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2716 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2717 } else {
2718 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2719 }
2720 #undef N
2721 }
2722
2723 void
2724 rt2560_stop(void *priv)
2725 {
2726 struct rt2560_softc *sc = priv;
2727 struct ieee80211com *ic = &sc->sc_ic;
2728 struct ifnet *ifp = ic->ic_ifp;
2729
2730 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2731
2732 sc->sc_tx_timer = 0;
2733 ifp->if_timer = 0;
2734 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2735
2736 /* abort Tx */
2737 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2738
2739 /* disable Rx */
2740 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2741
2742 /* reset ASIC (imply reset BBP) */
2743 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2744 RAL_WRITE(sc, RT2560_CSR1, 0);
2745
2746 /* disable interrupts */
2747 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2748
2749 /* reset Tx and Rx rings */
2750 rt2560_reset_tx_ring(sc, &sc->txq);
2751 rt2560_reset_tx_ring(sc, &sc->atimq);
2752 rt2560_reset_tx_ring(sc, &sc->prioq);
2753 rt2560_reset_tx_ring(sc, &sc->bcnq);
2754 rt2560_reset_rx_ring(sc, &sc->rxq);
2755 }
2756
2757 static void
2758 rt2560_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2759 bus_size_t map_size __unused, int error)
2760 {
2761 if (error)
2762 return;
2763
2764 KASSERT(nseg == 1, ("too many dma segments\n"));
2765 *((bus_addr_t *)arg) = seg->ds_addr;
2766 }
2767
2768 static void *
2769 rt2560_ratectl_attach(struct ieee80211com *ic, u_int rc)
2770 {
2771 struct rt2560_softc *sc = ic->ic_if.if_softc;
2772
2773 switch (rc) {
2774 case IEEE80211_RATECTL_SAMPLE:
2775 return &sc->sc_sample_param;
2776 case IEEE80211_RATECTL_ONOE:
2777 return &sc->sc_onoe_param;
2778 case IEEE80211_RATECTL_NONE:
2779 /* This could only happen during detaching */
2780 return NULL;
2781 default:
2782 panic("unknown rate control algo %u\n", rc);
2783 return NULL;
2784 }
2785 }
2786
2787 static void
2788 rt2560_calib_rxsensitivity(struct rt2560_softc *sc, uint32_t false_cca)
2789 {
2790 #define MID_RX_SENSITIVITY 0x41
2791
2792 int rssi_dbm;
2793
2794 if (sc->sc_ic.ic_state != IEEE80211_S_RUN)
2795 return;
2796
2797 rssi_dbm = sc->sc_avgrssi + RT2560_NOISE_FLOOR;
2798 DPRINTF(("rssi dbm %d\n", rssi_dbm));
2799
2800 if (rssi_dbm < -80) {
2801 /* Signal is too weak */
2802 return;
2803 } else if (rssi_dbm >= -74) {
2804 uint8_t bbp17;
2805
2806 if (rssi_dbm >= -58)
2807 bbp17 = RT2560_RXSNS_MAX;
2808 else
2809 bbp17 = MID_RX_SENSITIVITY;
2810 if (sc->sc_bbp17 != bbp17)
2811 rt2560_bbp_write(sc, 17, bbp17);
2812 return;
2813 }
2814
2815 if (sc->sc_bbp17 > MID_RX_SENSITIVITY) {
2816 rt2560_bbp_write(sc, 17, MID_RX_SENSITIVITY);
2817 return;
2818 }
2819
2820 if (false_cca > 512 && sc->sc_bbp17 > sc->sc_bbp17_dynmin)
2821 rt2560_bbp_write(sc, 17, sc->sc_bbp17 - 1);
2822 else if (false_cca < 100 && sc->sc_bbp17 < sc->sc_bbp17_dynmax)
2823 rt2560_bbp_write(sc, 17, sc->sc_bbp17 + 1);
2824
2825 #undef MID_RX_SENSITIVITY
2826 }
2827
2828 static void
2829 rt2560_calibrate(void *xsc)
2830 {
2831 struct rt2560_softc *sc = xsc;
2832 struct ifnet *ifp = &sc->sc_ic.ic_if;
2833 uint32_t false_cca;
2834
2835 lwkt_serialize_enter(ifp->if_serializer);
2836
2837 false_cca = RAL_READ(sc, RT2560_CNT3) & 0xffff;
2838 DPRINTF(("false CCA %u\n", false_cca));
2839
2840 if (sc->sc_calib_rxsns)
2841 rt2560_calib_rxsensitivity(sc, false_cca);
2842
2843 callout_reset(&sc->calib_ch, hz, rt2560_calibrate, sc);
2844
2845 lwkt_serialize_exit(ifp->if_serializer);
2846 }
2847
2848 static int
2849 rt2560_sysctl_rxsns(SYSCTL_HANDLER_ARGS)
2850 {
2851 struct rt2560_softc *sc = arg1;
2852 struct ifnet *ifp = &sc->sc_ic.ic_if;
2853 int error = 0, v;
2854
2855 lwkt_serialize_enter(ifp->if_serializer);
2856
2857 v = sc->sc_rxsns;
2858 error = sysctl_handle_int(oidp, &v, 0, req);
2859 if (error || req->newptr == NULL)
2860 goto back;
2861 if (v < sc->sc_bbp17_dynmin || v > RT2560_RXSNS_MAX) {
2862 error = EINVAL;
2863 goto back;
2864 }
2865
2866 if (sc->sc_rxsns != v) {
2867 /*
2868 * Adjust bbp17 iff ral(4) is up and running (i.e. hardware
2869 * is initialized)and rx sensitivity calibration is _not_
2870 * enabled.
2871 */
2872 if ((ifp->if_flags & IFF_RUNNING) && !sc->sc_calib_rxsns)
2873 rt2560_bbp_write(sc, 17, v);
2874 sc->sc_rxsns = v;
2875 }
2876 back:
2877 lwkt_serialize_exit(ifp->if_serializer);
2878 return error;
2879 }
Port diff from OpenBSD to DragonFly