?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Release serializer around firmware_load_image() to avoid possible dead
[dfdiff.git] / sys / dev / netif / bwi / bwimac.c
blob04b87a28fa99b9a6ad7d623a88d2c1936e1f3c92
1 /*
2 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * $DragonFly: src/sys/dev/netif/bwi/bwimac.c,v 1.12 2008/02/14 12:53:51 sephe Exp $
35 */
36
37 #include <sys/param.h>
38 #include <sys/bitops.h>
39 #include <sys/endian.h>
40 #include <sys/kernel.h>
41 #include <sys/bus.h>
42 #include <sys/firmware.h>
43 #include <sys/malloc.h>
44 #include <sys/proc.h>
45 #include <sys/rman.h>
46 #include <sys/serialize.h>
47 #include <sys/socket.h>
48 #include <sys/sockio.h>
49 #include <sys/sysctl.h>
50
51 #include <net/ethernet.h>
52 #include <net/if.h>
53 #include <net/bpf.h>
54 #include <net/if_arp.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/ifq_var.h>
58
59 #include <netproto/802_11/ieee80211_radiotap.h>
60 #include <netproto/802_11/ieee80211_var.h>
61 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
62
63 #include <bus/pci/pcireg.h>
64 #include <bus/pci/pcivar.h>
65 #include <bus/pci/pcidevs.h>
66
67 #include <dev/netif/bwi/if_bwireg.h>
68 #include <dev/netif/bwi/if_bwivar.h>
69 #include <dev/netif/bwi/bwiphy.h>
70 #include <dev/netif/bwi/bwirf.h>
71 #include <dev/netif/bwi/bwimac.h>
72
73 struct bwi_retry_lim {
74 uint16_t shretry;
75 uint16_t shretry_fb;
76 uint16_t lgretry;
77 uint16_t lgretry_fb;
78 };
79
80 static int bwi_mac_test(struct bwi_mac *);
81 static int bwi_mac_get_property(struct bwi_mac *);
82
83 static void bwi_mac_set_retry_lim(struct bwi_mac *,
84 const struct bwi_retry_lim *);
85 static void bwi_mac_set_ackrates(struct bwi_mac *,
86 const struct ieee80211_rateset *);
87
88 static int bwi_mac_gpio_init(struct bwi_mac *);
89 static int bwi_mac_gpio_fini(struct bwi_mac *);
90 static void bwi_mac_opmode_init(struct bwi_mac *);
91 static void bwi_mac_hostflags_init(struct bwi_mac *);
92 static void bwi_mac_bss_param_init(struct bwi_mac *);
93
94 static int bwi_mac_fw_alloc(struct bwi_mac *);
95 static void bwi_mac_fw_free(struct bwi_mac *);
96 static int bwi_mac_fw_load(struct bwi_mac *);
97 static int bwi_mac_fw_init(struct bwi_mac *);
98 static int bwi_mac_fw_load_iv(struct bwi_mac *, const struct fw_image *);
99
100 static void bwi_mac_setup_tpctl(struct bwi_mac *);
101 static void bwi_mac_adjust_tpctl(struct bwi_mac *, int, int);
102
103 static void bwi_mac_lock(struct bwi_mac *);
104 static void bwi_mac_unlock(struct bwi_mac *);
105
106 static const uint8_t bwi_sup_macrev[] = { 2, 4, 5, 6, 7, 9, 10 };
107
108 void
109 bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val)
110 {
111 struct bwi_softc *sc = mac->mac_sc;
112
113 if (mac->mac_flags & BWI_MAC_F_BSWAP)
114 val = bswap32(val);
115
116 CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs);
117 CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
118 }
119
120 void
121 bwi_hostflags_write(struct bwi_mac *mac, uint64_t flags)
122 {
123 uint64_t val;
124
125 val = flags & 0xffff;
126 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val);
127
128 val = (flags >> 16) & 0xffff;
129 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val);
130
131 /* HI has unclear meaning, so leave it as it is */
132 }
133
134 uint64_t
135 bwi_hostflags_read(struct bwi_mac *mac)
136 {
137 uint64_t flags, val;
138
139 /* HI has unclear meaning, so don't touch it */
140 flags = 0;
141
142 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI);
143 flags |= val << 16;
144
145 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO);
146 flags |= val;
147
148 return flags;
149 }
150
151 uint16_t
152 bwi_memobj_read_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
153 {
154 struct bwi_softc *sc = mac->mac_sc;
155 uint32_t data_reg;
156 int ofs;
157
158 data_reg = BWI_MOBJ_DATA;
159 ofs = ofs0 / 4;
160
161 if (ofs0 % 4 != 0)
162 data_reg = BWI_MOBJ_DATA_UNALIGN;
163
164 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
165 return CSR_READ_2(sc, data_reg);
166 }
167
168 uint32_t
169 bwi_memobj_read_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
170 {
171 struct bwi_softc *sc = mac->mac_sc;
172 int ofs;
173
174 ofs = ofs0 / 4;
175 if (ofs0 % 4 != 0) {
176 uint32_t ret;
177
178 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
179 ret = CSR_READ_2(sc, BWI_MOBJ_DATA_UNALIGN);
180 ret <<= 16;
181
182 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
183 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
184 ret |= CSR_READ_2(sc, BWI_MOBJ_DATA);
185
186 return ret;
187 } else {
188 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
189 return CSR_READ_4(sc, BWI_MOBJ_DATA);
190 }
191 }
192
193 void
194 bwi_memobj_write_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
195 uint16_t v)
196 {
197 struct bwi_softc *sc = mac->mac_sc;
198 uint32_t data_reg;
199 int ofs;
200
201 data_reg = BWI_MOBJ_DATA;
202 ofs = ofs0 / 4;
203
204 if (ofs0 % 4 != 0)
205 data_reg = BWI_MOBJ_DATA_UNALIGN;
206
207 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
208 CSR_WRITE_2(sc, data_reg, v);
209 }
210
211 void
212 bwi_memobj_write_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
213 uint32_t v)
214 {
215 struct bwi_softc *sc = mac->mac_sc;
216 int ofs;
217
218 ofs = ofs0 / 4;
219 if (ofs0 % 4 != 0) {
220 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
221 CSR_WRITE_2(sc, BWI_MOBJ_DATA_UNALIGN, v >> 16);
222
223 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
224 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
225 CSR_WRITE_2(sc, BWI_MOBJ_DATA, v & 0xffff);
226 } else {
227 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
228 CSR_WRITE_4(sc, BWI_MOBJ_DATA, v);
229 }
230 }
231
232 int
233 bwi_mac_lateattach(struct bwi_mac *mac)
234 {
235 int error;
236
237 if (mac->mac_rev >= 5)
238 CSR_READ_4(mac->mac_sc, BWI_STATE_HI); /* dummy read */
239
240 bwi_mac_reset(mac, 1);
241
242 error = bwi_phy_attach(mac);
243 if (error)
244 return error;
245
246 error = bwi_rf_attach(mac);
247 if (error)
248 return error;
249
250 /* Link 11B/G PHY, unlink 11A PHY */
251 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A)
252 bwi_mac_reset(mac, 0);
253 else
254 bwi_mac_reset(mac, 1);
255
256 error = bwi_mac_test(mac);
257 if (error)
258 return error;
259
260 error = bwi_mac_get_property(mac);
261 if (error)
262 return error;
263
264 error = bwi_rf_map_txpower(mac);
265 if (error)
266 return error;
267
268 bwi_rf_off(mac);
269 CSR_WRITE_2(mac->mac_sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
270 bwi_regwin_disable(mac->mac_sc, &mac->mac_regwin, 0);
271
272 return 0;
273 }
274
275 int
276 bwi_mac_init(struct bwi_mac *mac)
277 {
278 struct bwi_softc *sc = mac->mac_sc;
279 int error, i;
280
281 /* Clear MAC/PHY/RF states */
282 bwi_mac_setup_tpctl(mac);
283 bwi_rf_clear_state(&mac->mac_rf);
284 bwi_phy_clear_state(&mac->mac_phy);
285
286 /* Enable MAC and linked it to PHY */
287 if (!bwi_regwin_is_enabled(sc, &mac->mac_regwin))
288 bwi_mac_reset(mac, 1);
289
290 /* Initialize backplane */
291 error = bwi_bus_init(sc, mac);
292 if (error)
293 return error;
294
295 /* XXX work around for hardware bugs? */
296 if (sc->sc_bus_regwin.rw_rev <= 5 &&
297 sc->sc_bus_regwin.rw_type != BWI_REGWIN_T_BUSPCIE) {
298 CSR_SETBITS_4(sc, BWI_CONF_LO,
299 __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
300 __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
301 }
302
303 /* Calibrate PHY */
304 error = bwi_phy_calibrate(mac);
305 if (error) {
306 if_printf(&sc->sc_ic.ic_if, "PHY calibrate failed\n");
307 return error;
308 }
309
310 /* Prepare to initialize firmware */
311 CSR_WRITE_4(sc, BWI_MAC_STATUS,
312 BWI_MAC_STATUS_UCODE_JUMP0 |
313 BWI_MAC_STATUS_IHREN);
314
315 /*
316 * Load and initialize firmwares
317 */
318 error = bwi_mac_fw_alloc(mac);
319 if (error)
320 return error;
321
322 error = bwi_mac_fw_load(mac);
323 if (error)
324 return error;
325
326 error = bwi_mac_gpio_init(mac);
327 if (error)
328 return error;
329
330 error = bwi_mac_fw_init(mac);
331 if (error)
332 return error;
333
334 /*
335 * Turn on RF
336 */
337 bwi_rf_on(mac);
338
339 /* TODO: LED, hardware rf enabled is only related to LED setting */
340
341 /*
342 * Initialize PHY
343 */
344 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
345 bwi_phy_init(mac);
346
347 /* TODO: interference mitigation */
348
349 /*
350 * Setup antenna mode
351 */
352 bwi_rf_set_ant_mode(mac, mac->mac_rf.rf_ant_mode);
353
354 /*
355 * Initialize operation mode (RX configuration)
356 */
357 bwi_mac_opmode_init(mac);
358
359 /* XXX what's these */
360 if (mac->mac_rev < 3) {
361 CSR_WRITE_2(sc, 0x60e, 0);
362 CSR_WRITE_2(sc, 0x610, 0x8000);
363 CSR_WRITE_2(sc, 0x604, 0);
364 CSR_WRITE_2(sc, 0x606, 0x200);
365 } else {
366 CSR_WRITE_4(sc, 0x188, 0x80000000);
367 CSR_WRITE_4(sc, 0x18c, 0x2000000);
368 }
369
370 /*
371 * Initialize TX/RX interrupts' mask
372 */
373 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_TIMER1);
374 for (i = 0; i < BWI_TXRX_NRING; ++i) {
375 uint32_t intrs;
376
377 if (BWI_TXRX_IS_RX(i))
378 intrs = BWI_TXRX_RX_INTRS;
379 else
380 intrs = BWI_TXRX_TX_INTRS;
381 CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
382 }
383
384 /* XXX what's this */
385 CSR_SETBITS_4(sc, BWI_STATE_LO, 0x100000);
386
387 /* Setup MAC power up delay */
388 CSR_WRITE_2(sc, BWI_MAC_POWERUP_DELAY, sc->sc_pwron_delay);
389
390 /* Set MAC regwin revision */
391 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_MACREV, mac->mac_rev);
392
393 /*
394 * Initialize host flags
395 */
396 bwi_mac_hostflags_init(mac);
397
398 /*
399 * Initialize BSS parameters
400 */
401 bwi_mac_bss_param_init(mac);
402
403 /*
404 * Initialize TX rings
405 */
406 for (i = 0; i < BWI_TX_NRING; ++i) {
407 error = sc->sc_init_tx_ring(sc, i);
408 if (error) {
409 if_printf(&sc->sc_ic.ic_if,
410 "can't initialize %dth TX ring\n", i);
411 return error;
412 }
413 }
414
415 /*
416 * Initialize RX ring
417 */
418 error = sc->sc_init_rx_ring(sc);
419 if (error) {
420 if_printf(&sc->sc_ic.ic_if, "can't initialize RX ring\n");
421 return error;
422 }
423
424 /*
425 * Initialize TX stats if the current MAC uses that
426 */
427 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) {
428 error = sc->sc_init_txstats(sc);
429 if (error) {
430 if_printf(&sc->sc_ic.ic_if,
431 "can't initialize TX stats ring\n");
432 return error;
433 }
434 }
435
436 /* XXX what's these */
437 CSR_WRITE_2(sc, 0x612, 0x50); /* Force Pre-TBTT to 80? */
438 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x416, 0x50);
439 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x414, 0x1f4);
440
441 mac->mac_flags |= BWI_MAC_F_INITED;
442 return 0;
443 }
444
445 void
446 bwi_mac_reset(struct bwi_mac *mac, int link_phy)
447 {
448 struct bwi_softc *sc = mac->mac_sc;
449 uint32_t flags, state_lo, status;
450
451 flags = BWI_STATE_LO_FLAG_PHYRST | BWI_STATE_LO_FLAG_PHYCLKEN;
452 if (link_phy)
453 flags |= BWI_STATE_LO_FLAG_PHYLNK;
454 bwi_regwin_enable(sc, &mac->mac_regwin, flags);
455 DELAY(2000);
456
457 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
458 state_lo |= BWI_STATE_LO_GATED_CLOCK;
459 state_lo &= ~__SHIFTIN(BWI_STATE_LO_FLAG_PHYRST,
460 BWI_STATE_LO_FLAGS_MASK);
461 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
462 /* Flush pending bus write */
463 CSR_READ_4(sc, BWI_STATE_LO);
464 DELAY(1000);
465
466 state_lo &= ~BWI_STATE_LO_GATED_CLOCK;
467 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
468 /* Flush pending bus write */
469 CSR_READ_4(sc, BWI_STATE_LO);
470 DELAY(1000);
471
472 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
473
474 status = CSR_READ_4(sc, BWI_MAC_STATUS);
475 status |= BWI_MAC_STATUS_IHREN;
476 if (link_phy)
477 status |= BWI_MAC_STATUS_PHYLNK;
478 else
479 status &= ~BWI_MAC_STATUS_PHYLNK;
480 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
481
482 if (link_phy) {
483 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
484 "%s\n", "PHY is linked");
485 mac->mac_phy.phy_flags |= BWI_PHY_F_LINKED;
486 } else {
487 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
488 "%s\n", "PHY is unlinked");
489 mac->mac_phy.phy_flags &= ~BWI_PHY_F_LINKED;
490 }
491 }
492
493 void
494 bwi_mac_set_tpctl_11bg(struct bwi_mac *mac, const struct bwi_tpctl *new_tpctl)
495 {
496 struct bwi_rf *rf = &mac->mac_rf;
497 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
498
499 if (new_tpctl != NULL) {
500 KKASSERT(new_tpctl->bbp_atten <= BWI_BBP_ATTEN_MAX);
501 KKASSERT(new_tpctl->rf_atten <=
502 (rf->rf_rev < 6 ? BWI_RF_ATTEN_MAX0
503 : BWI_RF_ATTEN_MAX1));
504 KKASSERT(new_tpctl->tp_ctrl1 <= BWI_TPCTL1_MAX);
505
506 tpctl->bbp_atten = new_tpctl->bbp_atten;
507 tpctl->rf_atten = new_tpctl->rf_atten;
508 tpctl->tp_ctrl1 = new_tpctl->tp_ctrl1;
509 }
510
511 /* Set BBP attenuation */
512 bwi_phy_set_bbp_atten(mac, tpctl->bbp_atten);
513
514 /* Set RF attenuation */
515 RF_WRITE(mac, BWI_RFR_ATTEN, tpctl->rf_atten);
516 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_RF_ATTEN,
517 tpctl->rf_atten);
518
519 /* Set TX power */
520 if (rf->rf_type == BWI_RF_T_BCM2050) {
521 RF_FILT_SETBITS(mac, BWI_RFR_TXPWR, ~BWI_RFR_TXPWR1_MASK,
522 __SHIFTIN(tpctl->tp_ctrl1, BWI_RFR_TXPWR1_MASK));
523 }
524
525 /* Adjust RF Local Oscillator */
526 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
527 bwi_rf_lo_adjust(mac, tpctl);
528 }
529
530 static int
531 bwi_mac_test(struct bwi_mac *mac)
532 {
533 struct bwi_softc *sc = mac->mac_sc;
534 uint32_t orig_val, val;
535
536 #define TEST_VAL1 0xaa5555aa
537 #define TEST_VAL2 0x55aaaa55
538
539 /* Save it for later restoring */
540 orig_val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
541
542 /* Test 1 */
543 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL1);
544 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
545 if (val != TEST_VAL1) {
546 device_printf(sc->sc_dev, "TEST1 failed\n");
547 return ENXIO;
548 }
549
550 /* Test 2 */
551 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL2);
552 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
553 if (val != TEST_VAL2) {
554 device_printf(sc->sc_dev, "TEST2 failed\n");
555 return ENXIO;
556 }
557
558 /* Restore to the original value */
559 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, orig_val);
560
561 val = CSR_READ_4(sc, BWI_MAC_STATUS);
562 if ((val & ~BWI_MAC_STATUS_PHYLNK) != BWI_MAC_STATUS_IHREN) {
563 device_printf(sc->sc_dev, "%s failed, MAC status 0x%08x\n",
564 __func__, val);
565 return ENXIO;
566 }
567
568 val = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
569 if (val != 0) {
570 device_printf(sc->sc_dev, "%s failed, intr status %08x\n",
571 __func__, val);
572 return ENXIO;
573 }
574
575 #undef TEST_VAL2
576 #undef TEST_VAL1
577
578 return 0;
579 }
580
581 static void
582 bwi_mac_setup_tpctl(struct bwi_mac *mac)
583 {
584 struct bwi_softc *sc = mac->mac_sc;
585 struct bwi_rf *rf = &mac->mac_rf;
586 struct bwi_phy *phy = &mac->mac_phy;
587 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
588
589 /* Calc BBP attenuation */
590 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev < 6)
591 tpctl->bbp_atten = 0;
592 else
593 tpctl->bbp_atten = 2;
594
595 /* Calc TX power CTRL1?? */
596 tpctl->tp_ctrl1 = 0;
597 if (rf->rf_type == BWI_RF_T_BCM2050) {
598 if (rf->rf_rev == 1)
599 tpctl->tp_ctrl1 = 3;
600 else if (rf->rf_rev < 6)
601 tpctl->tp_ctrl1 = 2;
602 else if (rf->rf_rev == 8)
603 tpctl->tp_ctrl1 = 1;
604 }
605
606 /* Empty TX power CTRL2?? */
607 tpctl->tp_ctrl2 = 0xffff;
608
609 /*
610 * Calc RF attenuation
611 */
612 if (phy->phy_mode == IEEE80211_MODE_11A) {
613 tpctl->rf_atten = 0x60;
614 goto back;
615 }
616
617 if (BWI_IS_BRCM_BCM4309G(sc) && sc->sc_pci_revid < 0x51) {
618 tpctl->rf_atten = sc->sc_pci_revid < 0x43 ? 2 : 3;
619 goto back;
620 }
621
622 tpctl->rf_atten = 5;
623
624 if (rf->rf_type != BWI_RF_T_BCM2050) {
625 if (rf->rf_type == BWI_RF_T_BCM2053 && rf->rf_rev == 1)
626 tpctl->rf_atten = 6;
627 goto back;
628 }
629
630 /*
631 * NB: If we reaches here and the card is BRCM_BCM4309G,
632 * then the card's PCI revision must >= 0x51
633 */
634
635 /* BCM2050 RF */
636 switch (rf->rf_rev) {
637 case 1:
638 if (phy->phy_mode == IEEE80211_MODE_11G) {
639 if (BWI_IS_BRCM_BCM4309G(sc) || BWI_IS_BRCM_BU4306(sc))
640 tpctl->rf_atten = 3;
641 else
642 tpctl->rf_atten = 1;
643 } else {
644 if (BWI_IS_BRCM_BCM4309G(sc))
645 tpctl->rf_atten = 7;
646 else
647 tpctl->rf_atten = 6;
648 }
649 break;
650 case 2:
651 if (phy->phy_mode == IEEE80211_MODE_11G) {
652 /*
653 * NOTE: Order of following conditions is critical
654 */
655 if (BWI_IS_BRCM_BCM4309G(sc))
656 tpctl->rf_atten = 3;
657 else if (BWI_IS_BRCM_BU4306(sc))
658 tpctl->rf_atten = 5;
659 else if (sc->sc_bbp_id == BWI_BBPID_BCM4320)
660 tpctl->rf_atten = 4;
661 else
662 tpctl->rf_atten = 3;
663 } else {
664 tpctl->rf_atten = 6;
665 }
666 break;
667 case 4:
668 case 5:
669 tpctl->rf_atten = 1;
670 break;
671 case 8:
672 tpctl->rf_atten = 0x1a;
673 break;
674 }
675 back:
676 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
677 "bbp atten: %u, rf atten: %u, ctrl1: %u, ctrl2: %u\n",
678 tpctl->bbp_atten, tpctl->rf_atten,
679 tpctl->tp_ctrl1, tpctl->tp_ctrl2);
680 }
681
682 void
683 bwi_mac_dummy_xmit(struct bwi_mac *mac)
684 {
685 #define PACKET_LEN 5
686 static const uint32_t packet_11a[PACKET_LEN] =
687 { 0x000201cc, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
688 static const uint32_t packet_11bg[PACKET_LEN] =
689 { 0x000b846e, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
690
691 struct bwi_softc *sc = mac->mac_sc;
692 struct bwi_rf *rf = &mac->mac_rf;
693 const uint32_t *packet;
694 uint16_t val_50c;
695 int wait_max, i;
696
697 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A) {
698 wait_max = 30;
699 packet = packet_11a;
700 val_50c = 1;
701 } else {
702 wait_max = 250;
703 packet = packet_11bg;
704 val_50c = 0;
705 }
706
707 for (i = 0; i < PACKET_LEN; ++i)
708 TMPLT_WRITE_4(mac, i * 4, packet[i]);
709
710 CSR_READ_4(sc, BWI_MAC_STATUS); /* dummy read */
711
712 CSR_WRITE_2(sc, 0x568, 0);
713 CSR_WRITE_2(sc, 0x7c0, 0);
714 CSR_WRITE_2(sc, 0x50c, val_50c);
715 CSR_WRITE_2(sc, 0x508, 0);
716 CSR_WRITE_2(sc, 0x50a, 0);
717 CSR_WRITE_2(sc, 0x54c, 0);
718 CSR_WRITE_2(sc, 0x56a, 0x14);
719 CSR_WRITE_2(sc, 0x568, 0x826);
720 CSR_WRITE_2(sc, 0x500, 0);
721 CSR_WRITE_2(sc, 0x502, 0x30);
722
723 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
724 RF_WRITE(mac, 0x51, 0x17);
725
726 for (i = 0; i < wait_max; ++i) {
727 if (CSR_READ_2(sc, 0x50e) & 0x80)
728 break;
729 DELAY(10);
730 }
731 for (i = 0; i < 10; ++i) {
732 if (CSR_READ_2(sc, 0x50e) & 0x400)
733 break;
734 DELAY(10);
735 }
736 for (i = 0; i < 10; ++i) {
737 if ((CSR_READ_2(sc, 0x690) & 0x100) == 0)
738 break;
739 DELAY(10);
740 }
741
742 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
743 RF_WRITE(mac, 0x51, 0x37);
744 #undef PACKET_LEN
745 }
746
747 void
748 bwi_mac_init_tpctl_11bg(struct bwi_mac *mac)
749 {
750 struct bwi_softc *sc = mac->mac_sc;
751 struct bwi_phy *phy = &mac->mac_phy;
752 struct bwi_rf *rf = &mac->mac_rf;
753 struct bwi_tpctl tpctl_orig;
754 int restore_tpctl = 0;
755
756 KKASSERT(phy->phy_mode != IEEE80211_MODE_11A);
757
758 if (BWI_IS_BRCM_BU4306(sc))
759 return;
760
761 PHY_WRITE(mac, 0x28, 0x8018);
762 CSR_CLRBITS_2(sc, BWI_BBP_ATTEN, 0x20);
763
764 if (phy->phy_mode == IEEE80211_MODE_11G) {
765 if ((phy->phy_flags & BWI_PHY_F_LINKED) == 0)
766 return;
767 PHY_WRITE(mac, 0x47a, 0xc111);
768 }
769 if (mac->mac_flags & BWI_MAC_F_TPCTL_INITED)
770 return;
771
772 if (phy->phy_mode == IEEE80211_MODE_11B && phy->phy_rev >= 2 &&
773 rf->rf_type == BWI_RF_T_BCM2050) {
774 RF_SETBITS(mac, 0x76, 0x84);
775 } else {
776 struct bwi_tpctl tpctl;
777
778 /* Backup original TX power control variables */
779 bcopy(&mac->mac_tpctl, &tpctl_orig, sizeof(tpctl_orig));
780 restore_tpctl = 1;
781
782 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
783 tpctl.bbp_atten = 11;
784 tpctl.tp_ctrl1 = 0;
785 #ifdef notyet
786 if (rf->rf_rev >= 6 && rf->rf_rev <= 8)
787 tpctl.rf_atten = 31;
788 else
789 #endif
790 tpctl.rf_atten = 9;
791
792 bwi_mac_set_tpctl_11bg(mac, &tpctl);
793 }
794
795 bwi_mac_dummy_xmit(mac);
796
797 mac->mac_flags |= BWI_MAC_F_TPCTL_INITED;
798 rf->rf_base_tssi = PHY_READ(mac, 0x29);
799 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
800 "base tssi %d\n", rf->rf_base_tssi);
801
802 if (abs(rf->rf_base_tssi - rf->rf_idle_tssi) >= 20) {
803 if_printf(&sc->sc_ic.ic_if, "base tssi measure failed\n");
804 mac->mac_flags |= BWI_MAC_F_TPCTL_ERROR;
805 }
806
807 if (restore_tpctl)
808 bwi_mac_set_tpctl_11bg(mac, &tpctl_orig);
809 else
810 RF_CLRBITS(mac, 0x76, 0x84);
811
812 bwi_rf_clear_tssi(mac);
813 }
814
815 void
816 bwi_mac_detach(struct bwi_mac *mac)
817 {
818 bwi_mac_fw_free(mac);
819 }
820
821 static __inline int
822 bwi_fwimage_is_valid(struct bwi_softc *sc, const struct fw_image *fw,
823 uint8_t fw_type)
824 {
825 const struct bwi_fwhdr *hdr;
826 struct ifnet *ifp = &sc->sc_ic.ic_if;
827
828 if (fw->fw_imglen < sizeof(*hdr)) {
829 if_printf(ifp, "invalid firmware (%s): invalid size %u\n",
830 fw->fw_name, fw->fw_imglen);
831 return 0;
832 }
833
834 hdr = (const struct bwi_fwhdr *)fw->fw_image;
835
836 if (fw_type != BWI_FW_T_IV) {
837 /*
838 * Don't verify IV's size, it has different meaning
839 */
840 if (be32toh(hdr->fw_size) != fw->fw_imglen - sizeof(*hdr)) {
841 if_printf(ifp, "invalid firmware (%s): size mismatch, "
842 "fw %u, real %u\n", fw->fw_name,
843 be32toh(hdr->fw_size),
844 fw->fw_imglen - sizeof(*hdr));
845 return 0;
846 }
847 }
848
849 if (hdr->fw_type != fw_type) {
850 if_printf(ifp, "invalid firmware (%s): type mismatch, "
851 "fw \'%c\', target \'%c\'\n", fw->fw_name,
852 hdr->fw_type, fw_type);
853 return 0;
854 }
855
856 if (hdr->fw_gen != BWI_FW_GEN_1) {
857 if_printf(ifp, "invalid firmware (%s): wrong generation, "
858 "fw %d, target %d\n", fw->fw_name,
859 hdr->fw_gen, BWI_FW_GEN_1);
860 return 0;
861 }
862 return 1;
863 }
864
865 /*
866 * XXX Error cleanup
867 */
868 static int
869 bwi_mac_fw_alloc(struct bwi_mac *mac)
870 {
871 struct bwi_softc *sc = mac->mac_sc;
872 struct ifnet *ifp = &sc->sc_ic.ic_if;
873 struct fw_image *img;
874 char fwname[64];
875 int idx;
876
877 /*
878 * NB: serializer need to be released before loading firmware
879 * image to avoid possible dead lock
880 */
881 ASSERT_SERIALIZED(ifp->if_serializer);
882
883 if (mac->mac_ucode == NULL) {
884 ksnprintf(fwname, sizeof(fwname), BWI_FW_UCODE_PATH,
885 sc->sc_fw_version,
886 mac->mac_rev >= 5 ? 5 : mac->mac_rev);
887
888 lwkt_serialize_exit(ifp->if_serializer);
889 img = firmware_image_load(fwname, NULL);
890 lwkt_serialize_enter(ifp->if_serializer);
891
892 mac->mac_ucode = img;
893 if (mac->mac_ucode == NULL) {
894 if_printf(ifp, "request firmware %s failed\n", fwname);
895 return ENOMEM;
896 }
897
898 if (!bwi_fwimage_is_valid(sc, mac->mac_ucode, BWI_FW_T_UCODE))
899 return EINVAL;
900 }
901
902 if (mac->mac_pcm == NULL) {
903 ksnprintf(fwname, sizeof(fwname), BWI_FW_PCM_PATH,
904 sc->sc_fw_version,
905 mac->mac_rev < 5 ? 4 : 5);
906
907 lwkt_serialize_exit(ifp->if_serializer);
908 img = firmware_image_load(fwname, NULL);
909 lwkt_serialize_enter(ifp->if_serializer);
910
911 mac->mac_pcm = img;
912 if (mac->mac_pcm == NULL) {
913 if_printf(ifp, "request firmware %s failed\n", fwname);
914 return ENOMEM;
915 }
916
917 if (!bwi_fwimage_is_valid(sc, mac->mac_pcm, BWI_FW_T_PCM))
918 return EINVAL;
919 }
920
921 if (mac->mac_iv == NULL) {
922 /* TODO: 11A */
923 if (mac->mac_rev == 2 || mac->mac_rev == 4) {
924 idx = 2;
925 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
926 idx = 5;
927 } else {
928 if_printf(ifp, "no suitable IV for MAC rev %d\n",
929 mac->mac_rev);
930 return ENODEV;
931 }
932
933 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_PATH,
934 sc->sc_fw_version, idx);
935
936 lwkt_serialize_exit(ifp->if_serializer);
937 img = firmware_image_load(fwname, NULL);
938 lwkt_serialize_enter(ifp->if_serializer);
939
940 mac->mac_iv = img;
941 if (mac->mac_iv == NULL) {
942 if_printf(ifp, "request firmware %s failed\n", fwname);
943 return ENOMEM;
944 }
945 if (!bwi_fwimage_is_valid(sc, mac->mac_iv, BWI_FW_T_IV))
946 return EINVAL;
947 }
948
949 if (mac->mac_iv_ext == NULL) {
950 /* TODO: 11A */
951 if (mac->mac_rev == 2 || mac->mac_rev == 4 ||
952 mac->mac_rev >= 11) {
953 /* No extended IV */
954 goto back;
955 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
956 idx = 5;
957 } else {
958 if_printf(ifp, "no suitible ExtIV for MAC rev %d\n",
959 mac->mac_rev);
960 return ENODEV;
961 }
962
963 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_EXT_PATH,
964 sc->sc_fw_version, idx);
965
966 lwkt_serialize_exit(ifp->if_serializer);
967 img = firmware_image_load(fwname, NULL);
968 lwkt_serialize_enter(ifp->if_serializer);
969
970 mac->mac_iv_ext = img;
971 if (mac->mac_iv_ext == NULL) {
972 if_printf(ifp, "request firmware %s failed\n", fwname);
973 return ENOMEM;
974 }
975 if (!bwi_fwimage_is_valid(sc, mac->mac_iv_ext, BWI_FW_T_IV))
976 return EINVAL;
977 }
978 back:
979 return 0;
980 }
981
982 static void
983 bwi_mac_fw_free(struct bwi_mac *mac)
984 {
985 if (mac->mac_ucode != NULL) {
986 firmware_image_unload(mac->mac_ucode);
987 mac->mac_ucode = NULL;
988 }
989
990 if (mac->mac_pcm != NULL) {
991 firmware_image_unload(mac->mac_pcm);
992 mac->mac_pcm = NULL;
993 }
994
995 if (mac->mac_iv != NULL) {
996 firmware_image_unload(mac->mac_iv);
997 mac->mac_iv = NULL;
998 }
999
1000 if (mac->mac_iv_ext != NULL) {
1001 firmware_image_unload(mac->mac_iv_ext);
1002 mac->mac_iv_ext = NULL;
1003 }
1004 }
1005
1006 static int
1007 bwi_mac_fw_load(struct bwi_mac *mac)
1008 {
1009 struct bwi_softc *sc = mac->mac_sc;
1010 struct ifnet *ifp = &sc->sc_ic.ic_if;
1011 const uint32_t *fw;
1012 uint16_t fw_rev;
1013 int fw_len, i;
1014
1015 /*
1016 * Load ucode image
1017 */
1018 fw = (const uint32_t *)
1019 ((const uint8_t *)mac->mac_ucode->fw_image + BWI_FWHDR_SZ);
1020 fw_len = (mac->mac_ucode->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1021
1022 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1023 BWI_MOBJ_CTRL_VAL(
1024 BWI_FW_UCODE_MOBJ | BWI_WR_MOBJ_AUTOINC, 0));
1025 for (i = 0; i < fw_len; ++i) {
1026 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1027 DELAY(10);
1028 }
1029
1030 /*
1031 * Load PCM image
1032 */
1033 fw = (const uint32_t *)
1034 ((const uint8_t *)mac->mac_pcm->fw_image + BWI_FWHDR_SZ);
1035 fw_len = (mac->mac_pcm->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1036
1037 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1038 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01ea));
1039 CSR_WRITE_4(sc, BWI_MOBJ_DATA, 0x4000);
1040
1041 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1042 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01eb));
1043 for (i = 0; i < fw_len; ++i) {
1044 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1045 DELAY(10);
1046 }
1047
1048 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_ALL_INTRS);
1049 CSR_WRITE_4(sc, BWI_MAC_STATUS,
1050 BWI_MAC_STATUS_UCODE_START |
1051 BWI_MAC_STATUS_IHREN |
1052 BWI_MAC_STATUS_INFRA);
1053
1054 #define NRETRY 200
1055
1056 for (i = 0; i < NRETRY; ++i) {
1057 uint32_t intr_status;
1058
1059 intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1060 if (intr_status == BWI_INTR_READY)
1061 break;
1062 DELAY(10);
1063 }
1064 if (i == NRETRY) {
1065 if_printf(ifp, "firmware (ucode&pcm) loading timed out\n");
1066 return ETIMEDOUT;
1067 }
1068
1069 #undef NRETRY
1070
1071 CSR_READ_4(sc, BWI_MAC_INTR_STATUS); /* dummy read */
1072
1073 fw_rev = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWREV);
1074 if (fw_rev > BWI_FW_VERSION3_REVMAX) {
1075 if_printf(ifp, "firmware version 4 is not supported yet\n");
1076 return ENODEV;
1077 }
1078
1079 if_printf(ifp, "firmware rev 0x%04x, patch level 0x%04x\n", fw_rev,
1080 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWPATCHLV));
1081 return 0;
1082 }
1083
1084 static int
1085 bwi_mac_gpio_init(struct bwi_mac *mac)
1086 {
1087 struct bwi_softc *sc = mac->mac_sc;
1088 struct bwi_regwin *old, *gpio_rw;
1089 uint32_t filt, bits;
1090 int error;
1091
1092 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_GPOSEL_MASK);
1093 /* TODO:LED */
1094
1095 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0xf);
1096
1097 filt = 0x1f;
1098 bits = 0xf;
1099 if (sc->sc_bbp_id == BWI_BBPID_BCM4301) {
1100 filt |= 0x60;
1101 bits |= 0x60;
1102 }
1103 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1104 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0x200);
1105 filt |= 0x200;
1106 bits |= 0x200;
1107 }
1108
1109 gpio_rw = BWI_GPIO_REGWIN(sc);
1110 error = bwi_regwin_switch(sc, gpio_rw, &old);
1111 if (error)
1112 return error;
1113
1114 CSR_FILT_SETBITS_4(sc, BWI_GPIO_CTRL, filt, bits);
1115
1116 return bwi_regwin_switch(sc, old, NULL);
1117 }
1118
1119 static int
1120 bwi_mac_gpio_fini(struct bwi_mac *mac)
1121 {
1122 struct bwi_softc *sc = mac->mac_sc;
1123 struct bwi_regwin *old, *gpio_rw;
1124 int error;
1125
1126 gpio_rw = BWI_GPIO_REGWIN(sc);
1127 error = bwi_regwin_switch(sc, gpio_rw, &old);
1128 if (error)
1129 return error;
1130
1131 CSR_WRITE_4(sc, BWI_GPIO_CTRL, 0);
1132
1133 return bwi_regwin_switch(sc, old, NULL);
1134 }
1135
1136 static int
1137 bwi_mac_fw_load_iv(struct bwi_mac *mac, const struct fw_image *fw)
1138 {
1139 struct bwi_softc *sc = mac->mac_sc;
1140 struct ifnet *ifp = &sc->sc_ic.ic_if;
1141 const struct bwi_fwhdr *hdr;
1142 const struct bwi_fw_iv *iv;
1143 int n, i, iv_img_size;
1144
1145 /* Get the number of IVs in the IV image */
1146 hdr = (const struct bwi_fwhdr *)fw->fw_image;
1147 n = be32toh(hdr->fw_iv_cnt);
1148 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_FIRMWARE,
1149 "IV count %d\n", n);
1150
1151 /* Calculate the IV image size, for later sanity check */
1152 iv_img_size = fw->fw_imglen - sizeof(*hdr);
1153
1154 /* Locate the first IV */
1155 iv = (const struct bwi_fw_iv *)
1156 ((const uint8_t *)fw->fw_image + sizeof(*hdr));
1157
1158 for (i = 0; i < n; ++i) {
1159 uint16_t iv_ofs, ofs;
1160 int sz = 0;
1161
1162 if (iv_img_size < sizeof(iv->iv_ofs)) {
1163 if_printf(ifp, "invalid IV image, ofs\n");
1164 return EINVAL;
1165 }
1166 iv_img_size -= sizeof(iv->iv_ofs);
1167 sz += sizeof(iv->iv_ofs);
1168
1169 iv_ofs = be16toh(iv->iv_ofs);
1170
1171 ofs = __SHIFTOUT(iv_ofs, BWI_FW_IV_OFS_MASK);
1172 if (ofs >= 0x1000) {
1173 if_printf(ifp, "invalid ofs (0x%04x) "
1174 "for %dth iv\n", ofs, i);
1175 return EINVAL;
1176 }
1177
1178 if (iv_ofs & BWI_FW_IV_IS_32BIT) {
1179 uint32_t val32;
1180
1181 if (iv_img_size < sizeof(iv->iv_val.val32)) {
1182 if_printf(ifp, "invalid IV image, val32\n");
1183 return EINVAL;
1184 }
1185 iv_img_size -= sizeof(iv->iv_val.val32);
1186 sz += sizeof(iv->iv_val.val32);
1187
1188 val32 = be32toh(iv->iv_val.val32);
1189 CSR_WRITE_4(sc, ofs, val32);
1190 } else {
1191 uint16_t val16;
1192
1193 if (iv_img_size < sizeof(iv->iv_val.val16)) {
1194 if_printf(ifp, "invalid IV image, val16\n");
1195 return EINVAL;
1196 }
1197 iv_img_size -= sizeof(iv->iv_val.val16);
1198 sz += sizeof(iv->iv_val.val16);
1199
1200 val16 = be16toh(iv->iv_val.val16);
1201 CSR_WRITE_2(sc, ofs, val16);
1202 }
1203
1204 iv = (const struct bwi_fw_iv *)((const uint8_t *)iv + sz);
1205 }
1206
1207 if (iv_img_size != 0) {
1208 if_printf(ifp, "invalid IV image, size left %d\n", iv_img_size);
1209 return EINVAL;
1210 }
1211 return 0;
1212 }
1213
1214 static int
1215 bwi_mac_fw_init(struct bwi_mac *mac)
1216 {
1217 struct ifnet *ifp = &mac->mac_sc->sc_ic.ic_if;
1218 int error;
1219
1220 error = bwi_mac_fw_load_iv(mac, mac->mac_iv);
1221 if (error) {
1222 if_printf(ifp, "load IV failed\n");
1223 return error;
1224 }
1225
1226 if (mac->mac_iv_ext != NULL) {
1227 error = bwi_mac_fw_load_iv(mac, mac->mac_iv_ext);
1228 if (error)
1229 if_printf(ifp, "load ExtIV failed\n");
1230 }
1231 return error;
1232 }
1233
1234 static void
1235 bwi_mac_opmode_init(struct bwi_mac *mac)
1236 {
1237 struct bwi_softc *sc = mac->mac_sc;
1238 struct ieee80211com *ic = &sc->sc_ic;
1239 uint32_t mac_status;
1240 uint16_t pre_tbtt;
1241
1242 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1243 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1244 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PASS_BCN);
1245
1246 /* Set probe resp timeout to infinite */
1247 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 0);
1248
1249 /*
1250 * TODO: factor out following part
1251 */
1252
1253 mac_status = CSR_READ_4(sc, BWI_MAC_STATUS);
1254 mac_status &= ~(BWI_MAC_STATUS_OPMODE_HOSTAP |
1255 BWI_MAC_STATUS_PASS_CTL |
1256 BWI_MAC_STATUS_PASS_BADPLCP |
1257 BWI_MAC_STATUS_PASS_BADFCS |
1258 BWI_MAC_STATUS_PROMISC);
1259 mac_status |= BWI_MAC_STATUS_INFRA;
1260
1261 /* Always turn on PROMISC on old hardware */
1262 if (mac->mac_rev < 5)
1263 mac_status |= BWI_MAC_STATUS_PROMISC;
1264
1265 switch (ic->ic_opmode) {
1266 case IEEE80211_M_IBSS:
1267 mac_status &= ~BWI_MAC_STATUS_INFRA;
1268 break;
1269 case IEEE80211_M_HOSTAP:
1270 mac_status |= BWI_MAC_STATUS_OPMODE_HOSTAP;
1271 break;
1272 case IEEE80211_M_MONITOR:
1273 #if 0
1274 /* Do you want data from your microwave oven? */
1275 mac_status |= BWI_MAC_STATUS_PASS_CTL |
1276 BWI_MAC_STATUS_PASS_BADPLCP |
1277 BWI_MAC_STATUS_PASS_BADFCS;
1278 #else
1279 mac_status |= BWI_MAC_STATUS_PASS_CTL;
1280 #endif
1281 /* Promisc? */
1282 break;
1283 default:
1284 break;
1285 }
1286
1287 if (ic->ic_if.if_flags & IFF_PROMISC)
1288 mac_status |= BWI_MAC_STATUS_PROMISC;
1289
1290 CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
1291
1292 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1293 ic->ic_opmode != IEEE80211_M_HOSTAP) {
1294 if (sc->sc_bbp_id == BWI_BBPID_BCM4306 && sc->sc_bbp_rev == 3)
1295 pre_tbtt = 100;
1296 else
1297 pre_tbtt = 50;
1298 } else {
1299 pre_tbtt = 2;
1300 }
1301 CSR_WRITE_2(sc, BWI_MAC_PRE_TBTT, pre_tbtt);
1302 }
1303
1304 static void
1305 bwi_mac_hostflags_init(struct bwi_mac *mac)
1306 {
1307 struct bwi_softc *sc = mac->mac_sc;
1308 struct bwi_phy *phy = &mac->mac_phy;
1309 struct bwi_rf *rf = &mac->mac_rf;
1310 uint64_t host_flags;
1311
1312 if (phy->phy_mode == IEEE80211_MODE_11A)
1313 return;
1314
1315 host_flags = HFLAGS_READ(mac);
1316 host_flags |= BWI_HFLAG_SYM_WA;
1317
1318 if (phy->phy_mode == IEEE80211_MODE_11G) {
1319 if (phy->phy_rev == 1)
1320 host_flags |= BWI_HFLAG_GDC_WA;
1321 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9)
1322 host_flags |= BWI_HFLAG_OFDM_PA;
1323 } else if (phy->phy_mode == IEEE80211_MODE_11B) {
1324 if (phy->phy_rev >= 2 && rf->rf_type == BWI_RF_T_BCM2050)
1325 host_flags &= ~BWI_HFLAG_GDC_WA;
1326 } else {
1327 panic("unknown PHY mode %u\n", phy->phy_mode);
1328 }
1329
1330 HFLAGS_WRITE(mac, host_flags);
1331 }
1332
1333 static void
1334 bwi_mac_bss_param_init(struct bwi_mac *mac)
1335 {
1336 struct bwi_softc *sc = mac->mac_sc;
1337 struct bwi_phy *phy = &mac->mac_phy;
1338 struct bwi_retry_lim lim;
1339 uint16_t cw_min;
1340
1341 /*
1342 * Set short/long retry limits
1343 */
1344 bzero(&lim, sizeof(lim));
1345 lim.shretry = BWI_SHRETRY;
1346 lim.shretry_fb = BWI_SHRETRY_FB;
1347 lim.lgretry = BWI_LGRETRY;
1348 lim.lgretry_fb = BWI_LGRETRY_FB;
1349 bwi_mac_set_retry_lim(mac, &lim);
1350
1351 /*
1352 * Implicitly prevent firmware from sending probe response
1353 * by setting its "probe response timeout" to 1us.
1354 */
1355 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 1);
1356
1357 /*
1358 * XXX MAC level acknowledge and CW min/max should depend
1359 * on the char rateset of the IBSS/BSS to join.
1360 */
1361
1362 /*
1363 * Set MAC level acknowledge rates
1364 */
1365 bwi_mac_set_ackrates(mac, &sc->sc_ic.ic_sup_rates[phy->phy_mode]);
1366
1367 /*
1368 * Set CW min
1369 */
1370 if (phy->phy_mode == IEEE80211_MODE_11B)
1371 cw_min = IEEE80211_CW_MIN_0;
1372 else
1373 cw_min = IEEE80211_CW_MIN_1;
1374 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMIN, cw_min);
1375
1376 /*
1377 * Set CW max
1378 */
1379 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMAX,
1380 IEEE80211_CW_MAX);
1381 }
1382
1383 static void
1384 bwi_mac_set_retry_lim(struct bwi_mac *mac, const struct bwi_retry_lim *lim)
1385 {
1386 /* Short/Long retry limit */
1387 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_SHRETRY,
1388 lim->shretry);
1389 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_LGRETRY,
1390 lim->lgretry);
1391
1392 /* Short/Long retry fallback limit */
1393 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SHRETRY_FB,
1394 lim->shretry_fb);
1395 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_LGRETEY_FB,
1396 lim->lgretry_fb);
1397 }
1398
1399 static void
1400 bwi_mac_set_ackrates(struct bwi_mac *mac, const struct ieee80211_rateset *rs)
1401 {
1402 int i;
1403
1404 /* XXX not standard conforming */
1405 for (i = 0; i < rs->rs_nrates; ++i) {
1406 enum ieee80211_modtype modtype;
1407 uint16_t ofs;
1408
1409 modtype = ieee80211_rate2modtype(rs->rs_rates[i]);
1410 switch (modtype) {
1411 case IEEE80211_MODTYPE_DS:
1412 ofs = 0x4c0;
1413 break;
1414 case IEEE80211_MODTYPE_OFDM:
1415 ofs = 0x480;
1416 break;
1417 default:
1418 panic("unsupported modtype %u\n", modtype);
1419 }
1420 ofs += (bwi_rate2plcp(rs->rs_rates[i]) & 0xf) * 2;
1421
1422 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, ofs + 0x20,
1423 MOBJ_READ_2(mac, BWI_COMM_MOBJ, ofs));
1424 }
1425 }
1426
1427 int
1428 bwi_mac_start(struct bwi_mac *mac)
1429 {
1430 struct bwi_softc *sc = mac->mac_sc;
1431
1432 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1433 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_READY);
1434
1435 /* Flush pending bus writes */
1436 CSR_READ_4(sc, BWI_MAC_STATUS);
1437 CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1438
1439 return bwi_mac_config_ps(mac);
1440 }
1441
1442 int
1443 bwi_mac_stop(struct bwi_mac *mac)
1444 {
1445 struct bwi_softc *sc = mac->mac_sc;
1446 int error, i;
1447
1448 error = bwi_mac_config_ps(mac);
1449 if (error)
1450 return error;
1451
1452 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1453
1454 /* Flush pending bus write */
1455 CSR_READ_4(sc, BWI_MAC_STATUS);
1456
1457 #define NRETRY 10000
1458 for (i = 0; i < NRETRY; ++i) {
1459 if (CSR_READ_4(sc, BWI_MAC_INTR_STATUS) & BWI_INTR_READY)
1460 break;
1461 DELAY(1);
1462 }
1463 if (i == NRETRY) {
1464 if_printf(&sc->sc_ic.ic_if, "can't stop MAC\n");
1465 return ETIMEDOUT;
1466 }
1467 #undef NRETRY
1468
1469 return 0;
1470 }
1471
1472 int
1473 bwi_mac_config_ps(struct bwi_mac *mac)
1474 {
1475 struct bwi_softc *sc = mac->mac_sc;
1476 uint32_t status;
1477
1478 status = CSR_READ_4(sc, BWI_MAC_STATUS);
1479
1480 status &= ~BWI_MAC_STATUS_HW_PS;
1481 status |= BWI_MAC_STATUS_WAKEUP;
1482 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
1483
1484 /* Flush pending bus write */
1485 CSR_READ_4(sc, BWI_MAC_STATUS);
1486
1487 if (mac->mac_rev >= 5) {
1488 int i;
1489
1490 #define NRETRY 100
1491 for (i = 0; i < NRETRY; ++i) {
1492 if (MOBJ_READ_2(mac, BWI_COMM_MOBJ,
1493 BWI_COMM_MOBJ_UCODE_STATE) != BWI_UCODE_STATE_PS)
1494 break;
1495 DELAY(10);
1496 }
1497 if (i == NRETRY) {
1498 if_printf(&sc->sc_ic.ic_if, "config PS failed\n");
1499 return ETIMEDOUT;
1500 }
1501 #undef NRETRY
1502 }
1503 return 0;
1504 }
1505
1506 void
1507 bwi_mac_reset_hwkeys(struct bwi_mac *mac)
1508 {
1509 /* TODO: firmware crypto */
1510 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_KEYTABLE_OFS);
1511 }
1512
1513 void
1514 bwi_mac_shutdown(struct bwi_mac *mac)
1515 {
1516 struct bwi_softc *sc = mac->mac_sc;
1517 int i;
1518
1519 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS)
1520 sc->sc_free_txstats(sc);
1521
1522 sc->sc_free_rx_ring(sc);
1523
1524 for (i = 0; i < BWI_TX_NRING; ++i)
1525 sc->sc_free_tx_ring(sc, i);
1526
1527 bwi_rf_off(mac);
1528
1529 /* TODO:LED */
1530
1531 bwi_mac_gpio_fini(mac);
1532
1533 bwi_rf_off(mac); /* XXX again */
1534 CSR_WRITE_2(sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
1535 bwi_regwin_disable(sc, &mac->mac_regwin, 0);
1536
1537 mac->mac_flags &= ~BWI_MAC_F_INITED;
1538 }
1539
1540 static int
1541 bwi_mac_get_property(struct bwi_mac *mac)
1542 {
1543 struct bwi_softc *sc = mac->mac_sc;
1544 enum bwi_bus_space old_bus_space;
1545 uint32_t val;
1546
1547 /*
1548 * Byte swap
1549 */
1550 val = CSR_READ_4(sc, BWI_MAC_STATUS);
1551 if (val & BWI_MAC_STATUS_BSWAP) {
1552 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1553 "need byte swap");
1554 mac->mac_flags |= BWI_MAC_F_BSWAP;
1555 }
1556
1557 /*
1558 * DMA address space
1559 */
1560 old_bus_space = sc->sc_bus_space;
1561
1562 val = CSR_READ_4(sc, BWI_STATE_HI);
1563 if (__SHIFTOUT(val, BWI_STATE_HI_FLAGS_MASK) &
1564 BWI_STATE_HI_FLAG_64BIT) {
1565 /* 64bit address */
1566 sc->sc_bus_space = BWI_BUS_SPACE_64BIT;
1567 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1568 "64bit bus space");
1569 } else {
1570 uint32_t txrx_reg = BWI_TXRX_CTRL_BASE + BWI_TX32_CTRL;
1571
1572 CSR_WRITE_4(sc, txrx_reg, BWI_TXRX32_CTRL_ADDRHI_MASK);
1573 if (CSR_READ_4(sc, txrx_reg) & BWI_TXRX32_CTRL_ADDRHI_MASK) {
1574 /* 32bit address */
1575 sc->sc_bus_space = BWI_BUS_SPACE_32BIT;
1576 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1577 "32bit bus space");
1578 } else {
1579 /* 30bit address */
1580 sc->sc_bus_space = BWI_BUS_SPACE_30BIT;
1581 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1582 "30bit bus space");
1583 }
1584 }
1585
1586 if (old_bus_space != 0 && old_bus_space != sc->sc_bus_space) {
1587 device_printf(sc->sc_dev, "MACs bus space mismatch!\n");
1588 return ENXIO;
1589 }
1590 return 0;
1591 }
1592
1593 void
1594 bwi_mac_updateslot(struct bwi_mac *mac, int shslot)
1595 {
1596 uint16_t slot_time;
1597
1598 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B)
1599 return;
1600
1601 if (shslot)
1602 slot_time = IEEE80211_DUR_SHSLOT;
1603 else
1604 slot_time = IEEE80211_DUR_SLOT;
1605
1606 CSR_WRITE_2(mac->mac_sc, BWI_MAC_SLOTTIME,
1607 slot_time + BWI_MAC_SLOTTIME_ADJUST);
1608 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SLOTTIME, slot_time);
1609 }
1610
1611 int
1612 bwi_mac_attach(struct bwi_softc *sc, int id, uint8_t rev)
1613 {
1614 struct bwi_mac *mac;
1615 int i;
1616
1617 KKASSERT(sc->sc_nmac <= BWI_MAC_MAX && sc->sc_nmac >= 0);
1618
1619 if (sc->sc_nmac == BWI_MAC_MAX) {
1620 device_printf(sc->sc_dev, "too many MACs\n");
1621 return 0;
1622 }
1623
1624 /*
1625 * More than one MAC is only supported by BCM4309
1626 */
1627 if (sc->sc_nmac != 0 &&
1628 pci_get_device(sc->sc_dev) != PCI_PRODUCT_BROADCOM_BCM4309) {
1629 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1630 "ignore second MAC");
1631 return 0;
1632 }
1633
1634 mac = &sc->sc_mac[sc->sc_nmac];
1635
1636 /* XXX will this happen? */
1637 if (BWI_REGWIN_EXIST(&mac->mac_regwin)) {
1638 device_printf(sc->sc_dev, "%dth MAC already attached\n",
1639 sc->sc_nmac);
1640 return 0;
1641 }
1642
1643 /*
1644 * Test whether the revision of this MAC is supported
1645 */
1646 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
1647 for (i = 0; i < N(bwi_sup_macrev); ++i) {
1648 if (bwi_sup_macrev[i] == rev)
1649 break;
1650 }
1651 if (i == N(bwi_sup_macrev)) {
1652 device_printf(sc->sc_dev, "MAC rev %u is "
1653 "not supported\n", rev);
1654 return ENXIO;
1655 }
1656 #undef N
1657
1658 BWI_CREATE_MAC(mac, sc, id, rev);
1659 sc->sc_nmac++;
1660
1661 if (mac->mac_rev < 5) {
1662 mac->mac_flags |= BWI_MAC_F_HAS_TXSTATS;
1663 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1664 "has TX stats");
1665 }
1666
1667 device_printf(sc->sc_dev, "MAC: rev %u\n", rev);
1668 return 0;
1669 }
1670
1671 static __inline void
1672 bwi_mac_balance_atten(int *bbp_atten0, int *rf_atten0)
1673 {
1674 int bbp_atten, rf_atten, rf_atten_lim = -1;
1675
1676 bbp_atten = *bbp_atten0;
1677 rf_atten = *rf_atten0;
1678
1679 /*
1680 * RF attenuation affects TX power BWI_RF_ATTEN_FACTOR times
1681 * as much as BBP attenuation, so we try our best to keep RF
1682 * attenuation within range. BBP attenuation will be clamped
1683 * later if it is out of range during balancing.
1684 *
1685 * BWI_RF_ATTEN_MAX0 is used as RF attenuation upper limit.
1686 */
1687
1688 /*
1689 * Use BBP attenuation to balance RF attenuation
1690 */
1691 if (rf_atten < 0)
1692 rf_atten_lim = 0;
1693 else if (rf_atten > BWI_RF_ATTEN_MAX0)
1694 rf_atten_lim = BWI_RF_ATTEN_MAX0;
1695
1696 if (rf_atten_lim >= 0) {
1697 bbp_atten += (BWI_RF_ATTEN_FACTOR * (rf_atten - rf_atten_lim));
1698 rf_atten = rf_atten_lim;
1699 }
1700
1701 /*
1702 * If possible, use RF attenuation to balance BBP attenuation
1703 * NOTE: RF attenuation is still kept within range.
1704 */
1705 while (rf_atten < BWI_RF_ATTEN_MAX0 && bbp_atten > BWI_BBP_ATTEN_MAX) {
1706 bbp_atten -= BWI_RF_ATTEN_FACTOR;
1707 ++rf_atten;
1708 }
1709 while (rf_atten > 0 && bbp_atten < 0) {
1710 bbp_atten += BWI_RF_ATTEN_FACTOR;
1711 --rf_atten;
1712 }
1713
1714 /* RF attenuation MUST be within range */
1715 KKASSERT(rf_atten >= 0 && rf_atten <= BWI_RF_ATTEN_MAX0);
1716
1717 /*
1718 * Clamp BBP attenuation
1719 */
1720 if (bbp_atten < 0)
1721 bbp_atten = 0;
1722 else if (bbp_atten > BWI_BBP_ATTEN_MAX)
1723 bbp_atten = BWI_BBP_ATTEN_MAX;
1724
1725 *rf_atten0 = rf_atten;
1726 *bbp_atten0 = bbp_atten;
1727 }
1728
1729 static void
1730 bwi_mac_adjust_tpctl(struct bwi_mac *mac, int rf_atten_adj, int bbp_atten_adj)
1731 {
1732 struct bwi_softc *sc = mac->mac_sc;
1733 struct bwi_rf *rf = &mac->mac_rf;
1734 struct bwi_tpctl tpctl;
1735 int bbp_atten, rf_atten, tp_ctrl1;
1736
1737 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
1738
1739 /* NOTE: Use signed value to do calulation */
1740 bbp_atten = tpctl.bbp_atten;
1741 rf_atten = tpctl.rf_atten;
1742 tp_ctrl1 = tpctl.tp_ctrl1;
1743
1744 bbp_atten += bbp_atten_adj;
1745 rf_atten += rf_atten_adj;
1746
1747 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1748
1749 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev == 2) {
1750 if (rf_atten <= 1) {
1751 if (tp_ctrl1 == 0) {
1752 tp_ctrl1 = 3;
1753 bbp_atten += 2;
1754 rf_atten += 2;
1755 } else if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1756 bbp_atten +=
1757 (BWI_RF_ATTEN_FACTOR * (rf_atten - 2));
1758 rf_atten = 2;
1759 }
1760 } else if (rf_atten > 4 && tp_ctrl1 != 0) {
1761 tp_ctrl1 = 0;
1762 if (bbp_atten < 3) {
1763 bbp_atten += 2;
1764 rf_atten -= 3;
1765 } else {
1766 bbp_atten -= 2;
1767 rf_atten -= 2;
1768 }
1769 }
1770 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1771 }
1772
1773 tpctl.bbp_atten = bbp_atten;
1774 tpctl.rf_atten = rf_atten;
1775 tpctl.tp_ctrl1 = tp_ctrl1;
1776
1777 bwi_mac_lock(mac);
1778 bwi_mac_set_tpctl_11bg(mac, &tpctl);
1779 bwi_mac_unlock(mac);
1780 }
1781
1782 /*
1783 * http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower
1784 */
1785 void
1786 bwi_mac_calibrate_txpower(struct bwi_mac *mac)
1787 {
1788 struct bwi_softc *sc = mac->mac_sc;
1789 struct bwi_rf *rf = &mac->mac_rf;
1790 int8_t tssi[4], tssi_avg, cur_txpwr;
1791 int error, i, ofdm_tssi;
1792 int txpwr_diff, rf_atten_adj, bbp_atten_adj;
1793
1794 if (!sc->sc_txpwr_calib)
1795 return;
1796
1797 if (mac->mac_flags & BWI_MAC_F_TPCTL_ERROR) {
1798 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1799 "tpctl error happened, can't set txpower");
1800 return;
1801 }
1802
1803 if (BWI_IS_BRCM_BU4306(sc)) {
1804 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1805 "BU4306, can't set txpower");
1806 return;
1807 }
1808
1809 /*
1810 * Save latest TSSI and reset the related memory objects
1811 */
1812 ofdm_tssi = 0;
1813 error = bwi_rf_get_latest_tssi(mac, tssi, BWI_COMM_MOBJ_TSSI_DS);
1814 if (error) {
1815 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1816 "no DS tssi");
1817
1818 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B)
1819 return;
1820
1821 error = bwi_rf_get_latest_tssi(mac, tssi,
1822 BWI_COMM_MOBJ_TSSI_OFDM);
1823 if (error) {
1824 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1825 "no OFDM tssi");
1826 return;
1827 }
1828
1829 for (i = 0; i < 4; ++i) {
1830 tssi[i] += 0x20;
1831 tssi[i] &= 0x3f;
1832 }
1833 ofdm_tssi = 1;
1834 }
1835 bwi_rf_clear_tssi(mac);
1836
1837 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1838 "tssi0 %d, tssi1 %d, tssi2 %d, tssi3 %d\n",
1839 tssi[0], tssi[1], tssi[2], tssi[3]);
1840
1841 /*
1842 * Calculate RF/BBP attenuation adjustment based on
1843 * the difference between desired TX power and sampled
1844 * TX power.
1845 */
1846 /* +8 == "each incremented by 1/2" */
1847 tssi_avg = (tssi[0] + tssi[1] + tssi[2] + tssi[3] + 8) / 4;
1848 if (ofdm_tssi && (HFLAGS_READ(mac) & BWI_HFLAG_PWR_BOOST_DS))
1849 tssi_avg -= 13;
1850
1851 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "tssi avg %d\n", tssi_avg);
1852
1853 error = bwi_rf_tssi2dbm(mac, tssi_avg, &cur_txpwr);
1854 if (error)
1855 return;
1856 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "current txpower %d\n",
1857 cur_txpwr);
1858
1859 txpwr_diff = rf->rf_txpower_max - cur_txpwr; /* XXX ni_txpower */
1860
1861 rf_atten_adj = -howmany(txpwr_diff, 8);
1862 bbp_atten_adj = -(txpwr_diff / 2) -
1863 (BWI_RF_ATTEN_FACTOR * rf_atten_adj);
1864
1865 if (rf_atten_adj == 0 && bbp_atten_adj == 0) {
1866 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1867 "no need to adjust RF/BBP attenuation");
1868 /* TODO: LO */
1869 return;
1870 }
1871
1872 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1873 "rf atten adjust %d, bbp atten adjust %d\n",
1874 rf_atten_adj, bbp_atten_adj);
1875 bwi_mac_adjust_tpctl(mac, rf_atten_adj, bbp_atten_adj);
1876 /* TODO: LO */
1877 }
1878
1879 static void
1880 bwi_mac_lock(struct bwi_mac *mac)
1881 {
1882 struct bwi_softc *sc = mac->mac_sc;
1883 struct ieee80211com *ic = &sc->sc_ic;
1884
1885 KKASSERT((mac->mac_flags & BWI_MAC_F_LOCKED) == 0);
1886
1887 if (mac->mac_rev < 3)
1888 bwi_mac_stop(mac);
1889 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1890 bwi_mac_config_ps(mac);
1891
1892 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1893
1894 /* Flush pending bus write */
1895 CSR_READ_4(sc, BWI_MAC_STATUS);
1896 DELAY(10);
1897
1898 mac->mac_flags |= BWI_MAC_F_LOCKED;
1899 }
1900
1901 static void
1902 bwi_mac_unlock(struct bwi_mac *mac)
1903 {
1904 struct bwi_softc *sc = mac->mac_sc;
1905 struct ieee80211com *ic = &sc->sc_ic;
1906
1907 KKASSERT(mac->mac_flags & BWI_MAC_F_LOCKED);
1908
1909 CSR_READ_2(sc, BWI_PHYINFO); /* dummy read */
1910
1911 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1912
1913 if (mac->mac_rev < 3)
1914 bwi_mac_start(mac);
1915 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1916 bwi_mac_config_ps(mac);
1917
1918 mac->mac_flags &= ~BWI_MAC_F_LOCKED;
1919 }
1920
1921 void
1922 bwi_mac_set_promisc(struct bwi_mac *mac, int promisc)
1923 {
1924 struct bwi_softc *sc = mac->mac_sc;
1925
1926 if (mac->mac_rev < 5) /* Promisc is always on */
1927 return;
1928
1929 if (promisc)
1930 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);
1931 else
1932 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);
1933 }
Port diff from OpenBSD to DragonFly