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Linux 2.4.0-test7-pre6
[davej-history.git] / drivers / net / hamradio / scc.c
blob99d8c65aa5dfdb3f5aed27083c304402c55f19f7
1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
2
3 #define VERSION "3.0"
4 #define BANNER "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n"
5
6 /*
7 * Please use z8530drv-utils-3.0 with this version.
8 * ------------------
9 *
10 * You can find a subset of the documentation in
11 * linux/Documentation/networking/z8530drv.txt.
12 */
13
14 /*
15 ********************************************************************
16 * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 *
17 ********************************************************************
18
19
20 ********************************************************************
21
22 Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
23
24 portions (c) 1993 Guido ten Dolle PE1NNZ
25
26 ********************************************************************
27
28 The driver and the programs in the archive are UNDER CONSTRUCTION.
29 The code is likely to fail, and so your kernel could --- even
30 a whole network.
31
32 This driver is intended for Amateur Radio use. If you are running it
33 for commercial purposes, please drop me a note. I am nosy...
34
35 ...BUT:
36
37 ! You m u s t recognize the appropriate legislations of your country !
38 ! before you connect a radio to the SCC board and start to transmit or !
39 ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! !
40
41 For non-Amateur-Radio use please note that you might need a special
42 allowance/licence from the designer of the SCC Board and/or the
43 MODEM.
44
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the (modified) GNU General Public License
47 delivered with the Linux kernel source.
48
49 This program is distributed in the hope that it will be useful,
50 but WITHOUT ANY WARRANTY; without even the implied warranty of
51 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
52 GNU General Public License for more details.
53
54 You should find a copy of the GNU General Public License in
55 /usr/src/linux/COPYING;
56
57 ********************************************************************
58
59
60 Incomplete history of z8530drv:
61 -------------------------------
62
63 1994-09-13 started to write the driver, rescued most of my own
64 code (and Hans Alblas' memory buffer pool concept) from
65 an earlier project "sccdrv" which was initiated by
66 Guido ten Dolle. Not much of the old driver survived,
67 though. The first version I put my hands on was sccdrv1.3
68 from August 1993. The memory buffer pool concept
69 appeared in an unauthorized sccdrv version (1.5) from
70 August 1994.
71
72 1995-01-31 changed copyright notice to GPL without limitations.
73
74 .
75 . <SNIP>
76 .
77
78 1996-10-05 New semester, new driver...
79
80 * KISS TNC emulator removed (TTY driver)
81 * Source moved to drivers/net/
82 * Includes Z8530 defines from drivers/net/z8530.h
83 * Uses sk_buffer memory management
84 * Reduced overhead of /proc/net/z8530drv output
85 * Streamlined quite a lot things
86 * Invents brand new bugs... ;-)
87
88 The move to version number 3.0 reflects theses changes.
89 You can use 'kissbridge' if you need a KISS TNC emulator.
90
91 1996-12-13 Fixed for Linux networking changes. (G4KLX)
92 1997-01-08 Fixed the remaining problems.
93 1997-04-02 Hopefully fixed the problems with the new *_timer()
94 routines, added calibration code.
95 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
96 1998-01-29 Small fix to avoid lock-up on initialization
97 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again,
98 using dev->tx_queue_len now instead of MAXQUEUE now.
99 1998-10-21 Postponed the spinlock changes, would need a lot of
100 testing I currently don't have the time to. Softdcd doesn't
101 work.
102 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it
103 never did. The DPLL locks on noise, the SYNC unit sees
104 flags that aren't... Restarting the DPLL does not help
105 either, it resynchronizes too slow and the first received
106 frame gets lost.
107 2000-02-13 Fixed for new network driver interface changes, still
108 does TX timeouts itself since it uses its own queue
109 scheme.
110
111 Thanks to all who contributed to this driver with ideas and bug
112 reports!
113
114 NB -- if you find errors, change something, please let me know
115 first before you distribute it... And please don't touch
116 the version number. Just replace my callsign in
117 "v3.0.dl1bke" with your own. Just to avoid confusion...
118
119 If you want to add your modification to the linux distribution
120 please (!) contact me first.
121
122 New versions of the driver will be announced on the linux-hams
123 mailing list on vger.kernel.org. To subscribe send an e-mail
124 to majordomo@vger.kernel.org with the following line in
125 the body of the mail:
126
127 subscribe linux-hams
128
129 The content of the "Subject" field will be ignored.
130
131 vy 73,
132 Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
133 AX-25 : DL1BKE @ DB0ACH.#NRW.DEU.EU
134 Internet: jreuter@poboxes.com
135 www : http://poboxes.com/jreuter/
136 */
137
138 /* ----------------------------------------------------------------------- */
139
140 #undef SCC_LDELAY 1 /* slow it even a bit more down */
141 #undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */
142
143 #define SCC_MAXCHIPS 4 /* number of max. supported chips */
144 #define SCC_BUFSIZE 384 /* must not exceed 4096 */
145 #undef SCC_DISABLE_ALL_INTS /* use cli()/sti() in ISR instead of */
146 /* enable_irq()/disable_irq() */
147 #undef SCC_DEBUG
148
149 #define SCC_DEFAULT_CLOCK 4915200
150 /* default pclock if nothing is specified */
151
152 /* ----------------------------------------------------------------------- */
153
154 #include <linux/config.h>
155 #include <linux/module.h>
156 #include <linux/errno.h>
157 #include <linux/signal.h>
158 #include <linux/sched.h>
159 #include <linux/timer.h>
160 #include <linux/interrupt.h>
161 #include <linux/ioport.h>
162 #include <linux/string.h>
163 #include <linux/in.h>
164 #include <linux/fcntl.h>
165 #include <linux/ptrace.h>
166 #include <linux/malloc.h>
167 #include <linux/delay.h>
168
169 #include <linux/skbuff.h>
170 #include <linux/netdevice.h>
171 #include <linux/if_ether.h>
172 #include <linux/if_arp.h>
173 #include <linux/socket.h>
174 #include <linux/init.h>
175
176 #include <linux/scc.h>
177 #include "z8530.h"
178
179 #include <net/ax25.h>
180 #include <asm/irq.h>
181 #include <asm/system.h>
182 #include <asm/io.h>
183 #include <asm/uaccess.h>
184 #include <asm/bitops.h>
185
186 #include <linux/ctype.h>
187 #include <linux/kernel.h>
188 #include <linux/proc_fs.h>
189
190 #ifdef MODULE
191 int init_module(void);
192 void cleanup_module(void);
193 #endif
194
195 int scc_init(void);
196
197 static void t_dwait(unsigned long);
198 static void t_txdelay(unsigned long);
199 static void t_tail(unsigned long);
200 static void t_busy(unsigned long);
201 static void t_maxkeyup(unsigned long);
202 static void t_idle(unsigned long);
203 static void scc_tx_done(struct scc_channel *);
204 static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
205 static void scc_start_maxkeyup(struct scc_channel *);
206 static void scc_start_defer(struct scc_channel *);
207
208 static void z8530_init(void);
209
210 static void init_channel(struct scc_channel *scc);
211 static void scc_key_trx (struct scc_channel *scc, char tx);
212 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs);
213 static void scc_init_timer(struct scc_channel *scc);
214
215 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev);
216 static int scc_net_init(struct net_device *dev);
217 static int scc_net_open(struct net_device *dev);
218 static int scc_net_close(struct net_device *dev);
219 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
220 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev);
221 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
222 static int scc_net_set_mac_address(struct net_device *dev, void *addr);
223 static int scc_net_header(struct sk_buff *skb, struct net_device *dev, unsigned short type, void *daddr, void *saddr, unsigned len);
224 static struct net_device_stats * scc_net_get_stats(struct net_device *dev);
225
226 static unsigned char *SCC_DriverName = "scc";
227
228 static struct irqflags { unsigned char used : 1; } Ivec[16];
229
230 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */
231
232 static struct scc_ctrl {
233 io_port chan_A;
234 io_port chan_B;
235 int irq;
236 } SCC_ctrl[SCC_MAXCHIPS+1];
237
238 static unsigned char Driver_Initialized = 0;
239 static int Nchips = 0;
240 static io_port Vector_Latch = 0;
241
242
243 /* ******************************************************************** */
244 /* * Port Access Functions * */
245 /* ******************************************************************** */
246
247 /* These provide interrupt save 2-step access to the Z8530 registers */
248
249 static inline unsigned char InReg(io_port port, unsigned char reg)
250 {
251 unsigned long flags;
252 unsigned char r;
253
254 save_flags(flags);
255 cli();
256 #ifdef SCC_LDELAY
257 Outb(port, reg);
258 udelay(SCC_LDELAY);
259 r=Inb(port);
260 udelay(SCC_LDELAY);
261 #else
262 Outb(port, reg);
263 r=Inb(port);
264 #endif
265 restore_flags(flags);
266 return r;
267 }
268
269 static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
270 {
271 unsigned long flags;
272
273 save_flags(flags);
274 cli();
275 #ifdef SCC_LDELAY
276 Outb(port, reg); udelay(SCC_LDELAY);
277 Outb(port, val); udelay(SCC_LDELAY);
278 #else
279 Outb(port, reg);
280 Outb(port, val);
281 #endif
282 restore_flags(flags);
283 }
284
285 static inline void wr(struct scc_channel *scc, unsigned char reg,
286 unsigned char val)
287 {
288 OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
289 }
290
291 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
292 {
293 OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
294 }
295
296 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
297 {
298 OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
299 }
300
301 #ifdef SCC_DISABLE_ALL_INTS
302 static inline void scc_cli(int irq)
303 { cli(); }
304 static inline void scc_sti(int irq)
305 { sti(); }
306 #else
307 static inline void scc_cli(int irq)
308 { disable_irq(irq); }
309 static inline void scc_sti(int irq)
310 { enable_irq(irq); }
311 #endif
312
313 /* ******************************************************************** */
314 /* * Some useful macros * */
315 /* ******************************************************************** */
316
317 static inline void scc_discard_buffers(struct scc_channel *scc)
318 {
319 unsigned long flags;
320
321 save_flags(flags);
322 cli();
323
324 if (scc->tx_buff != NULL)
325 {
326 dev_kfree_skb(scc->tx_buff);
327 scc->tx_buff = NULL;
328 }
329
330 while (skb_queue_len(&scc->tx_queue))
331 dev_kfree_skb(skb_dequeue(&scc->tx_queue));
332
333 restore_flags(flags);
334 }
335
336
337
338 /* ******************************************************************** */
339 /* * Interrupt Service Routines * */
340 /* ******************************************************************** */
341
342
343 /* ----> subroutines for the interrupt handlers <---- */
344
345 static inline void scc_notify(struct scc_channel *scc, int event)
346 {
347 struct sk_buff *skb;
348 char *bp;
349
350 if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
351 return;
352
353 skb = dev_alloc_skb(2);
354 if (skb != NULL)
355 {
356 bp = skb_put(skb, 2);
357 *bp++ = PARAM_HWEVENT;
358 *bp++ = event;
359 scc_net_rx(scc, skb);
360 } else
361 scc->stat.nospace++;
362 }
363
364 static inline void flush_rx_FIFO(struct scc_channel *scc)
365 {
366 int k;
367
368 for (k=0; k<3; k++)
369 Inb(scc->data);
370
371 if(scc->rx_buff != NULL) /* did we receive something? */
372 {
373 scc->stat.rxerrs++; /* then count it as an error */
374 dev_kfree_skb_irq(scc->rx_buff);
375 scc->rx_buff = NULL;
376 }
377 }
378
379 static void start_hunt(struct scc_channel *scc)
380 {
381 if ((scc->modem.clocksrc != CLK_EXTERNAL))
382 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
383 or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */
384 }
385
386 /* ----> four different interrupt handlers for Tx, Rx, changing of */
387 /* DCD/CTS and Rx/Tx errors */
388
389 /* Transmitter interrupt handler */
390 static inline void scc_txint(struct scc_channel *scc)
391 {
392 struct sk_buff *skb;
393
394 scc->stat.txints++;
395 skb = scc->tx_buff;
396
397 /* send first octet */
398
399 if (skb == NULL)
400 {
401 skb = skb_dequeue(&scc->tx_queue);
402 scc->tx_buff = skb;
403 netif_wake_queue(scc->dev);
404
405 if (skb == NULL)
406 {
407 scc_tx_done(scc);
408 Outb(scc->ctrl, RES_Tx_P);
409 return;
410 }
411
412 if (skb->len == 0) /* Paranoia... */
413 {
414 dev_kfree_skb_irq(skb);
415 scc->tx_buff = NULL;
416 scc_tx_done(scc);
417 Outb(scc->ctrl, RES_Tx_P);
418 return;
419 }
420
421 scc->stat.tx_state = TXS_ACTIVE;
422
423 OutReg(scc->ctrl, R0, RES_Tx_CRC);
424 /* reset CRC generator */
425 or(scc,R10,ABUNDER); /* re-install underrun protection */
426 Outb(scc->data,*skb->data); /* send byte */
427 skb_pull(skb, 1);
428
429 if (!scc->enhanced) /* reset EOM latch */
430 Outb(scc->ctrl,RES_EOM_L);
431 return;
432 }
433
434 /* End Of Frame... */
435
436 if (skb->len == 0)
437 {
438 Outb(scc->ctrl, RES_Tx_P); /* reset pending int */
439 cl(scc, R10, ABUNDER); /* send CRC */
440 dev_kfree_skb_irq(skb);
441 scc->tx_buff = NULL;
442 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
443 return;
444 }
445
446 /* send octet */
447
448 Outb(scc->data,*skb->data);
449 skb_pull(skb, 1);
450 }
451
452
453 /* External/Status interrupt handler */
454 static inline void scc_exint(struct scc_channel *scc)
455 {
456 unsigned char status,changes,chg_and_stat;
457
458 scc->stat.exints++;
459
460 status = InReg(scc->ctrl,R0);
461 changes = status ^ scc->status;
462 chg_and_stat = changes & status;
463
464 /* ABORT: generated whenever DCD drops while receiving */
465
466 if (chg_and_stat & BRK_ABRT) /* Received an ABORT */
467 flush_rx_FIFO(scc);
468
469 /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
470
471 if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
472 {
473 if (status & SYNC_HUNT)
474 {
475 scc->dcd = 0;
476 flush_rx_FIFO(scc);
477 if ((scc->modem.clocksrc != CLK_EXTERNAL))
478 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
479 } else {
480 scc->dcd = 1;
481 }
482
483 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
484 }
485
486 /* DCD: on = start to receive packet, off = ABORT condition */
487 /* (a successfully received packet generates a special condition int) */
488
489 if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
490 {
491 if(status & DCD) /* DCD is now ON */
492 {
493 start_hunt(scc);
494 scc->dcd = 1;
495 } else { /* DCD is now OFF */
496 cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
497 flush_rx_FIFO(scc);
498 scc->dcd = 0;
499 }
500
501 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
502 }
503
504 #ifdef notdef
505 /* CTS: use external TxDelay (what's that good for?!)
506 * Anyway: If we _could_ use it (BayCom USCC uses CTS for
507 * own purposes) we _should_ use the "autoenable" feature
508 * of the Z8530 and not this interrupt...
509 */
510
511 if (chg_and_stat & CTS) /* CTS is now ON */
512 {
513 if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */
514 scc_start_tx_timer(scc, t_txdelay, 0);
515 }
516 #endif
517
518 if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
519 {
520 scc->stat.tx_under++; /* oops, an underrun! count 'em */
521 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */
522
523 if (scc->tx_buff != NULL)
524 {
525 dev_kfree_skb_irq(scc->tx_buff);
526 scc->tx_buff = NULL;
527 }
528
529 or(scc,R10,ABUNDER);
530 scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */
531 }
532
533 scc->status = status;
534 Outb(scc->ctrl,RES_EXT_INT);
535 }
536
537
538 /* Receiver interrupt handler */
539 static inline void scc_rxint(struct scc_channel *scc)
540 {
541 struct sk_buff *skb;
542
543 scc->stat.rxints++;
544
545 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
546 {
547 Inb(scc->data); /* discard char */
548 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
549 return;
550 }
551
552 skb = scc->rx_buff;
553
554 if (skb == NULL)
555 {
556 skb = dev_alloc_skb(scc->stat.bufsize);
557 if (skb == NULL)
558 {
559 scc->dev_stat.rx_dropped++;
560 scc->stat.nospace++;
561 Inb(scc->data);
562 or(scc, R3, ENT_HM);
563 return;
564 }
565
566 scc->rx_buff = skb;
567 *(skb_put(skb, 1)) = 0; /* KISS data */
568 }
569
570 if (skb->len >= scc->stat.bufsize)
571 {
572 #ifdef notdef
573 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
574 #endif
575 dev_kfree_skb_irq(skb);
576 scc->rx_buff = NULL;
577 Inb(scc->data);
578 or(scc, R3, ENT_HM);
579 return;
580 }
581
582 *(skb_put(skb, 1)) = Inb(scc->data);
583 }
584
585
586 /* Receive Special Condition interrupt handler */
587 static inline void scc_spint(struct scc_channel *scc)
588 {
589 unsigned char status;
590 struct sk_buff *skb;
591
592 scc->stat.spints++;
593
594 status = InReg(scc->ctrl,R1); /* read receiver status */
595
596 Inb(scc->data); /* throw away Rx byte */
597 skb = scc->rx_buff;
598
599 if(status & Rx_OVR) /* receiver overrun */
600 {
601 scc->stat.rx_over++; /* count them */
602 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
603
604 if (skb != NULL)
605 dev_kfree_skb_irq(skb);
606 scc->rx_buff = NULL;
607 }
608
609 if(status & END_FR && skb != NULL) /* end of frame */
610 {
611 /* CRC okay, frame ends on 8 bit boundary and received something ? */
612
613 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
614 {
615 /* ignore last received byte (first of the CRC bytes) */
616 skb_trim(skb, skb->len-1);
617 scc_net_rx(scc, skb);
618 scc->rx_buff = NULL;
619 scc->stat.rxframes++;
620 } else { /* a bad frame */
621 dev_kfree_skb_irq(skb);
622 scc->rx_buff = NULL;
623 scc->stat.rxerrs++;
624 }
625 }
626
627 Outb(scc->ctrl,ERR_RES);
628 }
629
630
631 /* ----> interrupt service routine for the Z8530 <---- */
632
633 static void scc_isr_dispatch(struct scc_channel *scc, int vector)
634 {
635 switch (vector & VECTOR_MASK)
636 {
637 case TXINT: scc_txint(scc); break;
638 case EXINT: scc_exint(scc); break;
639 case RXINT: scc_rxint(scc); break;
640 case SPINT: scc_spint(scc); break;
641 }
642 }
643
644 /* If the card has a latch for the interrupt vector (like the PA0HZP card)
645 use it to get the number of the chip that generated the int.
646 If not: poll all defined chips.
647 */
648
649 #define SCC_IRQTIMEOUT 30000
650
651 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs)
652 {
653 unsigned char vector;
654 struct scc_channel *scc;
655 struct scc_ctrl *ctrl;
656 int k;
657
658 if (Vector_Latch)
659 {
660 for(k=0; k < SCC_IRQTIMEOUT; k++)
661 {
662 Outb(Vector_Latch, 0); /* Generate INTACK */
663
664 /* Read the vector */
665 if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break;
666 if (vector & 0x01) break;
667
668 scc=&SCC_Info[vector >> 3 ^ 0x01];
669 if (!scc->dev) break;
670
671 scc_isr_dispatch(scc, vector);
672
673 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */
674 }
675
676 if (k == SCC_IRQTIMEOUT)
677 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
678
679 return;
680 }
681
682 /* Find the SCC generating the interrupt by polling all attached SCCs
683 * reading RR3A (the interrupt pending register)
684 */
685
686 ctrl = SCC_ctrl;
687 while (ctrl->chan_A)
688 {
689 if (ctrl->irq != irq)
690 {
691 ctrl++;
692 continue;
693 }
694
695 scc = NULL;
696 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
697 {
698 vector=InReg(ctrl->chan_B,R2); /* Read the vector */
699 if (vector & 0x01) break;
700
701 scc = &SCC_Info[vector >> 3 ^ 0x01];
702 if (!scc->dev) break;
703
704 scc_isr_dispatch(scc, vector);
705 }
706
707 if (k == SCC_IRQTIMEOUT)
708 {
709 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
710 break;
711 }
712
713 /* This looks wierd and it is. At least the BayCom USCC doesn't
714 * use the Interrupt Daisy Chain, thus we'll have to start
715 * all over again to be sure not to miss an interrupt from
716 * (any of) the other chip(s)...
717 * Honestly, the situation *is* braindamaged...
718 */
719
720 if (scc != NULL)
721 {
722 OutReg(scc->ctrl,R0,RES_H_IUS);
723 ctrl = SCC_ctrl;
724 } else
725 ctrl++;
726 }
727 }
728
729
730
731 /* ******************************************************************** */
732 /* * Init Channel */
733 /* ******************************************************************** */
734
735
736 /* ----> set SCC channel speed <---- */
737
738 static inline void set_brg(struct scc_channel *scc, unsigned int tc)
739 {
740 cl(scc,R14,BRENABL); /* disable baudrate generator */
741 wr(scc,R12,tc & 255); /* brg rate LOW */
742 wr(scc,R13,tc >> 8); /* brg rate HIGH */
743 or(scc,R14,BRENABL); /* enable baudrate generator */
744 }
745
746 static inline void set_speed(struct scc_channel *scc)
747 {
748 disable_irq(scc->irq);
749
750 if (scc->modem.speed > 0) /* paranoia... */
751 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
752
753 enable_irq(scc->irq);
754 }
755
756
757 /* ----> initialize a SCC channel <---- */
758
759 static inline void init_brg(struct scc_channel *scc)
760 {
761 wr(scc, R14, BRSRC); /* BRG source = PCLK */
762 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */
763 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */
764 }
765
766 /*
767 * Initialization according to the Z8530 manual (SGS-Thomson's version):
768 *
769 * 1. Modes and constants
770 *
771 * WR9 11000000 chip reset
772 * WR4 XXXXXXXX Tx/Rx control, async or sync mode
773 * WR1 0XX00X00 select W/REQ (optional)
774 * WR2 XXXXXXXX program interrupt vector
775 * WR3 XXXXXXX0 select Rx control
776 * WR5 XXXX0XXX select Tx control
777 * WR6 XXXXXXXX sync character
778 * WR7 XXXXXXXX sync character
779 * WR9 000X0XXX select interrupt control
780 * WR10 XXXXXXXX miscellaneous control (optional)
781 * WR11 XXXXXXXX clock control
782 * WR12 XXXXXXXX time constant lower byte (optional)
783 * WR13 XXXXXXXX time constant upper byte (optional)
784 * WR14 XXXXXXX0 miscellaneous control
785 * WR14 XXXSSSSS commands (optional)
786 *
787 * 2. Enables
788 *
789 * WR14 000SSSS1 baud rate enable
790 * WR3 SSSSSSS1 Rx enable
791 * WR5 SSSS1SSS Tx enable
792 * WR0 10000000 reset Tx CRG (optional)
793 * WR1 XSS00S00 DMA enable (optional)
794 *
795 * 3. Interrupt status
796 *
797 * WR15 XXXXXXXX enable external/status
798 * WR0 00010000 reset external status
799 * WR0 00010000 reset external status twice
800 * WR1 SSSXXSXX enable Rx, Tx and Ext/status
801 * WR9 000SXSSS enable master interrupt enable
802 *
803 * 1 = set to one, 0 = reset to zero
804 * X = user defined, S = same as previous init
805 *
806 *
807 * Note that the implementation differs in some points from above scheme.
808 *
809 */
810
811 static void init_channel(struct scc_channel *scc)
812 {
813 del_timer(&scc->tx_t);
814 del_timer(&scc->tx_wdog);
815
816 disable_irq(scc->irq);
817
818 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
819 wr(scc,R1,0); /* no W/REQ operation */
820 wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */
821 wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */
822 wr(scc,R6,0); /* SDLC address zero (not used) */
823 wr(scc,R7,FLAG); /* SDLC flag value */
824 wr(scc,R9,VIS); /* vector includes status */
825 wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
826 wr(scc,R14, 0);
827
828
829 /* set clock sources:
830
831 CLK_DPLL: normal halfduplex operation
832
833 RxClk: use DPLL
834 TxClk: use DPLL
835 TRxC mode DPLL output
836
837 CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
838
839 BayCom: others:
840
841 TxClk = pin RTxC TxClk = pin TRxC
842 RxClk = pin TRxC RxClk = pin RTxC
843
844
845 CLK_DIVIDER:
846 RxClk = use DPLL
847 TxClk = pin RTxC
848
849 BayCom: others:
850 pin TRxC = DPLL pin TRxC = BRG
851 (RxClk * 1) (RxClk * 32)
852 */
853
854
855 switch(scc->modem.clocksrc)
856 {
857 case CLK_DPLL:
858 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
859 init_brg(scc);
860 break;
861
862 case CLK_DIVIDER:
863 wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
864 init_brg(scc);
865 break;
866
867 case CLK_EXTERNAL:
868 wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
869 OutReg(scc->ctrl, R14, DISDPLL);
870 break;
871
872 }
873
874 set_speed(scc); /* set baudrate */
875
876 if(scc->enhanced)
877 {
878 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
879 wr(scc,R7,AUTOEOM);
880 }
881
882 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
883 /* DCD is now ON */
884 {
885 start_hunt(scc);
886 }
887
888 /* enable ABORT, DCD & SYNC/HUNT interrupts */
889
890 wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
891
892 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
893 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */
894
895 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
896
897 scc->status = InReg(scc->ctrl,R0); /* read initial status */
898
899 or(scc,R9,MIE); /* master interrupt enable */
900
901 scc_init_timer(scc);
902
903 enable_irq(scc->irq);
904 }
905
906
907
908
909 /* ******************************************************************** */
910 /* * SCC timer functions * */
911 /* ******************************************************************** */
912
913
914 /* ----> scc_key_trx sets the time constant for the baudrate
915 generator and keys the transmitter <---- */
916
917 static void scc_key_trx(struct scc_channel *scc, char tx)
918 {
919 unsigned int time_const;
920
921 if (scc->brand & PRIMUS)
922 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
923
924 if (scc->modem.speed < 300)
925 scc->modem.speed = 1200;
926
927 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
928
929 disable_irq(scc->irq);
930
931 if (tx)
932 {
933 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */
934 or(scc, R15, TxUIE);
935 }
936
937 if (scc->modem.clocksrc == CLK_DPLL)
938 { /* force simplex operation */
939 if (tx)
940 {
941 #ifdef CONFIG_SCC_TRXECHO
942 cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */
943 cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */
944 #endif
945 set_brg(scc, time_const); /* reprogram baudrate generator */
946
947 /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
948 wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
949
950 /* By popular demand: tx_inhibit */
951 if (scc->kiss.tx_inhibit)
952 {
953 or(scc,R5, TxENAB);
954 scc->wreg[R5] |= RTS;
955 } else {
956 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */
957 }
958 } else {
959 cl(scc,R5,RTS|TxENAB);
960
961 set_brg(scc, time_const); /* reprogram baudrate generator */
962
963 /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
964 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
965
966 #ifndef CONFIG_SCC_TRXECHO
967 if (scc->kiss.softdcd)
968 #endif
969 {
970 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
971 start_hunt(scc);
972 }
973 }
974 } else {
975 if (tx)
976 {
977 #ifdef CONFIG_SCC_TRXECHO
978 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
979 {
980 cl(scc, R3, RxENABLE);
981 cl(scc, R15, DCDIE|SYNCIE);
982 }
983 #endif
984
985 if (scc->kiss.tx_inhibit)
986 {
987 or(scc,R5, TxENAB);
988 scc->wreg[R5] |= RTS;
989 } else {
990 or(scc,R5,RTS|TxENAB); /* enable tx */
991 }
992 } else {
993 cl(scc,R5,RTS|TxENAB); /* disable tx */
994
995 if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
996 #ifndef CONFIG_SCC_TRXECHO
997 scc->kiss.softdcd)
998 #else
999 1)
1000 #endif
1001 {
1002 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
1003 start_hunt(scc);
1004 }
1005 }
1006 }
1007
1008 enable_irq(scc->irq);
1009 }
1010
1011
1012 /* ----> SCC timer interrupt handler and friends. <---- */
1013
1014 static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
1015 {
1016 unsigned long flags;
1017
1018
1019 save_flags(flags);
1020 cli();
1021
1022 del_timer(&scc->tx_t);
1023
1024 if (when == 0)
1025 {
1026 handler((unsigned long) scc);
1027 } else
1028 if (when != TIMER_OFF)
1029 {
1030 scc->tx_t.data = (unsigned long) scc;
1031 scc->tx_t.function = handler;
1032 scc->tx_t.expires = jiffies + (when*HZ)/100;
1033 add_timer(&scc->tx_t);
1034 }
1035
1036 restore_flags(flags);
1037 }
1038
1039 static void scc_start_defer(struct scc_channel *scc)
1040 {
1041 unsigned long flags;
1042
1043 save_flags(flags);
1044 cli();
1045
1046 del_timer(&scc->tx_wdog);
1047
1048 if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1049 {
1050 scc->tx_wdog.data = (unsigned long) scc;
1051 scc->tx_wdog.function = t_busy;
1052 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1053 add_timer(&scc->tx_wdog);
1054 }
1055 restore_flags(flags);
1056 }
1057
1058 static void scc_start_maxkeyup(struct scc_channel *scc)
1059 {
1060 unsigned long flags;
1061
1062 save_flags(flags);
1063 cli();
1064
1065 del_timer(&scc->tx_wdog);
1066
1067 if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1068 {
1069 scc->tx_wdog.data = (unsigned long) scc;
1070 scc->tx_wdog.function = t_maxkeyup;
1071 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1072 add_timer(&scc->tx_wdog);
1073 }
1074
1075 restore_flags(flags);
1076 }
1077
1078 /*
1079 * This is called from scc_txint() when there are no more frames to send.
1080 * Not exactly a timer function, but it is a close friend of the family...
1081 */
1082
1083 static void scc_tx_done(struct scc_channel *scc)
1084 {
1085 /*
1086 * trx remains keyed in fulldup mode 2 until t_idle expires.
1087 */
1088
1089 switch (scc->kiss.fulldup)
1090 {
1091 case KISS_DUPLEX_LINK:
1092 scc->stat.tx_state = TXS_IDLE2;
1093 if (scc->kiss.idletime != TIMER_OFF)
1094 scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100);
1095 break;
1096 case KISS_DUPLEX_OPTIMA:
1097 scc_notify(scc, HWEV_ALL_SENT);
1098 break;
1099 default:
1100 scc->stat.tx_state = TXS_BUSY;
1101 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1102 }
1103
1104 netif_wake_queue(scc->dev);
1105 }
1106
1107
1108 static unsigned char Rand = 17;
1109
1110 static inline int is_grouped(struct scc_channel *scc)
1111 {
1112 int k;
1113 struct scc_channel *scc2;
1114 unsigned char grp1, grp2;
1115
1116 grp1 = scc->kiss.group;
1117
1118 for (k = 0; k < (Nchips * 2); k++)
1119 {
1120 scc2 = &SCC_Info[k];
1121 grp2 = scc2->kiss.group;
1122
1123 if (scc2 == scc || !(scc2->dev && grp2))
1124 continue;
1125
1126 if ((grp1 & 0x3f) == (grp2 & 0x3f))
1127 {
1128 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1129 return 1;
1130
1131 if ( (grp1 & RXGROUP) && scc2->dcd )
1132 return 1;
1133 }
1134 }
1135 return 0;
1136 }
1137
1138 /* DWAIT and SLOTTIME expired
1139 *
1140 * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer
1141 * else key trx and start txdelay
1142 * fulldup == 1: key trx and start txdelay
1143 * fulldup == 2: mintime expired, reset status or key trx and start txdelay
1144 */
1145
1146 static void t_dwait(unsigned long channel)
1147 {
1148 struct scc_channel *scc = (struct scc_channel *) channel;
1149
1150 if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */
1151 {
1152 if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */
1153 {
1154 scc->stat.tx_state = TXS_IDLE;
1155 netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */
1156 return;
1157 }
1158
1159 scc->stat.tx_state = TXS_BUSY;
1160 }
1161
1162 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1163 {
1164 Rand = Rand * 17 + 31;
1165
1166 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1167 {
1168 scc_start_defer(scc);
1169 scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1170 return ;
1171 }
1172 }
1173
1174 if ( !(scc->wreg[R5] & RTS) )
1175 {
1176 scc_key_trx(scc, TX_ON);
1177 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1178 } else {
1179 scc_start_tx_timer(scc, t_txdelay, 0);
1180 }
1181 }
1182
1183
1184 /* TXDELAY expired
1185 *
1186 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1187 */
1188
1189 static void t_txdelay(unsigned long channel)
1190 {
1191 struct scc_channel *scc = (struct scc_channel *) channel;
1192
1193 scc_start_maxkeyup(scc);
1194
1195 if (scc->tx_buff == NULL)
1196 {
1197 disable_irq(scc->irq);
1198 scc_txint(scc);
1199 enable_irq(scc->irq);
1200 }
1201 }
1202
1203
1204 /* TAILTIME expired
1205 *
1206 * switch off transmitter. If we were stopped by Maxkeyup restart
1207 * transmission after 'mintime' seconds
1208 */
1209
1210 static void t_tail(unsigned long channel)
1211 {
1212 struct scc_channel *scc = (struct scc_channel *) channel;
1213 unsigned long flags;
1214
1215 save_flags(flags);
1216 cli();
1217
1218 del_timer(&scc->tx_wdog);
1219 scc_key_trx(scc, TX_OFF);
1220
1221 restore_flags(flags);
1222
1223 if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */
1224 {
1225 scc->stat.tx_state = TXS_WAIT;
1226
1227 if (scc->kiss.mintime != TIMER_OFF) /* try it again */
1228 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1229 else
1230 scc_start_tx_timer(scc, t_dwait, 0);
1231 return;
1232 }
1233
1234 scc->stat.tx_state = TXS_IDLE;
1235 netif_wake_queue(scc->dev);
1236 }
1237
1238
1239 /* BUSY timeout
1240 *
1241 * throw away send buffers if DCD remains active too long.
1242 */
1243
1244 static void t_busy(unsigned long channel)
1245 {
1246 struct scc_channel *scc = (struct scc_channel *) channel;
1247
1248 del_timer(&scc->tx_t);
1249 netif_stop_queue(scc->dev); /* don't pile on the wabbit! */
1250
1251 scc_discard_buffers(scc);
1252 scc->stat.txerrs++;
1253 scc->stat.tx_state = TXS_IDLE;
1254
1255 netif_wake_queue(scc->dev);
1256 }
1257
1258 /* MAXKEYUP timeout
1259 *
1260 * this is our watchdog.
1261 */
1262
1263 static void t_maxkeyup(unsigned long channel)
1264 {
1265 struct scc_channel *scc = (struct scc_channel *) channel;
1266 unsigned long flags;
1267
1268 save_flags(flags);
1269 cli();
1270
1271 /*
1272 * let things settle down before we start to
1273 * accept new data.
1274 */
1275
1276 netif_stop_queue(scc->dev);
1277 scc_discard_buffers(scc);
1278
1279 del_timer(&scc->tx_t);
1280
1281 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */
1282 cl(scc, R15, TxUIE); /* count it. */
1283 OutReg(scc->ctrl, R0, RES_Tx_P);
1284
1285 restore_flags(flags);
1286
1287 scc->stat.txerrs++;
1288 scc->stat.tx_state = TXS_TIMEOUT;
1289 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1290 }
1291
1292 /* IDLE timeout
1293 *
1294 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1295 * of inactivity. We will not restart transmission before 'mintime'
1296 * expires.
1297 */
1298
1299 static void t_idle(unsigned long channel)
1300 {
1301 struct scc_channel *scc = (struct scc_channel *) channel;
1302
1303 del_timer(&scc->tx_wdog);
1304
1305 scc_key_trx(scc, TX_OFF);
1306
1307 if (scc->kiss.mintime != TIMER_OFF)
1308 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1309 scc->stat.tx_state = TXS_WAIT;
1310 }
1311
1312 static void scc_init_timer(struct scc_channel *scc)
1313 {
1314 unsigned long flags;
1315
1316 save_flags(flags);
1317 cli();
1318
1319 scc->stat.tx_state = TXS_IDLE;
1320
1321 restore_flags(flags);
1322 }
1323
1324
1325 /* ******************************************************************** */
1326 /* * Set/get L1 parameters * */
1327 /* ******************************************************************** */
1328
1329
1330 /*
1331 * this will set the "hardware" parameters through KISS commands or ioctl()
1332 */
1333
1334 #define CAST(x) (unsigned long)(x)
1335
1336 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1337 {
1338 switch (cmd)
1339 {
1340 case PARAM_TXDELAY: scc->kiss.txdelay=arg; break;
1341 case PARAM_PERSIST: scc->kiss.persist=arg; break;
1342 case PARAM_SLOTTIME: scc->kiss.slottime=arg; break;
1343 case PARAM_TXTAIL: scc->kiss.tailtime=arg; break;
1344 case PARAM_FULLDUP: scc->kiss.fulldup=arg; break;
1345 case PARAM_DTR: break; /* does someone need this? */
1346 case PARAM_GROUP: scc->kiss.group=arg; break;
1347 case PARAM_IDLE: scc->kiss.idletime=arg; break;
1348 case PARAM_MIN: scc->kiss.mintime=arg; break;
1349 case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break;
1350 case PARAM_WAIT: scc->kiss.waittime=arg; break;
1351 case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break;
1352 case PARAM_TX: scc->kiss.tx_inhibit=arg; break;
1353
1354 case PARAM_SOFTDCD:
1355 scc->kiss.softdcd=arg;
1356 if (arg)
1357 {
1358 or(scc, R15, SYNCIE);
1359 cl(scc, R15, DCDIE);
1360 start_hunt(scc);
1361 } else {
1362 or(scc, R15, DCDIE);
1363 cl(scc, R15, SYNCIE);
1364 }
1365 break;
1366
1367 case PARAM_SPEED:
1368 if (arg < 256)
1369 scc->modem.speed=arg*100;
1370 else
1371 scc->modem.speed=arg;
1372
1373 if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */
1374 set_speed(scc);
1375 break;
1376
1377 case PARAM_RTS:
1378 if ( !(scc->wreg[R5] & RTS) )
1379 {
1380 if (arg != TX_OFF)
1381 scc_key_trx(scc, TX_ON);
1382 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1383 } else {
1384 if (arg == TX_OFF)
1385 {
1386 scc->stat.tx_state = TXS_BUSY;
1387 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1388 }
1389 }
1390 break;
1391
1392 case PARAM_HWEVENT:
1393 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1394 break;
1395
1396 default: return -EINVAL;
1397 }
1398
1399 return 0;
1400 }
1401
1402
1403
1404 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1405 {
1406 switch (cmd)
1407 {
1408 case PARAM_TXDELAY: return CAST(scc->kiss.txdelay);
1409 case PARAM_PERSIST: return CAST(scc->kiss.persist);
1410 case PARAM_SLOTTIME: return CAST(scc->kiss.slottime);
1411 case PARAM_TXTAIL: return CAST(scc->kiss.tailtime);
1412 case PARAM_FULLDUP: return CAST(scc->kiss.fulldup);
1413 case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd);
1414 case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0);
1415 case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0);
1416 case PARAM_SPEED: return CAST(scc->modem.speed);
1417 case PARAM_GROUP: return CAST(scc->kiss.group);
1418 case PARAM_IDLE: return CAST(scc->kiss.idletime);
1419 case PARAM_MIN: return CAST(scc->kiss.mintime);
1420 case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup);
1421 case PARAM_WAIT: return CAST(scc->kiss.waittime);
1422 case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer);
1423 case PARAM_TX: return CAST(scc->kiss.tx_inhibit);
1424 default: return NO_SUCH_PARAM;
1425 }
1426
1427 }
1428
1429 #undef CAST
1430 #undef SVAL
1431
1432 /* ******************************************************************* */
1433 /* * Send calibration pattern * */
1434 /* ******************************************************************* */
1435
1436 static void scc_stop_calibrate(unsigned long channel)
1437 {
1438 struct scc_channel *scc = (struct scc_channel *) channel;
1439 unsigned long flags;
1440
1441 save_flags(flags);
1442 cli();
1443
1444 del_timer(&scc->tx_wdog);
1445 scc_key_trx(scc, TX_OFF);
1446 wr(scc, R6, 0);
1447 wr(scc, R7, FLAG);
1448 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1449 Outb(scc->ctrl,RES_EXT_INT);
1450
1451 netif_wake_queue(scc->dev);
1452 restore_flags(flags);
1453 }
1454
1455
1456 static void
1457 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1458 {
1459 unsigned long flags;
1460
1461 save_flags(flags);
1462 cli();
1463
1464 netif_stop_queue(scc->dev);
1465 scc_discard_buffers(scc);
1466
1467 del_timer(&scc->tx_wdog);
1468
1469 scc->tx_wdog.data = (unsigned long) scc;
1470 scc->tx_wdog.function = scc_stop_calibrate;
1471 scc->tx_wdog.expires = jiffies + HZ*duration;
1472 add_timer(&scc->tx_wdog);
1473
1474 /* This doesn't seem to work. Why not? */
1475 wr(scc, R6, 0);
1476 wr(scc, R7, pattern);
1477
1478 /*
1479 * Don't know if this works.
1480 * Damn, where is my Z8530 programming manual...?
1481 */
1482
1483 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1484 Outb(scc->ctrl,RES_EXT_INT);
1485
1486 scc_key_trx(scc, TX_ON);
1487 restore_flags(flags);
1488 }
1489
1490 /* ******************************************************************* */
1491 /* * Init channel structures, special HW, etc... * */
1492 /* ******************************************************************* */
1493
1494 /*
1495 * Reset the Z8530s and setup special hardware
1496 */
1497
1498 static void z8530_init(void)
1499 {
1500 struct scc_channel *scc;
1501 int chip, k;
1502 unsigned long flags;
1503 char *flag;
1504
1505
1506 printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1507
1508 flag=" ";
1509 for (k = 0; k < 16; k++)
1510 if (Ivec[k].used)
1511 {
1512 printk("%s%d", flag, k);
1513 flag=",";
1514 }
1515 printk("\n");
1516
1517
1518 /* reset and pre-init all chips in the system */
1519 for (chip = 0; chip < Nchips; chip++)
1520 {
1521 scc=&SCC_Info[2*chip];
1522 if (!scc->ctrl) continue;
1523
1524 /* Special SCC cards */
1525
1526 if(scc->brand & EAGLE) /* this is an EAGLE card */
1527 Outb(scc->special,0x08); /* enable interrupt on the board */
1528
1529 if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */
1530 Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1531
1532
1533 /* Reset and pre-init Z8530 */
1534
1535 save_flags(flags);
1536 cli();
1537
1538 Outb(scc->ctrl, 0);
1539 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */
1540 udelay(100); /* give it 'a bit' more time than required */
1541 wr(scc, R2, chip*16); /* interrupt vector */
1542 wr(scc, R9, VIS); /* vector includes status */
1543
1544 restore_flags(flags);
1545 }
1546
1547
1548 Driver_Initialized = 1;
1549 }
1550
1551 /*
1552 * Allocate device structure, err, instance, and register driver
1553 */
1554
1555 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev)
1556 {
1557 struct net_device *dev;
1558
1559 if (dev_get(name))
1560 {
1561 printk(KERN_INFO "Z8530drv: device %s already exists.\n", name);
1562 return -EEXIST;
1563 }
1564
1565 if ((scc->dev = (struct net_device *) kmalloc(sizeof(struct net_device), GFP_KERNEL)) == NULL)
1566 return -ENOMEM;
1567
1568 dev = scc->dev;
1569 memset(dev, 0, sizeof(struct net_device));
1570
1571 strcpy(dev->name, name);
1572 dev->priv = (void *) scc;
1573 dev->init = scc_net_init;
1574
1575 if ((addev? register_netdevice(dev) : register_netdev(dev)) != 0)
1576 {
1577 kfree(dev);
1578 return -EIO;
1579 }
1580
1581 return 0;
1582 }
1583
1584
1585
1586 /* ******************************************************************** */
1587 /* * Network driver methods * */
1588 /* ******************************************************************** */
1589
1590 static unsigned char ax25_bcast[AX25_ADDR_LEN] =
1591 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
1592 static unsigned char ax25_nocall[AX25_ADDR_LEN] =
1593 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
1594
1595 /* ----> Initialize device <----- */
1596
1597 static int scc_net_init(struct net_device *dev)
1598 {
1599 dev_init_buffers(dev);
1600
1601 dev->tx_queue_len = 16; /* should be enough... */
1602
1603 dev->open = scc_net_open;
1604 dev->stop = scc_net_close;
1605
1606 dev->hard_start_xmit = scc_net_tx;
1607 dev->hard_header = scc_net_header;
1608 dev->rebuild_header = ax25_rebuild_header;
1609 dev->set_mac_address = scc_net_set_mac_address;
1610 dev->get_stats = scc_net_get_stats;
1611 dev->do_ioctl = scc_net_ioctl;
1612 dev->tx_timeout = NULL;
1613
1614 memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
1615 memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN);
1616
1617 dev->flags = 0;
1618
1619 dev->type = ARPHRD_AX25;
1620 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1621 dev->mtu = AX25_DEF_PACLEN;
1622 dev->addr_len = AX25_ADDR_LEN;
1623
1624 return 0;
1625 }
1626
1627 /* ----> open network device <---- */
1628
1629 static int scc_net_open(struct net_device *dev)
1630 {
1631 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1632
1633 if (!scc->init)
1634 return -EINVAL;
1635
1636 MOD_INC_USE_COUNT;
1637
1638 scc->tx_buff = NULL;
1639 skb_queue_head_init(&scc->tx_queue);
1640
1641 init_channel(scc);
1642
1643 netif_start_queue(dev);
1644 return 0;
1645 }
1646
1647 /* ----> close network device <---- */
1648
1649 static int scc_net_close(struct net_device *dev)
1650 {
1651 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1652 unsigned long flags;
1653
1654 netif_stop_queue(dev);
1655
1656 save_flags(flags);
1657 cli();
1658
1659 Outb(scc->ctrl,0); /* Make sure pointer is written */
1660 wr(scc,R1,0); /* disable interrupts */
1661 wr(scc,R3,0);
1662
1663 del_timer(&scc->tx_t);
1664 del_timer(&scc->tx_wdog);
1665
1666 restore_flags(flags);
1667
1668 scc_discard_buffers(scc);
1669
1670 MOD_DEC_USE_COUNT;
1671 return 0;
1672 }
1673
1674 /* ----> receive frame, called from scc_rxint() <---- */
1675
1676 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1677 {
1678 if (skb->len == 0)
1679 {
1680 dev_kfree_skb_irq(skb);
1681 return;
1682 }
1683
1684 scc->dev_stat.rx_packets++;
1685
1686 skb->dev = scc->dev;
1687 skb->protocol = htons(ETH_P_AX25);
1688 skb->mac.raw = skb->data;
1689 skb->pkt_type = PACKET_HOST;
1690
1691 netif_rx(skb);
1692 return;
1693 }
1694
1695 /* ----> transmit frame <---- */
1696
1697 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev)
1698 {
1699 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1700 unsigned long flags;
1701 char kisscmd;
1702
1703 if (skb->len > scc->stat.bufsize || skb->len < 2)
1704 {
1705 scc->dev_stat.tx_dropped++; /* bogus frame */
1706 dev_kfree_skb(skb);
1707 return 0;
1708 }
1709
1710 scc->dev_stat.tx_packets++;
1711 scc->stat.txframes++;
1712
1713 kisscmd = *skb->data & 0x1f;
1714 skb_pull(skb, 1);
1715
1716 if (kisscmd)
1717 {
1718 scc_set_param(scc, kisscmd, *skb->data);
1719 dev_kfree_skb(skb);
1720 return 0;
1721 }
1722
1723 save_flags(flags);
1724 cli();
1725
1726 if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len)
1727 {
1728 struct sk_buff *skb_del;
1729 skb_del = skb_dequeue(&scc->tx_queue);
1730 dev_kfree_skb(skb_del);
1731 }
1732 skb_queue_tail(&scc->tx_queue, skb);
1733 dev->trans_start = jiffies;
1734
1735
1736 /*
1737 * Start transmission if the trx state is idle or
1738 * t_idle hasn't expired yet. Use dwait/persistance/slottime
1739 * algorithm for normal halfduplex operation.
1740 */
1741
1742 if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2)
1743 {
1744 scc->stat.tx_state = TXS_BUSY;
1745 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1746 scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1747 else
1748 scc_start_tx_timer(scc, t_dwait, 0);
1749 }
1750
1751 restore_flags(flags);
1752 return 0;
1753 }
1754
1755 /* ----> ioctl functions <---- */
1756
1757 /*
1758 * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg
1759 * SIOCSCCINI - initialize driver arg: ---
1760 * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg
1761 * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg
1762 * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1763 * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1764 * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg
1765 * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg
1766 */
1767
1768 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1769 {
1770 struct scc_kiss_cmd kiss_cmd;
1771 struct scc_mem_config memcfg;
1772 struct scc_hw_config hwcfg;
1773 struct scc_calibrate cal;
1774 int chan;
1775 unsigned char device_name[10];
1776 void *arg;
1777 struct scc_channel *scc;
1778
1779 scc = (struct scc_channel *) dev->priv;
1780 arg = (void *) ifr->ifr_data;
1781
1782 if (!Driver_Initialized)
1783 {
1784 if (cmd == SIOCSCCCFG)
1785 {
1786 int found = 1;
1787
1788 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1789 if (!arg) return -EFAULT;
1790
1791 if (Nchips >= SCC_MAXCHIPS)
1792 return -EINVAL;
1793
1794 if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1795 return -EFAULT;
1796
1797 if (hwcfg.irq == 2) hwcfg.irq = 9;
1798
1799 if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1800 {
1801 if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL))
1802 printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1803 else
1804 Ivec[hwcfg.irq].used = 1;
1805 }
1806
1807 if (hwcfg.vector_latch)
1808 Vector_Latch = hwcfg.vector_latch;
1809
1810 if (hwcfg.clock == 0)
1811 hwcfg.clock = SCC_DEFAULT_CLOCK;
1812
1813 #ifndef SCC_DONT_CHECK
1814 disable_irq(hwcfg.irq);
1815
1816 check_region(scc->ctrl, 1);
1817 Outb(hwcfg.ctrl_a, 0);
1818 OutReg(hwcfg.ctrl_a, R9, FHWRES);
1819 udelay(100);
1820 OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */
1821 udelay(5);
1822
1823 if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1824 found = 0;
1825
1826 enable_irq(hwcfg.irq);
1827 #endif
1828
1829 if (found)
1830 {
1831 SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a;
1832 SCC_Info[2*Nchips ].data = hwcfg.data_a;
1833 SCC_Info[2*Nchips ].irq = hwcfg.irq;
1834 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1835 SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1836 SCC_Info[2*Nchips+1].irq = hwcfg.irq;
1837
1838 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1839 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1840 SCC_ctrl[Nchips].irq = hwcfg.irq;
1841 }
1842
1843
1844 for (chan = 0; chan < 2; chan++)
1845 {
1846 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1847
1848 SCC_Info[2*Nchips+chan].special = hwcfg.special;
1849 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1850 SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1851 SCC_Info[2*Nchips+chan].option = hwcfg.option;
1852 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1853
1854 #ifdef SCC_DONT_CHECK
1855 printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n",
1856 device_name,
1857 SCC_Info[2*Nchips+chan].data,
1858 SCC_Info[2*Nchips+chan].ctrl);
1859
1860 #else
1861 printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n",
1862 device_name,
1863 chan? hwcfg.data_b : hwcfg.data_a,
1864 chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1865 found? "found" : "missing");
1866 #endif
1867
1868 if (found)
1869 {
1870 request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1871 request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1872 if (Nchips+chan != 0)
1873 scc_net_setup(&SCC_Info[2*Nchips+chan], device_name, 1);
1874 }
1875 }
1876
1877 if (found) Nchips++;
1878
1879 return 0;
1880 }
1881
1882 if (cmd == SIOCSCCINI)
1883 {
1884 if (!capable(CAP_SYS_RAWIO))
1885 return -EPERM;
1886
1887 if (Nchips == 0)
1888 return -EINVAL;
1889
1890 z8530_init();
1891 return 0;
1892 }
1893
1894 return -EINVAL; /* confuse the user */
1895 }
1896
1897 if (!scc->init)
1898 {
1899 if (cmd == SIOCSCCCHANINI)
1900 {
1901 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1902 if (!arg) return -EINVAL;
1903
1904 scc->stat.bufsize = SCC_BUFSIZE;
1905
1906 if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1907 return -EINVAL;
1908
1909 /* default KISS Params */
1910
1911 if (scc->modem.speed < 4800)
1912 {
1913 scc->kiss.txdelay = 36; /* 360 ms */
1914 scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */
1915 scc->kiss.slottime = 16; /* 160 ms */
1916 scc->kiss.tailtime = 4; /* minimal reasonable value */
1917 scc->kiss.fulldup = 0; /* CSMA */
1918 scc->kiss.waittime = 50; /* 500 ms */
1919 scc->kiss.maxkeyup = 10; /* 10 s */
1920 scc->kiss.mintime = 3; /* 3 s */
1921 scc->kiss.idletime = 30; /* 30 s */
1922 scc->kiss.maxdefer = 120; /* 2 min */
1923 scc->kiss.softdcd = 0; /* hardware dcd */
1924 } else {
1925 scc->kiss.txdelay = 10; /* 100 ms */
1926 scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */
1927 scc->kiss.slottime = 8; /* 160 ms */
1928 scc->kiss.tailtime = 1; /* minimal reasonable value */
1929 scc->kiss.fulldup = 0; /* CSMA */
1930 scc->kiss.waittime = 50; /* 500 ms */
1931 scc->kiss.maxkeyup = 7; /* 7 s */
1932 scc->kiss.mintime = 3; /* 3 s */
1933 scc->kiss.idletime = 30; /* 30 s */
1934 scc->kiss.maxdefer = 120; /* 2 min */
1935 scc->kiss.softdcd = 0; /* hardware dcd */
1936 }
1937
1938 scc->tx_buff = NULL;
1939 skb_queue_head_init(&scc->tx_queue);
1940 scc->init = 1;
1941
1942 return 0;
1943 }
1944
1945 return -EINVAL;
1946 }
1947
1948 switch(cmd)
1949 {
1950 case SIOCSCCRESERVED:
1951 return -ENOIOCTLCMD;
1952
1953 case SIOCSCCSMEM:
1954 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1955 if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1956 return -EINVAL;
1957 scc->stat.bufsize = memcfg.bufsize;
1958 return 0;
1959
1960 case SIOCSCCGSTAT:
1961 if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1962 return -EINVAL;
1963 return 0;
1964
1965 case SIOCSCCGKISS:
1966 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1967 return -EINVAL;
1968 kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
1969 if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
1970 return -EINVAL;
1971 return 0;
1972
1973 case SIOCSCCSKISS:
1974 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1975 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1976 return -EINVAL;
1977 return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
1978
1979 case SIOCSCCCAL:
1980 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1981 if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
1982 return -EINVAL;
1983
1984 scc_start_calibrate(scc, cal.time, cal.pattern);
1985 return 0;
1986
1987 default:
1988 return -ENOIOCTLCMD;
1989
1990 }
1991
1992 return -EINVAL;
1993 }
1994
1995 /* ----> set interface callsign <---- */
1996
1997 static int scc_net_set_mac_address(struct net_device *dev, void *addr)
1998 {
1999 struct sockaddr *sa = (struct sockaddr *) addr;
2000 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
2001 return 0;
2002 }
2003
2004 /* ----> "hard" header <---- */
2005
2006 static int scc_net_header(struct sk_buff *skb, struct net_device *dev,
2007 unsigned short type, void *daddr, void *saddr, unsigned len)
2008 {
2009 return ax25_encapsulate(skb, dev, type, daddr, saddr, len);
2010 }
2011
2012 /* ----> get statistics <---- */
2013
2014 static struct net_device_stats *scc_net_get_stats(struct net_device *dev)
2015 {
2016 struct scc_channel *scc = (struct scc_channel *) dev->priv;
2017
2018 scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
2019 scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
2020 scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
2021 scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
2022
2023 return &scc->dev_stat;
2024 }
2025
2026 /* ******************************************************************** */
2027 /* * dump statistics to /proc/net/z8530drv * */
2028 /* ******************************************************************** */
2029
2030
2031 static int scc_net_get_info(char *buffer, char **start, off_t offset, int length)
2032 {
2033 struct scc_channel *scc;
2034 struct scc_kiss *kiss;
2035 struct scc_stat *stat;
2036 int len = 0;
2037 off_t pos = 0;
2038 off_t begin = 0;
2039 int k;
2040
2041 len += sprintf(buffer, "z8530drv-"VERSION"\n");
2042
2043 if (!Driver_Initialized)
2044 {
2045 len += sprintf(buffer+len, "not initialized\n");
2046 goto done;
2047 }
2048
2049 if (!Nchips)
2050 {
2051 len += sprintf(buffer+len, "chips missing\n");
2052 goto done;
2053 }
2054
2055 for (k = 0; k < Nchips*2; k++)
2056 {
2057 scc = &SCC_Info[k];
2058 stat = &scc->stat;
2059 kiss = &scc->kiss;
2060
2061 if (!scc->init)
2062 continue;
2063
2064 /* dev data ctrl irq clock brand enh vector special option
2065 * baud nrz clocksrc softdcd bufsize
2066 * rxints txints exints spints
2067 * rcvd rxerrs over / xmit txerrs under / nospace bufsize
2068 * txd pers slot tail ful wait min maxk idl defr txof grp
2069 * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2070 * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2071 */
2072
2073 len += sprintf(buffer+len, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2074 scc->dev->name,
2075 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2076 scc->enhanced, Vector_Latch, scc->special,
2077 scc->option);
2078 len += sprintf(buffer+len, "\t%lu %d %d %d %d\n",
2079 scc->modem.speed, scc->modem.nrz,
2080 scc->modem.clocksrc, kiss->softdcd,
2081 stat->bufsize);
2082 len += sprintf(buffer+len, "\t%lu %lu %lu %lu\n",
2083 stat->rxints, stat->txints, stat->exints, stat->spints);
2084 len += sprintf(buffer+len, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2085 stat->rxframes, stat->rxerrs, stat->rx_over,
2086 stat->txframes, stat->txerrs, stat->tx_under,
2087 stat->nospace, stat->tx_state);
2088
2089 #define K(x) kiss->x
2090 len += sprintf(buffer+len, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2091 K(txdelay), K(persist), K(slottime), K(tailtime),
2092 K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2093 K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2094 #undef K
2095 #ifdef SCC_DEBUG
2096 {
2097 int reg;
2098
2099 len += sprintf(buffer+len, "\tW ");
2100 for (reg = 0; reg < 16; reg++)
2101 len += sprintf(buffer+len, "%2.2x ", scc->wreg[reg]);
2102 len += sprintf(buffer+len, "\n");
2103
2104 len += sprintf(buffer+len, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2105 for (reg = 3; reg < 8; reg++)
2106 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2107 len += sprintf(buffer+len, "XX ");
2108 for (reg = 9; reg < 16; reg++)
2109 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2110 len += sprintf(buffer+len, "\n");
2111 }
2112 #endif
2113 len += sprintf(buffer+len, "\n");
2114
2115 pos = begin + len;
2116
2117 if (pos < offset) {
2118 len = 0;
2119 begin = pos;
2120 }
2121
2122 if (pos > offset + length)
2123 break;
2124 }
2125
2126 done:
2127
2128 *start = buffer + (offset - begin);
2129 len -= (offset - begin);
2130
2131 if (len > length) len = length;
2132
2133 return len;
2134 }
2135
2136 #ifdef CONFIG_PROC_FS
2137 #define scc_net_procfs_init() proc_net_create("z8530drv",0,scc_net_get_info)
2138 #define scc_net_procfs_remove() proc_net_remove("z8530drv")
2139 #else
2140 #define scc_net_procfs_init()
2141 #define scc_net_procfs_remove()
2142 #endif
2143
2144
2145 /* ******************************************************************** */
2146 /* * Init SCC driver * */
2147 /* ******************************************************************** */
2148
2149 static int __init scc_init_driver (void)
2150 {
2151 int chip, chan, k, result;
2152 char devname[10];
2153
2154 printk(KERN_INFO BANNER);
2155
2156 memset(&SCC_ctrl, 0, sizeof(SCC_ctrl));
2157
2158 /* pre-init channel information */
2159
2160 for (chip = 0; chip < SCC_MAXCHIPS; chip++)
2161 {
2162 memset((char *) &SCC_Info[2*chip ], 0, sizeof(struct scc_channel));
2163 memset((char *) &SCC_Info[2*chip+1], 0, sizeof(struct scc_channel));
2164
2165 for (chan = 0; chan < 2; chan++)
2166 SCC_Info[2*chip+chan].magic = SCC_MAGIC;
2167 }
2168
2169 for (k = 0; k < 16; k++) Ivec[k].used = 0;
2170
2171 sprintf(devname,"%s0", SCC_DriverName);
2172
2173 result = scc_net_setup(SCC_Info, devname, 0);
2174 if (result)
2175 {
2176 printk(KERN_ERR "z8530drv: cannot initialize module\n");
2177 return result;
2178 }
2179
2180 scc_net_procfs_init();
2181
2182 return 0;
2183 }
2184
2185 static void __exit scc_cleanup_driver(void)
2186 {
2187 long flags;
2188 io_port ctrl;
2189 int k;
2190 struct scc_channel *scc;
2191
2192 save_flags(flags);
2193 cli();
2194
2195 if (Nchips == 0)
2196 unregister_netdev(SCC_Info[0].dev);
2197
2198 for (k = 0; k < Nchips; k++)
2199 if ( (ctrl = SCC_ctrl[k].chan_A) )
2200 {
2201 Outb(ctrl, 0);
2202 OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2203 udelay(50);
2204 }
2205
2206 for (k = 0; k < Nchips*2; k++)
2207 {
2208 scc = &SCC_Info[k];
2209 if (scc)
2210 {
2211 release_region(scc->ctrl, 1);
2212 release_region(scc->data, 1);
2213 if (scc->dev)
2214 {
2215 unregister_netdev(scc->dev);
2216 kfree(scc->dev);
2217 }
2218 }
2219 }
2220
2221 for (k=0; k < 16 ; k++)
2222 if (Ivec[k].used) free_irq(k, NULL);
2223
2224 restore_flags(flags);
2225
2226 scc_net_procfs_remove();
2227 }
2228
2229 MODULE_AUTHOR("Joerg Reuter <jreuter@poboxes.com>");
2230 MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
2231 MODULE_SUPPORTED_DEVICE("scc");
2232 module_init(scc_init_driver);
2233 module_exit(scc_cleanup_driver);
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