Linux 2.4.0-test7-pre6
[davej-history.git] / arch / i386 / kernel / mpparse.c
blob746bea030706e024cf21558529096f61ce94e933
1 /*
2 * Intel Multiprocessor Specificiation 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
8 * Fixes
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki : Bits for default MP configurations
15 #include <linux/mm.h>
16 #include <linux/irq.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/config.h>
20 #include <linux/bootmem.h>
21 #include <linux/smp_lock.h>
22 #include <linux/kernel_stat.h>
23 #include <linux/mc146818rtc.h>
25 #include <asm/smp.h>
26 #include <asm/mtrr.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
30 /* Have we found an MP table */
31 int smp_found_config = 0;
34 * Various Linux-internal data structures created from the
35 * MP-table.
37 int apic_version [MAX_APICS];
38 int mp_bus_id_to_type [MAX_MP_BUSSES] = { -1, };
39 int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { -1, };
40 int mp_current_pci_id = 0;
41 int pic_mode;
42 unsigned long mp_lapic_addr = 0;
44 /* Processor that is doing the boot up */
45 unsigned int boot_cpu_id = -1U;
46 /* Internal processor count */
47 static unsigned int num_processors = 0;
49 /* Bitmask of physically existing CPUs */
50 unsigned long phys_cpu_present_map = 0;
53 * Intel MP BIOS table parsing routines:
56 #ifndef CONFIG_X86_VISWS_APIC
58 * Checksum an MP configuration block.
61 static int __init mpf_checksum(unsigned char *mp, int len)
63 int sum = 0;
65 while (len--)
66 sum += *mp++;
68 return sum & 0xFF;
72 * Processor encoding in an MP configuration block
75 static char __init *mpc_family(int family,int model)
77 static char n[32];
78 static char *model_defs[]=
80 "80486DX","80486DX",
81 "80486SX","80486DX/2 or 80487",
82 "80486SL","80486SX/2",
83 "Unknown","80486DX/2-WB",
84 "80486DX/4","80486DX/4-WB"
87 switch (family) {
88 case 0x04:
89 if (model < 10)
90 return model_defs[model];
91 break;
93 case 0x05:
94 return("Pentium(tm)");
96 case 0x06:
97 return("Pentium(tm) Pro");
99 case 0x0F:
100 if (model == 0x0F)
101 return("Special controller");
103 sprintf(n,"Unknown CPU [%d:%d]",family, model);
104 return n;
107 static void __init MP_processor_info (struct mpc_config_processor *m)
109 int ver;
111 if (!(m->mpc_cpuflag & CPU_ENABLED))
112 return;
114 printk("Processor #%d %s APIC version %d\n",
115 m->mpc_apicid,
116 mpc_family( (m->mpc_cpufeature & CPU_FAMILY_MASK)>>8 ,
117 (m->mpc_cpufeature & CPU_MODEL_MASK)>>4),
118 m->mpc_apicver);
120 if (m->mpc_featureflag&(1<<0))
121 Dprintk(" Floating point unit present.\n");
122 if (m->mpc_featureflag&(1<<7))
123 Dprintk(" Machine Exception supported.\n");
124 if (m->mpc_featureflag&(1<<8))
125 Dprintk(" 64 bit compare & exchange supported.\n");
126 if (m->mpc_featureflag&(1<<9))
127 Dprintk(" Internal APIC present.\n");
129 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
130 Dprintk(" Bootup CPU\n");
131 boot_cpu_id = m->mpc_apicid;
133 num_processors++;
135 if (m->mpc_apicid > MAX_APICS) {
136 printk("Processor #%d INVALID. (Max ID: %d).\n",
137 m->mpc_apicid, MAX_APICS);
138 return;
140 ver = m->mpc_apicver;
142 phys_cpu_present_map |= 1 << m->mpc_apicid;
144 * Validate version
146 if (ver == 0x0) {
147 printk("BIOS bug, APIC version is 0 for CPU#%d! fixing up to 0x10. (tell your hw vendor)\n", m->mpc_apicid);
148 ver = 0x10;
150 apic_version[m->mpc_apicid] = ver;
153 static void __init MP_bus_info (struct mpc_config_bus *m)
155 char str[7];
157 memcpy(str, m->mpc_bustype, 6);
158 str[6] = 0;
159 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
161 if (strncmp(str, "ISA", 3) == 0) {
162 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
163 } else if (strncmp(str, "EISA", 4) == 0) {
164 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
165 } else if (strncmp(str, "PCI", 3) == 0) {
166 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
167 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
168 mp_current_pci_id++;
169 } else if (strncmp(str, "MCA", 3) == 0) {
170 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
171 } else {
172 printk("Unknown bustype %s\n", str);
173 panic("cannot handle bus - mail to linux-smp@vger.kernel.org");
177 static void __init MP_ioapic_info (struct mpc_config_ioapic *m)
179 if (!(m->mpc_flags & MPC_APIC_USABLE))
180 return;
182 printk("I/O APIC #%d Version %d at 0x%lX.\n",
183 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
184 if (nr_ioapics >= MAX_IO_APICS) {
185 printk("Max # of I/O APICs (%d) exceeded (found %d).\n",
186 MAX_IO_APICS, nr_ioapics);
187 panic("Recompile kernel with bigger MAX_IO_APICS!.\n");
189 mp_ioapics[nr_ioapics] = *m;
190 nr_ioapics++;
193 static void __init MP_intsrc_info (struct mpc_config_intsrc *m)
195 mp_irqs [mp_irq_entries] = *m;
196 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
197 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
198 m->mpc_irqtype, m->mpc_irqflag & 3,
199 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
200 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
201 if (++mp_irq_entries == MAX_IRQ_SOURCES)
202 panic("Max # of irq sources exceeded!!\n");
205 static void __init MP_lintsrc_info (struct mpc_config_lintsrc *m)
207 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
208 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
209 m->mpc_irqtype, m->mpc_irqflag & 3,
210 (m->mpc_irqflag >> 2) &3, m->mpc_srcbusid,
211 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
213 * Well it seems all SMP boards in existence
214 * use ExtINT/LVT1 == LINT0 and
215 * NMI/LVT2 == LINT1 - the following check
216 * will show us if this assumptions is false.
217 * Until then we do not have to add baggage.
219 if ((m->mpc_irqtype == mp_ExtINT) &&
220 (m->mpc_destapiclint != 0))
221 BUG();
222 if ((m->mpc_irqtype == mp_NMI) &&
223 (m->mpc_destapiclint != 1))
224 BUG();
228 * Read/parse the MPC
231 static int __init smp_read_mpc(struct mp_config_table *mpc)
233 char str[16];
234 int count=sizeof(*mpc);
235 unsigned char *mpt=((unsigned char *)mpc)+count;
237 if (memcmp(mpc->mpc_signature,MPC_SIGNATURE,4))
239 panic("SMP mptable: bad signature [%c%c%c%c]!\n",
240 mpc->mpc_signature[0],
241 mpc->mpc_signature[1],
242 mpc->mpc_signature[2],
243 mpc->mpc_signature[3]);
244 return 1;
246 if (mpf_checksum((unsigned char *)mpc,mpc->mpc_length))
248 panic("SMP mptable: checksum error!\n");
249 return 1;
251 if (mpc->mpc_spec!=0x01 && mpc->mpc_spec!=0x04)
253 printk("Bad Config Table version (%d)!!\n",mpc->mpc_spec);
254 return 1;
256 memcpy(str,mpc->mpc_oem,8);
257 str[8]=0;
258 printk("OEM ID: %s ",str);
260 memcpy(str,mpc->mpc_productid,12);
261 str[12]=0;
262 printk("Product ID: %s ",str);
264 printk("APIC at: 0x%lX\n",mpc->mpc_lapic);
266 /* save the local APIC address, it might be non-default */
267 mp_lapic_addr = mpc->mpc_lapic;
270 * Now process the configuration blocks.
272 while (count < mpc->mpc_length) {
273 switch(*mpt) {
274 case MP_PROCESSOR:
276 struct mpc_config_processor *m=
277 (struct mpc_config_processor *)mpt;
278 MP_processor_info(m);
279 mpt += sizeof(*m);
280 count += sizeof(*m);
281 break;
283 case MP_BUS:
285 struct mpc_config_bus *m=
286 (struct mpc_config_bus *)mpt;
287 MP_bus_info(m);
288 mpt += sizeof(*m);
289 count += sizeof(*m);
290 break;
292 case MP_IOAPIC:
294 struct mpc_config_ioapic *m=
295 (struct mpc_config_ioapic *)mpt;
296 MP_ioapic_info(m);
297 mpt+=sizeof(*m);
298 count+=sizeof(*m);
299 break;
301 case MP_INTSRC:
303 struct mpc_config_intsrc *m=
304 (struct mpc_config_intsrc *)mpt;
306 MP_intsrc_info(m);
307 mpt+=sizeof(*m);
308 count+=sizeof(*m);
309 break;
311 case MP_LINTSRC:
313 struct mpc_config_lintsrc *m=
314 (struct mpc_config_lintsrc *)mpt;
315 MP_lintsrc_info(m);
316 mpt+=sizeof(*m);
317 count+=sizeof(*m);
318 break;
322 return num_processors;
325 static void __init construct_default_ioirq_mptable(int mpc_default_type)
327 struct mpc_config_intsrc intsrc;
328 int i;
330 intsrc.mpc_type = MP_INTSRC;
331 intsrc.mpc_irqflag = 0; /* conforming */
332 intsrc.mpc_srcbus = 0;
333 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
335 intsrc.mpc_irqtype = mp_INT;
336 for (i = 0; i < 16; i++) {
337 switch (mpc_default_type) {
338 case 2:
339 if (i == 0 || i == 13)
340 continue; /* IRQ0 & IRQ13 not connected */
341 /* fall through */
342 default:
343 if (i == 2)
344 continue; /* IRQ2 is never connected */
347 intsrc.mpc_srcbusirq = i;
348 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
349 MP_intsrc_info(&intsrc);
352 intsrc.mpc_irqtype = mp_ExtINT;
353 intsrc.mpc_srcbusirq = 0;
354 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
355 MP_intsrc_info(&intsrc);
358 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
360 struct mpc_config_processor processor;
361 struct mpc_config_bus bus;
362 struct mpc_config_ioapic ioapic;
363 struct mpc_config_lintsrc lintsrc;
364 int linttypes[2] = { mp_ExtINT, mp_NMI };
365 int i;
368 * local APIC has default address
370 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
373 * 2 CPUs, numbered 0 & 1.
375 processor.mpc_type = MP_PROCESSOR;
376 /* Either an integrated APIC or a discrete 82489DX. */
377 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
378 processor.mpc_cpuflag = CPU_ENABLED;
379 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
380 (boot_cpu_data.x86_model << 4) |
381 boot_cpu_data.x86_mask;
382 processor.mpc_featureflag = boot_cpu_data.x86_capability;
383 processor.mpc_reserved[0] = 0;
384 processor.mpc_reserved[1] = 0;
385 for (i = 0; i < 2; i++) {
386 processor.mpc_apicid = i;
387 MP_processor_info(&processor);
390 bus.mpc_type = MP_BUS;
391 bus.mpc_busid = 0;
392 switch (mpc_default_type) {
393 default:
394 printk("???\nUnknown standard configuration %d\n",
395 mpc_default_type);
396 /* fall through */
397 case 1:
398 case 5:
399 memcpy(bus.mpc_bustype, "ISA ", 6);
400 break;
401 case 2:
402 case 6:
403 case 3:
404 memcpy(bus.mpc_bustype, "EISA ", 6);
405 break;
406 case 4:
407 case 7:
408 memcpy(bus.mpc_bustype, "MCA ", 6);
410 MP_bus_info(&bus);
411 if (mpc_default_type > 4) {
412 bus.mpc_busid = 1;
413 memcpy(bus.mpc_bustype, "PCI ", 6);
414 MP_bus_info(&bus);
417 ioapic.mpc_type = MP_IOAPIC;
418 ioapic.mpc_apicid = 2;
419 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
420 ioapic.mpc_flags = MPC_APIC_USABLE;
421 ioapic.mpc_apicaddr = 0xFEC00000;
422 MP_ioapic_info(&ioapic);
425 * We set up most of the low 16 IO-APIC pins according to MPS rules.
427 construct_default_ioirq_mptable(mpc_default_type);
429 lintsrc.mpc_type = MP_LINTSRC;
430 lintsrc.mpc_irqflag = 0; /* conforming */
431 lintsrc.mpc_srcbusid = 0;
432 lintsrc.mpc_srcbusirq = 0;
433 lintsrc.mpc_destapic = MP_APIC_ALL;
434 for (i = 0; i < 2; i++) {
435 lintsrc.mpc_irqtype = linttypes[i];
436 lintsrc.mpc_destapiclint = i;
437 MP_lintsrc_info(&lintsrc);
441 static struct intel_mp_floating *mpf_found;
444 * Scan the memory blocks for an SMP configuration block.
446 void __init get_smp_config (void)
448 struct intel_mp_floating *mpf = mpf_found;
449 printk("Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification);
450 if (mpf->mpf_feature2 & (1<<7)) {
451 printk(" IMCR and PIC compatibility mode.\n");
452 pic_mode = 1;
453 } else {
454 printk(" Virtual Wire compatibility mode.\n");
455 pic_mode = 0;
459 * Now see if we need to read further.
461 if (mpf->mpf_feature1 != 0) {
463 printk("Default MP configuration #%d\n", mpf->mpf_feature1);
464 construct_default_ISA_mptable(mpf->mpf_feature1);
466 } else if (mpf->mpf_physptr) {
469 * Read the physical hardware table. Anything here will
470 * override the defaults.
472 smp_read_mpc((void *)mpf->mpf_physptr);
475 * If there are no explicit MP IRQ entries, then we are
476 * broken. We set up most of the low 16 IO-APIC pins to
477 * ISA defaults and hope it will work.
479 if (!mp_irq_entries) {
480 struct mpc_config_bus bus;
482 printk("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
484 bus.mpc_type = MP_BUS;
485 bus.mpc_busid = 0;
486 memcpy(bus.mpc_bustype, "ISA ", 6);
487 MP_bus_info(&bus);
489 construct_default_ioirq_mptable(0);
492 } else
493 BUG();
495 printk("Processors: %d\n", num_processors);
497 * Only use the first configuration found.
501 static int __init smp_scan_config (unsigned long base, unsigned long length)
503 unsigned long *bp = phys_to_virt(base);
504 struct intel_mp_floating *mpf;
506 Dprintk("Scan SMP from %p for %ld bytes.\n", bp,length);
507 if (sizeof(*mpf) != 16)
508 printk("Error: MPF size\n");
510 while (length > 0) {
511 mpf = (struct intel_mp_floating *)bp;
512 if ((*bp == SMP_MAGIC_IDENT) &&
513 (mpf->mpf_length == 1) &&
514 !mpf_checksum((unsigned char *)bp, 16) &&
515 ((mpf->mpf_specification == 1)
516 || (mpf->mpf_specification == 4)) ) {
518 smp_found_config = 1;
519 printk("found SMP MP-table at %08lx\n",
520 virt_to_phys(mpf));
521 reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE);
522 if (mpf->mpf_physptr)
523 reserve_bootmem(mpf->mpf_physptr, PAGE_SIZE);
524 mpf_found = mpf;
525 return 1;
527 bp += 4;
528 length -= 16;
530 return 0;
533 void __init find_intel_smp (void)
535 unsigned int address;
538 * FIXME: Linux assumes you have 640K of base ram..
539 * this continues the error...
541 * 1) Scan the bottom 1K for a signature
542 * 2) Scan the top 1K of base RAM
543 * 3) Scan the 64K of bios
545 if (smp_scan_config(0x0,0x400) ||
546 smp_scan_config(639*0x400,0x400) ||
547 smp_scan_config(0xF0000,0x10000))
548 return;
550 * If it is an SMP machine we should know now, unless the
551 * configuration is in an EISA/MCA bus machine with an
552 * extended bios data area.
554 * there is a real-mode segmented pointer pointing to the
555 * 4K EBDA area at 0x40E, calculate and scan it here.
557 * NOTE! There are Linux loaders that will corrupt the EBDA
558 * area, and as such this kind of SMP config may be less
559 * trustworthy, simply because the SMP table may have been
560 * stomped on during early boot. These loaders are buggy and
561 * should be fixed.
564 address = *(unsigned short *)phys_to_virt(0x40E);
565 address <<= 4;
566 smp_scan_config(address, 0x1000);
567 if (smp_found_config)
568 printk(KERN_WARNING "WARNING: MP table in the EBDA can be UNSAFE, contact linux-smp@vger.kernel.org if you experience SMP problems!\n");
571 #else
574 * The Visual Workstation is Intel MP compliant in the hardware
575 * sense, but it doesnt have a BIOS(-configuration table).
576 * No problem for Linux.
578 void __init find_visws_smp(void)
580 smp_found_config = 1;
582 phys_cpu_present_map |= 2; /* or in id 1 */
583 apic_version[1] |= 0x10; /* integrated APIC */
584 apic_version[0] |= 0x10;
586 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
589 #endif
592 * - Intel MP Configuration Table
593 * - or SGI Visual Workstation configuration
595 void __init find_smp_config (void)
597 #ifdef CONFIG_X86_IO_APIC
598 find_intel_smp();
599 #endif
600 #ifdef CONFIG_VISWS
601 find_visws_smp();
602 #endif