2 * Copyright (C) 1999 Niibe Yutaka
4 * ASID handling idea taken from MIPS implementation.
6 #ifndef __ASM_SH_MMU_CONTEXT_H
7 #define __ASM_SH_MMU_CONTEXT_H
9 /* The MMU "context" consists of two things:
10 (a) TLB cache version (or round, cycle whatever expression you like)
11 (b) ASID (Address Space IDentifier)
15 * Cache of MMU context last used.
17 extern unsigned long mmu_context_cache
;
19 #define MMU_CONTEXT_ASID_MASK 0xff
20 #define MMU_CONTEXT_VERSION_MASK 0xffffff00
21 #define MMU_CONTEXT_FIRST_VERSION 0x100
24 extern __inline__
void
25 get_new_mmu_context(struct mm_struct
*mm
)
27 unsigned long mc
= ++mmu_context_cache
;
29 if (!(mc
& MMU_CONTEXT_ASID_MASK
)) {
30 /* We exhaust ASID of this version.
31 Flush all TLB and start new cycle. */
33 /* Fix version if needed.
34 Note that we avoid version #0 to distingush NO_CONTEXT. */
36 mmu_context_cache
= mc
= MMU_CONTEXT_FIRST_VERSION
;
42 * Get MMU context if needed.
44 extern __inline__
void
45 get_mmu_context(struct mm_struct
*mm
)
48 unsigned long mc
= mmu_context_cache
;
49 /* Check if we have old version of context.
50 If it's old, we need to get new context with new version. */
51 if ((mm
->context
^ mc
) & MMU_CONTEXT_VERSION_MASK
)
52 get_new_mmu_context(mm
);
57 * Initialize the context related info for a new mm_struct
60 extern __inline__
void init_new_context(struct task_struct
*tsk
,
63 mm
->context
= NO_CONTEXT
;
67 * Destroy context related info for an mm_struct that is about
70 extern __inline__
void destroy_context(struct mm_struct
*mm
)
72 mm
->context
= NO_CONTEXT
;
75 /* Other MMU related constants. */
77 #define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */
78 #define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */
79 #define MMUCR 0xFFFFFFE0 /* MMU Control Register */
81 #define MMU_TLB_ADDRESS_ARRAY 0xF2000000
82 #define MMU_PAGE_ASSOC_BIT 0x80
84 #define MMU_NTLB_ENTRIES 128 /* for 7708 */
86 #define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */
88 #include <asm/uaccess.h> /* to get the definition of __m */
90 extern __inline__
void set_asid (unsigned long asid
)
92 __asm__
__volatile__ ("mov.l %0,%1"
94 : "r" (asid
), "m" (__m(MMU_PTEH
)));
97 extern __inline__
unsigned long get_asid (void)
101 __asm__
__volatile__ ("mov.l %1,%0"
103 : "m" (__m(MMU_PTEH
)));
104 asid
&= MMU_CONTEXT_ASID_MASK
;
109 * After we have set current->mm to a new value, this activates
110 * the context for the new mm so we see the new mappings.
112 extern __inline__
void activate_context(struct mm_struct
*mm
)
115 set_asid(mm
->context
& MMU_CONTEXT_ASID_MASK
);
118 /* MMU_TTB can be used for optimizing the fault handling.
119 (Currently not used) */
120 #define MMU_TTB 0xFFFFFFF8 /* Translation table base register */
121 extern __inline__
void switch_mm(struct mm_struct
*prev
,
122 struct mm_struct
*next
,
123 struct task_struct
*tsk
, unsigned int cpu
)
126 unsigned long __pgdir
= __pa(next
->pgd
);
128 __asm__
__volatile__("mov.l %0,%1": \
129 :"r" (__pgdir
), "m" (__m(MMU_TTB
)));
130 activate_context(next
);
131 clear_bit(cpu
, &prev
->cpu_vm_mask
);
133 set_bit(cpu
, &next
->cpu_vm_mask
);
136 #define activate_mm(prev, next) \
137 switch_mm((prev),(next),NULL,smp_processor_id())
139 #endif /* __ASM_SH_MMU_CONTEXT_H */