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[davej-history.git] / drivers / block / ide-pci.c
bloba5777029b550341f7a5ab21ad604e0d6bfc75448
1 /*
2 * linux/drivers/block/ide-pci.c Version 1.02 December 29, 1997
3 *
4 * Copyright (c) 1995-1998 Mark Lord
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * This module provides support for automatic detection and
10 * configuration of all PCI IDE interfaces present in a system.
11 */
12
13 #include <linux/config.h>
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/timer.h>
17 #include <linux/mm.h>
18 #include <linux/interrupt.h>
19 #include <linux/pci.h>
20 #include <linux/init.h>
21
22 #include <asm/io.h>
23 #include <asm/irq.h>
24
25 #include "ide.h"
26
27 #define DEVID_PIIXa ((ide_pci_devid_t){PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_0})
28 #define DEVID_PIIXb ((ide_pci_devid_t){PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371FB_1})
29 #define DEVID_PIIX3 ((ide_pci_devid_t){PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1})
30 #define DEVID_PIIX4 ((ide_pci_devid_t){PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB})
31 #define DEVID_VP_IDE ((ide_pci_devid_t){PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1})
32 #define DEVID_PDC20246 ((ide_pci_devid_t){PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20246})
33 #define DEVID_RZ1000 ((ide_pci_devid_t){PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000})
34 #define DEVID_RZ1001 ((ide_pci_devid_t){PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001})
35 #define DEVID_CMD640 ((ide_pci_devid_t){PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_640})
36 #define DEVID_CMD646 ((ide_pci_devid_t){PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_646})
37 #define DEVID_SIS5513 ((ide_pci_devid_t){PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513})
38 #define DEVID_OPTI621 ((ide_pci_devid_t){PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C621})
39 #define DEVID_OPTI621V ((ide_pci_devid_t){PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558})
40 #define DEVID_OPTI621X ((ide_pci_devid_t){PCI_VENDOR_ID_OPTI, 0xd568}) /* from datasheets */
41 #define DEVID_TRM290 ((ide_pci_devid_t){PCI_VENDOR_ID_TEKRAM, PCI_DEVICE_ID_TEKRAM_DC290})
42 #define DEVID_NS87410 ((ide_pci_devid_t){PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410})
43 #define DEVID_NS87415 ((ide_pci_devid_t){PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415})
44 #define DEVID_HT6565 ((ide_pci_devid_t){PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565})
45 #define DEVID_AEC6210 ((ide_pci_devid_t){0x1191, 0x0005})
46 #define DEVID_W82C105 ((ide_pci_devid_t){PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105})
47
48 #define IDE_IGNORE ((void *)-1)
49
50 #ifdef CONFIG_BLK_DEV_TRM290
51 extern void ide_init_trm290(ide_hwif_t *);
52 #define INIT_TRM290 &ide_init_trm290
53 #else
54 #define INIT_TRM290 IDE_IGNORE
55 #endif
56
57 #ifdef CONFIG_BLK_DEV_OPTI621
58 extern void ide_init_opti621(ide_hwif_t *);
59 #define INIT_OPTI621 &ide_init_opti621
60 #else
61 #define INIT_OPTI621 NULL
62 #endif
63
64 #ifdef CONFIG_BLK_DEV_NS87415
65 extern void ide_init_ns87415(ide_hwif_t *);
66 #define INIT_NS87415 &ide_init_ns87415
67 #else
68 #define INIT_NS87415 IDE_IGNORE
69 #endif
70
71 #ifdef CONFIG_BLK_DEV_CMD646
72 extern void ide_init_cmd646(ide_hwif_t *);
73 #define INIT_CMD646 &ide_init_cmd646
74 #else
75 #ifdef __sparc_v9__
76 #define INIT_CMD646 IDE_IGNORE
77 #else
78 #define INIT_CMD646 NULL
79 #endif
80 #endif
81
82 #ifdef CONFIG_BLK_DEV_SL82C105
83 extern void ide_init_sl82c105(ide_hwif_t *);
84 #define INIT_W82C105 &ide_init_sl82c105
85 #else
86 #define INIT_W82C105 IDE_IGNORE
87 #endif
88
89 #ifdef CONFIG_BLK_DEV_RZ1000
90 extern void ide_init_rz1000(ide_hwif_t *);
91 #define INIT_RZ1000 &ide_init_rz1000
92 #else
93 #define INIT_RZ1000 IDE_IGNORE
94 #endif
95
96 typedef struct ide_pci_enablebit_s {
97 byte reg; /* byte pci reg holding the enable-bit */
98 byte mask; /* mask to isolate the enable-bit */
99 byte val; /* value of masked reg when "enabled" */
100 } ide_pci_enablebit_t;
101
102 typedef struct ide_pci_device_s {
103 ide_pci_devid_t devid;
104 const char *name;
105 void (*init_hwif)(ide_hwif_t *hwif);
106 ide_pci_enablebit_t enablebits[2];
107 } ide_pci_device_t;
108
109 static ide_pci_device_t ide_pci_chipsets[] __initdata = {
110 {DEVID_PIIXa, "PIIX", NULL, {{0x41,0x80,0x80}, {0x43,0x80,0x80}} },
111 {DEVID_PIIXb, "PIIX", NULL, {{0x41,0x80,0x80}, {0x43,0x80,0x80}} },
112 {DEVID_PIIX3, "PIIX3", NULL, {{0x41,0x80,0x80}, {0x43,0x80,0x80}} },
113 {DEVID_PIIX4, "PIIX4", NULL, {{0x41,0x80,0x80}, {0x43,0x80,0x80}} },
114 {DEVID_VP_IDE, "VP_IDE", NULL, {{0x40,0x02,0x02}, {0x40,0x01,0x01}} },
115 {DEVID_PDC20246,"PDC20246", NULL, {{0x50,0x02,0x02}, {0x50,0x04,0x04}} },
116 {DEVID_RZ1000, "RZ1000", INIT_RZ1000, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
117 {DEVID_RZ1001, "RZ1001", INIT_RZ1000, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
118 {DEVID_CMD640, "CMD640", IDE_IGNORE, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
119 {DEVID_NS87410, "NS87410", NULL, {{0x43,0x08,0x08}, {0x47,0x08,0x08}} },
120 {DEVID_SIS5513, "SIS5513", NULL, {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}} },
121 {DEVID_CMD646, "CMD646", INIT_CMD646, {{0x00,0x00,0x00}, {0x51,0x80,0x80}} },
122 {DEVID_HT6565, "HT6565", NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
123 {DEVID_OPTI621, "OPTI621", INIT_OPTI621, {{0x45,0x80,0x00}, {0x40,0x08,0x00}} },
124 {DEVID_OPTI621X,"OPTI621X", INIT_OPTI621, {{0x45,0x80,0x00}, {0x40,0x08,0x00}} },
125 {DEVID_TRM290, "TRM290", INIT_TRM290, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
126 {DEVID_NS87415, "NS87415", INIT_NS87415, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
127 {DEVID_AEC6210, "AEC6210", NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} },
128 {DEVID_W82C105, "W82C105", INIT_W82C105, {{0x40,0x01,0x01}, {0x40,0x10,0x10}} },
129 {IDE_PCI_DEVID_NULL, "PCI_IDE", NULL, {{0x00,0x00,0x00}, {0x00,0x00,0x00}} }};
130
131 /*
132 * Match a PCI IDE port against an entry in ide_hwifs[],
133 * based on io_base port if possible.
134 */
135 __initfunc(static ide_hwif_t *ide_match_hwif (unsigned long io_base, const char *name))
136 {
137 int h;
138 ide_hwif_t *hwif;
139
140 /*
141 * Look for a hwif with matching io_base specified using
142 * parameters to ide_setup().
143 */
144 for (h = 0; h < MAX_HWIFS; ++h) {
145 hwif = &ide_hwifs[h];
146 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
147 if (hwif->chipset == ide_generic)
148 return hwif; /* a perfect match */
149 }
150 }
151 /*
152 * Look for a hwif with matching io_base default value.
153 * If chipset is "ide_unknown", then claim that hwif slot.
154 * Otherwise, some other chipset has already claimed it.. :(
155 */
156 for (h = 0; h < MAX_HWIFS; ++h) {
157 hwif = &ide_hwifs[h];
158 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
159 if (hwif->chipset == ide_unknown)
160 return hwif; /* match */
161 printk("%s: port 0x%04lx already claimed by %s\n", name, io_base, hwif->name);
162 return NULL; /* already claimed */
163 }
164 }
165 /*
166 * Okay, there is no hwif matching our io_base,
167 * so we'll just claim an unassigned slot.
168 * Give preference to claiming other slots before claiming ide0/ide1,
169 * just in case there's another interface yet-to-be-scanned
170 * which uses ports 1f0/170 (the ide0/ide1 defaults).
171 */
172 for (h = 2; h < MAX_HWIFS; ++h) {
173 hwif = ide_hwifs + h;
174 if (hwif->chipset == ide_unknown)
175 return hwif; /* pick an unused entry */
176 }
177 for (h = 0; h < 2; ++h) {
178 hwif = ide_hwifs + h;
179 if (hwif->chipset == ide_unknown)
180 return hwif; /* pick an unused entry */
181 }
182 printk("%s: too many IDE interfaces, no room in table\n", name);
183 return NULL;
184 }
185
186 __initfunc(static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name))
187 {
188 byte reg, progif = 0;
189
190 /*
191 * Place both IDE interfaces into PCI "native" mode:
192 */
193 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || (progif & 5) != 5) {
194 if ((progif & 0xa) != 0xa) {
195 printk("%s: device not capable of full native PCI mode\n", name);
196 return 1;
197 }
198 printk("%s: placing both ports into native PCI mode\n", name);
199 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
200 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || (progif & 5) != 5) {
201 printk("%s: rewrite of PROGIF failed, wanted 0x%04x, got 0x%04x\n", name, progif|5, progif);
202 return 1;
203 }
204 }
205 /*
206 * Setup base registers for IDE command/control spaces for each interface:
207 */
208 for (reg = 0; reg < 4; reg++)
209 if (!dev->base_address[reg]) {
210 printk("%s: Missing I/O address #%d, please report to <mj@ucw.cz>\n", name, reg);
211 return 1;
212 }
213 return 0;
214 }
215
216 /*
217 * ide_setup_pci_device() looks at the primary/secondary interfaces
218 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
219 * for use with them. This generic code works for most PCI chipsets.
220 *
221 * One thing that is not standardized is the location of the
222 * primary/secondary interface "enable/disable" bits. For chipsets that
223 * we "know" about, this information is in the ide_pci_device_t struct;
224 * for all other chipsets, we just assume both interfaces are enabled.
225 */
226 __initfunc(static void ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d))
227 {
228 unsigned int port, at_least_one_hwif_enabled = 0, no_autodma = 0, pciirq = 0;
229 unsigned short pcicmd = 0, tried_config = 0;
230 byte tmp = 0;
231 ide_hwif_t *hwif, *mate = NULL;
232
233 check_if_enabled:
234 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
235 printk("%s: error accessing PCI regs\n", d->name);
236 return;
237 }
238 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
239 /*
240 * PnP BIOS was *supposed* to have set this device up for us,
241 * but we can do it ourselves, so long as the BIOS has assigned an IRQ
242 * (or possibly the device is using a "legacy header" for IRQs).
243 * Maybe the user deliberately *disabled* the device,
244 * but we'll eventually ignore it again if no drives respond.
245 */
246 if (tried_config++
247 || ide_setup_pci_baseregs(dev, d->name)
248 || pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
249 printk("%s: device disabled (BIOS)\n", d->name);
250 return;
251 }
252 no_autodma = 1; /* default DMA off if we had to configure it here */
253 goto check_if_enabled;
254 }
255 if (tried_config)
256 printk("%s: device enabled (Linux)\n", d->name);
257 /*
258 * Can we trust the reported IRQ?
259 */
260 pciirq = dev->irq;
261 if ((dev->class & ~(0xfa)) != ((PCI_CLASS_STORAGE_IDE << 8) | 5)) {
262 printk("%s: not 100%% native mode: will probe irqs later\n", d->name);
263 pciirq = 0;
264 } else if (tried_config) {
265 printk("%s: will probe irqs later\n", d->name);
266 pciirq = 0;
267 } else if (!pciirq) {
268 printk("%s: bad irq (%d): will probe later\n", d->name, pciirq);
269 pciirq = 0;
270 } else {
271 #ifdef __sparc_v9__
272 printk("%s: 100%% native mode on irq %08x\n", d->name, pciirq);
273 #else
274 printk("%s: 100%% native mode on irq %d\n", d->name, pciirq);
275 #endif
276 }
277 /*
278 * Set up the IDE ports
279 */
280 for (port = 0; port <= 1; ++port) {
281 unsigned long base = 0, ctl = 0;
282 ide_pci_enablebit_t *e = &(d->enablebits[port]);
283 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || (tmp & e->mask) != e->val))
284 continue; /* port not enabled */
285 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE || (dev->class & (port ? 4 : 1)) != 0) {
286 ctl = dev->base_address[(2*port)+1] & PCI_BASE_ADDRESS_IO_MASK;
287 base = dev->base_address[2*port] & ~7;
288 }
289 if ((ctl && !base) || (base && !ctl)) {
290 printk("%s: inconsistent baseregs (BIOS) for port %d, skipping\n", d->name, port);
291 continue;
292 }
293 if (!ctl)
294 ctl = port ? 0x374 : 0x3f4; /* use default value */
295 if (!base)
296 base = port ? 0x170 : 0x1f0; /* use default value */
297 if ((hwif = ide_match_hwif(base, d->name)) == NULL)
298 continue; /* no room in ide_hwifs[] */
299 if (hwif->io_ports[IDE_DATA_OFFSET] != base) {
300 ide_init_hwif_ports(hwif->io_ports, base, NULL);
301 hwif->io_ports[IDE_CONTROL_OFFSET] = ctl + 2;
302 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
303 }
304 hwif->chipset = ide_pci;
305 hwif->pci_dev = dev;
306 hwif->pci_devid = d->devid;
307 hwif->channel = port;
308 if (!hwif->irq)
309 hwif->irq = pciirq;
310 if (mate) {
311 hwif->mate = mate;
312 mate->mate = hwif;
313 }
314 if (no_autodma)
315 hwif->no_autodma = 1;
316 #ifdef CONFIG_BLK_DEV_IDEDMA
317 if (IDE_PCI_DEVID_EQ(d->devid, DEVID_SIS5513))
318 hwif->no_autodma = 1; /* too many SIS-5513 systems have troubles */
319 if (IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20246) ||
320 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 0x80))) {
321 unsigned int extra = (!mate && IDE_PCI_DEVID_EQ(d->devid, DEVID_PDC20246)) ? 16 : 0;
322 unsigned long dma_base = ide_get_or_set_dma_base(hwif, extra, d->name);
323 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
324 /*
325 * Set up BM-DMA capability (PnP BIOS should have done this)
326 */
327 printk("%s: %s enabling Bus-Master DMA\n", hwif->name, d->name);
328 hwif->no_autodma = 1; /* default DMA off if we had to configure it here */
329 (void) pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_MASTER);
330 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
331 printk("%s: %s error updating PCICMD\n", hwif->name, d->name);
332 dma_base = 0;
333 }
334 }
335 if (dma_base)
336 ide_setup_dma(hwif, dma_base, 8);
337 else
338 printk("%s: %s Bus-Master DMA disabled (BIOS)\n", hwif->name, d->name);
339 }
340 #endif /* CONFIG_BLK_DEV_IDEDMA */
341 if (d->init_hwif) /* Call chipset-specific routine for each enabled hwif */
342 d->init_hwif(hwif);
343 mate = hwif;
344 at_least_one_hwif_enabled = 1;
345 }
346 if (!at_least_one_hwif_enabled)
347 printk("%s: neither IDE port enabled (BIOS)\n", d->name);
348 }
349
350 /*
351 * ide_scan_pcibus() gets invoked at boot time from ide.c.
352 * It finds all PCI IDE controllers and calls ide_setup_pci_device for them.
353 */
354 __initfunc(void ide_scan_pcibus (void))
355 {
356 struct pci_dev *dev;
357 ide_pci_devid_t devid;
358 ide_pci_device_t *d;
359
360 if (!pci_present())
361 return;
362 for(dev = pci_devices; dev; dev=dev->next) {
363 devid.vid = dev->vendor;
364 devid.did = dev->device;
365 for (d = ide_pci_chipsets; d->devid.vid && !IDE_PCI_DEVID_EQ(d->devid, devid); ++d);
366 if (d->init_hwif == IDE_IGNORE)
367 printk("%s: ignored by ide_scan_pci_device() (uses own driver)\n", d->name);
368 else if (IDE_PCI_DEVID_EQ(d->devid, DEVID_OPTI621V) && !(PCI_FUNC(dev->devfn) & 1))
369 continue; /* OPTI Viper-M uses same devid for functions 0 and 1 */
370 else if (!IDE_PCI_DEVID_EQ(d->devid, IDE_PCI_DEVID_NULL) || (dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
371 if (IDE_PCI_DEVID_EQ(d->devid, IDE_PCI_DEVID_NULL))
372 printk("%s: unknown IDE controller on PCI bus %02x device %02x, VID=%04x, DID=%04x\n",
373 d->name, dev->bus->number, dev->devfn, devid.vid, devid.did);
374 else
375 printk("%s: IDE controller on PCI bus %02x dev %02x\n", d->name, dev->bus->number, dev->devfn);
376 ide_setup_pci_device(dev, d);
377 }
378 }
379 }
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