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[davej-history.git] / drivers / sound / trident.c
bloba76755e29a59a32ea95697a2eb270674665901f2
1 /*
2 *
3 * Trident 4D-Wave/SiS 7018/ALi 5451 OSS driver for Linux 2.2.x
4 *
5 * Driver: Alan Cox <alan@redhat.com>
6 *
7 * Built from:
8 * Low level code: <audio@tridentmicro.com> from ALSA
9 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
10 * Extended by: Zach Brown <zab@redhat.com>
11 *
12 * Hacked up by:
13 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
14 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
15 * Ching Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * History
33 * v0.14.5 May 23 2000 Ollie Lho
34 * Misc bug fix from the Net
35 * v0.14.4 May 20 2000 Aaron Holtzman
36 * Fix kfree'd memory access in release
37 * Fix race in open while looking for a free virtual channel slot
38 * remove open_wait wq (which appears to be unused)
39 * v0.14.3 May 10 2000 Ollie Lho
40 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
41 * v0.14.2 Mar 29 2000 Ching Ling Lee
42 * Add clear to silence advance in trident_update_ptr
43 * fix invalid data of the end of the sound
44 * v0.14.1 Mar 24 2000 Ching Ling Lee
45 * ALi 5451 support added, playback and recording O.K.
46 * ALi 5451 originally developed and structured based on sonicvibes, and
47 * suggested to merge into this file by Alan Cox.
48 * v0.14 Mar 15 2000 Ollie Lho
49 * 5.1 channel output support with channel binding. What's the Matrix ?
50 * v0.13.1 Mar 10 2000 Ollie Lho
51 * few minor bugs on dual codec support, needs more testing
52 * v0.13 Mar 03 2000 Ollie Lho
53 * new pci_* for 2.4 kernel, back ported to 2.2
54 * v0.12 Feb 23 2000 Ollie Lho
55 * Preliminary Recording support
56 * v0.11.2 Feb 19 2000 Ollie Lho
57 * removed incomplete full-dulplex support
58 * v0.11.1 Jan 28 2000 Ollie Lho
59 * small bug in setting sample rate for 4d-nx (reported by Aaron)
60 * v0.11 Jan 27 2000 Ollie Lho
61 * DMA bug, scheduler latency, second try
62 * v0.10 Jan 24 2000 Ollie Lho
63 * DMA bug fixed, found kernel scheduling problem
64 * v0.09 Jan 20 2000 Ollie Lho
65 * Clean up of channel register access routine (prepare for channel binding)
66 * v0.08 Jan 14 2000 Ollie Lho
67 * Isolation of AC97 codec code
68 * v0.07 Jan 13 2000 Ollie Lho
69 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
70 * v0.06 Jan 11 2000 Ollie Lho
71 * Preliminary support for dual (more ?) AC97 codecs
72 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
73 * adapt to 2.3.x new __setup/__init call
74 * v0.04 Dec 31 1999 Ollie Lho
75 * Multiple Open, using Middle Loop Interrupt to smooth playback
76 * v0.03 Dec 24 1999 Ollie Lho
77 * mem leak in prog_dmabuf and dealloc_dmabuf removed
78 * v0.02 Dec 15 1999 Ollie Lho
79 * SiS 7018 support added, playback O.K.
80 * v0.01 Alan Cox et. al.
81 * Initial Release in kernel 2.3.30, does not work
82 *
83 * ToDo
84 * Clean up of low level channel register access code. (done)
85 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
86 * Dual AC97 codecs support (done)
87 * Recording support (done)
88 * Mmap support
89 * "Channel Binding" ioctl extension (done)
90 * new pci device driver interface for 2.4 kernel (done)
91 */
92
93 #include <linux/config.h>
94 #include <linux/module.h>
95 #include <linux/version.h>
96 #include <linux/string.h>
97 #include <linux/ctype.h>
98 #include <linux/ioport.h>
99 #include <linux/sched.h>
100 #include <linux/delay.h>
101 #include <linux/sound.h>
102 #include <linux/malloc.h>
103 #include <linux/soundcard.h>
104 #include <linux/pci.h>
105 #include <asm/io.h>
106 #include <asm/dma.h>
107 #include <linux/init.h>
108 #include <linux/poll.h>
109 #include <linux/spinlock.h>
110 #include <linux/smp_lock.h>
111 #include <linux/ac97_codec.h>
112 #include <linux/wrapper.h>
113 #include <asm/uaccess.h>
114 #include <asm/hardirq.h>
115 #include <linux/bitops.h>
116
117 #include "trident.h"
118
119 #define DRIVER_VERSION "0.14.5"
120
121 /* magic numbers to protect our data structures */
122 #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
123 #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
124
125 #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
126
127 #define NR_HW_CH 32
128
129 /* maxinum nuber of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
130 have 2 SDATA_IN lines (currently) */
131 #define NR_AC97 2
132
133 /* minor number of /dev/swmodem (temporary, experimental) */
134 #define SND_DEV_SWMODEM 7
135
136 static const unsigned sample_size[] = { 1, 2, 2, 4 };
137 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
138
139 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
140
141 enum {
142 TRIDENT_4D_DX = 0,
143 TRIDENT_4D_NX,
144 SIS_7018,
145 ALI_5451
146 };
147
148 static char * card_names[] = {
149 "Trident 4DWave DX",
150 "Trident 4DWave NX",
151 "SiS 7018 PCI Audio",
152 "ALi Audio Accelerator"
153 };
154
155 static struct pci_device_id trident_pci_tbl [] __devinitdata = {
156 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
157 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
158 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
159 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX},
160 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018,
161 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018},
162 {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451,
163 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451},
164 {0,}
165 };
166
167 MODULE_DEVICE_TABLE (pci, trident_pci_tbl);
168
169 /* "software" or virtual channel, an instance of opened /dev/dsp */
170 struct trident_state {
171 unsigned int magic;
172 struct trident_card *card; /* Card info */
173
174 /* file mode */
175 mode_t open_mode;
176
177 /* virtual channel number */
178 int virt;
179
180 struct dmabuf {
181 /* wave sample stuff */
182 unsigned int rate;
183 unsigned char fmt, enable;
184
185 /* hardware channel */
186 struct trident_channel *channel;
187
188 /* OSS buffer management stuff */
189 void *rawbuf;
190 dma_addr_t dma_handle;
191 unsigned buforder;
192 unsigned numfrag;
193 unsigned fragshift;
194
195 /* our buffer acts like a circular ring */
196 unsigned hwptr; /* where dma last started, updated by update_ptr */
197 unsigned swptr; /* where driver last clear/filled, updated by read/write */
198 int count; /* bytes to be comsumed or been generated by dma machine */
199 unsigned total_bytes; /* total bytes dmaed by hardware */
200
201 unsigned error; /* number of over/underruns */
202 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
203
204 /* redundant, but makes calculations easier */
205 unsigned fragsize;
206 unsigned dmasize;
207 unsigned fragsamples;
208
209 /* OSS stuff */
210 unsigned mapped:1;
211 unsigned ready:1;
212 unsigned endcleared:1;
213 unsigned update_flag;
214 unsigned ossfragshift;
215 int ossmaxfrags;
216 unsigned subdivision;
217 } dmabuf;
218 };
219
220 /* hardware channels */
221 struct trident_channel {
222 int num; /* channel number */
223 u32 lba; /* Loop Begine Address, where dma buffer starts */
224 u32 eso; /* End Sample Offset, wehre dma buffer ends (in the unit of samples) */
225 u32 delta; /* delta value, sample rate / 48k for playback, 48k/sample rate for recording */
226 u16 attribute; /* control where PCM data go and come */
227 u16 fm_vol;
228 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
229 };
230
231 struct trident_pcm_bank_address {
232 u32 start;
233 u32 stop;
234 u32 aint;
235 u32 aint_en;
236 };
237 static struct trident_pcm_bank_address bank_a_addrs =
238 {
239 T4D_START_A,
240 T4D_STOP_A,
241 T4D_AINT_A,
242 T4D_AINTEN_A
243 };
244 static struct trident_pcm_bank_address bank_b_addrs =
245 {
246 T4D_START_B,
247 T4D_STOP_B,
248 T4D_AINT_B,
249 T4D_AINTEN_B
250 };
251 struct trident_pcm_bank {
252 /* register addresses to control bank operations */
253 struct trident_pcm_bank_address *addresses;
254 /* each bank has 32 channels */
255 u32 bitmap; /* channel allocation bitmap */
256 struct trident_channel channels[32];
257 };
258
259 struct trident_card {
260 unsigned int magic;
261
262 /* We keep trident cards in a linked list */
263 struct trident_card *next;
264
265 /* single open lock mechanism, only used for recording */
266 struct semaphore open_sem;
267
268 /* The trident has a certain amount of cross channel interaction
269 so we use a single per card lock */
270 spinlock_t lock;
271
272 /* PCI device stuff */
273 struct pci_dev * pci_dev;
274 u16 pci_id;
275 u8 revision;
276
277 /* soundcore stuff */
278 int dev_audio;
279
280 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
281 struct ac97_codec *ac97_codec[NR_AC97];
282 struct trident_pcm_bank banks[NR_BANKS];
283 struct trident_state *states[NR_HW_CH];
284
285 /* hardware resources */
286 unsigned long iobase;
287 u32 irq;
288
289 /* Function support */
290 struct trident_channel *(*alloc_pcm_channel)(struct trident_card *);
291 struct trident_channel *(*alloc_rec_pcm_channel)(struct trident_card *);
292 void (*free_pcm_channel)(struct trident_card *, unsigned int chan);
293 void (*address_interrupt)(struct trident_card *);
294 };
295
296 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
297 static u16 mask2attr [] =
298 {
299 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
300 HSET, MIC, MODEM_LINE1, MODEM_LINE2,
301 I2S_LR, SPDIF_LR
302 };
303 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
304 static int attr2mask [] = {
305 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
306 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
307 };
308
309 static struct trident_card *devs = NULL;
310
311 static void ali_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
312 static u16 ali_ac97_get(struct ac97_codec *codec, u8 reg);
313
314 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
315 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
316
317 static int trident_open_mixdev(struct inode *inode, struct file *file);
318 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
319 unsigned long arg);
320 static loff_t trident_llseek(struct file *file, loff_t offset, int origin);
321
322 static int trident_enable_loop_interrupts(struct trident_card * card)
323 {
324 u32 global_control;
325
326 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
327
328 switch (card->pci_id)
329 {
330 case PCI_DEVICE_ID_SI_7018:
331 global_control |= (ENDLP_IE | MIDLP_IE| BANK_B_EN);
332 break;
333 case PCI_DEVICE_ID_ALI_5451:
334 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
335 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
336 global_control |= (ENDLP_IE | MIDLP_IE);
337 break;
338 default:
339 return FALSE;
340 }
341
342 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
343
344 #ifdef DEBUG
345 printk("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
346 global_control);
347 #endif
348 return (TRUE);
349 }
350
351 static int trident_disable_loop_interrupts(struct trident_card * card)
352 {
353 u32 global_control;
354
355 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
356 global_control &= ~(ENDLP_IE | MIDLP_IE);
357 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
358
359 #ifdef DEBUG
360 printk("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
361 global_control);
362 #endif
363 return (TRUE);
364 }
365
366 static void trident_enable_voice_irq(struct trident_card * card, unsigned int channel)
367 {
368 unsigned int mask = 1 << (channel & 0x1f);
369 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
370 u32 reg, addr = bank->addresses->aint_en;
371
372 reg = inl(TRID_REG(card, addr));
373 reg |= mask;
374 outl(reg, TRID_REG(card, addr));
375
376 #ifdef DEBUG
377 reg = inl(TRID_REG(card, T4D_AINTEN_B));
378 printk("trident: enabled IRQ on channel %d, AINTEN_B = 0x%08x\n",
379 channel, reg);
380 #endif
381 }
382
383 static void trident_disable_voice_irq(struct trident_card * card, unsigned int channel)
384 {
385 unsigned int mask = 1 << (channel & 0x1f);
386 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
387 u32 reg, addr = bank->addresses->aint_en;
388
389 reg = inl(TRID_REG(card, addr));
390 reg &= ~mask;
391 outl(reg, TRID_REG(card, addr));
392
393 /* Ack the channel in case the interrupt was set before we disable it. */
394 outl(mask, TRID_REG(card, bank->addresses->aint));
395
396 #ifdef DEBUG
397 reg = inl(TRID_REG(card, T4D_AINTEN_B));
398 printk("trident: disabled IRQ on channel %d, AINTEN_B = 0x%08x\n",
399 channel, reg);
400 #endif
401 }
402
403 static void trident_start_voice(struct trident_card * card, unsigned int channel)
404 {
405 unsigned int mask = 1 << (channel & 0x1f);
406 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
407 u32 addr = bank->addresses->start;
408
409 #ifdef DEBUG
410 u32 reg;
411 #endif
412
413 outl(mask, TRID_REG(card, addr));
414
415 #ifdef DEBUG
416 reg = inl(TRID_REG(card, T4D_START_B));
417 printk("trident: start voice on channel %d, START_B = 0x%08x\n",
418 channel, reg);
419 #endif
420 }
421
422 static void trident_stop_voice(struct trident_card * card, unsigned int channel)
423 {
424 unsigned int mask = 1 << (channel & 0x1f);
425 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
426 u32 addr = bank->addresses->stop;
427
428 #ifdef DEBUG
429 u32 reg;
430 #endif
431
432 outl(mask, TRID_REG(card, addr));
433
434 #ifdef DEBUG
435 reg = inl(TRID_REG(card, T4D_STOP_B));
436 printk("trident: stop voice on channel %d, STOP_B = 0x%08x\n",
437 channel, reg);
438 #endif
439 }
440
441 static u32 trident_get_interrupt_mask (struct trident_card * card, unsigned int channel)
442 {
443 struct trident_pcm_bank *bank = &card->banks[channel];
444 u32 addr = bank->addresses->aint;
445 return inl(TRID_REG(card, addr));
446 }
447
448 static int trident_check_channel_interrupt(struct trident_card * card, unsigned int channel)
449 {
450 unsigned int mask = 1 << (channel & 0x1f);
451 u32 reg = trident_get_interrupt_mask (card, channel >> 5);
452
453 #ifdef DEBUG
454 if (reg & mask)
455 printk("trident: channel %d has interrupt, AINT_B = 0x%08x\n",
456 channel, reg);
457 #endif
458 return (reg & mask) ? TRUE : FALSE;
459 }
460
461 static void trident_ack_channel_interrupt(struct trident_card * card, unsigned int channel)
462 {
463 unsigned int mask = 1 << (channel & 0x1f);
464 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
465 u32 reg, addr = bank->addresses->aint;
466
467 reg = inl(TRID_REG(card, addr));
468 reg &= mask;
469 outl(reg, TRID_REG(card, addr));
470
471 #ifdef DEBUG
472 reg = inl(TRID_REG(card, T4D_AINT_B));
473 printk("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
474 channel, reg);
475 #endif
476 }
477
478 static struct trident_channel * trident_alloc_pcm_channel(struct trident_card *card)
479 {
480 struct trident_pcm_bank *bank;
481 int idx;
482
483 bank = &card->banks[BANK_B];
484
485 for (idx = 31; idx >= 0; idx--) {
486 if (!(bank->bitmap & (1 << idx))) {
487 struct trident_channel *channel = &bank->channels[idx];
488 bank->bitmap |= 1 << idx;
489 channel->num = idx + 32;
490 return channel;
491 }
492 }
493
494 /* no more free channels avaliable */
495 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
496 return NULL;
497 }
498
499 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card)
500 {
501 struct trident_pcm_bank *bank;
502 int idx;
503
504 bank = &card->banks[BANK_A];
505
506 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST ; idx++) {
507 if (!(bank->bitmap & (1 << idx))) {
508 struct trident_channel *channel = &bank->channels[idx];
509 bank->bitmap |= 1 << idx;
510 channel->num = idx;
511 return channel;
512 }
513 }
514
515 /* no more free channels avaliable */
516 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
517 return NULL;
518 }
519
520 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card)
521 {
522 struct trident_pcm_bank *bank;
523 int idx = ALI_PCM_IN_CHANNEL;
524
525 bank = &card->banks[BANK_A];
526
527 if (!(bank->bitmap & (1 << idx))) {
528 struct trident_channel *channel = &bank->channels[idx];
529 bank->bitmap |= 1 << idx;
530 channel->num = idx;
531 return channel;
532 }
533 return NULL;
534 }
535
536
537 static void trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
538 {
539 int bank;
540
541 if (channel < 31 || channel > 63)
542 return;
543
544 bank = channel >> 5;
545 channel = channel & 0x1f;
546
547 card->banks[bank].bitmap &= ~(1 << (channel));
548 }
549
550 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
551 {
552 int bank;
553
554 if (channel > 31)
555 return;
556
557 bank = channel >> 5;
558 channel = channel & 0x1f;
559
560 card->banks[bank].bitmap &= ~(1 << (channel));
561 }
562
563
564 /* called with spin lock held */
565
566 static int trident_load_channel_registers(struct trident_card *card, u32 *data, unsigned int channel)
567 {
568 int i;
569
570 if (channel > 63)
571 return FALSE;
572
573 /* select hardware channel to write */
574 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
575
576 /* Output the channel registers, but don't write register
577 three to an ALI chip. */
578 for (i = 0; i < CHANNEL_REGS; i++) {
579 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
580 continue;
581 outl(data[i], TRID_REG(card, CHANNEL_START + 4*i));
582 }
583 return TRUE;
584 }
585
586 /* called with spin lock held */
587 static int trident_write_voice_regs(struct trident_state *state)
588 {
589 unsigned int data[CHANNEL_REGS + 1];
590 struct trident_channel *channel;
591
592 channel = state->dmabuf.channel;
593
594 data[1] = channel->lba;
595 data[4] = channel->control;
596
597 switch (state->card->pci_id)
598 {
599 case PCI_DEVICE_ID_ALI_5451:
600 data[0] = 0; /* Current Sample Offset */
601 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
602 data[3] = 0;
603 break;
604 case PCI_DEVICE_ID_SI_7018:
605 data[0] = 0; /* Current Sample Offset */
606 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
607 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
608 break;
609 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
610 data[0] = 0; /* Current Sample Offset */
611 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
612 data[3] = channel->fm_vol & 0xffff;
613 break;
614 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
615 data[0] = (channel->delta << 24);
616 data[2] = ((channel->delta << 16) & 0xff000000) | (channel->eso & 0x00ffffff);
617 data[3] = channel->fm_vol & 0xffff;
618 break;
619 default:
620 return FALSE;
621 }
622
623 return trident_load_channel_registers(state->card, data, channel->num);
624 }
625
626 static int compute_rate_play(u32 rate)
627 {
628 int delta;
629 /* We special case 44100 and 8000 since rounding with the equation
630 does not give us an accurate enough value. For 11025 and 22050
631 the equation gives us the best answer. All other frequencies will
632 also use the equation. JDW */
633 if (rate == 44100)
634 delta = 0xeb3;
635 else if (rate == 8000)
636 delta = 0x2ab;
637 else if (rate == 48000)
638 delta = 0x1000;
639 else
640 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
641 return delta;
642 }
643
644 static int compute_rate_rec(u32 rate)
645 {
646 int delta;
647
648 if (rate == 44100)
649 delta = 0x116a;
650 else if (rate == 8000)
651 delta = 0x6000;
652 else if (rate == 48000)
653 delta = 0x1000;
654 else
655 delta = ((48000 << 12) / rate) & 0x0000ffff;
656
657 return delta;
658 }
659 /* set playback sample rate */
660 static unsigned int trident_set_dac_rate(struct trident_state * state, unsigned int rate)
661 {
662 struct dmabuf *dmabuf = &state->dmabuf;
663
664 if (rate > 48000)
665 rate = 48000;
666 if (rate < 4000)
667 rate = 4000;
668
669 dmabuf->rate = rate;
670 dmabuf->channel->delta = compute_rate_play(rate);
671
672 trident_write_voice_regs(state);
673
674 #ifdef DEBUG
675 printk("trident: called trident_set_dac_rate : rate = %d\n", rate);
676 #endif
677
678 return rate;
679 }
680
681 /* set recording sample rate */
682 static unsigned int trident_set_adc_rate(struct trident_state * state, unsigned int rate)
683 {
684 struct dmabuf *dmabuf = &state->dmabuf;
685
686 if (rate > 48000)
687 rate = 48000;
688 if (rate < 4000)
689 rate = 4000;
690
691 dmabuf->rate = rate;
692 dmabuf->channel->delta = compute_rate_rec(rate);
693
694 trident_write_voice_regs(state);
695
696 #ifdef DEBUG
697 printk("trident: called trident_set_adc_rate : rate = %d\n", rate);
698 #endif
699 return rate;
700 }
701
702 /* prepare channel attributes for playback */
703 static void trident_play_setup(struct trident_state *state)
704 {
705 struct dmabuf *dmabuf = &state->dmabuf;
706 struct trident_channel *channel = dmabuf->channel;
707
708 channel->lba = virt_to_bus(dmabuf->rawbuf);
709 channel->delta = compute_rate_play(dmabuf->rate);
710
711 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
712 channel->eso -= 1;
713
714 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
715 channel->attribute = 0;
716 }
717
718 channel->fm_vol = 0x0;
719
720 channel->control = CHANNEL_LOOP;
721 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
722 /* 16-bits */
723 channel->control |= CHANNEL_16BITS;
724 /* signed */
725 channel->control |= CHANNEL_SIGNED;
726 }
727 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
728 /* stereo */
729 channel->control |= CHANNEL_STEREO;
730 #ifdef DEBUG
731 printk("trident: trident_play_setup, LBA = 0x%08x, "
732 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
733 channel->lba, channel->delta, channel->eso, channel->control);
734 #endif
735 trident_write_voice_regs(state);
736 }
737
738 /* prepare channel attributes for recording */
739 static void trident_rec_setup(struct trident_state *state)
740 {
741 u16 w;
742 struct trident_card *card = state->card;
743 struct dmabuf *dmabuf = &state->dmabuf;
744 struct trident_channel *channel = dmabuf->channel;
745
746 /* Enable AC-97 ADC (capture) */
747 switch (card->pci_id)
748 {
749 case PCI_DEVICE_ID_ALI_5451:
750 case PCI_DEVICE_ID_SI_7018:
751 /* for 7018, the ac97 is always in playback/record (duplex) mode */
752 break;
753 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
754 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
755 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
756 /* enable and set record channel */
757 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
758 break;
759 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
760 w = inw(TRID_REG(card, T4D_MISCINT));
761 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
762 /* enable and set record channel */
763 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
764 break;
765 default:
766 return;
767 }
768
769 channel->lba = virt_to_bus(dmabuf->rawbuf);
770 channel->delta = compute_rate_rec(dmabuf->rate);
771
772 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
773 channel->eso -= 1;
774
775 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
776 channel->attribute = 0;
777 }
778
779 channel->fm_vol = 0x0;
780
781 channel->control = CHANNEL_LOOP;
782 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
783 /* 16-bits */
784 channel->control |= CHANNEL_16BITS;
785 /* signed */
786 channel->control |= CHANNEL_SIGNED;
787 }
788 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
789 /* stereo */
790 channel->control |= CHANNEL_STEREO;
791 #ifdef DEBUG
792 printk("trident: trident_rec_setup, LBA = 0x%08x, "
793 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
794 channel->lba, channel->delta, channel->eso, channel->control);
795 #endif
796 trident_write_voice_regs(state);
797 }
798
799 /* get current playback/recording dma buffer pointer (byte offset from LBA),
800 called with spinlock held! */
801 extern __inline__ unsigned trident_get_dma_addr(struct trident_state *state)
802 {
803 struct dmabuf *dmabuf = &state->dmabuf;
804 u32 cso;
805
806 if (!dmabuf->enable)
807 return 0;
808
809 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
810
811 switch (state->card->pci_id)
812 {
813 case PCI_DEVICE_ID_ALI_5451:
814 case PCI_DEVICE_ID_SI_7018:
815 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
816 /* 16 bits ESO, CSO for 7018 and DX */
817 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
818 break;
819 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
820 /* 24 bits ESO, CSO for NX */
821 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
822 break;
823 default:
824 return 0;
825 }
826
827 #ifdef DEBUG
828 printk("trident: trident_get_dma_addr: chip reported channel: %d, "
829 "cso = 0x%04x\n",
830 dmabuf->channel->num, cso);
831 #endif
832 /* ESO and CSO are in units of Samples, convert to byte offset */
833 cso <<= sample_shift[dmabuf->fmt];
834
835 return (cso % dmabuf->dmasize);
836 }
837
838 /* Stop recording (lock held) */
839 extern __inline__ void __stop_adc(struct trident_state *state)
840 {
841 struct dmabuf *dmabuf = &state->dmabuf;
842 unsigned int chan_num = dmabuf->channel->num;
843 struct trident_card *card = state->card;
844
845 dmabuf->enable &= ~ADC_RUNNING;
846 trident_stop_voice(card, chan_num);
847 trident_disable_voice_irq(card, chan_num);
848 }
849
850 static void stop_adc(struct trident_state *state)
851 {
852 struct trident_card *card = state->card;
853 unsigned long flags;
854
855 spin_lock_irqsave(&card->lock, flags);
856 __stop_adc(state);
857 spin_unlock_irqrestore(&card->lock, flags);
858 }
859
860 static void start_adc(struct trident_state *state)
861 {
862 struct dmabuf *dmabuf = &state->dmabuf;
863 unsigned int chan_num = dmabuf->channel->num;
864 struct trident_card *card = state->card;
865 unsigned long flags;
866
867 spin_lock_irqsave(&card->lock, flags);
868 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
869 dmabuf->enable |= ADC_RUNNING;
870 trident_enable_voice_irq(card, chan_num);
871 trident_start_voice(card, chan_num);
872 }
873 spin_unlock_irqrestore(&card->lock, flags);
874 }
875
876 /* stop playback (lock held) */
877 extern __inline__ void __stop_dac(struct trident_state *state)
878 {
879 struct dmabuf *dmabuf = &state->dmabuf;
880 unsigned int chan_num = dmabuf->channel->num;
881 struct trident_card *card = state->card;
882
883 dmabuf->enable &= ~DAC_RUNNING;
884 trident_stop_voice(card, chan_num);
885 trident_disable_voice_irq(card, chan_num);
886 }
887
888 static void stop_dac(struct trident_state *state)
889 {
890 struct trident_card *card = state->card;
891 unsigned long flags;
892
893 spin_lock_irqsave(&card->lock, flags);
894 __stop_dac(state);
895 spin_unlock_irqrestore(&card->lock, flags);
896 }
897
898 static void start_dac(struct trident_state *state)
899 {
900 struct dmabuf *dmabuf = &state->dmabuf;
901 unsigned int chan_num = dmabuf->channel->num;
902 struct trident_card *card = state->card;
903 unsigned long flags;
904
905 spin_lock_irqsave(&card->lock, flags);
906 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
907 dmabuf->enable |= DAC_RUNNING;
908 trident_enable_voice_irq(card, chan_num);
909 trident_start_voice(card, chan_num);
910 }
911 spin_unlock_irqrestore(&card->lock, flags);
912 }
913
914 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
915 #define DMABUF_MINORDER 1
916
917 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
918 static int alloc_dmabuf(struct trident_state *state)
919 {
920 struct dmabuf *dmabuf = &state->dmabuf;
921 void *rawbuf;
922 int order;
923 struct page *page, *pend;
924
925 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
926 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
927 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
928 PAGE_SIZE << order,
929 &dmabuf->dma_handle)))
930 break;
931 if (!rawbuf)
932 return -ENOMEM;
933
934 #ifdef DEBUG
935 printk("trident: allocated %ld (order = %d) bytes at %p\n",
936 PAGE_SIZE << order, order, rawbuf);
937 #endif
938
939 dmabuf->ready = dmabuf->mapped = 0;
940 dmabuf->rawbuf = rawbuf;
941 dmabuf->buforder = order;
942
943 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
944 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
945 for (page = virt_to_page(rawbuf); page <= pend; page++)
946 mem_map_reserve(page);
947
948 return 0;
949 }
950
951 /* free DMA buffer */
952 static void dealloc_dmabuf(struct trident_state *state)
953 {
954 struct dmabuf *dmabuf = &state->dmabuf;
955 struct page *page, *pend;
956
957 if (dmabuf->rawbuf) {
958 /* undo marking the pages as reserved */
959 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
960 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
961 mem_map_unreserve(page);
962 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
963 dmabuf->rawbuf, dmabuf->dma_handle);
964 }
965 dmabuf->rawbuf = NULL;
966 dmabuf->mapped = dmabuf->ready = 0;
967 }
968
969 static int prog_dmabuf(struct trident_state *state, unsigned rec)
970 {
971 struct dmabuf *dmabuf = &state->dmabuf;
972 unsigned bytepersec;
973 unsigned bufsize;
974 unsigned long flags;
975 int ret;
976
977 spin_lock_irqsave(&state->card->lock, flags);
978 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
979 dmabuf->count = dmabuf->error = 0;
980 spin_unlock_irqrestore(&state->card->lock, flags);
981
982 /* allocate DMA buffer if not allocated yet */
983 if (!dmabuf->rawbuf)
984 if ((ret = alloc_dmabuf(state)))
985 return ret;
986
987 /* FIXME: figure out all this OSS fragment stuff */
988 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
989 bufsize = PAGE_SIZE << dmabuf->buforder;
990 if (dmabuf->ossfragshift) {
991 if ((1000 << dmabuf->ossfragshift) < bytepersec)
992 dmabuf->fragshift = ld2(bytepersec/1000);
993 else
994 dmabuf->fragshift = dmabuf->ossfragshift;
995 } else {
996 /* lets hand out reasonable big ass buffers by default */
997 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
998 }
999 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1000 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1001 dmabuf->fragshift--;
1002 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1003 }
1004 dmabuf->fragsize = 1 << dmabuf->fragshift;
1005 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1006 dmabuf->numfrag = dmabuf->ossmaxfrags;
1007 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1008 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1009
1010 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1011 dmabuf->dmasize);
1012
1013 spin_lock_irqsave(&state->card->lock, flags);
1014 if (rec) {
1015 trident_rec_setup(state);
1016 } else {
1017 trident_play_setup(state);
1018 }
1019 spin_unlock_irqrestore(&state->card->lock, flags);
1020
1021 /* set the ready flag for the dma buffer */
1022 dmabuf->ready = 1;
1023
1024 #ifdef DEBUG
1025 printk("trident: prog_dmabuf, sample rate = %d, format = %d, numfrag = %d, "
1026 "fragsize = %d dmasize = %d\n",
1027 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1028 dmabuf->fragsize, dmabuf->dmasize);
1029 #endif
1030
1031 return 0;
1032 }
1033
1034 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1035 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
1036 but we almost always get this
1037 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
1038 so we have to clear the tail space to "silence"
1039 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
1040 */
1041 static void trident_clear_tail(struct trident_state *state)
1042 {
1043 struct dmabuf *dmabuf = &state->dmabuf;
1044 unsigned swptr;
1045 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1046 unsigned int len;
1047 unsigned long flags;
1048
1049 spin_lock_irqsave(&state->card->lock, flags);
1050 swptr = dmabuf->swptr;
1051 spin_unlock_irqrestore(&state->card->lock, flags);
1052
1053 if (swptr == 0 || swptr == dmabuf->dmasize / 2 || swptr == dmabuf->dmasize)
1054 return;
1055
1056 if (swptr < dmabuf->dmasize/2)
1057 len = dmabuf->dmasize/2 - swptr;
1058 else
1059 len = dmabuf->dmasize - swptr;
1060
1061 memset(dmabuf->rawbuf + swptr, silence, len);
1062
1063 spin_lock_irqsave(&state->card->lock, flags);
1064 dmabuf->swptr += len;
1065 dmabuf->count += len;
1066 spin_unlock_irqrestore(&state->card->lock, flags);
1067
1068 /* restart the dma machine in case it is halted */
1069 start_dac(state);
1070 }
1071
1072 static int drain_dac(struct trident_state *state, int nonblock)
1073 {
1074 DECLARE_WAITQUEUE(wait, current);
1075 struct dmabuf *dmabuf = &state->dmabuf;
1076 unsigned long flags;
1077 unsigned long tmo;
1078 int count;
1079
1080 if (dmabuf->mapped || !dmabuf->ready)
1081 return 0;
1082
1083 add_wait_queue(&dmabuf->wait, &wait);
1084 for (;;) {
1085 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1086 every time to make the process really go to sleep */
1087 current->state = TASK_INTERRUPTIBLE;
1088
1089 spin_lock_irqsave(&state->card->lock, flags);
1090 count = dmabuf->count;
1091 spin_unlock_irqrestore(&state->card->lock, flags);
1092
1093 if (count <= 0)
1094 break;
1095
1096 if (signal_pending(current))
1097 break;
1098
1099 if (nonblock) {
1100 remove_wait_queue(&dmabuf->wait, &wait);
1101 current->state = TASK_RUNNING;
1102 return -EBUSY;
1103 }
1104
1105 /* No matter how much data left in the buffer, we have to wait untill
1106 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1107 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1108 tmo >>= sample_shift[dmabuf->fmt];
1109 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
1110 printk(KERN_ERR "trident: drain_dac, dma timeout?\n");
1111 break;
1112 }
1113 }
1114 remove_wait_queue(&dmabuf->wait, &wait);
1115 current->state = TASK_RUNNING;
1116 if (signal_pending(current))
1117 return -ERESTARTSYS;
1118
1119 return 0;
1120 }
1121
1122 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1123 static void trident_update_ptr(struct trident_state *state)
1124 {
1125 struct dmabuf *dmabuf = &state->dmabuf;
1126 unsigned hwptr, swptr;
1127 int clear_cnt = 0;
1128 int diff;
1129 unsigned char silence;
1130 unsigned half_dmasize;
1131
1132 /* update hardware pointer */
1133 hwptr = trident_get_dma_addr(state);
1134 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1135 dmabuf->hwptr = hwptr;
1136 dmabuf->total_bytes += diff;
1137
1138 /* error handling and process wake up for ADC */
1139 if (dmabuf->enable == ADC_RUNNING) {
1140 if (dmabuf->mapped) {
1141 dmabuf->count -= diff;
1142 if (dmabuf->count >= (signed)dmabuf->fragsize)
1143 wake_up(&dmabuf->wait);
1144 } else {
1145 dmabuf->count += diff;
1146
1147 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1148 /* buffer underrun or buffer overrun, we have no way to recover
1149 it here, just stop the machine and let the process force hwptr
1150 and swptr to sync */
1151 __stop_adc(state);
1152 dmabuf->error++;
1153 }
1154 else if (!dmabuf->endcleared) {
1155 swptr = dmabuf->swptr;
1156 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1157 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1158 /* We must clear end data of 1/2 dmabuf if needed.
1159 According to 1/2 algorithm of Address Engine Interrupt,
1160 check the validation of the data of half dmasize. */
1161 half_dmasize = dmabuf->dmasize / 2;
1162 if ((diff = hwptr - half_dmasize) < 0 )
1163 diff = hwptr;
1164 if ((dmabuf->count + diff) < half_dmasize) {
1165 //there is invalid data in the end of half buffer
1166 if ((clear_cnt = half_dmasize - swptr) < 0)
1167 clear_cnt += half_dmasize;
1168 //clear the invalid data
1169 memset (dmabuf->rawbuf + swptr,
1170 silence, clear_cnt);
1171
1172 dmabuf->endcleared = 1;
1173 }
1174 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1175 clear_cnt = dmabuf->fragsize;
1176 if ((swptr + clear_cnt) > dmabuf->dmasize)
1177 clear_cnt = dmabuf->dmasize - swptr;
1178 memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
1179 dmabuf->endcleared = 1;
1180 }
1181 }
1182 /* trident_update_ptr is called by interrupt handler or by process via
1183 ioctl/poll, we only wake up the waiting process when we have more
1184 than 1/2 buffer of data to process (always true for interrupt handler) */
1185 if (dmabuf->count > (signed)dmabuf->dmasize/2)
1186 wake_up(&dmabuf->wait);
1187 }
1188 }
1189
1190 /* error handling and process wake up for DAC */
1191 if (dmabuf->enable == DAC_RUNNING) {
1192 if (dmabuf->mapped) {
1193 dmabuf->count += diff;
1194 if (dmabuf->count >= (signed)dmabuf->fragsize)
1195 wake_up(&dmabuf->wait);
1196 } else {
1197 dmabuf->count -= diff;
1198
1199 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1200 /* buffer underrun or buffer overrun, we have no way to recover
1201 it here, just stop the machine and let the process force hwptr
1202 and swptr to sync */
1203 __stop_dac(state);
1204 dmabuf->error++;
1205 }
1206 /* trident_update_ptr is called by interrupt handler or by process via
1207 ioctl/poll, we only wake up the waiting process when we have more
1208 than 1/2 buffer free (always true for interrupt handler) */
1209 if (dmabuf->count < (signed)dmabuf->dmasize/2)
1210 wake_up(&dmabuf->wait);
1211 }
1212 }
1213 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1214 }
1215
1216 static void trident_address_interrupt(struct trident_card *card)
1217 {
1218 int i;
1219 struct trident_state *state;
1220
1221 /* Update the pointers for all channels we are running. */
1222 /* FIXME: should read interrupt status only once */
1223 for (i = 0; i < NR_HW_CH; i++) {
1224 if (trident_check_channel_interrupt(card, 63 - i)) {
1225 trident_ack_channel_interrupt(card, 63 - i);
1226 if ((state = card->states[i]) != NULL) {
1227 trident_update_ptr(state);
1228 } else {
1229 printk("trident: spurious channel irq %d.\n",
1230 63 - i);
1231 trident_stop_voice(card, 63 - i);
1232 trident_disable_voice_irq(card, 63 - i);
1233 }
1234 }
1235 }
1236 }
1237
1238 static void ali_address_interrupt(struct trident_card *card)
1239 {
1240 int i;
1241 u32 mask = trident_get_interrupt_mask (card, BANK_A);
1242
1243 #ifdef DEBUG
1244 /* Sanity check to make sure that every state has a channel
1245 and vice versa. */
1246 u32 done = 0;
1247 unsigned ns = 0;
1248 unsigned nc = 0;
1249 for (i = 0; i < NR_HW_CH; i++) {
1250 if (card->banks[BANK_A].bitmap & (1<<i))
1251 nc ++;
1252
1253 if (card->states[i]) {
1254 u32 bit = 1 << card->states[i]->dmabuf.channel->num;
1255 if (bit & done)
1256 printk (KERN_ERR "trident: channel allocated to two states\n");
1257 ns++;
1258
1259 done |= bit;
1260 }
1261 }
1262 if (ns != nc)
1263 printk (KERN_ERR "trident: number of states != number of channels\n");
1264 #endif
1265
1266 for (i = 0; mask && i < NR_HW_CH; i++) {
1267 struct trident_state *state = card->states[i];
1268 if (!state)
1269 continue;
1270
1271 trident_ack_channel_interrupt(card, state->dmabuf.channel->num);
1272 mask &= ~ (1<<state->dmabuf.channel->num);
1273 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
1274 trident_update_ptr(state);
1275 }
1276
1277 if (mask)
1278 for (i = 0; i < NR_HW_CH; i++)
1279 if (mask & (1<<i)) {
1280 printk("ali: spurious channel irq %d.\n", i);
1281 trident_stop_voice(card, i);
1282 trident_disable_voice_irq(card, i);
1283 }
1284
1285 }
1286
1287 static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1288 {
1289 struct trident_card *card = (struct trident_card *)dev_id;
1290 u32 event;
1291
1292 spin_lock(&card->lock);
1293 event = inl(TRID_REG(card, T4D_MISCINT));
1294
1295 #ifdef DEBUG
1296 printk("trident: trident_interrupt called, MISCINT = 0x%08x\n", event);
1297 #endif
1298
1299 if (event & ADDRESS_IRQ) {
1300 card->address_interrupt(card);
1301 }
1302
1303 /* manually clear interrupt status, bad hardware design, blame T^2 */
1304 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1305 TRID_REG(card, T4D_MISCINT));
1306 spin_unlock(&card->lock);
1307 }
1308
1309 static loff_t trident_llseek(struct file *file, loff_t offset, int origin)
1310 {
1311 return -ESPIPE;
1312 }
1313
1314 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
1315 the user's buffer. it is filled by the dma machine and drained by this loop. */
1316 static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1317 {
1318 struct trident_state *state = (struct trident_state *)file->private_data;
1319 struct dmabuf *dmabuf = &state->dmabuf;
1320 ssize_t ret;
1321 unsigned long flags;
1322 unsigned swptr;
1323 int cnt;
1324
1325 #ifdef DEBUG
1326 printk("trident: trident_read called, count = %d\n", count);
1327 #endif
1328
1329 VALIDATE_STATE(state);
1330 if (ppos != &file->f_pos)
1331 return -ESPIPE;
1332 if (dmabuf->mapped)
1333 return -ENXIO;
1334 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1335 return ret;
1336 if (!access_ok(VERIFY_WRITE, buffer, count))
1337 return -EFAULT;
1338 ret = 0;
1339
1340 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)
1341 outl(inl(TRID_REG (state->card, ALI_GLOBAL_CONTROL)) | ALI_PCM_IN_ENABLE,
1342 TRID_REG (state->card, ALI_GLOBAL_CONTROL));
1343
1344 while (count > 0) {
1345 spin_lock_irqsave(&state->card->lock, flags);
1346 if (dmabuf->count > (signed) dmabuf->dmasize) {
1347 /* buffer overrun, we are recovering from sleep_on_timeout,
1348 resync hwptr and swptr, make process flush the buffer */
1349 dmabuf->count = dmabuf->dmasize;
1350 dmabuf->swptr = dmabuf->hwptr;
1351 }
1352 swptr = dmabuf->swptr;
1353 cnt = dmabuf->dmasize - swptr;
1354 if (dmabuf->count < cnt)
1355 cnt = dmabuf->count;
1356 spin_unlock_irqrestore(&state->card->lock, flags);
1357
1358 if (cnt > count)
1359 cnt = count;
1360 if (cnt <= 0) {
1361 unsigned long tmo;
1362 /* buffer is empty, start the dma machine and wait for data to be
1363 recorded */
1364 start_adc(state);
1365 if (file->f_flags & O_NONBLOCK) {
1366 if (!ret) ret = -EAGAIN;
1367 return ret;
1368 }
1369 /* No matter how much space left in the buffer, we have to wait untill
1370 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1371 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1372 tmo >>= sample_shift[dmabuf->fmt];
1373 /* There are two situations when sleep_on_timeout returns, one is when
1374 the interrupt is serviced correctly and the process is waked up by
1375 ISR ON TIME. Another is when timeout is expired, which means that
1376 either interrupt is NOT serviced correctly (pending interrupt) or it
1377 is TOO LATE for the process to be scheduled to run (scheduler latency)
1378 which results in a (potential) buffer overrun. And worse, there is
1379 NOTHING we can do to prevent it. */
1380 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1381 #ifdef DEBUG
1382 printk(KERN_ERR "trident: recording schedule timeout, "
1383 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1384 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1385 dmabuf->hwptr, dmabuf->swptr);
1386 #endif
1387 /* a buffer overrun, we delay the recovery untill next time the
1388 while loop begin and we REALLY have space to record */
1389 }
1390 if (signal_pending(current)) {
1391 ret = ret ? ret : -ERESTARTSYS;
1392 return ret;
1393 }
1394 continue;
1395 }
1396
1397 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1398 if (!ret) ret = -EFAULT;
1399 return ret;
1400 }
1401
1402 swptr = (swptr + cnt) % dmabuf->dmasize;
1403
1404 spin_lock_irqsave(&state->card->lock, flags);
1405 dmabuf->swptr = swptr;
1406 dmabuf->count -= cnt;
1407 spin_unlock_irqrestore(&state->card->lock, flags);
1408
1409 count -= cnt;
1410 buffer += cnt;
1411 ret += cnt;
1412 start_adc(state);
1413 }
1414 return ret;
1415 }
1416
1417 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1418 the soundcard. it is drained by the dma machine and filled by this loop. */
1419 static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1420 {
1421 struct trident_state *state = (struct trident_state *)file->private_data;
1422 struct dmabuf *dmabuf = &state->dmabuf;
1423 ssize_t ret;
1424 unsigned long flags;
1425 unsigned swptr;
1426 int cnt;
1427
1428 #ifdef DEBUG
1429 printk("trident: trident_write called, count = %d\n", count);
1430 #endif
1431
1432 VALIDATE_STATE(state);
1433 if (ppos != &file->f_pos)
1434 return -ESPIPE;
1435 if (dmabuf->mapped)
1436 return -ENXIO;
1437 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1438 return ret;
1439 if (!access_ok(VERIFY_READ, buffer, count))
1440 return -EFAULT;
1441 ret = 0;
1442
1443 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)
1444 if (dmabuf->channel->num == ALI_PCM_IN_CHANNEL)
1445 outl ( inl (TRID_REG (state->card, ALI_GLOBAL_CONTROL)) &
1446 ALI_PCM_IN_DISABLE, TRID_REG (state->card, ALI_GLOBAL_CONTROL));
1447
1448 while (count > 0) {
1449 spin_lock_irqsave(&state->card->lock, flags);
1450 if (dmabuf->count < 0) {
1451 /* buffer underrun, we are recovering from sleep_on_timeout,
1452 resync hwptr and swptr */
1453 dmabuf->count = 0;
1454 dmabuf->swptr = dmabuf->hwptr;
1455 }
1456 swptr = dmabuf->swptr;
1457 cnt = dmabuf->dmasize - swptr;
1458 if (dmabuf->count + cnt > dmabuf->dmasize)
1459 cnt = dmabuf->dmasize - dmabuf->count;
1460 spin_unlock_irqrestore(&state->card->lock, flags);
1461
1462 if (cnt > count)
1463 cnt = count;
1464 if (cnt <= 0) {
1465 unsigned long tmo;
1466 /* buffer is full, start the dma machine and wait for data to be
1467 played */
1468 start_dac(state);
1469 if (file->f_flags & O_NONBLOCK) {
1470 if (!ret) ret = -EAGAIN;
1471 return ret;
1472 }
1473 /* No matter how much data left in the buffer, we have to wait untill
1474 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1475 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1476 tmo >>= sample_shift[dmabuf->fmt];
1477 /* There are two situations when sleep_on_timeout returns, one is when
1478 the interrupt is serviced correctly and the process is waked up by
1479 ISR ON TIME. Another is when timeout is expired, which means that
1480 either interrupt is NOT serviced correctly (pending interrupt) or it
1481 is TOO LATE for the process to be scheduled to run (scheduler latency)
1482 which results in a (potential) buffer underrun. And worse, there is
1483 NOTHING we can do to prevent it. */
1484 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1485 #ifdef DEBUG
1486 printk(KERN_ERR "trident: playback schedule timeout, "
1487 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1488 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1489 dmabuf->hwptr, dmabuf->swptr);
1490 #endif
1491 /* a buffer underrun, we delay the recovery untill next time the
1492 while loop begin and we REALLY have data to play */
1493 }
1494 if (signal_pending(current)) {
1495 if (!ret) ret = -ERESTARTSYS;
1496 return ret;
1497 }
1498 continue;
1499 }
1500 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
1501 if (!ret) ret = -EFAULT;
1502 return ret;
1503 }
1504
1505 swptr = (swptr + cnt) % dmabuf->dmasize;
1506
1507 spin_lock_irqsave(&state->card->lock, flags);
1508 dmabuf->swptr = swptr;
1509 dmabuf->count += cnt;
1510 dmabuf->endcleared = 0;
1511 spin_unlock_irqrestore(&state->card->lock, flags);
1512
1513 count -= cnt;
1514 buffer += cnt;
1515 ret += cnt;
1516 start_dac(state);
1517 }
1518 return ret;
1519 }
1520
1521 /* No kernel lock - we have our own spinlock */
1522 static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait)
1523 {
1524 struct trident_state *state = (struct trident_state *)file->private_data;
1525 struct dmabuf *dmabuf = &state->dmabuf;
1526 unsigned long flags;
1527 unsigned int mask = 0;
1528
1529 VALIDATE_STATE(state);
1530 if (file->f_mode & FMODE_WRITE)
1531 poll_wait(file, &dmabuf->wait, wait);
1532 if (file->f_mode & FMODE_READ)
1533 poll_wait(file, &dmabuf->wait, wait);
1534
1535 spin_lock_irqsave(&state->card->lock, flags);
1536 trident_update_ptr(state);
1537 if (file->f_mode & FMODE_READ) {
1538 if (dmabuf->count >= (signed)dmabuf->fragsize)
1539 mask |= POLLIN | POLLRDNORM;
1540 }
1541 if (file->f_mode & FMODE_WRITE) {
1542 if (dmabuf->mapped) {
1543 if (dmabuf->count >= (signed)dmabuf->fragsize)
1544 mask |= POLLOUT | POLLWRNORM;
1545 } else {
1546 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
1547 mask |= POLLOUT | POLLWRNORM;
1548 }
1549 }
1550 spin_unlock_irqrestore(&state->card->lock, flags);
1551
1552 return mask;
1553 }
1554
1555 static int trident_mmap(struct file *file, struct vm_area_struct *vma)
1556 {
1557 struct trident_state *state = (struct trident_state *)file->private_data;
1558 struct dmabuf *dmabuf = &state->dmabuf;
1559 int ret = -EINVAL;
1560 unsigned long size;
1561
1562 VALIDATE_STATE(state);
1563 lock_kernel();
1564 if (vma->vm_flags & VM_WRITE) {
1565 if ((ret = prog_dmabuf(state, 0)) != 0)
1566 goto out;
1567 } else if (vma->vm_flags & VM_READ) {
1568 if ((ret = prog_dmabuf(state, 1)) != 0)
1569 goto out;
1570 } else
1571 goto out;
1572
1573 ret = -EINVAL;
1574 if (vma->vm_pgoff != 0)
1575 goto out;
1576 size = vma->vm_end - vma->vm_start;
1577 if (size > (PAGE_SIZE << dmabuf->buforder))
1578 goto out;
1579 ret = -EAGAIN;
1580 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1581 size, vma->vm_page_prot))
1582 goto out;
1583 dmabuf->mapped = 1;
1584 ret = 0;
1585 out:
1586 unlock_kernel();
1587 return ret;
1588 }
1589
1590 static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1591 {
1592 struct trident_state *state = (struct trident_state *)file->private_data;
1593 struct dmabuf *dmabuf = &state->dmabuf;
1594 unsigned long flags;
1595 audio_buf_info abinfo;
1596 count_info cinfo;
1597 int val, mapped, ret;
1598
1599 VALIDATE_STATE(state);
1600 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
1601 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
1602 #ifdef DEBUG
1603 printk("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
1604 _IOC_NR(cmd), arg ? *(int *)arg : 0);
1605 #endif
1606
1607 switch (cmd)
1608 {
1609 case OSS_GETVERSION:
1610 return put_user(SOUND_VERSION, (int *)arg);
1611
1612 case SNDCTL_DSP_RESET:
1613 /* FIXME: spin_lock ? */
1614 if (file->f_mode & FMODE_WRITE) {
1615 stop_dac(state);
1616 synchronize_irq();
1617 dmabuf->ready = 0;
1618 dmabuf->swptr = dmabuf->hwptr = 0;
1619 dmabuf->count = dmabuf->total_bytes = 0;
1620 }
1621 if (file->f_mode & FMODE_READ) {
1622 stop_adc(state);
1623 synchronize_irq();
1624 dmabuf->ready = 0;
1625 dmabuf->swptr = dmabuf->hwptr = 0;
1626 dmabuf->count = dmabuf->total_bytes = 0;
1627 }
1628 return 0;
1629
1630 case SNDCTL_DSP_SYNC:
1631 if (file->f_mode & FMODE_WRITE)
1632 return drain_dac(state, file->f_flags & O_NONBLOCK);
1633 return 0;
1634
1635 case SNDCTL_DSP_SPEED: /* set smaple rate */
1636 if (get_user(val, (int *)arg))
1637 return -EFAULT;
1638 if (val >= 0) {
1639 if (file->f_mode & FMODE_WRITE) {
1640 stop_dac(state);
1641 dmabuf->ready = 0;
1642 spin_lock_irqsave(&state->card->lock, flags);
1643 trident_set_dac_rate(state, val);
1644 spin_unlock_irqrestore(&state->card->lock, flags);
1645 }
1646 if (file->f_mode & FMODE_READ) {
1647 stop_adc(state);
1648 dmabuf->ready = 0;
1649 spin_lock_irqsave(&state->card->lock, flags);
1650 trident_set_adc_rate(state, val);
1651 spin_unlock_irqrestore(&state->card->lock, flags);
1652 }
1653 }
1654 return put_user(dmabuf->rate, (int *)arg);
1655
1656 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1657 if (get_user(val, (int *)arg))
1658 return -EFAULT;
1659 if (file->f_mode & FMODE_WRITE) {
1660 stop_dac(state);
1661 dmabuf->ready = 0;
1662 if (val)
1663 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1664 else
1665 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1666 }
1667 if (file->f_mode & FMODE_READ) {
1668 stop_adc(state);
1669 dmabuf->ready = 0;
1670 if (val)
1671 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1672 else
1673 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1674 }
1675 return 0;
1676
1677 case SNDCTL_DSP_GETBLKSIZE:
1678 if (file->f_mode & FMODE_WRITE) {
1679 if ((val = prog_dmabuf(state, 0)))
1680 return val;
1681 return put_user(dmabuf->fragsize, (int *)arg);
1682 }
1683 if (file->f_mode & FMODE_READ) {
1684 if ((val = prog_dmabuf(state, 1)))
1685 return val;
1686 return put_user(dmabuf->fragsize, (int *)arg);
1687 }
1688
1689 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1690 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
1691
1692 case SNDCTL_DSP_SETFMT: /* Select sample format */
1693 if (get_user(val, (int *)arg))
1694 return -EFAULT;
1695 if (val != AFMT_QUERY) {
1696 if (file->f_mode & FMODE_WRITE) {
1697 stop_dac(state);
1698 dmabuf->ready = 0;
1699 if (val == AFMT_S16_LE)
1700 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1701 else
1702 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
1703 }
1704 if (file->f_mode & FMODE_READ) {
1705 stop_adc(state);
1706 dmabuf->ready = 0;
1707 if (val == AFMT_S16_LE)
1708 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1709 else
1710 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
1711 }
1712 }
1713 return put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
1714 AFMT_S16_LE : AFMT_U8, (int *)arg);
1715
1716 case SNDCTL_DSP_CHANNELS:
1717 if (get_user(val, (int *)arg))
1718 return -EFAULT;
1719 if (val != 0) {
1720 if (file->f_mode & FMODE_WRITE) {
1721 stop_dac(state);
1722 dmabuf->ready = 0;
1723 if (val >= 2)
1724 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1725 else
1726 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1727 }
1728 if (file->f_mode & FMODE_READ) {
1729 stop_adc(state);
1730 dmabuf->ready = 0;
1731 if (val >= 2)
1732 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1733 else
1734 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1735 }
1736 }
1737 return put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
1738 (int *)arg);
1739
1740 case SNDCTL_DSP_POST:
1741 /* FIXME: the same as RESET ?? */
1742 return 0;
1743
1744 case SNDCTL_DSP_SUBDIVIDE:
1745 if (dmabuf->subdivision)
1746 return -EINVAL;
1747 if (get_user(val, (int *)arg))
1748 return -EFAULT;
1749 if (val != 1 && val != 2 && val != 4)
1750 return -EINVAL;
1751 dmabuf->subdivision = val;
1752 return 0;
1753
1754 case SNDCTL_DSP_SETFRAGMENT:
1755 if (get_user(val, (int *)arg))
1756 return -EFAULT;
1757
1758 dmabuf->ossfragshift = val & 0xffff;
1759 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
1760 if (dmabuf->ossfragshift < 4)
1761 dmabuf->ossfragshift = 4;
1762 if (dmabuf->ossfragshift > 15)
1763 dmabuf->ossfragshift = 15;
1764 if (dmabuf->ossmaxfrags < 4)
1765 dmabuf->ossmaxfrags = 4;
1766
1767 return 0;
1768
1769 case SNDCTL_DSP_GETOSPACE:
1770 if (!(file->f_mode & FMODE_WRITE))
1771 return -EINVAL;
1772 if (!dmabuf->enable && (val = prog_dmabuf(state, 0)) != 0)
1773 return val;
1774 spin_lock_irqsave(&state->card->lock, flags);
1775 trident_update_ptr(state);
1776 abinfo.fragsize = dmabuf->fragsize;
1777 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
1778 abinfo.fragstotal = dmabuf->numfrag;
1779 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1780 spin_unlock_irqrestore(&state->card->lock, flags);
1781 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1782
1783 case SNDCTL_DSP_GETISPACE:
1784 if (!(file->f_mode & FMODE_READ))
1785 return -EINVAL;
1786 if (!dmabuf->enable && (val = prog_dmabuf(state, 1)) != 0)
1787 return val;
1788 spin_lock_irqsave(&state->card->lock, flags);
1789 trident_update_ptr(state);
1790 abinfo.fragsize = dmabuf->fragsize;
1791 abinfo.bytes = dmabuf->count;
1792 abinfo.fragstotal = dmabuf->numfrag;
1793 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1794 spin_unlock_irqrestore(&state->card->lock, flags);
1795 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1796
1797 case SNDCTL_DSP_NONBLOCK:
1798 file->f_flags |= O_NONBLOCK;
1799 return 0;
1800
1801 case SNDCTL_DSP_GETCAPS:
1802 return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
1803 (int *)arg);
1804
1805 case SNDCTL_DSP_GETTRIGGER:
1806 val = 0;
1807 if (file->f_mode & FMODE_READ && dmabuf->enable)
1808 val |= PCM_ENABLE_INPUT;
1809 if (file->f_mode & FMODE_WRITE && dmabuf->enable)
1810 val |= PCM_ENABLE_OUTPUT;
1811 return put_user(val, (int *)arg);
1812
1813 case SNDCTL_DSP_SETTRIGGER:
1814 if (get_user(val, (int *)arg))
1815 return -EFAULT;
1816 if (file->f_mode & FMODE_READ) {
1817 if (val & PCM_ENABLE_INPUT) {
1818 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1819 return ret;
1820 start_adc(state);
1821 } else
1822 stop_adc(state);
1823 }
1824 if (file->f_mode & FMODE_WRITE) {
1825 if (val & PCM_ENABLE_OUTPUT) {
1826 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1827 return ret;
1828 start_dac(state);
1829 } else
1830 stop_dac(state);
1831 }
1832 return 0;
1833
1834 case SNDCTL_DSP_GETIPTR:
1835 if (!(file->f_mode & FMODE_READ))
1836 return -EINVAL;
1837 spin_lock_irqsave(&state->card->lock, flags);
1838 trident_update_ptr(state);
1839 cinfo.bytes = dmabuf->total_bytes;
1840 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1841 cinfo.ptr = dmabuf->hwptr;
1842 if (dmabuf->mapped)
1843 dmabuf->count &= dmabuf->fragsize-1;
1844 spin_unlock_irqrestore(&state->card->lock, flags);
1845 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1846
1847 case SNDCTL_DSP_GETOPTR:
1848 if (!(file->f_mode & FMODE_WRITE))
1849 return -EINVAL;
1850 spin_lock_irqsave(&state->card->lock, flags);
1851 trident_update_ptr(state);
1852 cinfo.bytes = dmabuf->total_bytes;
1853 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1854 cinfo.ptr = dmabuf->hwptr;
1855 if (dmabuf->mapped)
1856 dmabuf->count &= dmabuf->fragsize-1;
1857 spin_unlock_irqrestore(&state->card->lock, flags);
1858 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1859
1860 case SNDCTL_DSP_SETDUPLEX:
1861 return -EINVAL;
1862
1863 case SNDCTL_DSP_GETODELAY:
1864 if (!(file->f_mode & FMODE_WRITE))
1865 return -EINVAL;
1866 spin_lock_irqsave(&state->card->lock, flags);
1867 trident_update_ptr(state);
1868 val = dmabuf->count;
1869 spin_unlock_irqrestore(&state->card->lock, flags);
1870 return put_user(val, (int *)arg);
1871
1872 case SOUND_PCM_READ_RATE:
1873 return put_user(dmabuf->rate, (int *)arg);
1874
1875 case SOUND_PCM_READ_CHANNELS:
1876 return put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
1877 (int *)arg);
1878
1879 case SOUND_PCM_READ_BITS:
1880 return put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
1881 AFMT_S16_LE : AFMT_U8, (int *)arg);
1882
1883 case SNDCTL_DSP_GETCHANNELMASK:
1884 return put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE,
1885 (int *)arg);
1886
1887 case SNDCTL_DSP_BIND_CHANNEL:
1888 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018)
1889 return -EINVAL;
1890
1891 if (get_user(val, (int *)arg))
1892 return -EFAULT;
1893 if (val == DSP_BIND_QUERY) {
1894 val = dmabuf->channel->attribute | 0x3c00;
1895 val = attr2mask[val >> 8];
1896 } else {
1897 dmabuf->ready = 0;
1898 if (file->f_mode & FMODE_READ)
1899 dmabuf->channel->attribute = (CHANNEL_REC|SRC_ENABLE);
1900 if (file->f_mode & FMODE_WRITE)
1901 dmabuf->channel->attribute = (CHANNEL_SPC_PB|SRC_ENABLE);
1902 dmabuf->channel->attribute |= mask2attr[ffs(val)];
1903 }
1904 return put_user(val, (int *)arg);
1905
1906 case SNDCTL_DSP_MAPINBUF:
1907 case SNDCTL_DSP_MAPOUTBUF:
1908 case SNDCTL_DSP_SETSYNCRO:
1909 case SOUND_PCM_WRITE_FILTER:
1910 case SOUND_PCM_READ_FILTER:
1911 return -EINVAL;
1912
1913 }
1914 return -EINVAL;
1915 }
1916
1917 static int trident_open(struct inode *inode, struct file *file)
1918 {
1919 int i = 0;
1920 int minor = MINOR(inode->i_rdev);
1921 struct trident_card *card = devs;
1922 struct trident_state *state = NULL;
1923 struct dmabuf *dmabuf = NULL;
1924
1925 /* find an avaiable virtual channel (instance of /dev/dsp) */
1926 while (card != NULL) {
1927 down(&card->open_sem);
1928 for (i = 0; i < NR_HW_CH; i++) {
1929 if (card->states[i] == NULL) {
1930 state = card->states[i] = (struct trident_state *)
1931 kmalloc(sizeof(struct trident_state), GFP_KERNEL);
1932 if (state == NULL) {
1933 return -ENOMEM;
1934 }
1935 memset(state, 0, sizeof(struct trident_state));
1936 dmabuf = &state->dmabuf;
1937 goto found_virt;
1938 }
1939 }
1940 up(&card->open_sem);
1941 card = card->next;
1942 }
1943 /* no more virtual channel avaiable */
1944 if (!state) {
1945 return -ENODEV;
1946 }
1947 found_virt:
1948 /* found a free virtual channel, allocate hardware channels */
1949 if(file->f_mode & FMODE_READ)
1950 dmabuf->channel = card->alloc_rec_pcm_channel(card);
1951 else
1952 dmabuf->channel = card->alloc_pcm_channel(card);
1953
1954 if (dmabuf->channel == NULL) {
1955 kfree (card->states[i]);
1956 card->states[i] = NULL;
1957 return -ENODEV;
1958 }
1959
1960 /* initialize the virtual channel */
1961 state->virt = i;
1962 state->card = card;
1963 state->magic = TRIDENT_STATE_MAGIC;
1964 init_waitqueue_head(&dmabuf->wait);
1965 file->private_data = state;
1966
1967 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
1968 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
1969 /dev/dspW will accept 16-bits sample */
1970 if (file->f_mode & FMODE_WRITE) {
1971 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
1972 if ((minor & 0x0f) == SND_DEV_DSP16)
1973 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1974 dmabuf->ossfragshift = 0;
1975 dmabuf->ossmaxfrags = 0;
1976 dmabuf->subdivision = 0;
1977 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
1978 /* set default channel attribute to normal playback */
1979 dmabuf->channel->attribute = CHANNEL_PB;
1980 }
1981 trident_set_dac_rate(state, 8000);
1982 }
1983
1984 if (file->f_mode & FMODE_READ) {
1985 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
1986 card->states[ALI_PCM_IN_CHANNEL] = state;
1987 card->states[i] = NULL;
1988 state->virt = ALI_PCM_IN_CHANNEL;
1989 }
1990 /* FIXME: Trident 4d can only record in signed 16-bits stereo, 48kHz sample,
1991 to be dealed with in trident_set_adc_rate() ?? */
1992 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
1993 if ((minor & 0x0f) == SND_DEV_DSP16)
1994 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1995 dmabuf->ossfragshift = 0;
1996 dmabuf->ossmaxfrags = 0;
1997 dmabuf->subdivision = 0;
1998 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
1999 /* set default channel attribute to 0x8a80, record from
2000 PCM L/R FIFO and mono = (left + right + 1)/2*/
2001 dmabuf->channel->attribute =
2002 (CHANNEL_REC|PCM_LR|MONO_MIX);
2003 }
2004 trident_set_adc_rate(state, 8000);
2005 }
2006
2007 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2008 up(&card->open_sem);
2009
2010 #ifdef DEBUG
2011 printk(KERN_ERR "trident: open virtual channel %d, hard channel %d\n",
2012 state->virt, dmabuf->channel->num);
2013 #endif
2014
2015 return 0;
2016 }
2017
2018 static int trident_release(struct inode *inode, struct file *file)
2019 {
2020 struct trident_state *state = (struct trident_state *)file->private_data;
2021 struct trident_card *card;
2022 struct dmabuf *dmabuf;
2023
2024 lock_kernel();
2025 card = state->card;
2026 dmabuf = &state->dmabuf;
2027 VALIDATE_STATE(state);
2028
2029 if (file->f_mode & FMODE_WRITE) {
2030 trident_clear_tail(state);
2031 drain_dac(state, file->f_flags & O_NONBLOCK);
2032 }
2033
2034 /* stop DMA state machine and free DMA buffers/channels */
2035 down(&card->open_sem);
2036
2037 if (file->f_mode & FMODE_WRITE) {
2038 stop_dac(state);
2039 dealloc_dmabuf(state);
2040 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2041 }
2042 if (file->f_mode & FMODE_READ) {
2043 stop_adc(state);
2044 dealloc_dmabuf(state);
2045 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2046 }
2047
2048 card->states[state->virt] = NULL;
2049 kfree(state);
2050
2051 /* we're covered by the open_sem */
2052 up(&card->open_sem);
2053 unlock_kernel();
2054
2055 return 0;
2056 }
2057
2058 static /*const*/ struct file_operations trident_audio_fops = {
2059 owner: THIS_MODULE,
2060 llseek: trident_llseek,
2061 read: trident_read,
2062 write: trident_write,
2063 poll: trident_poll,
2064 ioctl: trident_ioctl,
2065 mmap: trident_mmap,
2066 open: trident_open,
2067 release: trident_release,
2068 };
2069
2070 /* trident specific AC97 functions */
2071 /* Write AC97 codec registers */
2072 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2073 {
2074 struct trident_card *card = (struct trident_card *)codec->private_data;
2075 unsigned int address, mask, busy;
2076 unsigned short count = 0xffff;
2077 unsigned long flags;
2078 u32 data;
2079
2080 data = ((u32) val) << 16;
2081
2082 switch (card->pci_id)
2083 {
2084 default:
2085 case PCI_DEVICE_ID_SI_7018:
2086 address = SI_AC97_WRITE;
2087 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2088 if (codec->id)
2089 mask |= SI_AC97_SECONDARY;
2090 busy = SI_AC97_BUSY_WRITE;
2091 break;
2092 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2093 address = DX_ACR0_AC97_W;
2094 mask = busy = DX_AC97_BUSY_WRITE;
2095 break;
2096 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2097 address = NX_ACR1_AC97_W;
2098 mask = NX_AC97_BUSY_WRITE;
2099 if (codec->id)
2100 mask |= NX_AC97_WRITE_SECONDARY;
2101 busy = NX_AC97_BUSY_WRITE;
2102 break;
2103 }
2104
2105 spin_lock_irqsave(&card->lock, flags);
2106 do {
2107 if ((inw(TRID_REG(card, address)) & busy) == 0)
2108 break;
2109 } while (count--);
2110
2111
2112 data |= (mask | (reg & AC97_REG_ADDR));
2113
2114 if (count == 0) {
2115 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2116 spin_unlock_irqrestore(&card->lock, flags);
2117 return;
2118 }
2119
2120 outl(data, TRID_REG(card, address));
2121 spin_unlock_irqrestore(&card->lock, flags);
2122 }
2123
2124 /* Read AC97 codec registers */
2125 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2126 {
2127 struct trident_card *card = (struct trident_card *)codec->private_data;
2128 unsigned int address, mask, busy;
2129 unsigned short count = 0xffff;
2130 unsigned long flags;
2131 u32 data;
2132
2133 switch (card->pci_id)
2134 {
2135 default:
2136 case PCI_DEVICE_ID_SI_7018:
2137 address = SI_AC97_READ;
2138 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2139 if (codec->id)
2140 mask |= SI_AC97_SECONDARY;
2141 busy = SI_AC97_BUSY_READ;
2142 break;
2143 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2144 address = DX_ACR1_AC97_R;
2145 mask = busy = DX_AC97_BUSY_READ;
2146 break;
2147 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2148 if (codec->id)
2149 address = NX_ACR3_AC97_R_SECONDARY;
2150 else
2151 address = NX_ACR2_AC97_R_PRIMARY;
2152 mask = NX_AC97_BUSY_READ;
2153 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2154 break;
2155 }
2156
2157 data = (mask | (reg & AC97_REG_ADDR));
2158
2159 spin_lock_irqsave(&card->lock, flags);
2160 outl(data, TRID_REG(card, address));
2161 do {
2162 data = inl(TRID_REG(card, address));
2163 if ((data & busy) == 0)
2164 break;
2165 } while (count--);
2166 spin_unlock_irqrestore(&card->lock, flags);
2167
2168 if (count == 0) {
2169 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
2170 data = 0;
2171 }
2172 return ((u16) (data >> 16));
2173 }
2174
2175 /* Write AC97 codec registers for ALi*/
2176 static void ali_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2177 {
2178 struct trident_card *card = (struct trident_card *)codec->private_data;
2179 unsigned int address, mask;
2180 unsigned int wCount1 = 0xffff;
2181 unsigned int wCount2= 0xffff;
2182 unsigned long chk1, chk2;
2183 unsigned long flags;
2184 u32 data;
2185
2186 data = ((u32) val) << 16;
2187
2188 address = ALI_AC97_WRITE;
2189 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
2190 if (codec->id)
2191 mask |= ALI_AC97_SECONDARY;
2192 if (card->revision == 0x02)
2193 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
2194
2195 spin_lock_irqsave(&card->lock, flags);
2196 while (wCount1--) {
2197 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_WRITE) == 0) {
2198 data |= (mask | (reg & AC97_REG_ADDR));
2199
2200 chk1 = inl(TRID_REG(card, ALI_STIMER));
2201 chk2 = inl(TRID_REG(card, ALI_STIMER));
2202 while (wCount2-- && (chk1 == chk2))
2203 chk2 = inl(TRID_REG(card, ALI_STIMER));
2204 if (wCount2 == 0) {
2205 spin_unlock_irqrestore(&card->lock, flags);
2206 return;
2207 }
2208 outl(data, TRID_REG(card, address)); //write!
2209 spin_unlock_irqrestore(&card->lock, flags);
2210 return; //success
2211 }
2212 inw(TRID_REG(card, address)); //wait a read cycle
2213 }
2214
2215 printk(KERN_ERR "ali: AC97 CODEC write timed out.\n");
2216 spin_unlock_irqrestore(&card->lock, flags);
2217 return;
2218 }
2219
2220 /* Read AC97 codec registers for ALi*/
2221 static u16 ali_ac97_get(struct ac97_codec *codec, u8 reg)
2222 {
2223 struct trident_card *card = (struct trident_card *)codec->private_data;
2224 unsigned int address, mask;
2225 unsigned int wCount1 = 0xffff;
2226 unsigned int wCount2= 0xffff;
2227 unsigned long chk1, chk2;
2228 unsigned long flags;
2229 u32 data;
2230
2231 address = ALI_AC97_READ;
2232 if (card->revision == 0x02) {
2233 address = ALI_AC97_WRITE;
2234 mask &= ALI_AC97_READ_MIXER_REGISTER;
2235 }
2236 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
2237 if (codec->id)
2238 mask |= ALI_AC97_SECONDARY;
2239
2240 spin_lock_irqsave(&card->lock, flags);
2241 data = (mask | (reg & AC97_REG_ADDR));
2242 while (wCount1--) {
2243 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2244 chk1 = inl(TRID_REG(card, ALI_STIMER));
2245 chk2 = inl(TRID_REG(card, ALI_STIMER));
2246 while (wCount2-- && (chk1 == chk2))
2247 chk2 = inl(TRID_REG(card, ALI_STIMER));
2248 if (wCount2 == 0) {
2249 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2250 spin_unlock_irqrestore(&card->lock, flags);
2251 return 0;
2252 }
2253 outl(data, TRID_REG(card, address)); //read!
2254 wCount2 = 0xffff;
2255 while (wCount2--) {
2256 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2257 data = inl(TRID_REG(card, address));
2258 spin_unlock_irqrestore(&card->lock, flags);
2259 return ((u16) (data >> 16));
2260 }
2261 }
2262 }
2263 inw(TRID_REG(card, address)); //wait a read cycle
2264 }
2265 spin_unlock_irqrestore(&card->lock, flags);
2266 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2267 return 0;
2268 }
2269
2270 /* OSS /dev/mixer file operation methods */
2271 static int trident_open_mixdev(struct inode *inode, struct file *file)
2272 {
2273 int i;
2274 int minor = MINOR(inode->i_rdev);
2275 struct trident_card *card = devs;
2276
2277 for (card = devs; card != NULL; card = card->next)
2278 for (i = 0; i < NR_AC97; i++)
2279 if (card->ac97_codec[i] != NULL &&
2280 card->ac97_codec[i]->dev_mixer == minor)
2281 goto match;
2282
2283 if (!card) {
2284 return -ENODEV;
2285 }
2286 match:
2287 file->private_data = card->ac97_codec[i];
2288
2289
2290 return 0;
2291 }
2292
2293 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2294 unsigned long arg)
2295 {
2296 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2297
2298 return codec->mixer_ioctl(codec, cmd, arg);
2299 }
2300
2301 static /*const*/ struct file_operations trident_mixer_fops = {
2302 owner: THIS_MODULE,
2303 llseek: trident_llseek,
2304 ioctl: trident_ioctl_mixdev,
2305 open: trident_open_mixdev,
2306 };
2307
2308 /* AC97 codec initialisation. */
2309 static int __init trident_ac97_init(struct trident_card *card)
2310 {
2311 int num_ac97 = 0;
2312 int ready_2nd = 0;
2313 struct ac97_codec *codec;
2314
2315 /* initialize controller side of AC link, and find out if secondary codes
2316 really exist */
2317 switch (card->pci_id)
2318 {
2319 case PCI_DEVICE_ID_ALI_5451:
2320 outl(PCMOUT|SECONDARY_ID, TRID_REG(card, SI_SERIAL_INTF_CTRL));
2321 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
2322 ready_2nd &= SI_AC97_SECONDARY_READY;
2323 break;
2324 case PCI_DEVICE_ID_SI_7018:
2325 /* disable AC97 GPIO interrupt */
2326 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
2327 /* when power up the AC link is in cold reset mode so stop it */
2328 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT|SECONDARY_ID,
2329 TRID_REG(card, SI_SERIAL_INTF_CTRL));
2330 /* it take a long time to recover from a cold reset (especially when you have
2331 more than one codec) */
2332 udelay(2000);
2333 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
2334 ready_2nd &= SI_AC97_SECONDARY_READY;
2335 break;
2336 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2337 /* playback on */
2338 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
2339 break;
2340 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2341 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
2342 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2343 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2344 ready_2nd &= NX_AC97_SECONDARY_READY;
2345 break;
2346 }
2347
2348 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
2349 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
2350 return -ENOMEM;
2351 memset(codec, 0, sizeof(struct ac97_codec));
2352
2353 /* initialize some basic codec information, other fields will be filled
2354 in ac97_probe_codec */
2355 codec->private_data = card;
2356 codec->id = num_ac97;
2357
2358 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2359 codec->codec_read = ali_ac97_get;
2360 codec->codec_write = ali_ac97_set;
2361 }
2362 else {
2363 codec->codec_read = trident_ac97_get;
2364 codec->codec_write = trident_ac97_set;
2365 }
2366
2367 if (ac97_probe_codec(codec) == 0)
2368 break;
2369
2370 if ((codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0) {
2371 printk(KERN_ERR "trident: couldn't register mixer!\n");
2372 kfree(codec);
2373 break;
2374 }
2375
2376 card->ac97_codec[num_ac97] = codec;
2377
2378 /* if there is no secondary codec at all, don't probe any more */
2379 if (!ready_2nd)
2380 return num_ac97+1;
2381 }
2382
2383 return num_ac97;
2384 }
2385
2386 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
2387 untill "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
2388 static int __init trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
2389 {
2390 unsigned long iobase;
2391 struct trident_card *card;
2392 u8 revision;
2393
2394 if (!pci_dma_supported(pci_dev, TRIDENT_DMA_MASK)) {
2395 printk(KERN_ERR "trident: architecture does not support"
2396 " 30bit PCI busmaster DMA\n");
2397 return -ENODEV;
2398 }
2399 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
2400
2401 iobase = pci_resource_start(pci_dev, 0);
2402 if (check_region(iobase, 256)) {
2403 printk(KERN_ERR "trident: can't allocate I/O space at 0x%4.4lx\n",
2404 iobase);
2405 return -ENODEV;
2406 }
2407
2408 if (pci_enable_device(pci_dev))
2409 return -ENODEV;
2410
2411 if ((card = kmalloc(sizeof(struct trident_card), GFP_KERNEL)) == NULL) {
2412 printk(KERN_ERR "trident: out of memory\n");
2413 return -ENOMEM;
2414 }
2415 memset(card, 0, sizeof(*card));
2416
2417 card->iobase = iobase;
2418 card->pci_dev = pci_dev;
2419 card->pci_id = pci_id->device;
2420 card->revision = revision;
2421 card->irq = pci_dev->irq;
2422 card->next = devs;
2423 card->magic = TRIDENT_CARD_MAGIC;
2424 card->banks[BANK_A].addresses = &bank_a_addrs;
2425 card->banks[BANK_A].bitmap = 0UL;
2426 card->banks[BANK_B].addresses = &bank_b_addrs;
2427 card->banks[BANK_B].bitmap = 0UL;
2428 init_MUTEX(&card->open_sem);
2429 spin_lock_init(&card->lock);
2430 devs = card;
2431
2432 pci_set_master(pci_dev);
2433
2434 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
2435 card_names[pci_id->driver_data], card->iobase, card->irq);
2436
2437 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2438 card->alloc_pcm_channel = ali_alloc_pcm_channel;
2439 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
2440 card->free_pcm_channel = ali_free_pcm_channel;
2441 card->address_interrupt = ali_address_interrupt;
2442 }
2443 else {
2444 card->alloc_pcm_channel = trident_alloc_pcm_channel;
2445 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
2446 card->free_pcm_channel = trident_free_pcm_channel;
2447 card->address_interrupt = trident_address_interrupt;
2448 }
2449
2450 /* claim our iospace and irq */
2451 request_region(card->iobase, 256, card_names[pci_id->driver_data]);
2452 if (request_irq(card->irq, &trident_interrupt, SA_SHIRQ,
2453 card_names[pci_id->driver_data], card)) {
2454 printk(KERN_ERR "trident: unable to allocate irq %d\n", card->irq);
2455 release_region(card->iobase, 256);
2456 kfree(card);
2457 return -ENODEV;
2458 }
2459 /* register /dev/dsp */
2460 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
2461 printk(KERN_ERR "trident: couldn't register DSP device!\n");
2462 release_region(iobase, 256);
2463 free_irq(card->irq, card);
2464 kfree(card);
2465 return -ENODEV;
2466 }
2467 /* initilize AC97 codec and register /dev/mixer */
2468 if (trident_ac97_init(card) <= 0) {
2469 unregister_sound_dsp(card->dev_audio);
2470 release_region(iobase, 256);
2471 free_irq(card->irq, card);
2472 kfree(card);
2473 return -ENODEV;
2474 }
2475 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
2476
2477 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2478 /* edited by HMSEO for GT sound */
2479 #ifdef CONFIG_ALPHA_NAUTILUS
2480 u16 ac97_data = trident_ac97_get (card->ac97_codec[0], AC97_POWER_CONTROL);
2481 trident_ac97_set (card->ac97_codec[0], AC97_POWER_CONTROL,
2482 ac97_data | ALI_EAPD_POWER_DOWN);
2483 #endif
2484 /* edited by HMSEO for GT sound*/
2485 }
2486
2487 pci_dev->driver_data = card;
2488 pci_dev->dma_mask = TRIDENT_DMA_MASK;
2489
2490 /* Enable Address Engine Interrupts */
2491 trident_enable_loop_interrupts(card);
2492
2493 return 0;
2494 }
2495
2496 static void __exit trident_remove(struct pci_dev *pci_dev)
2497 {
2498 int i;
2499 struct trident_card *card = pci_dev->driver_data;
2500
2501 /* Kill interrupts, and SP/DIF */
2502 trident_disable_loop_interrupts(card);
2503
2504 /* free hardware resources */
2505 free_irq(card->irq, card);
2506 release_region(card->iobase, 256);
2507
2508 /* unregister audio devices */
2509 for (i = 0; i < NR_AC97; i++)
2510 if (card->ac97_codec[i] != NULL) {
2511 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
2512 kfree (card->ac97_codec[i]);
2513 }
2514 unregister_sound_dsp(card->dev_audio);
2515
2516 kfree(card);
2517 }
2518
2519 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee");
2520 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 PCI Audio Driver");
2521
2522 #define TRIDENT_MODULE_NAME "trident"
2523
2524 static struct pci_driver trident_pci_driver = {
2525 name: TRIDENT_MODULE_NAME,
2526 id_table: trident_pci_tbl,
2527 probe: trident_probe,
2528 remove: trident_remove,
2529 };
2530
2531 static int __init trident_init_module (void)
2532 {
2533 if (!pci_present()) /* No PCI bus in this machine! */
2534 return -ENODEV;
2535
2536 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451 PCI Audio, version "
2537 DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
2538
2539 if (!pci_register_driver(&trident_pci_driver)) {
2540 pci_unregister_driver(&trident_pci_driver);
2541 return -ENODEV;
2542 }
2543 return 0;
2544 }
2545
2546 static void __exit trident_cleanup_module (void)
2547 {
2548 pci_unregister_driver(&trident_pci_driver);
2549 }
2550
2551 module_init(trident_init_module);
2552 module_exit(trident_cleanup_module);
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