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[davej-history.git] / drivers / sound / cs46xx.c
blob1c282b1cc987a9cd4b606cba6578257eebb519c6
1 /*
2 * Crystal SoundFusion CS46xx driver
3 *
4 * Copyright 1999-2000 Jaroslav Kysela <perex@suse.cz>
5 * Copyright 2000 Alan Cox <alan@redhat.com>
6 *
7 * The core of this code is taken from the ALSA project driver by
8 * Jaroslav. Please send Jaroslav the credit for the driver and
9 * report bugs in this port to <alan@redhat.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Changes:
26 * 20000815 Updated driver to kernel 2.4, some cleanups/fixes
27 * Nils Faerber <nils@kernelconcepts.de>
28 *
29 */
30
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/string.h>
34 #include <linux/ctype.h>
35 #include <linux/ioport.h>
36 #include <linux/sched.h>
37 #include <linux/delay.h>
38 #include <linux/sound.h>
39 #include <linux/malloc.h>
40 #include <linux/soundcard.h>
41 #include <linux/pci.h>
42 #include <asm/io.h>
43 #include <asm/dma.h>
44 #include <linux/init.h>
45 #include <linux/poll.h>
46 #include <linux/spinlock.h>
47 #include <linux/ac97_codec.h>
48 #include <linux/wrapper.h>
49 #include <asm/uaccess.h>
50 #include <asm/hardirq.h>
51
52 #include "cs461x.h"
53
54 #define ADC_RUNNING 1
55 #define DAC_RUNNING 2
56
57 #define CS_FMT_16BIT 1 /* These are fixed in fact */
58 #define CS_FMT_STEREO 2
59 #define CS_FMT_MASK 3
60
61 /*
62 * CS461x definitions
63 */
64
65 #define CS461X_BA0_SIZE 0x2000
66 #define CS461X_BA1_DATA0_SIZE 0x3000
67 #define CS461X_BA1_DATA1_SIZE 0x3800
68 #define CS461X_BA1_PRG_SIZE 0x7000
69 #define CS461X_BA1_REG_SIZE 0x0100
70
71 #define GOF_PER_SEC 200
72
73 /*
74 * Define this to enable recording,
75 * this is curently broken and using it will cause data corruption
76 * in kernel- and user-space!
77 */
78 /* #define CS46XX_ENABLE_RECORD */
79
80 static int external_amp = 0;
81 static int thinkpad = 0;
82
83
84 /* an instance of the 4610 channel */
85
86 struct cs_channel
87 {
88 int used;
89 int num;
90 void *state;
91 };
92
93 #define DRIVER_VERSION "0.09"
94
95 /* magic numbers to protect our data structures */
96 #define CS_CARD_MAGIC 0x46524F4D /* "FROM" */
97 #define CS_STATE_MAGIC 0x414c5341 /* "ALSA" */
98 #define NR_HW_CH 3
99
100 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
101 #define NR_AC97 2
102
103 /* minor number of /dev/dspW */
104 #define SND_DEV_DSP8 1
105
106 /* minor number of /dev/dspW */
107 #define SND_DEV_DSP16 1
108
109 static const unsigned sample_size[] = { 1, 2, 2, 4 };
110 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
111
112 /* "software" or virtual channel, an instance of opened /dev/dsp */
113 struct cs_state {
114 unsigned int magic;
115 struct cs_card *card; /* Card info */
116
117 /* single open lock mechanism, only used for recording */
118 struct semaphore open_sem;
119 wait_queue_head_t open_wait;
120
121 /* file mode */
122 mode_t open_mode;
123
124 /* virtual channel number */
125 int virt;
126
127 struct dmabuf {
128 /* wave sample stuff */
129 unsigned int rate;
130 unsigned char fmt, enable;
131
132 /* hardware channel */
133 struct cs_channel *channel;
134 int pringbuf; /* Software ring slot */
135 int ppingbuf; /* Hardware ring slot */
136 void *pbuf; /* 4K hardware DMA buffer */
137
138 /* OSS buffer management stuff */
139 void *rawbuf;
140 dma_addr_t dma_handle;
141 unsigned buforder;
142 unsigned numfrag;
143 unsigned fragshift;
144
145 /* our buffer acts like a circular ring */
146 unsigned hwptr; /* where dma last started, updated by update_ptr */
147 unsigned swptr; /* where driver last clear/filled, updated by read/write */
148 int count; /* bytes to be comsumed or been generated by dma machine */
149 unsigned total_bytes; /* total bytes dmaed by hardware */
150
151 unsigned error; /* number of over/underruns */
152 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
153
154 /* redundant, but makes calculations easier */
155 unsigned fragsize;
156 unsigned dmasize;
157 unsigned fragsamples;
158
159 /* OSS stuff */
160 unsigned mapped:1;
161 unsigned ready:1;
162 unsigned endcleared:1;
163 unsigned update_flag;
164 unsigned ossfragshift;
165 int ossmaxfrags;
166 unsigned subdivision;
167 } dmabuf;
168 };
169
170
171 struct cs_card {
172 struct cs_channel channel[2];
173 unsigned int magic;
174
175 /* We keep cs461x cards in a linked list */
176 struct cs_card *next;
177
178 /* The cs461x has a certain amount of cross channel interaction
179 so we use a single per card lock */
180 spinlock_t lock;
181
182 /* PCI device stuff */
183 struct pci_dev * pci_dev;
184
185 unsigned int pctl, cctl; /* Hardware DMA flag sets */
186
187 /* soundcore stuff */
188 int dev_audio;
189
190 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
191 struct ac97_codec *ac97_codec[NR_AC97];
192 struct cs_state *states[NR_HW_CH];
193
194 u16 ac97_features;
195
196 int amplifier; /* Amplifier control */
197 void (*amplifier_ctrl)(struct cs_card *, int);
198
199 int active; /* Active clocking */
200 void (*active_ctrl)(struct cs_card *, int);
201
202 /* hardware resources */
203 unsigned long ba0_addr;
204 unsigned long ba1_addr;
205 u32 irq;
206
207 /* mappings */
208 void *ba0;
209 union
210 {
211 struct
212 {
213 u8 *data0;
214 u8 *data1;
215 u8 *pmem;
216 u8 *reg;
217 } name;
218 u8 *idx[4];
219 } ba1;
220
221 /* Function support */
222 struct cs_channel *(*alloc_pcm_channel)(struct cs_card *);
223 struct cs_channel *(*alloc_rec_pcm_channel)(struct cs_card *);
224 void (*free_pcm_channel)(struct cs_card *, int chan);
225 };
226
227 static struct cs_card *devs = NULL;
228
229 static int cs_open_mixdev(struct inode *inode, struct file *file);
230 static int cs_release_mixdev(struct inode *inode, struct file *file);
231 static int cs_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
232 unsigned long arg);
233 static loff_t cs_llseek(struct file *file, loff_t offset, int origin);
234
235 extern __inline__ unsigned ld2(unsigned int x)
236 {
237 unsigned r = 0;
238
239 if (x >= 0x10000) {
240 x >>= 16;
241 r += 16;
242 }
243 if (x >= 0x100) {
244 x >>= 8;
245 r += 8;
246 }
247 if (x >= 0x10) {
248 x >>= 4;
249 r += 4;
250 }
251 if (x >= 4) {
252 x >>= 2;
253 r += 2;
254 }
255 if (x >= 2)
256 r++;
257 return r;
258 }
259
260
261 /*
262 * common I/O routines
263 */
264
265 static void cs461x_poke(struct cs_card *codec, unsigned long reg, unsigned int val)
266 {
267 writel(val, codec->ba1.idx[(reg >> 16) & 3]+(reg&0xffff));
268 }
269
270 static unsigned int cs461x_peek(struct cs_card *codec, unsigned long reg)
271 {
272 return readl(codec->ba1.idx[(reg >> 16) & 3]+(reg&0xffff));
273 }
274
275 static void cs461x_pokeBA0(struct cs_card *codec, unsigned long reg, unsigned int val)
276 {
277 writel(val, codec->ba0+reg);
278 }
279
280 static unsigned int cs461x_peekBA0(struct cs_card *codec, unsigned long reg)
281 {
282 return readl(codec->ba0+reg);
283 }
284
285
286 static u16 cs_ac97_get(struct ac97_codec *dev, u8 reg);
287 static void cs_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
288
289 static struct cs_channel *cs_alloc_pcm_channel(struct cs_card *card)
290 {
291 if(card->channel[1].used==1)
292 return NULL;
293 card->channel[1].used=1;
294 card->channel[1].num=1;
295 return &card->channel[1];
296 }
297
298 static struct cs_channel *cs_alloc_rec_pcm_channel(struct cs_card *card)
299 {
300 if(card->channel[0].used==1)
301 return NULL;
302 card->channel[0].used=1;
303 card->channel[0].num=0;
304 return &card->channel[0];
305 }
306
307 static void cs_free_pcm_channel(struct cs_card *card, int channel)
308 {
309 card->channel[channel].state = NULL;
310 card->channel[channel].used=0;
311 }
312
313 /* set playback sample rate */
314 static unsigned int cs_set_dac_rate(struct cs_state * state, unsigned int rate)
315 {
316 struct dmabuf *dmabuf = &state->dmabuf;
317 unsigned int tmp1, tmp2;
318 unsigned int phiIncr;
319 unsigned int correctionPerGOF, correctionPerSec;
320
321 /*
322 * Compute the values used to drive the actual sample rate conversion.
323 * The following formulas are being computed, using inline assembly
324 * since we need to use 64 bit arithmetic to compute the values:
325 *
326 * phiIncr = floor((Fs,in * 2^26) / Fs,out)
327 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
328 * GOF_PER_SEC)
329 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M
330 * GOF_PER_SEC * correctionPerGOF
331 *
332 * i.e.
333 *
334 * phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out)
335 * correctionPerGOF:correctionPerSec =
336 * dividend:remainder(ulOther / GOF_PER_SEC)
337 */
338 tmp1 = rate << 16;
339 phiIncr = tmp1 / 48000;
340 tmp1 -= phiIncr * 48000;
341 tmp1 <<= 10;
342 phiIncr <<= 10;
343 tmp2 = tmp1 / 48000;
344 phiIncr += tmp2;
345 tmp1 -= tmp2 * 48000;
346 correctionPerGOF = tmp1 / GOF_PER_SEC;
347 tmp1 -= correctionPerGOF * GOF_PER_SEC;
348 correctionPerSec = tmp1;
349
350 /*
351 * Fill in the SampleRateConverter control block.
352 */
353
354 spin_lock_irq(&state->card->lock);
355 cs461x_poke(state->card, BA1_PSRC,
356 ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF));
357 cs461x_poke(state->card, BA1_PPI, phiIncr);
358 spin_unlock_irq(&state->card->lock);
359 dmabuf->rate = rate;
360
361 return rate;
362 }
363
364 /* set recording sample rate */
365 static unsigned int cs_set_adc_rate(struct cs_state * state, unsigned int rate)
366 {
367 struct dmabuf *dmabuf = &state->dmabuf;
368 struct cs_card *card = state->card;
369 unsigned int phiIncr, coeffIncr, tmp1, tmp2;
370 unsigned int correctionPerGOF, correctionPerSec, initialDelay;
371 unsigned int frameGroupLength, cnt;
372
373 /*
374 * We can only decimate by up to a factor of 1/9th the hardware rate.
375 * Correct the value if an attempt is made to stray outside that limit.
376 */
377 if ((rate * 9) < 48000)
378 rate = 48000 / 9;
379
380 /*
381 * We can not capture at at rate greater than the Input Rate (48000).
382 * Return an error if an attempt is made to stray outside that limit.
383 */
384 if (rate > 48000)
385 rate = 48000;
386
387 /*
388 * Compute the values used to drive the actual sample rate conversion.
389 * The following formulas are being computed, using inline assembly
390 * since we need to use 64 bit arithmetic to compute the values:
391 *
392 * coeffIncr = -floor((Fs,out * 2^23) / Fs,in)
393 * phiIncr = floor((Fs,in * 2^26) / Fs,out)
394 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
395 * GOF_PER_SEC)
396 * correctionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
397 * GOF_PER_SEC * correctionPerGOF
398 * initialDelay = ceil((24 * Fs,in) / Fs,out)
399 *
400 * i.e.
401 *
402 * coeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in))
403 * phiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
404 * correctionPerGOF:correctionPerSec =
405 * dividend:remainder(ulOther / GOF_PER_SEC)
406 * initialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
407 */
408
409 tmp1 = rate << 16;
410 coeffIncr = tmp1 / 48000;
411 tmp1 -= coeffIncr * 48000;
412 tmp1 <<= 7;
413 coeffIncr <<= 7;
414 coeffIncr += tmp1 / 48000;
415 coeffIncr ^= 0xFFFFFFFF;
416 coeffIncr++;
417 tmp1 = 48000 << 16;
418 phiIncr = tmp1 / rate;
419 tmp1 -= phiIncr * rate;
420 tmp1 <<= 10;
421 phiIncr <<= 10;
422 tmp2 = tmp1 / rate;
423 phiIncr += tmp2;
424 tmp1 -= tmp2 * rate;
425 correctionPerGOF = tmp1 / GOF_PER_SEC;
426 tmp1 -= correctionPerGOF * GOF_PER_SEC;
427 correctionPerSec = tmp1;
428 initialDelay = ((48000 * 24) + rate - 1) / rate;
429
430 /*
431 * Fill in the VariDecimate control block.
432 */
433 spin_lock_irq(&card->lock);
434 cs461x_poke(card, BA1_CSRC,
435 ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF));
436 cs461x_poke(card, BA1_CCI, coeffIncr);
437 cs461x_poke(card, BA1_CD,
438 (((BA1_VARIDEC_BUF_1 + (initialDelay << 2)) << 16) & 0xFFFF0000) | 0x80);
439 cs461x_poke(card, BA1_CPI, phiIncr);
440 spin_unlock_irq(&card->lock);
441
442 /*
443 * Figure out the frame group length for the write back task. Basically,
444 * this is just the factors of 24000 (2^6*3*5^3) that are not present in
445 * the output sample rate.
446 */
447 frameGroupLength = 1;
448 for (cnt = 2; cnt <= 64; cnt *= 2) {
449 if (((rate / cnt) * cnt) != rate)
450 frameGroupLength *= 2;
451 }
452 if (((rate / 3) * 3) != rate) {
453 frameGroupLength *= 3;
454 }
455 for (cnt = 5; cnt <= 125; cnt *= 5) {
456 if (((rate / cnt) * cnt) != rate)
457 frameGroupLength *= 5;
458 }
459
460 /*
461 * Fill in the WriteBack control block.
462 */
463 spin_lock_irq(&card->lock);
464 cs461x_poke(card, BA1_CFG1, frameGroupLength);
465 cs461x_poke(card, BA1_CFG2, (0x00800000 | frameGroupLength));
466 cs461x_poke(card, BA1_CCST, 0x0000FFFF);
467 cs461x_poke(card, BA1_CSPB, ((65536 * rate) / 24000));
468 cs461x_poke(card, (BA1_CSPB + 4), 0x0000FFFF);
469 spin_unlock_irq(&card->lock);
470 dmabuf->rate = rate;
471 return rate;
472 }
473
474 /* prepare channel attributes for playback */
475 static void cs_play_setup(struct cs_state *state)
476 {
477 struct dmabuf *dmabuf = &state->dmabuf;
478 struct cs_card *card = state->card;
479 unsigned int tmp, tmp1;
480
481 tmp1=16;
482 if (!(dmabuf->fmt & CS_FMT_STEREO))
483 tmp1>>=1;
484 cs461x_poke(card, BA1_PVOL, 0x80008000);
485 cs461x_poke(card, BA1_PBA, virt_to_bus(dmabuf->pbuf));
486
487 tmp=cs461x_peek(card, BA1_PDTC);
488 tmp&=~0x000003FF;
489 tmp|=tmp1-1;
490 cs461x_poke(card, BA1_PDTC, tmp);
491
492 tmp=cs461x_peek(card, BA1_PFIE);
493 tmp&=~0x0000F03F;
494 if(!(dmabuf->fmt & CS_FMT_STEREO))
495 {
496 tmp|=0x00002000;
497 }
498 cs461x_poke(card, BA1_PFIE, tmp);
499
500 }
501
502 /* prepare channel attributes for recording */
503 static void cs_rec_setup(struct cs_state *state)
504 {
505 struct cs_card *card = state->card;
506 struct dmabuf *dmabuf = &state->dmabuf;
507 /* set the attenuation to 0dB */
508 cs461x_poke(card, BA1_CVOL, 0x80008000);
509 cs461x_poke(card, BA1_CBA, virt_to_bus(dmabuf->pbuf));
510 }
511
512
513 /* get current playback/recording dma buffer pointer (byte offset from LBA),
514 called with spinlock held! */
515
516 extern __inline__ unsigned cs_get_dma_addr(struct cs_state *state)
517 {
518 struct dmabuf *dmabuf = &state->dmabuf;
519 u32 offset;
520
521 if (!dmabuf->enable)
522 return 0;
523
524 offset = dmabuf->pringbuf * 2048;
525 return offset;
526 }
527
528 static void resync_dma_ptrs(struct cs_state *state)
529 {
530 struct dmabuf *dmabuf = &state->dmabuf;
531 int offset;
532
533 offset = 0;
534 dmabuf->hwptr=dmabuf->swptr = 0;
535 dmabuf->ppingbuf = dmabuf->pringbuf = 0;
536 dmabuf->ppingbuf = 1;
537 if(dmabuf->fmt&CS_FMT_16BIT)
538 memset(dmabuf->pbuf, 0, PAGE_SIZE);
539 else
540 memset(dmabuf->pbuf, 0x80, PAGE_SIZE);
541 }
542
543 /* Stop recording (lock held) */
544 extern __inline__ void __stop_adc(struct cs_state *state)
545 {
546 struct dmabuf *dmabuf = &state->dmabuf;
547 struct cs_card *card = state->card;
548 unsigned int tmp;
549
550 dmabuf->enable &= ~ADC_RUNNING;
551
552 tmp=cs461x_peek(card, BA1_CCTL);
553 tmp&=0xFFFF;
554 cs461x_poke(card, BA1_CCTL, tmp);
555
556 }
557
558 static void stop_adc(struct cs_state *state)
559 {
560 struct cs_card *card = state->card;
561 unsigned long flags;
562
563 spin_lock_irqsave(&card->lock, flags);
564 __stop_adc(state);
565 spin_unlock_irqrestore(&card->lock, flags);
566 }
567
568 static void start_adc(struct cs_state *state)
569 {
570 struct dmabuf *dmabuf = &state->dmabuf;
571 struct cs_card *card = state->card;
572 unsigned long flags;
573 unsigned int tmp;
574
575 spin_lock_irqsave(&card->lock, flags);
576 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
577 dmabuf->enable |= ADC_RUNNING;
578 tmp=cs461x_peek(card, BA1_CCTL);
579 tmp&=0xFFFF;
580 tmp|=card->cctl;
581 cs461x_poke(card, BA1_CCTL, tmp);
582 }
583 spin_unlock_irqrestore(&card->lock, flags);
584 }
585
586 /* stop playback (lock held) */
587 extern __inline__ void __stop_dac(struct cs_state *state)
588 {
589 struct dmabuf *dmabuf = &state->dmabuf;
590 struct cs_card *card = state->card;
591 unsigned int tmp;
592
593 dmabuf->enable &= ~DAC_RUNNING;
594
595 tmp=cs461x_peek(card, BA1_PCTL);
596 tmp&=0xFFFF;
597 cs461x_poke(card, BA1_PCTL, tmp);
598 }
599
600 static void stop_dac(struct cs_state *state)
601 {
602 struct cs_card *card = state->card;
603 unsigned long flags;
604
605 spin_lock_irqsave(&card->lock, flags);
606 __stop_dac(state);
607 spin_unlock_irqrestore(&card->lock, flags);
608 }
609
610 static void start_dac(struct cs_state *state)
611 {
612 struct dmabuf *dmabuf = &state->dmabuf;
613 struct cs_card *card = state->card;
614 unsigned long flags;
615 int tmp;
616
617 spin_lock_irqsave(&card->lock, flags);
618 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
619 if(!(dmabuf->enable&DAC_RUNNING))
620 {
621 dmabuf->enable |= DAC_RUNNING;
622 tmp = cs461x_peek(card, BA1_PCTL);
623 tmp &= 0xFFFF;
624 tmp |= card->pctl;
625 cs461x_poke(card, BA1_PCTL, tmp);
626 }
627 }
628 spin_unlock_irqrestore(&card->lock, flags);
629 }
630
631 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
632 #define DMABUF_MINORDER 1
633
634 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
635 static int alloc_dmabuf(struct cs_state *state)
636 {
637 struct dmabuf *dmabuf = &state->dmabuf;
638 void *rawbuf = NULL;
639 int order;
640 struct page *page, *pend;
641
642 /* alloc as big a chunk as we can */
643 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
644 if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order)))
645 break;
646
647 if (!rawbuf)
648 return -ENOMEM;
649
650 #ifdef DEBUG
651 printk("cs461x: allocated %ld (order = %d) bytes at %p\n",
652 PAGE_SIZE << order, order, rawbuf);
653 #endif
654
655 dmabuf->ready = dmabuf->mapped = 0;
656 dmabuf->rawbuf = rawbuf;
657 dmabuf->buforder = order;
658
659 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
660 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
661 for (page = virt_to_page(rawbuf); page <= pend; page++)
662 mem_map_reserve(page);
663
664 return 0;
665 }
666
667 /* free DMA buffer */
668 static void dealloc_dmabuf(struct cs_state *state)
669 {
670 struct dmabuf *dmabuf = &state->dmabuf;
671 struct page *page, *pend;
672
673 if (dmabuf->rawbuf) {
674 /* undo marking the pages as reserved */
675 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
676 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
677 mem_map_unreserve(page);
678 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
679 dmabuf->rawbuf, dmabuf->dma_handle);
680 }
681 dmabuf->rawbuf = NULL;
682 dmabuf->mapped = dmabuf->ready = 0;
683 }
684
685 static int prog_dmabuf(struct cs_state *state, unsigned rec)
686 {
687 struct dmabuf *dmabuf = &state->dmabuf;
688 unsigned bytepersec;
689 unsigned bufsize;
690 unsigned long flags;
691 int ret;
692
693 spin_lock_irqsave(&state->card->lock, flags);
694 resync_dma_ptrs(state);
695 dmabuf->total_bytes = 0;
696 dmabuf->count = dmabuf->error = 0;
697 spin_unlock_irqrestore(&state->card->lock, flags);
698
699 /* allocate DMA buffer if not allocated yet */
700 if (!dmabuf->rawbuf)
701 if ((ret = alloc_dmabuf(state)))
702 return ret;
703
704 /* FIXME: figure out all this OSS fragment stuff */
705 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
706 bufsize = PAGE_SIZE << dmabuf->buforder;
707 if (dmabuf->ossfragshift) {
708 if ((1000 << dmabuf->ossfragshift) < bytepersec)
709 dmabuf->fragshift = ld2(bytepersec/1000);
710 else
711 dmabuf->fragshift = dmabuf->ossfragshift;
712 } else {
713 /* lets hand out reasonable big ass buffers by default */
714 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
715 }
716 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
717 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
718 dmabuf->fragshift--;
719 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
720 }
721 dmabuf->fragsize = 1 << dmabuf->fragshift;
722 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
723 dmabuf->numfrag = dmabuf->ossmaxfrags;
724 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
725 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
726
727 memset(dmabuf->rawbuf, (dmabuf->fmt & CS_FMT_16BIT) ? 0 : 0x80,
728 dmabuf->dmasize);
729
730 /*
731 * Now set up the ring
732 */
733
734 spin_lock_irqsave(&state->card->lock, flags);
735 if (rec) {
736 cs_rec_setup(state);
737 } else {
738 cs_play_setup(state);
739 }
740 spin_unlock_irqrestore(&state->card->lock, flags);
741
742 /* set the ready flag for the dma buffer */
743 dmabuf->ready = 1;
744
745 #ifdef DEBUG
746 printk("cs461x: prog_dmabuf, sample rate = %d, format = %d, numfrag = %d, "
747 "fragsize = %d dmasize = %d\n",
748 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
749 dmabuf->fragsize, dmabuf->dmasize);
750 #endif
751
752 return 0;
753 }
754
755 static void cs_clear_tail(struct cs_state *state)
756 {
757 }
758
759 static int drain_dac(struct cs_state *state, int nonblock)
760 {
761 DECLARE_WAITQUEUE(wait, current);
762 struct dmabuf *dmabuf = &state->dmabuf;
763 unsigned long flags;
764 unsigned long tmo;
765 int count;
766
767 if (dmabuf->mapped || !dmabuf->ready)
768 return 0;
769
770 add_wait_queue(&dmabuf->wait, &wait);
771 for (;;) {
772 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
773 every time to make the process really go to sleep */
774 current->state = TASK_INTERRUPTIBLE;
775
776 spin_lock_irqsave(&state->card->lock, flags);
777 count = dmabuf->count;
778 spin_unlock_irqrestore(&state->card->lock, flags);
779
780 if (count <= 0)
781 break;
782
783 if (signal_pending(current))
784 break;
785
786 if (nonblock) {
787 remove_wait_queue(&dmabuf->wait, &wait);
788 current->state = TASK_RUNNING;
789 return -EBUSY;
790 }
791
792 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
793 tmo >>= sample_shift[dmabuf->fmt];
794 tmo += (4096*HZ)/dmabuf->rate;
795
796 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
797 printk(KERN_ERR "cs461x: drain_dac, dma timeout? %d\n", count);
798 break;
799 }
800 }
801 remove_wait_queue(&dmabuf->wait, &wait);
802 current->state = TASK_RUNNING;
803 if (signal_pending(current))
804 return -ERESTARTSYS;
805
806 return 0;
807 }
808
809 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
810 static void cs_update_ptr(struct cs_state *state)
811 {
812 struct dmabuf *dmabuf = &state->dmabuf;
813 unsigned hwptr, swptr;
814 int clear_cnt = 0;
815 int diff;
816 unsigned char silence;
817
818 /* update hardware pointer */
819 hwptr = cs_get_dma_addr(state);
820 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
821 dmabuf->hwptr = hwptr;
822 dmabuf->total_bytes += diff;
823
824 /* error handling and process wake up for DAC */
825 if (dmabuf->enable == ADC_RUNNING) {
826 if (dmabuf->mapped) {
827 dmabuf->count -= diff;
828 if (dmabuf->count >= (signed)dmabuf->fragsize)
829 wake_up(&dmabuf->wait);
830 } else {
831 dmabuf->count += diff;
832
833 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
834 /* buffer underrun or buffer overrun, we have no way to recover
835 it here, just stop the machine and let the process force hwptr
836 and swptr to sync */
837 __stop_adc(state);
838 dmabuf->error++;
839 }
840 else if (!dmabuf->endcleared) {
841 swptr = dmabuf->swptr;
842 silence = (dmabuf->fmt & CS_FMT_16BIT ? 0 : 0x80);
843 if (dmabuf->count < (signed) dmabuf->fragsize)
844 {
845 clear_cnt = dmabuf->fragsize;
846 if ((swptr + clear_cnt) > dmabuf->dmasize)
847 clear_cnt = dmabuf->dmasize - swptr;
848 memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
849 dmabuf->endcleared = 1;
850 }
851 }
852 wake_up(&dmabuf->wait);
853 }
854 }
855 /* error handling and process wake up for DAC */
856 if (dmabuf->enable == DAC_RUNNING) {
857 if (dmabuf->mapped) {
858 dmabuf->count += diff;
859 if (dmabuf->count >= (signed)dmabuf->fragsize)
860 wake_up(&dmabuf->wait);
861 } else {
862 dmabuf->count -= diff;
863
864 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
865 /* buffer underrun or buffer overrun, we have no way to recover
866 it here, just stop the machine and let the process force hwptr
867 and swptr to sync */
868 __stop_dac(state);
869 dmabuf->error++;
870 }
871 wake_up(&dmabuf->wait);
872 }
873 }
874 }
875
876 static void cs_record_interrupt(struct cs_state *state)
877 {
878 memcpy(state->dmabuf.rawbuf + (2048*state->dmabuf.pringbuf++),
879 state->dmabuf.pbuf+2048*state->dmabuf.ppingbuf++, 2048);
880 state->dmabuf.ppingbuf&=1;
881 if(state->dmabuf.pringbuf > (PAGE_SIZE<<state->dmabuf.buforder)/2048)
882 state->dmabuf.pringbuf=0;
883 cs_update_ptr(state);
884 }
885
886 static void cs_play_interrupt(struct cs_state *state)
887 {
888 memcpy(state->dmabuf.pbuf+2048*state->dmabuf.ppingbuf++,
889 state->dmabuf.rawbuf + (2048*state->dmabuf.pringbuf++), 2048);
890 state->dmabuf.ppingbuf&=1;
891 if(state->dmabuf.pringbuf >= (PAGE_SIZE<<state->dmabuf.buforder)/2048)
892 state->dmabuf.pringbuf=0;
893 cs_update_ptr(state);
894 }
895
896 static void cs_interrupt(int irq, void *dev_id, struct pt_regs *regs)
897 {
898 struct cs_card *card = (struct cs_card *)dev_id;
899 /* Single channel card */
900 struct cs_state *recstate = card->channel[0].state;
901 struct cs_state *playstate = card->channel[1].state;
902 u32 status;
903
904 spin_lock(&card->lock);
905
906 status = cs461x_peekBA0(card, BA0_HISR);
907
908 if((status&0x7fffffff)==0)
909 {
910 cs461x_pokeBA0(card, BA0_HICR, HICR_CHGM|HICR_IEV);
911 spin_unlock(&card->lock);
912 return;
913 }
914
915 if((status & HISR_VC0) && playstate && playstate->dmabuf.ready)
916 cs_play_interrupt(playstate);
917 if((status & HISR_VC1) && recstate && recstate->dmabuf.ready)
918 cs_record_interrupt(recstate);
919
920 /* clear 'em */
921 cs461x_pokeBA0(card, BA0_HICR, HICR_CHGM|HICR_IEV);
922 spin_unlock(&card->lock);
923 }
924
925 static loff_t cs_llseek(struct file *file, loff_t offset, int origin)
926 {
927 return -ESPIPE;
928 }
929
930 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
931 the user's buffer. it is filled by the dma machine and drained by this loop. */
932 static ssize_t cs_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
933 {
934 struct cs_state *state = (struct cs_state *)file->private_data;
935 struct dmabuf *dmabuf = &state->dmabuf;
936 ssize_t ret;
937 unsigned long flags;
938 unsigned swptr;
939 int cnt;
940
941 #ifdef DEBUG
942 printk("cs461x: cs_read called, count = %d\n", count);
943 #endif
944
945 if (ppos != &file->f_pos)
946 return -ESPIPE;
947 if (dmabuf->mapped)
948 return -ENXIO;
949 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
950 return ret;
951 if (!access_ok(VERIFY_WRITE, buffer, count))
952 return -EFAULT;
953 ret = 0;
954
955 while (count > 0) {
956 spin_lock_irqsave(&state->card->lock, flags);
957 if (dmabuf->count > (signed) dmabuf->dmasize) {
958 /* buffer overrun, we are recovering from sleep_on_timeout,
959 resync hwptr and swptr, make process flush the buffer */
960 dmabuf->count = dmabuf->dmasize;
961 dmabuf->swptr = dmabuf->hwptr;
962 }
963 swptr = dmabuf->swptr;
964 cnt = dmabuf->dmasize - swptr;
965 if (dmabuf->count < cnt)
966 cnt = dmabuf->count;
967 spin_unlock_irqrestore(&state->card->lock, flags);
968
969 if (cnt > count)
970 cnt = count;
971 if (cnt <= 0) {
972 unsigned long tmo;
973 /* buffer is empty, start the dma machine and wait for data to be
974 recorded */
975 start_adc(state);
976 if (file->f_flags & O_NONBLOCK) {
977 if (!ret) ret = -EAGAIN;
978 return ret;
979 }
980 /* This isnt strictly right for the 810 but it'll do */
981 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
982 tmo >>= sample_shift[dmabuf->fmt];
983 /* There are two situations when sleep_on_timeout returns, one is when
984 the interrupt is serviced correctly and the process is waked up by
985 ISR ON TIME. Another is when timeout is expired, which means that
986 either interrupt is NOT serviced correctly (pending interrupt) or it
987 is TOO LATE for the process to be scheduled to run (scheduler latency)
988 which results in a (potential) buffer overrun. And worse, there is
989 NOTHING we can do to prevent it. */
990 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
991 #ifdef DEBUG
992 printk(KERN_ERR "cs461x: recording schedule timeout, "
993 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
994 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
995 dmabuf->hwptr, dmabuf->swptr);
996 #endif
997 /* a buffer overrun, we delay the recovery untill next time the
998 while loop begin and we REALLY have space to record */
999 }
1000 if (signal_pending(current)) {
1001 ret = ret ? ret : -ERESTARTSYS;
1002 return ret;
1003 }
1004 continue;
1005 }
1006
1007 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1008 if (!ret) ret = -EFAULT;
1009 return ret;
1010 }
1011
1012 swptr = (swptr + cnt) % dmabuf->dmasize;
1013
1014 spin_lock_irqsave(&state->card->lock, flags);
1015 dmabuf->swptr = swptr;
1016 dmabuf->count -= cnt;
1017 spin_unlock_irqrestore(&state->card->lock, flags);
1018
1019 count -= cnt;
1020 buffer += cnt;
1021 ret += cnt;
1022 start_adc(state);
1023 }
1024 return ret;
1025 }
1026
1027 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1028 the soundcard. it is drained by the dma machine and filled by this loop. */
1029 static ssize_t cs_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1030 {
1031 struct cs_state *state = (struct cs_state *)file->private_data;
1032 struct dmabuf *dmabuf = &state->dmabuf;
1033 ssize_t ret;
1034 unsigned long flags;
1035 unsigned swptr;
1036 int cnt;
1037
1038 #ifdef DEBUG
1039 printk("cs461x: cs_write called, count = %d\n", count);
1040 #endif
1041
1042 if (ppos != &file->f_pos)
1043 return -ESPIPE;
1044 if (dmabuf->mapped)
1045 return -ENXIO;
1046 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1047 return ret;
1048 if (!access_ok(VERIFY_READ, buffer, count))
1049 return -EFAULT;
1050 ret = 0;
1051
1052 while (count > 0) {
1053 spin_lock_irqsave(&state->card->lock, flags);
1054 if (dmabuf->count < 0) {
1055 /* buffer underrun, we are recovering from sleep_on_timeout,
1056 resync hwptr and swptr */
1057 dmabuf->count = 0;
1058 dmabuf->swptr = dmabuf->hwptr;
1059 }
1060 swptr = dmabuf->swptr;
1061 cnt = dmabuf->dmasize - swptr;
1062 if (dmabuf->count + cnt > dmabuf->dmasize)
1063 cnt = dmabuf->dmasize - dmabuf->count;
1064 spin_unlock_irqrestore(&state->card->lock, flags);
1065
1066 if (cnt > count)
1067 cnt = count;
1068 if (cnt <= 0) {
1069 unsigned long tmo;
1070 /* buffer is full, start the dma machine and wait for data to be
1071 played */
1072 start_dac(state);
1073 if (file->f_flags & O_NONBLOCK) {
1074 if (!ret) ret = -EAGAIN;
1075 return ret;
1076 }
1077 /* Not strictly correct but works */
1078 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1079 tmo >>= sample_shift[dmabuf->fmt];
1080 /* There are two situations when sleep_on_timeout returns, one is when
1081 the interrupt is serviced correctly and the process is waked up by
1082 ISR ON TIME. Another is when timeout is expired, which means that
1083 either interrupt is NOT serviced correctly (pending interrupt) or it
1084 is TOO LATE for the process to be scheduled to run (scheduler latency)
1085 which results in a (potential) buffer underrun. And worse, there is
1086 NOTHING we can do to prevent it. */
1087 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1088 #ifdef DEBUG
1089 printk(KERN_ERR "cs461x: playback schedule timeout, "
1090 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1091 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1092 dmabuf->hwptr, dmabuf->swptr);
1093 #endif
1094 /* a buffer underrun, we delay the recovery untill next time the
1095 while loop begin and we REALLY have data to play */
1096 }
1097 if (signal_pending(current)) {
1098 if (!ret) ret = -ERESTARTSYS;
1099 return ret;
1100 }
1101 continue;
1102 }
1103 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
1104 if (!ret) ret = -EFAULT;
1105 return ret;
1106 }
1107
1108 swptr = (swptr + cnt) % dmabuf->dmasize;
1109
1110 spin_lock_irqsave(&state->card->lock, flags);
1111 dmabuf->swptr = swptr;
1112 dmabuf->count += cnt;
1113 dmabuf->endcleared = 0;
1114 spin_unlock_irqrestore(&state->card->lock, flags);
1115
1116 count -= cnt;
1117 buffer += cnt;
1118 ret += cnt;
1119 start_dac(state);
1120 }
1121 return ret;
1122 }
1123
1124 static unsigned int cs_poll(struct file *file, struct poll_table_struct *wait)
1125 {
1126 struct cs_state *state = (struct cs_state *)file->private_data;
1127 struct dmabuf *dmabuf = &state->dmabuf;
1128 unsigned long flags;
1129 unsigned int mask = 0;
1130
1131 if (file->f_mode & FMODE_WRITE)
1132 poll_wait(file, &dmabuf->wait, wait);
1133 if (file->f_mode & FMODE_READ)
1134 poll_wait(file, &dmabuf->wait, wait);
1135
1136 spin_lock_irqsave(&state->card->lock, flags);
1137 cs_update_ptr(state);
1138 if (file->f_mode & FMODE_READ) {
1139 if (dmabuf->count >= (signed)dmabuf->fragsize)
1140 mask |= POLLIN | POLLRDNORM;
1141 }
1142 if (file->f_mode & FMODE_WRITE) {
1143 if (dmabuf->mapped) {
1144 if (dmabuf->count >= (signed)dmabuf->fragsize)
1145 mask |= POLLOUT | POLLWRNORM;
1146 } else {
1147 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
1148 mask |= POLLOUT | POLLWRNORM;
1149 }
1150 }
1151 spin_unlock_irqrestore(&state->card->lock, flags);
1152
1153 return mask;
1154 }
1155
1156 static int cs_mmap(struct file *file, struct vm_area_struct *vma)
1157 {
1158 return -EINVAL;
1159 #if 0
1160 struct cs_state *state = (struct cs_state *)file->private_data;
1161 struct dmabuf *dmabuf = &state->dmabuf;
1162 int ret;
1163 unsigned long size;
1164
1165
1166 if (vma->vm_flags & VM_WRITE) {
1167 if ((ret = prog_dmabuf(state, 0)) != 0)
1168 return ret;
1169 } else if (vma->vm_flags & VM_READ) {
1170 if ((ret = prog_dmabuf(state, 1)) != 0)
1171 return ret;
1172 } else
1173 return -EINVAL;
1174
1175 if (vma->vm_offset != 0)
1176 return -EINVAL;
1177 size = vma->vm_end - vma->vm_start;
1178 if (size > (PAGE_SIZE << dmabuf->buforder))
1179 return -EINVAL;
1180 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1181 size, vma->vm_page_prot))
1182 return -EAGAIN;
1183 dmabuf->mapped = 1;
1184
1185 return 0;
1186 #endif
1187 }
1188
1189 static int cs_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1190 {
1191 struct cs_state *state = (struct cs_state *)file->private_data;
1192 struct dmabuf *dmabuf = &state->dmabuf;
1193 unsigned long flags;
1194 audio_buf_info abinfo;
1195 count_info cinfo;
1196 int val, mapped, ret;
1197
1198 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
1199 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
1200 #ifdef DEBUG
1201 printk("cs461x: cs_ioctl, command = %2d, arg = 0x%08x\n",
1202 _IOC_NR(cmd), arg ? *(int *)arg : 0);
1203 #endif
1204
1205 switch (cmd)
1206 {
1207 case OSS_GETVERSION:
1208 return put_user(SOUND_VERSION, (int *)arg);
1209
1210 case SNDCTL_DSP_RESET:
1211 /* FIXME: spin_lock ? */
1212 if (file->f_mode & FMODE_WRITE) {
1213 stop_dac(state);
1214 synchronize_irq();
1215 dmabuf->ready = 0;
1216 resync_dma_ptrs(state);
1217 dmabuf->swptr = dmabuf->hwptr = 0;
1218 dmabuf->count = dmabuf->total_bytes = 0;
1219 }
1220 if (file->f_mode & FMODE_READ) {
1221 stop_adc(state);
1222 synchronize_irq();
1223 resync_dma_ptrs(state);
1224 dmabuf->ready = 0;
1225 dmabuf->swptr = dmabuf->hwptr = 0;
1226 dmabuf->count = dmabuf->total_bytes = 0;
1227 }
1228 return 0;
1229
1230 case SNDCTL_DSP_SYNC:
1231 if (file->f_mode & FMODE_WRITE)
1232 return drain_dac(state, file->f_flags & O_NONBLOCK);
1233 return 0;
1234
1235 case SNDCTL_DSP_SPEED: /* set smaple rate */
1236 if (get_user(val, (int *)arg))
1237 return -EFAULT;
1238 if (val >= 0) {
1239 if (file->f_mode & FMODE_WRITE) {
1240 stop_dac(state);
1241 dmabuf->ready = 0;
1242 cs_set_dac_rate(state, val);
1243 }
1244 if (file->f_mode & FMODE_READ) {
1245 stop_adc(state);
1246 dmabuf->ready = 0;
1247 cs_set_adc_rate(state, val);
1248 }
1249 }
1250 return put_user(dmabuf->rate, (int *)arg);
1251
1252 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1253 if (get_user(val, (int *)arg))
1254 return -EFAULT;
1255 if (file->f_mode & FMODE_WRITE) {
1256 stop_dac(state);
1257 dmabuf->ready = 0;
1258 if(val)
1259 dmabuf->fmt |= CS_FMT_STEREO;
1260 else
1261 dmabuf->fmt &= ~CS_FMT_STEREO;
1262 }
1263 if (file->f_mode & FMODE_READ) {
1264 stop_adc(state);
1265 dmabuf->ready = 0;
1266 if(val)
1267 {
1268 dmabuf->fmt |= CS_FMT_STEREO;
1269 return put_user(1, (int *)arg);
1270 }
1271 #if 0
1272 /* Needs extra work to support this */
1273
1274 else
1275 dmabuf->fmt &= ~CS_FMT_STEREO;
1276 #endif
1277 }
1278 return 0;
1279
1280 case SNDCTL_DSP_GETBLKSIZE:
1281 if (file->f_mode & FMODE_WRITE) {
1282 if ((val = prog_dmabuf(state, 0)))
1283 return val;
1284 return put_user(dmabuf->fragsize, (int *)arg);
1285 }
1286 if (file->f_mode & FMODE_READ) {
1287 if ((val = prog_dmabuf(state, 1)))
1288 return val;
1289 return put_user(dmabuf->fragsize, (int *)arg);
1290 }
1291
1292 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1293 return put_user(AFMT_S16_LE, (int *)arg);
1294
1295 case SNDCTL_DSP_SETFMT: /* Select sample format */
1296 if (get_user(val, (int *)arg))
1297 return -EFAULT;
1298 if (val != AFMT_QUERY) {
1299 if(val==AFMT_S16_LE/* || val==AFMT_U8*/)
1300 {
1301 if (file->f_mode & FMODE_WRITE) {
1302 stop_dac(state);
1303 dmabuf->ready = 0;
1304 }
1305 if (file->f_mode & FMODE_READ) {
1306 stop_adc(state);
1307 dmabuf->ready = 0;
1308 }
1309 if(val==AFMT_S16_LE)
1310 dmabuf->fmt |= CS_FMT_16BIT;
1311 else
1312 dmabuf->fmt &= ~CS_FMT_16BIT;
1313 }
1314 }
1315 if(dmabuf->fmt&CS_FMT_16BIT)
1316 return put_user(AFMT_S16_LE, (int *)arg);
1317 else
1318 return put_user(AFMT_U8, (int *)arg);
1319
1320 case SNDCTL_DSP_CHANNELS:
1321 if (get_user(val, (int *)arg))
1322 return -EFAULT;
1323 if (val != 0) {
1324 if (file->f_mode & FMODE_WRITE) {
1325 stop_dac(state);
1326 dmabuf->ready = 0;
1327 if (val > 1)
1328 dmabuf->fmt |= CS_FMT_STEREO;
1329 else
1330 dmabuf->fmt &= ~CS_FMT_STEREO;
1331 }
1332 if (file->f_mode & FMODE_READ) {
1333 stop_adc(state);
1334 dmabuf->ready = 0;
1335 }
1336 }
1337 return put_user((dmabuf->fmt & CS_FMT_STEREO) ? 2 : 1,
1338 (int *)arg);
1339
1340 case SNDCTL_DSP_POST:
1341 /* FIXME: the same as RESET ?? */
1342 return 0;
1343
1344 case SNDCTL_DSP_SUBDIVIDE:
1345 if (dmabuf->subdivision)
1346 return -EINVAL;
1347 if (get_user(val, (int *)arg))
1348 return -EFAULT;
1349 if (val != 1 && val != 2)
1350 return -EINVAL;
1351 dmabuf->subdivision = val;
1352 return 0;
1353
1354 case SNDCTL_DSP_SETFRAGMENT:
1355 if (get_user(val, (int *)arg))
1356 return -EFAULT;
1357
1358 dmabuf->ossfragshift = val & 0xffff;
1359 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
1360 switch(dmabuf->ossmaxfrags)
1361 {
1362 case 1:
1363 dmabuf->ossfragshift=12;
1364 return 0;
1365 default:
1366 /* Fragments must be 2K long */
1367 dmabuf->ossfragshift = 11;
1368 dmabuf->ossmaxfrags=2;
1369 }
1370 return 0;
1371
1372 case SNDCTL_DSP_GETOSPACE:
1373 if (!(file->f_mode & FMODE_WRITE))
1374 return -EINVAL;
1375 if (!dmabuf->enable && (val = prog_dmabuf(state, 0)) != 0)
1376 return val;
1377 spin_lock_irqsave(&state->card->lock, flags);
1378 cs_update_ptr(state);
1379 abinfo.fragsize = dmabuf->fragsize;
1380 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
1381 abinfo.fragstotal = dmabuf->numfrag;
1382 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1383 spin_unlock_irqrestore(&state->card->lock, flags);
1384 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1385
1386 case SNDCTL_DSP_GETISPACE:
1387 if (!(file->f_mode & FMODE_READ))
1388 return -EINVAL;
1389 if (!dmabuf->enable && (val = prog_dmabuf(state, 1)) != 0)
1390 return val;
1391 spin_lock_irqsave(&state->card->lock, flags);
1392 cs_update_ptr(state);
1393 abinfo.fragsize = dmabuf->fragsize;
1394 abinfo.bytes = dmabuf->count;
1395 abinfo.fragstotal = dmabuf->numfrag;
1396 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1397 spin_unlock_irqrestore(&state->card->lock, flags);
1398 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1399
1400 case SNDCTL_DSP_NONBLOCK:
1401 file->f_flags |= O_NONBLOCK;
1402 return 0;
1403
1404 case SNDCTL_DSP_GETCAPS:
1405 return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP,
1406 (int *)arg);
1407
1408 case SNDCTL_DSP_GETTRIGGER:
1409 val = 0;
1410 if (file->f_mode & FMODE_READ && dmabuf->enable)
1411 val |= PCM_ENABLE_INPUT;
1412 if (file->f_mode & FMODE_WRITE && dmabuf->enable)
1413 val |= PCM_ENABLE_OUTPUT;
1414 return put_user(val, (int *)arg);
1415
1416 case SNDCTL_DSP_SETTRIGGER:
1417 if (get_user(val, (int *)arg))
1418 return -EFAULT;
1419 if (file->f_mode & FMODE_READ) {
1420 if (val & PCM_ENABLE_INPUT) {
1421 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1422 return ret;
1423 start_adc(state);
1424 } else
1425 stop_adc(state);
1426 }
1427 if (file->f_mode & FMODE_WRITE) {
1428 if (val & PCM_ENABLE_OUTPUT) {
1429 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1430 return ret;
1431 start_dac(state);
1432 } else
1433 stop_dac(state);
1434 }
1435 return 0;
1436
1437 case SNDCTL_DSP_GETIPTR:
1438 if (!(file->f_mode & FMODE_READ))
1439 return -EINVAL;
1440 spin_lock_irqsave(&state->card->lock, flags);
1441 cs_update_ptr(state);
1442 cinfo.bytes = dmabuf->total_bytes;
1443 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1444 cinfo.ptr = dmabuf->hwptr;
1445 if (dmabuf->mapped)
1446 dmabuf->count &= dmabuf->fragsize-1;
1447 spin_unlock_irqrestore(&state->card->lock, flags);
1448 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1449
1450 case SNDCTL_DSP_GETOPTR:
1451 if (!(file->f_mode & FMODE_WRITE))
1452 return -EINVAL;
1453 spin_lock_irqsave(&state->card->lock, flags);
1454 cs_update_ptr(state);
1455 cinfo.bytes = dmabuf->total_bytes;
1456 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1457 cinfo.ptr = dmabuf->hwptr;
1458 if (dmabuf->mapped)
1459 dmabuf->count &= dmabuf->fragsize-1;
1460 spin_unlock_irqrestore(&state->card->lock, flags);
1461 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1462
1463 case SNDCTL_DSP_SETDUPLEX:
1464 return -EINVAL;
1465
1466 case SNDCTL_DSP_GETODELAY:
1467 if (!(file->f_mode & FMODE_WRITE))
1468 return -EINVAL;
1469 spin_lock_irqsave(&state->card->lock, flags);
1470 cs_update_ptr(state);
1471 val = dmabuf->count;
1472 spin_unlock_irqrestore(&state->card->lock, flags);
1473 return put_user(val, (int *)arg);
1474
1475 case SOUND_PCM_READ_RATE:
1476 return put_user(dmabuf->rate, (int *)arg);
1477
1478 case SOUND_PCM_READ_CHANNELS:
1479 return put_user((dmabuf->fmt & CS_FMT_STEREO) ? 2 : 1,
1480 (int *)arg);
1481
1482 case SOUND_PCM_READ_BITS:
1483 return put_user(AFMT_S16_LE, (int *)arg);
1484
1485 case SNDCTL_DSP_MAPINBUF:
1486 case SNDCTL_DSP_MAPOUTBUF:
1487 case SNDCTL_DSP_SETSYNCRO:
1488 case SOUND_PCM_WRITE_FILTER:
1489 case SOUND_PCM_READ_FILTER:
1490 return -EINVAL;
1491 }
1492 return -EINVAL;
1493 }
1494
1495
1496 /*
1497 * AMP control - null AMP
1498 */
1499
1500 static void amp_none(struct cs_card *card, int change)
1501 {
1502 }
1503
1504 /*
1505 * Crystal EAPD mode
1506 */
1507
1508 static void amp_voyetra(struct cs_card *card, int change)
1509 {
1510 /* Manage the EAPD bit on the Crystal 4297 */
1511 int old=card->amplifier;
1512
1513 card->amplifier+=change;
1514 if(card->amplifier && !old)
1515 {
1516 /* Turn the EAPD amp on */
1517 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL,
1518 cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) |
1519 0x8000);
1520 }
1521 else if(old && !card->amplifier)
1522 {
1523 /* Turn the EAPD amp off */
1524 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL,
1525 cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
1526 ~0x8000);
1527 }
1528 }
1529
1530
1531
1532 /*
1533 * Untested
1534 */
1535 #if 0
1536 static void amp_voyetra_4294(struct cs_card *card, int change)
1537 {
1538 struct ac97_codec *c=card->ac97_codec[0];
1539 int old = card->amplifier;
1540
1541 card->amplifier+=change;
1542
1543 if(card->amplifier)
1544 {
1545 /* Switch the GPIO pins 7 and 8 to open drain */
1546 cs_ac97_set(c, 0x4C, cs_ac97_get(c, 0x4C) & 0xFE7F);
1547 cs_ac97_set(c, 0x4E, cs_ac97_get(c, 0x4E) | 0x0180);
1548 /* Now wake the AMP (this might be backwards) */
1549 cs_ac97_set(c, 0x54, cs_ac97_get(c, 0x54) & ~0x0180);
1550 }
1551 else
1552 {
1553 cs_ac97_set(c, 0x54, cs_ac97_get(c, 0x54) | 0x0180);
1554 }
1555 }
1556 #endif
1557
1558 /*
1559 * Handle the CLKRUN on a thinkpad. We must disable CLKRUN support
1560 * whenever we need to beat on the chip.
1561 *
1562 * The original idea and code for this hack comes from David Kaiser at
1563 * Linuxcare. Perhaps one day Crystal will document their chips well
1564 * enough to make them useful.
1565 */
1566
1567 static void clkrun_hack(struct cs_card *card, int change)
1568 {
1569 struct pci_dev *acpi_dev;
1570 u16 control;
1571 u8 pp;
1572 unsigned long port;
1573 int old=card->amplifier;
1574
1575 card->amplifier += change;
1576
1577 acpi_dev = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
1578 if(acpi_dev == NULL)
1579 return; /* Not a thinkpad thats for sure */
1580
1581
1582 /* Find the control port */
1583 pci_read_config_byte(acpi_dev, 0x41, &pp);
1584 port = pp<<8;
1585
1586 /* Read ACPI port */
1587 control = inw(port+0x10);
1588
1589 /* Flip CLKRUN off while running */
1590 if(!card->amplifier && old)
1591 outw(control|0x2000, port+0x10);
1592 else if(card->amplifier && !old)
1593 outw(control&~0x2000, port+0x10);
1594 }
1595
1596
1597 static int cs_open(struct inode *inode, struct file *file)
1598 {
1599 int i = 0;
1600 struct cs_card *card = devs;
1601 struct cs_state *state = NULL;
1602 struct dmabuf *dmabuf = NULL;
1603
1604 #ifndef CS46XX_ENABLE_RECORD
1605 if (file->f_mode & FMODE_READ)
1606 return -ENODEV;
1607 #endif
1608
1609 /* find an avaiable virtual channel (instance of /dev/dsp) */
1610 while (card != NULL) {
1611 for (i = 0; i < NR_HW_CH; i++) {
1612 if (card->states[i] == NULL) {
1613 state = card->states[i] = (struct cs_state *)
1614 kmalloc(sizeof(struct cs_state), GFP_KERNEL);
1615 if (state == NULL)
1616 return -ENOMEM;
1617 memset(state, 0, sizeof(struct cs_state));
1618 dmabuf = &state->dmabuf;
1619 dmabuf->pbuf = (void *)get_free_page(GFP_KERNEL);
1620 if(dmabuf->pbuf==NULL)
1621 {
1622 kfree(state);
1623 card->states[i]=NULL;
1624 return -ENOMEM;
1625 }
1626 goto found_virt;
1627 }
1628 }
1629 card = card->next;
1630 }
1631 /* no more virtual channel avaiable */
1632 if (!state)
1633 return -ENODEV;
1634
1635 found_virt:
1636 /* found a free virtual channel, allocate hardware channels */
1637 if(file->f_mode & FMODE_READ)
1638 dmabuf->channel = card->alloc_rec_pcm_channel(card);
1639 else
1640 dmabuf->channel = card->alloc_pcm_channel(card);
1641
1642 if (dmabuf->channel == NULL) {
1643 kfree (card->states[i]);
1644 card->states[i] = NULL;;
1645 return -ENODEV;
1646 }
1647
1648 /* Now turn on external AMP if needed */
1649 state->card = card;
1650 state->card->active_ctrl(state->card,1);
1651 state->card->amplifier_ctrl(state->card,1);
1652
1653 dmabuf->channel->state = state;
1654 /* initialize the virtual channel */
1655 state->virt = i;
1656 state->magic = CS_STATE_MAGIC;
1657 init_waitqueue_head(&dmabuf->wait);
1658 init_MUTEX(&state->open_sem);
1659 file->private_data = state;
1660
1661 down(&state->open_sem);
1662
1663 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
1664 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
1665 /dev/dspW will accept 16-bits sample */
1666 if (file->f_mode & FMODE_WRITE) {
1667 /* Output is 16bit only mono or stereo */
1668 dmabuf->fmt &= ~CS_FMT_MASK;
1669 dmabuf->fmt |= CS_FMT_16BIT;
1670 dmabuf->ossfragshift = 0;
1671 dmabuf->ossmaxfrags = 0;
1672 dmabuf->subdivision = 0;
1673 cs_set_dac_rate(state, 8000);
1674 }
1675
1676 if (file->f_mode & FMODE_READ) {
1677 /* Input is 16bit stereo only */
1678 dmabuf->fmt &= ~CS_FMT_MASK;
1679 dmabuf->fmt |= CS_FMT_16BIT|CS_FMT_STEREO;
1680 dmabuf->ossfragshift = 0;
1681 dmabuf->ossmaxfrags = 0;
1682 dmabuf->subdivision = 0;
1683 cs_set_adc_rate(state, 8000);
1684 }
1685
1686 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1687 up(&state->open_sem);
1688
1689
1690 MOD_INC_USE_COUNT;
1691 return 0;
1692 }
1693
1694 static int cs_release(struct inode *inode, struct file *file)
1695 {
1696 struct cs_state *state = (struct cs_state *)file->private_data;
1697 struct dmabuf *dmabuf = &state->dmabuf;
1698
1699 if (file->f_mode & FMODE_WRITE) {
1700 /* FIXME :.. */
1701 cs_clear_tail(state);
1702 drain_dac(state, file->f_flags & O_NONBLOCK);
1703 }
1704
1705 /* stop DMA state machine and free DMA buffers/channels */
1706 down(&state->open_sem);
1707
1708 if (file->f_mode & FMODE_WRITE) {
1709 stop_dac(state);
1710 dealloc_dmabuf(state);
1711 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1712 }
1713 if (file->f_mode & FMODE_READ) {
1714 stop_adc(state);
1715 dealloc_dmabuf(state);
1716 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1717 }
1718
1719 free_page((unsigned long)state->dmabuf.pbuf);
1720
1721 /* we're covered by the open_sem */
1722 up(&state->open_sem);
1723 state->card->states[state->virt] = NULL;
1724 state->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1725
1726 /* Now turn off external AMP if needed */
1727 state->card->amplifier_ctrl(state->card, -1);
1728 state->card->active_ctrl(state->card, -1);
1729
1730 kfree(state);
1731 MOD_DEC_USE_COUNT;
1732 return 0;
1733 }
1734
1735 static /*const*/ struct file_operations cs461x_fops = {
1736 llseek: cs_llseek,
1737 read: cs_read,
1738 write: cs_write,
1739 poll: cs_poll,
1740 ioctl: cs_ioctl,
1741 mmap: cs_mmap,
1742 open: cs_open,
1743 release: cs_release,
1744 };
1745
1746 /* Write AC97 codec registers */
1747
1748
1749 static u16 cs_ac97_get(struct ac97_codec *dev, u8 reg)
1750 {
1751 struct cs_card *card = dev->private_data;
1752 int count;
1753
1754 /*
1755 * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address
1756 * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97
1757 * 3. Write ACCTL = Control Register = 460h for initiating the write
1758 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 17h
1759 * 5. if DCV not cleared, break and return error
1760 * 6. Read ACSTS = Status Register = 464h, check VSTS bit
1761 */
1762
1763
1764 cs461x_peekBA0(card, BA0_ACSDA);
1765
1766 /*
1767 * Setup the AC97 control registers on the CS461x to send the
1768 * appropriate command to the AC97 to perform the read.
1769 * ACCAD = Command Address Register = 46Ch
1770 * ACCDA = Command Data Register = 470h
1771 * ACCTL = Control Register = 460h
1772 * set DCV - will clear when process completed
1773 * set CRW - Read command
1774 * set VFRM - valid frame enabled
1775 * set ESYN - ASYNC generation enabled
1776 * set RSTN - ARST# inactive, AC97 codec not reset
1777 */
1778
1779 cs461x_pokeBA0(card, BA0_ACCAD, reg);
1780 cs461x_pokeBA0(card, BA0_ACCDA, 0);
1781 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_DCV | ACCTL_CRW |
1782 ACCTL_VFRM | ACCTL_ESYN |
1783 ACCTL_RSTN);
1784
1785
1786 /*
1787 * Wait for the read to occur.
1788 */
1789 for (count = 0; count < 500; count++) {
1790 /*
1791 * First, we want to wait for a short time.
1792 */
1793 udelay(10);
1794 /*
1795 * Now, check to see if the read has completed.
1796 * ACCTL = 460h, DCV should be reset by now and 460h = 17h
1797 */
1798 if (!(cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV))
1799 break;
1800 }
1801
1802 /*
1803 * Make sure the read completed.
1804 */
1805 if (cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV) {
1806 printk(KERN_WARNING "cs461x: AC'97 read problem (ACCTL_DCV), reg = 0x%x\n", reg);
1807 return 0xffff;
1808 }
1809
1810 /*
1811 * Wait for the valid status bit to go active.
1812 */
1813 for (count = 0; count < 100; count++) {
1814 /*
1815 * Read the AC97 status register.
1816 * ACSTS = Status Register = 464h
1817 * VSTS - Valid Status
1818 */
1819 if (cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_VSTS)
1820 break;
1821 udelay(10);
1822 }
1823
1824 /*
1825 * Make sure we got valid status.
1826 */
1827 if (!(cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_VSTS)) {
1828 printk(KERN_WARNING "cs461x: AC'97 read problem (ACSTS_VSTS), reg = 0x%x\n", reg);
1829 return 0xffff;
1830 }
1831
1832 /*
1833 * Read the data returned from the AC97 register.
1834 * ACSDA = Status Data Register = 474h
1835 */
1836 #if 0
1837 printk("e) reg = 0x%x, val = 0x%x, BA0_ACCAD = 0x%x\n", reg,
1838 cs461x_peekBA0(card, BA0_ACSDA),
1839 cs461x_peekBA0(card, BA0_ACCAD));
1840 #endif
1841 return cs461x_peekBA0(card, BA0_ACSDA);
1842 }
1843
1844 static void cs_ac97_set(struct ac97_codec *dev, u8 reg, u16 val)
1845 {
1846 struct cs_card *card = dev->private_data;
1847 int count;
1848
1849 /*
1850 * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address
1851 * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97
1852 * 3. Write ACCTL = Control Register = 460h for initiating the write
1853 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 07h
1854 * 5. if DCV not cleared, break and return error
1855 */
1856
1857 /*
1858 * Setup the AC97 control registers on the CS461x to send the
1859 * appropriate command to the AC97 to perform the read.
1860 * ACCAD = Command Address Register = 46Ch
1861 * ACCDA = Command Data Register = 470h
1862 * ACCTL = Control Register = 460h
1863 * set DCV - will clear when process completed
1864 * reset CRW - Write command
1865 * set VFRM - valid frame enabled
1866 * set ESYN - ASYNC generation enabled
1867 * set RSTN - ARST# inactive, AC97 codec not reset
1868 */
1869 cs461x_pokeBA0(card, BA0_ACCAD, reg);
1870 cs461x_pokeBA0(card, BA0_ACCDA, val);
1871 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_DCV | ACCTL_VFRM |
1872 ACCTL_ESYN | ACCTL_RSTN);
1873 for (count = 0; count < 1000; count++) {
1874 /*
1875 * First, we want to wait for a short time.
1876 */
1877 udelay(10);
1878 /*
1879 * Now, check to see if the write has completed.
1880 * ACCTL = 460h, DCV should be reset by now and 460h = 07h
1881 */
1882 if (!(cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV))
1883 break;
1884 }
1885 /*
1886 * Make sure the write completed.
1887 */
1888 if (cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV)
1889 printk(KERN_WARNING "cs461x: AC'97 write problem, reg = 0x%x, val = 0x%x\n", reg, val);
1890 }
1891
1892
1893 /* OSS /dev/mixer file operation methods */
1894
1895 static int cs_open_mixdev(struct inode *inode, struct file *file)
1896 {
1897 int i;
1898 int minor = MINOR(inode->i_rdev);
1899 struct cs_card *card = devs;
1900
1901 for (card = devs; card != NULL; card = card->next)
1902 for (i = 0; i < NR_AC97; i++)
1903 if (card->ac97_codec[i] != NULL &&
1904 card->ac97_codec[i]->dev_mixer == minor)
1905 goto match;
1906
1907 if (!card)
1908 return -ENODEV;
1909
1910 match:
1911 file->private_data = card->ac97_codec[i];
1912
1913 card->active_ctrl(card,1);
1914 MOD_INC_USE_COUNT;
1915 return 0;
1916 }
1917
1918 static int cs_release_mixdev(struct inode *inode, struct file *file)
1919 {
1920 int minor = MINOR(inode->i_rdev);
1921 struct cs_card *card = devs;
1922 int i;
1923
1924 for (card = devs; card != NULL; card = card->next)
1925 for (i = 0; i < NR_AC97; i++)
1926 if (card->ac97_codec[i] != NULL &&
1927 card->ac97_codec[i]->dev_mixer == minor)
1928 goto match;
1929
1930 if (!card)
1931 return -ENODEV;
1932 match:
1933 card->active_ctrl(card, -1);
1934
1935 MOD_DEC_USE_COUNT;
1936 return 0;
1937 }
1938
1939 static int cs_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
1940 unsigned long arg)
1941 {
1942 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
1943
1944 return codec->mixer_ioctl(codec, cmd, arg);
1945 }
1946
1947 static /*const*/ struct file_operations cs_mixer_fops = {
1948 llseek: cs_llseek,
1949 ioctl: cs_ioctl_mixdev,
1950 open: cs_open_mixdev,
1951 release: cs_release_mixdev,
1952 };
1953
1954 /* AC97 codec initialisation. */
1955 static int __init cs_ac97_init(struct cs_card *card)
1956 {
1957 int num_ac97 = 0;
1958 int ready_2nd = 0;
1959 struct ac97_codec *codec;
1960 u16 eid;
1961
1962 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
1963 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
1964 return -ENOMEM;
1965 memset(codec, 0, sizeof(struct ac97_codec));
1966
1967 /* initialize some basic codec information, other fields will be filled
1968 in ac97_probe_codec */
1969 codec->private_data = card;
1970 codec->id = num_ac97;
1971
1972 codec->codec_read = cs_ac97_get;
1973 codec->codec_write = cs_ac97_set;
1974
1975 if (ac97_probe_codec(codec) == 0)
1976 break;
1977
1978 eid = cs_ac97_get(codec, AC97_EXTENDED_ID);
1979
1980 if(eid==0xFFFFFF)
1981 {
1982 printk(KERN_WARNING "cs461x: no codec attached ?\n");
1983 kfree(codec);
1984 break;
1985 }
1986
1987 card->ac97_features = eid;
1988
1989
1990 if ((codec->dev_mixer = register_sound_mixer(&cs_mixer_fops, -1)) < 0) {
1991 printk(KERN_ERR "cs461x: couldn't register mixer!\n");
1992 kfree(codec);
1993 break;
1994 }
1995
1996 card->ac97_codec[num_ac97] = codec;
1997
1998 /* if there is no secondary codec at all, don't probe any more */
1999 if (!ready_2nd)
2000 return num_ac97+1;
2001 }
2002 return num_ac97;
2003 }
2004
2005 /* Boot the card
2006 */
2007
2008 static void cs461x_download(struct cs_card *card, u32 *src, unsigned long offset, unsigned long len)
2009 {
2010 unsigned long counter;
2011 void *dst;
2012
2013 dst = card->ba1.idx[(offset>>16)&3];
2014 dst += (offset&0xFFFF)<<2;
2015 for(counter=0;counter<len;counter+=4)
2016 writel(*src++, dst+counter);
2017 }
2018
2019 /* 3*1024 parameter, 3.5*1024 sample, 2*3.5*1024 code */
2020 #define BA1_DWORD_SIZE (13 * 1024 + 512)
2021 #define BA1_MEMORY_COUNT 3
2022
2023 struct BA1struct {
2024 struct {
2025 unsigned long offset;
2026 unsigned long size;
2027 } memory[BA1_MEMORY_COUNT];
2028 unsigned int map[BA1_DWORD_SIZE];
2029 };
2030
2031 #include "cs461x_image.h"
2032
2033 static void cs461x_download_image(struct cs_card *card)
2034 {
2035 int idx;
2036 unsigned long offset = 0;
2037
2038 for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) {
2039 cs461x_download(card,&BA1Struct.map[offset],
2040 BA1Struct.memory[idx].offset,
2041 BA1Struct.memory[idx].size);
2042 offset += BA1Struct.memory[idx].size >> 2;
2043 }
2044 }
2045
2046 /*
2047 * Chip reset
2048 */
2049
2050 static void cs461x_reset(struct cs_card *card)
2051 {
2052 int idx;
2053
2054 /*
2055 * Write the reset bit of the SP control register.
2056 */
2057 cs461x_poke(card, BA1_SPCR, SPCR_RSTSP);
2058
2059 /*
2060 * Write the control register.
2061 */
2062 cs461x_poke(card, BA1_SPCR, SPCR_DRQEN);
2063
2064 /*
2065 * Clear the trap registers.
2066 */
2067 for (idx = 0; idx < 8; idx++) {
2068 cs461x_poke(card, BA1_DREG, DREG_REGID_TRAP_SELECT + idx);
2069 cs461x_poke(card, BA1_TWPR, 0xFFFF);
2070 }
2071 cs461x_poke(card, BA1_DREG, 0);
2072
2073 /*
2074 * Set the frame timer to reflect the number of cycles per frame.
2075 */
2076 cs461x_poke(card, BA1_FRMT, 0xadf);
2077 }
2078
2079 static void cs461x_clear_serial_FIFOs(struct cs_card *card)
2080 {
2081 int idx, loop, powerdown = 0;
2082 unsigned int tmp;
2083
2084 /*
2085 * See if the devices are powered down. If so, we must power them up first
2086 * or they will not respond.
2087 */
2088 if (!((tmp = cs461x_peekBA0(card, BA0_CLKCR1)) & CLKCR1_SWCE)) {
2089 cs461x_pokeBA0(card, BA0_CLKCR1, tmp | CLKCR1_SWCE);
2090 powerdown = 1;
2091 }
2092
2093 /*
2094 * We want to clear out the serial port FIFOs so we don't end up playing
2095 * whatever random garbage happens to be in them. We fill the sample FIFOS
2096 * with zero (silence).
2097 */
2098 cs461x_pokeBA0(card, BA0_SERBWP, 0);
2099
2100 /*
2101 * Fill all 256 sample FIFO locations.
2102 */
2103 for (idx = 0; idx < 256; idx++) {
2104 /*
2105 * Make sure the previous FIFO write operation has completed.
2106 */
2107 for (loop = 0; loop < 5; loop++) {
2108 udelay(50);
2109 if (!(cs461x_peekBA0(card, BA0_SERBST) & SERBST_WBSY))
2110 break;
2111 }
2112 if (cs461x_peekBA0(card, BA0_SERBST) & SERBST_WBSY) {
2113 if (powerdown)
2114 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
2115 }
2116 /*
2117 * Write the serial port FIFO index.
2118 */
2119 cs461x_pokeBA0(card, BA0_SERBAD, idx);
2120 /*
2121 * Tell the serial port to load the new value into the FIFO location.
2122 */
2123 cs461x_pokeBA0(card, BA0_SERBCM, SERBCM_WRC);
2124 }
2125 /*
2126 * Now, if we powered up the devices, then power them back down again.
2127 * This is kinda ugly, but should never happen.
2128 */
2129 if (powerdown)
2130 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
2131 }
2132
2133 static void cs461x_powerup_dac(struct cs_card *card)
2134 {
2135 int count;
2136 unsigned int tmp;
2137
2138 /*
2139 * Power on the DACs on the AC97 card. We turn off the DAC
2140 * powerdown bit and write the new value of the power control
2141 * register.
2142 */
2143 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
2144 if (tmp & 2) /* already */
2145 return;
2146 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp & 0xfdff);
2147
2148 /*
2149 * Now, we wait until we sample a DAC ready state.
2150 */
2151 for (count = 0; count < 32; count++) {
2152 /*
2153 * First, lets wait a short while to let things settle out a
2154 * bit, and to prevent retrying the read too quickly.
2155 */
2156 udelay(50);
2157
2158 /*
2159 * Read the current state of the power control register.
2160 */
2161 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) & 2)
2162 break;
2163 }
2164
2165 /*
2166 * Check the status..
2167 */
2168 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) & 2))
2169 printk(KERN_WARNING "cs461x: powerup DAC failed\n");
2170 }
2171
2172 static void cs461x_powerup_adc(struct cs_card *card)
2173 {
2174 int count;
2175 unsigned int tmp;
2176
2177 /*
2178 * Power on the ADCs on the AC97 card. We turn off the DAC
2179 * powerdown bit and write the new value of the power control
2180 * register.
2181 */
2182 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
2183 if (tmp & 1) /* already */
2184 return;
2185 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp & 0xfeff);
2186
2187 /*
2188 * Now, we wait until we sample a ADC ready state.
2189 */
2190 for (count = 0; count < 32; count++) {
2191 /*
2192 * First, lets wait a short while to let things settle out a
2193 * bit, and to prevent retrying the read too quickly.
2194 */
2195 udelay(50);
2196
2197 /*
2198 * Read the current state of the power control register.
2199 */
2200 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) & 1)
2201 break;
2202 }
2203
2204 /*
2205 * Check the status..
2206 */
2207 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) & 1))
2208 printk(KERN_WARNING "cs461x: powerup ADC failed\n");
2209 }
2210
2211 static void cs461x_proc_start(struct cs_card *card)
2212 {
2213 int cnt;
2214
2215 /*
2216 * Set the frame timer to reflect the number of cycles per frame.
2217 */
2218 cs461x_poke(card, BA1_FRMT, 0xadf);
2219 /*
2220 * Turn on the run, run at frame, and DMA enable bits in the local copy of
2221 * the SP control register.
2222 */
2223 cs461x_poke(card, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
2224 /*
2225 * Wait until the run at frame bit resets itself in the SP control
2226 * register.
2227 */
2228 for (cnt = 0; cnt < 25; cnt++) {
2229 udelay(50);
2230 if (!(cs461x_peek(card, BA1_SPCR) & SPCR_RUNFR))
2231 break;
2232 }
2233
2234 if (cs461x_peek(card, BA1_SPCR) & SPCR_RUNFR)
2235 printk(KERN_WARNING "cs461x: SPCR_RUNFR never reset\n");
2236 }
2237
2238 static void cs461x_proc_stop(struct cs_card *card)
2239 {
2240 /*
2241 * Turn off the run, run at frame, and DMA enable bits in the local copy of
2242 * the SP control register.
2243 */
2244 cs461x_poke(card, BA1_SPCR, 0);
2245 }
2246
2247
2248
2249 static int cs_hardware_init(struct cs_card *card)
2250 {
2251 unsigned long end_time;
2252 unsigned int tmp;
2253
2254 /*
2255 * First, blast the clock control register to zero so that the PLL starts
2256 * out in a known state, and blast the master serial port control register
2257 * to zero so that the serial ports also start out in a known state.
2258 */
2259 cs461x_pokeBA0(card, BA0_CLKCR1, 0);
2260 cs461x_pokeBA0(card, BA0_SERMC1, 0);
2261
2262 /*
2263 * If we are in AC97 mode, then we must set the part to a host controlled
2264 * AC-link. Otherwise, we won't be able to bring up the link.
2265 */
2266 cs461x_pokeBA0(card, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_1_03); /* 1.03 card */
2267 /* cs461x_pokeBA0(card, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_2_0); */ /* 2.00 card */
2268
2269 /*
2270 * Drive the ARST# pin low for a minimum of 1uS (as defined in the AC97
2271 * spec) and then drive it high. This is done for non AC97 modes since
2272 * there might be logic external to the CS461x that uses the ARST# line
2273 * for a reset.
2274 */
2275 cs461x_pokeBA0(card, BA0_ACCTL, 0);
2276 udelay(500);
2277 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_RSTN);
2278
2279 /*
2280 * The first thing we do here is to enable sync generation. As soon
2281 * as we start receiving bit clock, we'll start producing the SYNC
2282 * signal.
2283 */
2284 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_ESYN | ACCTL_RSTN);
2285
2286 /*
2287 * Now wait for a short while to allow the AC97 part to start
2288 * generating bit clock (so we don't try to start the PLL without an
2289 * input clock).
2290 */
2291 mdelay(10); /* 1 should be enough ?? */
2292
2293 /*
2294 * Set the serial port timing configuration, so that
2295 * the clock control circuit gets its clock from the correct place.
2296 */
2297 cs461x_pokeBA0(card, BA0_SERMC1, SERMC1_PTC_AC97);
2298
2299 /*
2300 * Write the selected clock control setup to the hardware. Do not turn on
2301 * SWCE yet (if requested), so that the devices clocked by the output of
2302 * PLL are not clocked until the PLL is stable.
2303 */
2304 cs461x_pokeBA0(card, BA0_PLLCC, PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ);
2305 cs461x_pokeBA0(card, BA0_PLLM, 0x3a);
2306 cs461x_pokeBA0(card, BA0_CLKCR2, CLKCR2_PDIVS_8);
2307
2308 /*
2309 * Power up the PLL.
2310 */
2311 cs461x_pokeBA0(card, BA0_CLKCR1, CLKCR1_PLLP);
2312
2313 /*
2314 * Wait until the PLL has stabilized.
2315 */
2316 mdelay(100); /* Again 1 should be enough ?? */
2317
2318 /*
2319 * Turn on clocking of the core so that we can setup the serial ports.
2320 */
2321 tmp = cs461x_peekBA0(card, BA0_CLKCR1) | CLKCR1_SWCE;
2322 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
2323
2324 /*
2325 * Fill the serial port FIFOs with silence.
2326 */
2327 cs461x_clear_serial_FIFOs(card);
2328
2329 /*
2330 * Set the serial port FIFO pointer to the first sample in the FIFO.
2331 */
2332 /* cs461x_pokeBA0(card, BA0_SERBSP, 0); */
2333
2334 /*
2335 * Write the serial port configuration to the part. The master
2336 * enable bit is not set until all other values have been written.
2337 */
2338 cs461x_pokeBA0(card, BA0_SERC1, SERC1_SO1F_AC97 | SERC1_SO1EN);
2339 cs461x_pokeBA0(card, BA0_SERC2, SERC2_SI1F_AC97 | SERC1_SO1EN);
2340 cs461x_pokeBA0(card, BA0_SERMC1, SERMC1_PTC_AC97 | SERMC1_MSPE);
2341
2342
2343 mdelay(5); /* Shouldnt be needed ?? */
2344
2345 /*
2346 * Wait for the card ready signal from the AC97 card.
2347 */
2348 end_time = jiffies + 3 * (HZ >> 2);
2349 do {
2350 /*
2351 * Read the AC97 status register to see if we've seen a CODEC READY
2352 * signal from the AC97 card.
2353 */
2354 if (cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_CRDY)
2355 break;
2356 current->state = TASK_UNINTERRUPTIBLE;
2357 schedule_timeout(1);
2358 } while (time_before(jiffies, end_time));
2359
2360 /*
2361 * Make sure CODEC is READY.
2362 */
2363 if (!(cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_CRDY)) {
2364 printk(KERN_WARNING "cs461x: create - never read card ready from AC'97\n");
2365 printk(KERN_WARNING "cs461x: it is probably not a bug, try using the CS4232 driver\n");
2366 return -EIO;
2367 }
2368
2369 /*
2370 * Assert the vaid frame signal so that we can start sending commands
2371 * to the AC97 card.
2372 */
2373 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
2374
2375 /*
2376 * Wait until we've sampled input slots 3 and 4 as valid, meaning that
2377 * the card is pumping ADC data across the AC-link.
2378 */
2379 end_time = jiffies + 3 * (HZ >> 2);
2380 do {
2381 /*
2382 * Read the input slot valid register and see if input slots 3 and
2383 * 4 are valid yet.
2384 */
2385 if ((cs461x_peekBA0(card, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
2386 break;
2387 current->state = TASK_UNINTERRUPTIBLE;
2388 schedule_timeout(1);
2389 } while (time_before(jiffies, end_time));
2390
2391 /*
2392 * Make sure input slots 3 and 4 are valid. If not, then return
2393 * an error.
2394 */
2395 if ((cs461x_peekBA0(card, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) != (ACISV_ISV3 | ACISV_ISV4)) {
2396 printk(KERN_WARNING "cs461x: create - never read ISV3 & ISV4 from AC'97\n");
2397 return -EIO;
2398 }
2399
2400 /*
2401 * Now, assert valid frame and the slot 3 and 4 valid bits. This will
2402 * commense the transfer of digital audio data to the AC97 card.
2403 */
2404 cs461x_pokeBA0(card, BA0_ACOSV, ACOSV_SLV3 | ACOSV_SLV4);
2405
2406 /*
2407 * Power down the DAC and ADC. We will power them up (if) when we need
2408 * them.
2409 */
2410 /* cs461x_pokeBA0(card, BA0_AC97_POWERDOWN, 0x300); */
2411
2412 /*
2413 * Turn off the Processor by turning off the software clock enable flag in
2414 * the clock control register.
2415 */
2416 /* tmp = cs461x_peekBA0(card, BA0_CLKCR1) & ~CLKCR1_SWCE; */
2417 /* cs461x_pokeBA0(card, BA0_CLKCR1, tmp); */
2418
2419 /*
2420 * Reset the processor.
2421 */
2422 cs461x_reset(card);
2423
2424 /*
2425 * Download the image to the processor.
2426 */
2427
2428 cs461x_download_image(card);
2429
2430 /*
2431 * Stop playback DMA.
2432 */
2433 tmp = cs461x_peek(card, BA1_PCTL);
2434 card->pctl = tmp & 0xffff0000;
2435 cs461x_poke(card, BA1_PCTL, tmp & 0x0000ffff);
2436
2437 /*
2438 * Stop capture DMA.
2439 */
2440 tmp = cs461x_peek(card, BA1_CCTL);
2441 card->cctl = tmp & 0x0000ffff;
2442 cs461x_poke(card, BA1_CCTL, tmp & 0xffff0000);
2443
2444 /* initialize AC97 codec and register /dev/mixer */
2445 if (cs_ac97_init(card) <= 0)
2446 return -EIO;
2447
2448 mdelay(5); /* Do we need this ?? */
2449
2450 cs461x_powerup_adc(card);
2451 cs461x_powerup_dac(card);
2452
2453 cs461x_proc_start(card);
2454
2455 /*
2456 * Enable interrupts on the part.
2457 */
2458 cs461x_pokeBA0(card, BA0_HICR, HICR_IEV | HICR_CHGM);
2459
2460 tmp = cs461x_peek(card, BA1_PFIE);
2461 tmp &= ~0x0000f03f;
2462 cs461x_poke(card, BA1_PFIE, tmp); /* playback interrupt enable */
2463
2464 tmp = cs461x_peek(card, BA1_CIE);
2465 tmp &= ~0x0000003f;
2466 tmp |= 0x00000001;
2467 cs461x_poke(card, BA1_CIE, tmp); /* capture interrupt enable */
2468 return 0;
2469 }
2470
2471 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
2472 until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
2473
2474
2475 /*
2476 * Card subid table
2477 */
2478
2479 struct cs_card_type
2480 {
2481 u16 vendor;
2482 u16 id;
2483 char *name;
2484 void (*amp)(struct cs_card *, int);
2485 void (*active)(struct cs_card *, int);
2486 };
2487
2488 static struct cs_card_type __init cards[]={
2489 {0x1489, 0x7001, "Genius Soundmaker 128 value", amp_none, NULL},
2490 {0x5053, 0x3357, "Voyetra", amp_voyetra, NULL},
2491 /* MI6020/21 use the same chipset as the Thinkpads, maybe needed */
2492 {0x1071, 0x6003, "Mitac MI6020/21", amp_none, clkrun_hack},
2493 /* Not sure if the 570 needs the clkrun hack */
2494 {PCI_VENDOR_ID_IBM, 0x0132, "Thinkpad 570", amp_none, clkrun_hack},
2495 {PCI_VENDOR_ID_IBM, 0x0153, "Thinkpad 600X/A20/T20", amp_none, clkrun_hack},
2496 {PCI_VENDOR_ID_IBM, 0x1010, "Thinkpad 600E (unsupported)", NULL, NULL},
2497 {0, 0, NULL, NULL}
2498 };
2499
2500 static int __init cs_install(struct pci_dev *pci_dev)
2501 {
2502 struct cs_card *card;
2503 struct cs_card_type *cp = &cards[0];
2504 u16 ss_card, ss_vendor;
2505
2506
2507 pci_read_config_word(pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &ss_vendor);
2508 pci_read_config_word(pci_dev, PCI_SUBSYSTEM_ID, &ss_card);
2509
2510 if ((card = kmalloc(sizeof(struct cs_card), GFP_KERNEL)) == NULL) {
2511 printk(KERN_ERR "cs461x: out of memory\n");
2512 return -ENOMEM;
2513 }
2514 memset(card, 0, sizeof(*card));
2515
2516 card->ba0_addr = pci_dev->resource[0].start&PCI_BASE_ADDRESS_MEM_MASK;
2517 card->ba1_addr = pci_dev->resource[1].start&PCI_BASE_ADDRESS_MEM_MASK;
2518 card->pci_dev = pci_dev;
2519 card->irq = pci_dev->irq;
2520 card->magic = CS_CARD_MAGIC;
2521 spin_lock_init(&card->lock);
2522
2523 pci_set_master(pci_dev);
2524
2525 printk(KERN_INFO "cs461x: Card found at 0x%08lx and 0x%08lx, IRQ %d\n",
2526 card->ba0_addr, card->ba1_addr, card->irq);
2527
2528 card->alloc_pcm_channel = cs_alloc_pcm_channel;
2529 card->alloc_rec_pcm_channel = cs_alloc_rec_pcm_channel;
2530 card->free_pcm_channel = cs_free_pcm_channel;
2531 card->amplifier_ctrl = amp_none;
2532 card->active_ctrl = amp_none;
2533
2534 while(cp->name)
2535 {
2536 if(cp->vendor == ss_vendor && cp->id == ss_card)
2537 {
2538 card->amplifier_ctrl = cp->amp;
2539 if(cp->active)
2540 card->active_ctrl = cp->active;
2541 break;
2542 }
2543 cp++;
2544 }
2545 if(cp->name==NULL)
2546 {
2547 printk(KERN_INFO "cs461x: Unknown card (%04X:%04X) at 0x%08lx/0x%08lx, IRQ %d\n",
2548 ss_vendor, ss_card, card->ba0_addr, card->ba1_addr, card->irq);
2549 }
2550 else
2551 {
2552 printk(KERN_INFO "cs461x: %s at 0x%08lx/0x%08lx, IRQ %d\n",
2553 cp->name, card->ba0_addr, card->ba1_addr, card->irq);
2554 }
2555
2556 if(card->amplifier_ctrl==NULL)
2557 {
2558 printk(KERN_ERR "cs461x: Unsupported configuration due to lack of documentation.\n");
2559 kfree(card);
2560 return -EINVAL;
2561 }
2562
2563 if(external_amp == 1)
2564 {
2565 printk(KERN_INFO "cs461x: Crystal EAPD support forced on.\n");
2566 card->amplifier_ctrl = amp_voyetra;
2567 }
2568
2569 if(thinkpad == 1)
2570 {
2571 card->active_ctrl = clkrun_hack;
2572 printk(KERN_INFO "cs461x: Activating CLKRUN hack for Thinkpad.\n");
2573 }
2574
2575 card->active_ctrl(card, 1);
2576
2577 /* claim our iospace and irq */
2578
2579 card->ba0 = ioremap(card->ba0_addr, CS461X_BA0_SIZE);
2580 card->ba1.name.data0 = ioremap(card->ba1_addr + BA1_SP_DMEM0, CS461X_BA1_DATA0_SIZE);
2581 card->ba1.name.data1 = ioremap(card->ba1_addr + BA1_SP_DMEM1, CS461X_BA1_DATA1_SIZE);
2582 card->ba1.name.pmem = ioremap(card->ba1_addr + BA1_SP_PMEM, CS461X_BA1_PRG_SIZE);
2583 card->ba1.name.reg = ioremap(card->ba1_addr + BA1_SP_REG, CS461X_BA1_REG_SIZE);
2584
2585 if(card->ba0 == 0 || card->ba1.name.data0 == 0 ||
2586 card->ba1.name.data1 == 0 || card->ba1.name.pmem == 0 ||
2587 card->ba1.name.reg == 0)
2588 goto fail2;
2589
2590 if (request_irq(card->irq, &cs_interrupt, SA_SHIRQ, "cs461x", card)) {
2591 printk(KERN_ERR "cs461x: unable to allocate irq %d\n", card->irq);
2592 goto fail2;
2593 }
2594 /* register /dev/dsp */
2595 if ((card->dev_audio = register_sound_dsp(&cs461x_fops, -1)) < 0) {
2596 printk(KERN_ERR "cs461x: unable to register dsp\n");
2597 goto fail;
2598 }
2599
2600 if (cs_hardware_init(card)<0)
2601 {
2602 unregister_sound_dsp(card->dev_audio);
2603 goto fail;
2604 }
2605 card->next = devs;
2606 devs = card;
2607
2608 card->active_ctrl(card, -1);
2609 return 0;
2610
2611 fail:
2612 free_irq(card->irq, card);
2613 fail2:
2614 if(card->ba0)
2615 iounmap(card->ba0);
2616 if(card->ba1.name.data0)
2617 iounmap(card->ba1.name.data0);
2618 if(card->ba1.name.data1)
2619 iounmap(card->ba1.name.data1);
2620 if(card->ba1.name.pmem)
2621 iounmap(card->ba1.name.pmem);
2622 if(card->ba1.name.reg)
2623 iounmap(card->ba1.name.reg);
2624 kfree(card);
2625 return -ENODEV;
2626
2627 }
2628
2629 static void cs_remove(struct cs_card *card)
2630 {
2631 int i;
2632 unsigned int tmp;
2633
2634 card->active_ctrl(card,1);
2635
2636 tmp = cs461x_peek(card, BA1_PFIE);
2637 tmp &= ~0x0000f03f;
2638 tmp |= 0x00000010;
2639 cs461x_poke(card, BA1_PFIE, tmp); /* playback interrupt disable */
2640
2641 tmp = cs461x_peek(card, BA1_CIE);
2642 tmp &= ~0x0000003f;
2643 tmp |= 0x00000011;
2644 cs461x_poke(card, BA1_CIE, tmp); /* capture interrupt disable */
2645
2646 /*
2647 * Stop playback DMA.
2648 */
2649 tmp = cs461x_peek(card, BA1_PCTL);
2650 cs461x_poke(card, BA1_PCTL, tmp & 0x0000ffff);
2651
2652 /*
2653 * Stop capture DMA.
2654 */
2655 tmp = cs461x_peek(card, BA1_CCTL);
2656 cs461x_poke(card, BA1_CCTL, tmp & 0xffff0000);
2657
2658 /*
2659 * Reset the processor.
2660 */
2661 cs461x_reset(card);
2662
2663 cs461x_proc_stop(card);
2664
2665 /*
2666 * Power down the DAC and ADC. We will power them up (if) when we need
2667 * them.
2668 */
2669 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, 0x300);
2670
2671 /*
2672 * Power down the PLL.
2673 */
2674 cs461x_pokeBA0(card, BA0_CLKCR1, 0);
2675
2676 /*
2677 * Turn off the Processor by turning off the software clock enable flag in
2678 * the clock control register.
2679 */
2680 tmp = cs461x_peekBA0(card, BA0_CLKCR1) & ~CLKCR1_SWCE;
2681 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
2682
2683 card->active_ctrl(card,-1);
2684
2685 /* free hardware resources */
2686 free_irq(card->irq, card);
2687 iounmap(card->ba0);
2688 iounmap(card->ba1.name.data0);
2689 iounmap(card->ba1.name.data1);
2690 iounmap(card->ba1.name.pmem);
2691 iounmap(card->ba1.name.reg);
2692
2693 /* unregister audio devices */
2694 for (i = 0; i < NR_AC97; i++)
2695 if (card->ac97_codec[i] != NULL) {
2696 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
2697 kfree (card->ac97_codec[i]);
2698 }
2699 unregister_sound_dsp(card->dev_audio);
2700 kfree(card);
2701 }
2702
2703 MODULE_AUTHOR("Alan Cox <alan@redhat.com>, Jaroslav Kysela");
2704 MODULE_DESCRIPTION("Crystal SoundFusion Audio Support");
2705
2706 int __init cs_probe(void)
2707 {
2708 struct pci_dev *pcidev = NULL;
2709 int foundone=0;
2710
2711 if (!pci_present()) /* No PCI bus in this machine! */
2712 return -ENODEV;
2713
2714 printk(KERN_INFO "Crystal 4280/461x + AC97 Audio, version "
2715 DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
2716
2717 while( (pcidev = pci_find_device(PCI_VENDOR_ID_CIRRUS, 0x6001 , pcidev))!=NULL ) {
2718 if (cs_install(pcidev)==0)
2719 foundone++;
2720 }
2721 while( (pcidev = pci_find_device(PCI_VENDOR_ID_CIRRUS, 0x6003 , pcidev))!=NULL ) {
2722 if (cs_install(pcidev)==0)
2723 foundone++;
2724 }
2725 while( (pcidev = pci_find_device(PCI_VENDOR_ID_CIRRUS, 0x6004 , pcidev))!=NULL ) {
2726 if (cs_install(pcidev)==0)
2727 foundone++;
2728 }
2729
2730 printk(KERN_INFO "cs461x: Found %d audio device(s).\n",
2731 foundone);
2732 return foundone;
2733 }
2734
2735 #ifdef MODULE
2736
2737 int init_module(void)
2738 {
2739 if(cs_probe()==0)
2740 printk(KERN_ERR "cs461x: No devices found.\n");
2741 return 0;
2742 }
2743
2744 void cleanup_module (void)
2745 {
2746 struct cs_card *next;
2747 while(devs)
2748 {
2749 next=devs->next;
2750 cs_remove(devs);
2751 devs=next;
2752 }
2753 }
2754
2755 MODULE_PARM(external_amp, "i");
2756 MODULE_PARM(thinkpad, "i");
2757
2758 #endif
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