4 * (C) Waldorf Electronics, Germany
5 * Written by Andreas Busse
7 * NOTE: most of the structure definitions here are endian dependent.
8 * If you want to use this driver on big endian machines, the data
9 * and pad structure members must be exchanged. Also, the structures
10 * need to be changed accordingly to the bus size.
12 * 981229 MSch: did just that for the 68k Mac port (32 bit, big endian),
13 * see CONFIG_MACSONIC branch below.
20 #include <linux/config.h>
23 * SONIC register offsets
26 #define SONIC_CMD 0x00
27 #define SONIC_DCR 0x01
28 #define SONIC_RCR 0x02
29 #define SONIC_TCR 0x03
30 #define SONIC_IMR 0x04
31 #define SONIC_ISR 0x05
33 #define SONIC_UTDA 0x06
34 #define SONIC_CTDA 0x07
36 #define SONIC_URDA 0x0d
37 #define SONIC_CRDA 0x0e
38 #define SONIC_EOBC 0x13
39 #define SONIC_URRA 0x14
40 #define SONIC_RSA 0x15
41 #define SONIC_REA 0x16
42 #define SONIC_RRP 0x17
43 #define SONIC_RWP 0x18
44 #define SONIC_RSC 0x2b
46 #define SONIC_CEP 0x21
47 #define SONIC_CAP2 0x22
48 #define SONIC_CAP1 0x23
49 #define SONIC_CAP0 0x24
51 #define SONIC_CDP 0x26
52 #define SONIC_CDC 0x27
54 #define SONIC_WT0 0x29
55 #define SONIC_WT1 0x2a
60 /* test-only registers */
62 #define SONIC_TPS 0x08
63 #define SONIC_TFC 0x09
64 #define SONIC_TSA0 0x0a
65 #define SONIC_TSA1 0x0b
66 #define SONIC_TFS 0x0c
68 #define SONIC_CRBA0 0x0f
69 #define SONIC_CRBA1 0x10
70 #define SONIC_RBWC0 0x11
71 #define SONIC_RBWC1 0x12
72 #define SONIC_TTDA 0x20
73 #define SONIC_MDT 0x2f
75 #define SONIC_TRBA0 0x19
76 #define SONIC_TRBA1 0x1a
77 #define SONIC_TBWC0 0x1b
78 #define SONIC_TBWC1 0x1c
79 #define SONIC_LLFA 0x1f
81 #define SONIC_ADDR0 0x1d
82 #define SONIC_ADDR1 0x1e
87 #define SONIC_CRCT 0x2c
88 #define SONIC_FAET 0x2d
89 #define SONIC_MPT 0x2e
96 #define SONIC_CR_LCAM 0x0200
97 #define SONIC_CR_RRRA 0x0100
98 #define SONIC_CR_RST 0x0080
99 #define SONIC_CR_ST 0x0020
100 #define SONIC_CR_STP 0x0010
101 #define SONIC_CR_RXEN 0x0008
102 #define SONIC_CR_RXDIS 0x0004
103 #define SONIC_CR_TXP 0x0002
104 #define SONIC_CR_HTX 0x0001
107 * SONIC data configuration bits
110 #define SONIC_DCR_EXBUS 0x8000
111 #define SONIC_DCR_LBR 0x2000
112 #define SONIC_DCR_PO1 0x1000
113 #define SONIC_DCR_PO0 0x0800
114 #define SONIC_DCR_SBUS 0x0400
115 #define SONIC_DCR_USR1 0x0200
116 #define SONIC_DCR_USR0 0x0100
117 #define SONIC_DCR_WC1 0x0080
118 #define SONIC_DCR_WC0 0x0040
119 #define SONIC_DCR_DW 0x0020
120 #define SONIC_DCR_BMS 0x0010
121 #define SONIC_DCR_RFT1 0x0008
122 #define SONIC_DCR_RFT0 0x0004
123 #define SONIC_DCR_TFT1 0x0002
124 #define SONIC_DCR_TFT0 0x0001
127 * Constants for the SONIC receive control register.
130 #define SONIC_RCR_ERR 0x8000
131 #define SONIC_RCR_RNT 0x4000
132 #define SONIC_RCR_BRD 0x2000
133 #define SONIC_RCR_PRO 0x1000
134 #define SONIC_RCR_AMC 0x0800
135 #define SONIC_RCR_LB1 0x0400
136 #define SONIC_RCR_LB0 0x0200
138 #define SONIC_RCR_MC 0x0100
139 #define SONIC_RCR_BC 0x0080
140 #define SONIC_RCR_LPKT 0x0040
141 #define SONIC_RCR_CRS 0x0020
142 #define SONIC_RCR_COL 0x0010
143 #define SONIC_RCR_CRCR 0x0008
144 #define SONIC_RCR_FAER 0x0004
145 #define SONIC_RCR_LBK 0x0002
146 #define SONIC_RCR_PRX 0x0001
148 #define SONIC_RCR_LB_OFF 0
149 #define SONIC_RCR_LB_MAC SONIC_RCR_LB0
150 #define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1
151 #define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1)
153 /* default RCR setup */
155 #define SONIC_RCR_DEFAULT (SONIC_RCR_BRD)
159 * SONIC Transmit Control register bits
162 #define SONIC_TCR_PINTR 0x8000
163 #define SONIC_TCR_POWC 0x4000
164 #define SONIC_TCR_CRCI 0x2000
165 #define SONIC_TCR_EXDIS 0x1000
166 #define SONIC_TCR_EXD 0x0400
167 #define SONIC_TCR_DEF 0x0200
168 #define SONIC_TCR_NCRS 0x0100
169 #define SONIC_TCR_CRLS 0x0080
170 #define SONIC_TCR_EXC 0x0040
171 #define SONIC_TCR_PMB 0x0008
172 #define SONIC_TCR_FU 0x0004
173 #define SONIC_TCR_BCM 0x0002
174 #define SONIC_TCR_PTX 0x0001
176 #define SONIC_TCR_DEFAULT 0x0000
179 * Constants for the SONIC_INTERRUPT_MASK and
180 * SONIC_INTERRUPT_STATUS registers.
183 #define SONIC_INT_BR 0x4000
184 #define SONIC_INT_HBL 0x2000
185 #define SONIC_INT_LCD 0x1000
186 #define SONIC_INT_PINT 0x0800
187 #define SONIC_INT_PKTRX 0x0400
188 #define SONIC_INT_TXDN 0x0200
189 #define SONIC_INT_TXER 0x0100
190 #define SONIC_INT_TC 0x0080
191 #define SONIC_INT_RDE 0x0040
192 #define SONIC_INT_RBE 0x0020
193 #define SONIC_INT_RBAE 0x0010
194 #define SONIC_INT_CRC 0x0008
195 #define SONIC_INT_FAE 0x0004
196 #define SONIC_INT_MP 0x0002
197 #define SONIC_INT_RFO 0x0001
201 * The interrupts we allow.
204 #define SONIC_IMR_DEFAULT (SONIC_INT_BR | \
218 #define SONIC_END_OF_LINKS 0x0001
221 #ifdef CONFIG_MACSONIC
222 /* Big endian like structures on Mac
227 u32 rx_bufadr_l
; /* receive buffer ptr */
230 u32 rx_bufsize_l
; /* no. of words in the receive buffer */
235 * Sonic receive descriptor. Receive descriptors are
236 * kept in a linked list of these structures.
241 u16 rx_status
; /* status after reception of a packet */
243 u16 rx_pktlen
; /* length of the packet incl. CRC */
246 * Pointers to the location in the receive buffer area (RBA)
247 * where the packet resides. A packet is always received into
248 * a contiguous piece of memory.
256 u16 rx_seqno
; /* sequence no. */
259 u16 link
; /* link to next RDD (end if EOL bit set) */
262 * Owner of this descriptor, 0= driver, 1=sonic
268 caddr_t rda_next
; /* pointer to next RD */
273 * Describes a Transmit Descriptor
277 u16 tx_status
; /* status after transmission of a packet */
279 u16 tx_config
; /* transmit configuration for this packet */
281 u16 tx_pktsize
; /* size of the packet to be transmitted */
283 u16 tx_frag_count
; /* no. of fragments */
293 u16 link
; /* ptr to next descriptor */
298 * Describes an entry in the CAM Descriptor Area.
303 u16 cam_entry_pointer
;
312 #define CAM_DESCRIPTORS 16
316 sonic_cd_t cam_desc
[CAM_DESCRIPTORS
];
321 #else /* original declarations, little endian 32 bit */
324 * structure definitions
328 u32 rx_bufadr_l
; /* receive buffer ptr */
331 u32 rx_bufsize_l
; /* no. of words in the receive buffer */
336 * Sonic receive descriptor. Receive descriptors are
337 * kept in a linked list of these structures.
341 u16 rx_status
; /* status after reception of a packet */
343 u16 rx_pktlen
; /* length of the packet incl. CRC */
347 * Pointers to the location in the receive buffer area (RBA)
348 * where the packet resides. A packet is always received into
349 * a contiguous piece of memory.
356 u16 rx_seqno
; /* sequence no. */
359 u16 link
; /* link to next RDD (end if EOL bit set) */
363 * Owner of this descriptor, 0= driver, 1=sonic
369 caddr_t rda_next
; /* pointer to next RD */
374 * Describes a Transmit Descriptor
377 u16 tx_status
; /* status after transmission of a packet */
379 u16 tx_config
; /* transmit configuration for this packet */
381 u16 tx_pktsize
; /* size of the packet to be transmitted */
383 u16 tx_frag_count
; /* no. of fragments */
393 u16 link
; /* ptr to next descriptor */
399 * Describes an entry in the CAM Descriptor Area.
403 u16 cam_entry_pointer
;
413 #define CAM_DESCRIPTORS 16
417 sonic_cd_t cam_desc
[CAM_DESCRIPTORS
];
421 #endif /* endianness */
424 * Some tunables for the buffer areas. Power of 2 is required
425 * the current driver uses one receive buffer for each descriptor.
427 * MSch: use more buffer space for the slow m68k Macs!
429 #ifdef CONFIG_MACSONIC
430 #define SONIC_NUM_RRS 32 /* number of receive resources */
431 #define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
432 #define SONIC_NUM_TDS 32 /* number of transmit descriptors */
434 #define SONIC_NUM_RRS 16 /* number of receive resources */
435 #define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
436 #define SONIC_NUM_TDS 16 /* number of transmit descriptors */
438 #define SONIC_RBSIZE 1520 /* size of one resource buffer */
440 #define SONIC_RDS_MASK (SONIC_NUM_RDS-1)
441 #define SONIC_TDS_MASK (SONIC_NUM_TDS-1)
444 /* Information that need to be kept for each board. */
446 sonic_cda_t cda
; /* virtual CPU address of CDA */
447 sonic_td_t tda
[SONIC_NUM_TDS
]; /* transmit descriptor area */
448 sonic_rr_t rra
[SONIC_NUM_RRS
]; /* receive resource arrea */
449 sonic_rd_t rda
[SONIC_NUM_RDS
]; /* receive descriptor area */
450 struct sk_buff
* tx_skb
[SONIC_NUM_TDS
]; /* skbuffs for packets to transmit */
451 unsigned int tx_laddr
[SONIC_NUM_TDS
]; /* logical DMA address fro skbuffs */
452 unsigned char *rba
; /* start of receive buffer areas */
453 unsigned int cda_laddr
; /* logical DMA address of CDA */
454 unsigned int tda_laddr
; /* logical DMA address of TDA */
455 unsigned int rra_laddr
; /* logical DMA address of RRA */
456 unsigned int rda_laddr
; /* logical DMA address of RDA */
457 unsigned int rba_laddr
; /* logical DMA address of RBA */
458 unsigned int cur_rra
; /* current indexes to resource areas */
461 unsigned int dirty_tx
; /* last unacked transmit packet */
463 struct net_device_stats stats
;
466 /* Index to functions, as function prototypes. */
468 static int sonic_open(struct net_device
*dev
);
469 static int sonic_send_packet(struct sk_buff
*skb
, struct net_device
*dev
);
470 static void sonic_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
);
471 static void sonic_rx(struct net_device
*dev
);
472 static int sonic_close(struct net_device
*dev
);
473 static struct net_device_stats
*sonic_get_stats(struct net_device
*dev
);
474 static void sonic_multicast_list(struct net_device
*dev
);
475 static int sonic_init(struct net_device
*dev
);
477 static const char *version
=
478 "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";