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Import 2.3.10pre5
[davej-history.git] / drivers / net / hamradio / scc.c
blob0f803139a4830cb534ee22ee4004842bec94909e
1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
2
3 #define VERSION "3.0"
4 #define BANNER "Z8530 SCC driver version "VERSION".dl1bke (experimental) by DL1BKE\n"
5
6 /*
7 * Please use z8530drv-utils-3.0 with this version.
8 * ------------------
9 *
10 * You can find a subset of the documentation in
11 * linux/Documentation/networking/z8530drv.txt.
12 */
13
14 /*
15 ********************************************************************
16 * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 *
17 ********************************************************************
18
19
20 ********************************************************************
21
22 Copyright (c) 1993, 1998 Joerg Reuter DL1BKE
23
24 portions (c) 1993 Guido ten Dolle PE1NNZ
25
26 ********************************************************************
27
28 The driver and the programs in the archive are UNDER CONSTRUCTION.
29 The code is likely to fail, and so your kernel could --- even
30 a whole network.
31
32 This driver is intended for Amateur Radio use. If you are running it
33 for commercial purposes, please drop me a note. I am nosy...
34
35 ...BUT:
36
37 ! You m u s t recognize the appropriate legislations of your country !
38 ! before you connect a radio to the SCC board and start to transmit or !
39 ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! !
40
41 For non-Amateur-Radio use please note that you might need a special
42 allowance/licence from the designer of the SCC Board and/or the
43 MODEM.
44
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the (modified) GNU General Public License
47 delivered with the Linux kernel source.
48
49 This program is distributed in the hope that it will be useful,
50 but WITHOUT ANY WARRANTY; without even the implied warranty of
51 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
52 GNU General Public License for more details.
53
54 You should find a copy of the GNU General Public License in
55 /usr/src/linux/COPYING;
56
57 ********************************************************************
58
59
60 Incomplete history of z8530drv:
61 -------------------------------
62
63 1994-09-13 started to write the driver, rescued most of my own
64 code (and Hans Alblas' memory buffer pool concept) from
65 an earlier project "sccdrv" which was initiated by
66 Guido ten Dolle. Not much of the old driver survived,
67 though. The first version I put my hands on was sccdrv1.3
68 from August 1993. The memory buffer pool concept
69 appeared in an unauthorized sccdrv version (1.5) from
70 August 1994.
71
72 1995-01-31 changed copyright notice to GPL without limitations.
73
74 .
75 . <SNIP>
76 .
77
78 1996-10-05 New semester, new driver...
79
80 * KISS TNC emulator removed (TTY driver)
81 * Source moved to drivers/net/
82 * Includes Z8530 defines from drivers/net/z8530.h
83 * Uses sk_buffer memory management
84 * Reduced overhead of /proc/net/z8530drv output
85 * Streamlined quite a lot things
86 * Invents brand new bugs... ;-)
87
88 The move to version number 3.0 reflects theses changes.
89 You can use 'kissbridge' if you need a KISS TNC emulator.
90
91 1996-12-13 Fixed for Linux networking changes. (G4KLX)
92 1997-01-08 Fixed the remaining problems.
93 1997-04-02 Hopefully fixed the problems with the new *_timer()
94 routines, added calibration code.
95 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
96 1998-01-29 Small fix to avoid lock-up on initialization
97 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again,
98 using dev->tx_queue_len now instead of MAXQUEUE now.
99 1998-10-21 Postponed the spinlock changes, would need a lot of
100 testing I currently don't have the time to. Softdcd doesn't
101 work.
102 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it
103 never did. The DPLL locks on noise, the SYNC unit sees
104 flags that aren't... Restarting the DPLL does not help
105 either, it resynchronizes too slow and the first received
106 frame gets lost.
107
108 Thanks to all who contributed to this driver with ideas and bug
109 reports!
110
111 NB -- if you find errors, change something, please let me know
112 first before you distribute it... And please don't touch
113 the version number. Just replace my callsign in
114 "v3.0.dl1bke" with your own. Just to avoid confusion...
115
116 If you want to add your modification to the linux distribution
117 please (!) contact me first.
118
119 New versions of the driver will be announced on the linux-hams
120 mailing list on vger.rutgers.edu. To subscribe send an e-mail
121 to majordomo@vger.rutgers.edu with the following line in
122 the body of the mail:
123
124 subscribe linux-hams
125
126 The content of the "Subject" field will be ignored.
127
128 vy 73,
129 Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
130 AX-25 : DL1BKE @ DB0ACH.#NRW.DEU.EU
131 Internet: jreuter@poboxes.com
132 www : http://poboxes.com/jreuter/
133 */
134
135 /* ----------------------------------------------------------------------- */
136
137 #undef SCC_LDELAY 1 /* slow it even a bit more down */
138 #undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */
139
140 #define SCC_MAXCHIPS 4 /* number of max. supported chips */
141 #define SCC_BUFSIZE 384 /* must not exceed 4096 */
142 #undef SCC_DISABLE_ALL_INTS /* use cli()/sti() in ISR instead of */
143 /* enable_irq()/disable_irq() */
144 #undef SCC_DEBUG
145
146 #define SCC_DEFAULT_CLOCK 4915200
147 /* default pclock if nothing is specified */
148
149 /* ----------------------------------------------------------------------- */
150
151 #include <linux/config.h>
152 #include <linux/module.h>
153 #include <linux/errno.h>
154 #include <linux/signal.h>
155 #include <linux/sched.h>
156 #include <linux/timer.h>
157 #include <linux/interrupt.h>
158 #include <linux/ioport.h>
159 #include <linux/string.h>
160 #include <linux/in.h>
161 #include <linux/fcntl.h>
162 #include <linux/ptrace.h>
163 #include <linux/malloc.h>
164 #include <linux/delay.h>
165
166 #include <linux/skbuff.h>
167 #include <linux/netdevice.h>
168 #include <linux/if_ether.h>
169 #include <linux/if_arp.h>
170 #include <linux/socket.h>
171 #include <linux/init.h>
172
173 #include <linux/scc.h>
174 #include "z8530.h"
175
176 #include <net/ax25.h>
177 #include <asm/irq.h>
178 #include <asm/system.h>
179 #include <asm/io.h>
180 #include <asm/uaccess.h>
181 #include <asm/bitops.h>
182
183 #include <linux/ctype.h>
184 #include <linux/kernel.h>
185 #include <linux/proc_fs.h>
186
187 #ifdef MODULE
188 int init_module(void);
189 void cleanup_module(void);
190 #endif
191
192 int scc_init(void);
193
194 static void t_dwait(unsigned long);
195 static void t_txdelay(unsigned long);
196 static void t_tail(unsigned long);
197 static void t_busy(unsigned long);
198 static void t_maxkeyup(unsigned long);
199 static void t_idle(unsigned long);
200 static void scc_tx_done(struct scc_channel *);
201 static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
202 static void scc_start_maxkeyup(struct scc_channel *);
203 static void scc_start_defer(struct scc_channel *);
204
205 static void z8530_init(void);
206
207 static void init_channel(struct scc_channel *scc);
208 static void scc_key_trx (struct scc_channel *scc, char tx);
209 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs);
210 static void scc_init_timer(struct scc_channel *scc);
211
212 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev);
213 static int scc_net_init(struct device *dev);
214 static int scc_net_open(struct device *dev);
215 static int scc_net_close(struct device *dev);
216 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
217 static int scc_net_tx(struct sk_buff *skb, struct device *dev);
218 static int scc_net_ioctl(struct device *dev, struct ifreq *ifr, int cmd);
219 static int scc_net_set_mac_address(struct device *dev, void *addr);
220 static int scc_net_header(struct sk_buff *skb, struct device *dev, unsigned short type, void *daddr, void *saddr, unsigned len);
221 static struct net_device_stats * scc_net_get_stats(struct device *dev);
222
223 static unsigned char *SCC_DriverName = "scc";
224
225 static struct irqflags { unsigned char used : 1; } Ivec[16];
226
227 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */
228
229 static struct scc_ctrl {
230 io_port chan_A;
231 io_port chan_B;
232 int irq;
233 } SCC_ctrl[SCC_MAXCHIPS+1];
234
235 static unsigned char Driver_Initialized = 0;
236 static int Nchips = 0;
237 static io_port Vector_Latch = 0;
238
239 MODULE_AUTHOR("Joerg Reuter <jreuter@poboxes.com>");
240 MODULE_DESCRIPTION("Network Device Driver for Z8530 based HDLC cards for Amateur Packet Radio");
241 MODULE_SUPPORTED_DEVICE("scc");
242
243 /* ******************************************************************** */
244 /* * Port Access Functions * */
245 /* ******************************************************************** */
246
247 /* These provide interrupt save 2-step access to the Z8530 registers */
248
249 static inline unsigned char InReg(io_port port, unsigned char reg)
250 {
251 unsigned long flags;
252 unsigned char r;
253
254 save_flags(flags);
255 cli();
256 #ifdef SCC_LDELAY
257 Outb(port, reg);
258 udelay(SCC_LDELAY);
259 r=Inb(port);
260 udelay(SCC_LDELAY);
261 #else
262 Outb(port, reg);
263 r=Inb(port);
264 #endif
265 restore_flags(flags);
266 return r;
267 }
268
269 static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
270 {
271 unsigned long flags;
272
273 save_flags(flags);
274 cli();
275 #ifdef SCC_LDELAY
276 Outb(port, reg); udelay(SCC_LDELAY);
277 Outb(port, val); udelay(SCC_LDELAY);
278 #else
279 Outb(port, reg);
280 Outb(port, val);
281 #endif
282 restore_flags(flags);
283 }
284
285 static inline void wr(struct scc_channel *scc, unsigned char reg,
286 unsigned char val)
287 {
288 OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
289 }
290
291 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
292 {
293 OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
294 }
295
296 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
297 {
298 OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
299 }
300
301 #ifdef SCC_DISABLE_ALL_INTS
302 static inline void scc_cli(int irq)
303 { cli(); }
304 static inline void scc_sti(int irq)
305 { sti(); }
306 #else
307 static inline void scc_cli(int irq)
308 { disable_irq(irq); }
309 static inline void scc_sti(int irq)
310 { enable_irq(irq); }
311 #endif
312
313 /* ******************************************************************** */
314 /* * Some useful macros * */
315 /* ******************************************************************** */
316
317
318 static inline void scc_lock_dev(struct scc_channel *scc)
319 {
320 scc->dev->tbusy = 1;
321 }
322
323 static inline void scc_unlock_dev(struct scc_channel *scc)
324 {
325 scc->dev->tbusy = 0;
326 }
327
328 static inline void scc_discard_buffers(struct scc_channel *scc)
329 {
330 unsigned long flags;
331
332 save_flags(flags);
333 cli();
334
335 if (scc->tx_buff != NULL)
336 {
337 dev_kfree_skb(scc->tx_buff);
338 scc->tx_buff = NULL;
339 }
340
341 while (skb_queue_len(&scc->tx_queue))
342 dev_kfree_skb(skb_dequeue(&scc->tx_queue));
343
344 restore_flags(flags);
345 }
346
347
348
349 /* ******************************************************************** */
350 /* * Interrupt Service Routines * */
351 /* ******************************************************************** */
352
353
354 /* ----> subroutines for the interrupt handlers <---- */
355
356 static inline void scc_notify(struct scc_channel *scc, int event)
357 {
358 struct sk_buff *skb;
359 char *bp;
360
361 if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
362 return;
363
364 skb = dev_alloc_skb(2);
365 if (skb != NULL)
366 {
367 bp = skb_put(skb, 2);
368 *bp++ = PARAM_HWEVENT;
369 *bp++ = event;
370 scc_net_rx(scc, skb);
371 } else
372 scc->stat.nospace++;
373 }
374
375 static inline void flush_rx_FIFO(struct scc_channel *scc)
376 {
377 int k;
378
379 for (k=0; k<3; k++)
380 Inb(scc->data);
381
382 if(scc->rx_buff != NULL) /* did we receive something? */
383 {
384 scc->stat.rxerrs++; /* then count it as an error */
385 kfree_skb(scc->rx_buff);
386 scc->rx_buff = NULL;
387 }
388 }
389
390 static void start_hunt(struct scc_channel *scc)
391 {
392 if ((scc->modem.clocksrc != CLK_EXTERNAL))
393 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
394 or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */
395 }
396
397 /* ----> four different interrupt handlers for Tx, Rx, changing of */
398 /* DCD/CTS and Rx/Tx errors */
399
400 /* Transmitter interrupt handler */
401 static inline void scc_txint(struct scc_channel *scc)
402 {
403 struct sk_buff *skb;
404
405 scc->stat.txints++;
406 skb = scc->tx_buff;
407
408 /* send first octet */
409
410 if (skb == NULL)
411 {
412 skb = skb_dequeue(&scc->tx_queue);
413 scc->tx_buff = skb;
414 scc_unlock_dev(scc);
415
416 if (skb == NULL)
417 {
418 scc_tx_done(scc);
419 Outb(scc->ctrl, RES_Tx_P);
420 return;
421 }
422
423 if (skb->len == 0) /* Paranoia... */
424 {
425 dev_kfree_skb(skb);
426 scc->tx_buff = NULL;
427 scc_tx_done(scc);
428 Outb(scc->ctrl, RES_Tx_P);
429 return;
430 }
431
432 scc->stat.tx_state = TXS_ACTIVE;
433
434 OutReg(scc->ctrl, R0, RES_Tx_CRC);
435 /* reset CRC generator */
436 or(scc,R10,ABUNDER); /* re-install underrun protection */
437 Outb(scc->data,*skb->data); /* send byte */
438 skb_pull(skb, 1);
439
440 if (!scc->enhanced) /* reset EOM latch */
441 Outb(scc->ctrl,RES_EOM_L);
442 return;
443 }
444
445 /* End Of Frame... */
446
447 if (skb->len == 0)
448 {
449 Outb(scc->ctrl, RES_Tx_P); /* reset pending int */
450 cl(scc, R10, ABUNDER); /* send CRC */
451 dev_kfree_skb(skb);
452 scc->tx_buff = NULL;
453 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
454 return;
455 }
456
457 /* send octet */
458
459 Outb(scc->data,*skb->data);
460 skb_pull(skb, 1);
461 }
462
463
464 /* External/Status interrupt handler */
465 static inline void scc_exint(struct scc_channel *scc)
466 {
467 unsigned char status,changes,chg_and_stat;
468
469 scc->stat.exints++;
470
471 status = InReg(scc->ctrl,R0);
472 changes = status ^ scc->status;
473 chg_and_stat = changes & status;
474
475 /* ABORT: generated whenever DCD drops while receiving */
476
477 if (chg_and_stat & BRK_ABRT) /* Received an ABORT */
478 flush_rx_FIFO(scc);
479
480 /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
481
482 if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
483 {
484 if (status & SYNC_HUNT)
485 {
486 scc->dcd = 0;
487 flush_rx_FIFO(scc);
488 if ((scc->modem.clocksrc != CLK_EXTERNAL))
489 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
490 } else {
491 scc->dcd = 1;
492 }
493
494 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
495 }
496
497 /* DCD: on = start to receive packet, off = ABORT condition */
498 /* (a successfully received packet generates a special condition int) */
499
500 if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
501 {
502 if(status & DCD) /* DCD is now ON */
503 {
504 start_hunt(scc);
505 scc->dcd = 1;
506 } else { /* DCD is now OFF */
507 cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
508 flush_rx_FIFO(scc);
509 scc->dcd = 0;
510 }
511
512 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
513 }
514
515 #ifdef notdef
516 /* CTS: use external TxDelay (what's that good for?!)
517 * Anyway: If we _could_ use it (BayCom USCC uses CTS for
518 * own purposes) we _should_ use the "autoenable" feature
519 * of the Z8530 and not this interrupt...
520 */
521
522 if (chg_and_stat & CTS) /* CTS is now ON */
523 {
524 if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */
525 scc_start_tx_timer(scc, t_txdelay, 0);
526 }
527 #endif
528
529 if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
530 {
531 scc->stat.tx_under++; /* oops, an underrun! count 'em */
532 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */
533
534 if (scc->tx_buff != NULL)
535 {
536 dev_kfree_skb(scc->tx_buff);
537 scc->tx_buff = NULL;
538 }
539
540 or(scc,R10,ABUNDER);
541 scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */
542 }
543
544 scc->status = status;
545 Outb(scc->ctrl,RES_EXT_INT);
546 }
547
548
549 /* Receiver interrupt handler */
550 static inline void scc_rxint(struct scc_channel *scc)
551 {
552 struct sk_buff *skb;
553
554 scc->stat.rxints++;
555
556 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
557 {
558 Inb(scc->data); /* discard char */
559 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
560 return;
561 }
562
563 skb = scc->rx_buff;
564
565 if (skb == NULL)
566 {
567 skb = dev_alloc_skb(scc->stat.bufsize);
568 if (skb == NULL)
569 {
570 scc->dev_stat.rx_dropped++;
571 scc->stat.nospace++;
572 Inb(scc->data);
573 or(scc, R3, ENT_HM);
574 return;
575 }
576
577 scc->rx_buff = skb;
578 *(skb_put(skb, 1)) = 0; /* KISS data */
579 }
580
581 if (skb->len >= scc->stat.bufsize)
582 {
583 #ifdef notdef
584 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
585 #endif
586 kfree_skb(skb);
587 scc->rx_buff = NULL;
588 Inb(scc->data);
589 or(scc, R3, ENT_HM);
590 return;
591 }
592
593 *(skb_put(skb, 1)) = Inb(scc->data);
594 }
595
596
597 /* Receive Special Condition interrupt handler */
598 static inline void scc_spint(struct scc_channel *scc)
599 {
600 unsigned char status;
601 struct sk_buff *skb;
602
603 scc->stat.spints++;
604
605 status = InReg(scc->ctrl,R1); /* read receiver status */
606
607 Inb(scc->data); /* throw away Rx byte */
608 skb = scc->rx_buff;
609
610 if(status & Rx_OVR) /* receiver overrun */
611 {
612 scc->stat.rx_over++; /* count them */
613 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
614
615 if (skb != NULL)
616 kfree_skb(skb);
617 scc->rx_buff = NULL;
618 }
619
620 if(status & END_FR && skb != NULL) /* end of frame */
621 {
622 /* CRC okay, frame ends on 8 bit boundary and received something ? */
623
624 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
625 {
626 /* ignore last received byte (first of the CRC bytes) */
627 skb_trim(skb, skb->len-1);
628 scc_net_rx(scc, skb);
629 scc->rx_buff = NULL;
630 scc->stat.rxframes++;
631 } else { /* a bad frame */
632 kfree_skb(skb);
633 scc->rx_buff = NULL;
634 scc->stat.rxerrs++;
635 }
636 }
637
638 Outb(scc->ctrl,ERR_RES);
639 }
640
641
642 /* ----> interrupt service routine for the Z8530 <---- */
643
644 static void scc_isr_dispatch(struct scc_channel *scc, int vector)
645 {
646 switch (vector & VECTOR_MASK)
647 {
648 case TXINT: scc_txint(scc); break;
649 case EXINT: scc_exint(scc); break;
650 case RXINT: scc_rxint(scc); break;
651 case SPINT: scc_spint(scc); break;
652 }
653 }
654
655 /* If the card has a latch for the interrupt vector (like the PA0HZP card)
656 use it to get the number of the chip that generated the int.
657 If not: poll all defined chips.
658 */
659
660 #define SCC_IRQTIMEOUT 30000
661
662 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs)
663 {
664 unsigned char vector;
665 struct scc_channel *scc;
666 struct scc_ctrl *ctrl;
667 int k;
668
669 if (Vector_Latch)
670 {
671 for(k=0; k < SCC_IRQTIMEOUT; k++)
672 {
673 Outb(Vector_Latch, 0); /* Generate INTACK */
674
675 /* Read the vector */
676 if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break;
677 if (vector & 0x01) break;
678
679 scc=&SCC_Info[vector >> 3 ^ 0x01];
680 if (!scc->dev) break;
681
682 scc_isr_dispatch(scc, vector);
683
684 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */
685 }
686
687 if (k == SCC_IRQTIMEOUT)
688 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
689
690 return;
691 }
692
693 /* Find the SCC generating the interrupt by polling all attached SCCs
694 * reading RR3A (the interrupt pending register)
695 */
696
697 ctrl = SCC_ctrl;
698 while (ctrl->chan_A)
699 {
700 if (ctrl->irq != irq)
701 {
702 ctrl++;
703 continue;
704 }
705
706 scc = NULL;
707 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
708 {
709 vector=InReg(ctrl->chan_B,R2); /* Read the vector */
710 if (vector & 0x01) break;
711
712 scc = &SCC_Info[vector >> 3 ^ 0x01];
713 if (!scc->dev) break;
714
715 scc_isr_dispatch(scc, vector);
716 }
717
718 if (k == SCC_IRQTIMEOUT)
719 {
720 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
721 break;
722 }
723
724 /* This looks wierd and it is. At least the BayCom USCC doesn't
725 * use the Interrupt Daisy Chain, thus we'll have to start
726 * all over again to be sure not to miss an interrupt from
727 * (any of) the other chip(s)...
728 * Honestly, the situation *is* braindamaged...
729 */
730
731 if (scc != NULL)
732 {
733 OutReg(scc->ctrl,R0,RES_H_IUS);
734 ctrl = SCC_ctrl;
735 } else
736 ctrl++;
737 }
738 }
739
740
741
742 /* ******************************************************************** */
743 /* * Init Channel */
744 /* ******************************************************************** */
745
746
747 /* ----> set SCC channel speed <---- */
748
749 static inline void set_brg(struct scc_channel *scc, unsigned int tc)
750 {
751 cl(scc,R14,BRENABL); /* disable baudrate generator */
752 wr(scc,R12,tc & 255); /* brg rate LOW */
753 wr(scc,R13,tc >> 8); /* brg rate HIGH */
754 or(scc,R14,BRENABL); /* enable baudrate generator */
755 }
756
757 static inline void set_speed(struct scc_channel *scc)
758 {
759 disable_irq(scc->irq);
760
761 if (scc->modem.speed > 0) /* paranoia... */
762 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
763
764 enable_irq(scc->irq);
765 }
766
767
768 /* ----> initialize a SCC channel <---- */
769
770 static inline void init_brg(struct scc_channel *scc)
771 {
772 wr(scc, R14, BRSRC); /* BRG source = PCLK */
773 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */
774 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */
775 }
776
777 /*
778 * Initialization according to the Z8530 manual (SGS-Thomson's version):
779 *
780 * 1. Modes and constants
781 *
782 * WR9 11000000 chip reset
783 * WR4 XXXXXXXX Tx/Rx control, async or sync mode
784 * WR1 0XX00X00 select W/REQ (optional)
785 * WR2 XXXXXXXX program interrupt vector
786 * WR3 XXXXXXX0 select Rx control
787 * WR5 XXXX0XXX select Tx control
788 * WR6 XXXXXXXX sync character
789 * WR7 XXXXXXXX sync character
790 * WR9 000X0XXX select interrupt control
791 * WR10 XXXXXXXX miscellaneous control (optional)
792 * WR11 XXXXXXXX clock control
793 * WR12 XXXXXXXX time constant lower byte (optional)
794 * WR13 XXXXXXXX time constant upper byte (optional)
795 * WR14 XXXXXXX0 miscellaneous control
796 * WR14 XXXSSSSS commands (optional)
797 *
798 * 2. Enables
799 *
800 * WR14 000SSSS1 baud rate enable
801 * WR3 SSSSSSS1 Rx enable
802 * WR5 SSSS1SSS Tx enable
803 * WR0 10000000 reset Tx CRG (optional)
804 * WR1 XSS00S00 DMA enable (optional)
805 *
806 * 3. Interrupt status
807 *
808 * WR15 XXXXXXXX enable external/status
809 * WR0 00010000 reset external status
810 * WR0 00010000 reset external status twice
811 * WR1 SSSXXSXX enable Rx, Tx and Ext/status
812 * WR9 000SXSSS enable master interrupt enable
813 *
814 * 1 = set to one, 0 = reset to zero
815 * X = user defined, S = same as previous init
816 *
817 *
818 * Note that the implementation differs in some points from above scheme.
819 *
820 */
821
822 static void init_channel(struct scc_channel *scc)
823 {
824 del_timer(&scc->tx_t);
825 del_timer(&scc->tx_wdog);
826
827 disable_irq(scc->irq);
828
829 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
830 wr(scc,R1,0); /* no W/REQ operation */
831 wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */
832 wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */
833 wr(scc,R6,0); /* SDLC address zero (not used) */
834 wr(scc,R7,FLAG); /* SDLC flag value */
835 wr(scc,R9,VIS); /* vector includes status */
836 wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
837 wr(scc,R14, 0);
838
839
840 /* set clock sources:
841
842 CLK_DPLL: normal halfduplex operation
843
844 RxClk: use DPLL
845 TxClk: use DPLL
846 TRxC mode DPLL output
847
848 CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
849
850 BayCom: others:
851
852 TxClk = pin RTxC TxClk = pin TRxC
853 RxClk = pin TRxC RxClk = pin RTxC
854
855
856 CLK_DIVIDER:
857 RxClk = use DPLL
858 TxClk = pin RTxC
859
860 BayCom: others:
861 pin TRxC = DPLL pin TRxC = BRG
862 (RxClk * 1) (RxClk * 32)
863 */
864
865
866 switch(scc->modem.clocksrc)
867 {
868 case CLK_DPLL:
869 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
870 init_brg(scc);
871 break;
872
873 case CLK_DIVIDER:
874 wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
875 init_brg(scc);
876 break;
877
878 case CLK_EXTERNAL:
879 wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
880 OutReg(scc->ctrl, R14, DISDPLL);
881 break;
882
883 }
884
885 set_speed(scc); /* set baudrate */
886
887 if(scc->enhanced)
888 {
889 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
890 wr(scc,R7,AUTOEOM);
891 }
892
893 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
894 /* DCD is now ON */
895 {
896 start_hunt(scc);
897 }
898
899 /* enable ABORT, DCD & SYNC/HUNT interrupts */
900
901 wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
902
903 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
904 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */
905
906 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
907
908 scc->status = InReg(scc->ctrl,R0); /* read initial status */
909
910 or(scc,R9,MIE); /* master interrupt enable */
911
912 scc_init_timer(scc);
913
914 enable_irq(scc->irq);
915 }
916
917
918
919
920 /* ******************************************************************** */
921 /* * SCC timer functions * */
922 /* ******************************************************************** */
923
924
925 /* ----> scc_key_trx sets the time constant for the baudrate
926 generator and keys the transmitter <---- */
927
928 static void scc_key_trx(struct scc_channel *scc, char tx)
929 {
930 unsigned int time_const;
931
932 if (scc->brand & PRIMUS)
933 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
934
935 if (scc->modem.speed < 300)
936 scc->modem.speed = 1200;
937
938 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
939
940 disable_irq(scc->irq);
941
942 if (tx)
943 {
944 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */
945 or(scc, R15, TxUIE);
946 }
947
948 if (scc->modem.clocksrc == CLK_DPLL)
949 { /* force simplex operation */
950 if (tx)
951 {
952 #ifdef CONFIG_SCC_TRXECHO
953 cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */
954 cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */
955 #endif
956 set_brg(scc, time_const); /* reprogram baudrate generator */
957
958 /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
959 wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
960
961 /* By popular demand: tx_inhibit */
962 if (scc->kiss.tx_inhibit)
963 {
964 or(scc,R5, TxENAB);
965 scc->wreg[R5] |= RTS;
966 } else {
967 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */
968 }
969 } else {
970 cl(scc,R5,RTS|TxENAB);
971
972 set_brg(scc, time_const); /* reprogram baudrate generator */
973
974 /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
975 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
976
977 #ifndef CONFIG_SCC_TRXECHO
978 if (scc->kiss.softdcd)
979 #endif
980 {
981 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
982 start_hunt(scc);
983 }
984 }
985 } else {
986 if (tx)
987 {
988 #ifdef CONFIG_SCC_TRXECHO
989 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
990 {
991 cl(scc, R3, RxENABLE);
992 cl(scc, R15, DCDIE|SYNCIE);
993 }
994 #endif
995
996 if (scc->kiss.tx_inhibit)
997 {
998 or(scc,R5, TxENAB);
999 scc->wreg[R5] |= RTS;
1000 } else {
1001 or(scc,R5,RTS|TxENAB); /* enable tx */
1002 }
1003 } else {
1004 cl(scc,R5,RTS|TxENAB); /* disable tx */
1005
1006 if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
1007 #ifndef CONFIG_SCC_TRXECHO
1008 scc->kiss.softdcd)
1009 #else
1010 1)
1011 #endif
1012 {
1013 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
1014 start_hunt(scc);
1015 }
1016 }
1017 }
1018
1019 enable_irq(scc->irq);
1020 }
1021
1022
1023 /* ----> SCC timer interrupt handler and friends. <---- */
1024
1025 static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
1026 {
1027 unsigned long flags;
1028
1029
1030 save_flags(flags);
1031 cli();
1032
1033 del_timer(&scc->tx_t);
1034
1035 if (when == 0)
1036 {
1037 handler((unsigned long) scc);
1038 } else
1039 if (when != TIMER_OFF)
1040 {
1041 scc->tx_t.data = (unsigned long) scc;
1042 scc->tx_t.function = handler;
1043 scc->tx_t.expires = jiffies + (when*HZ)/100;
1044 add_timer(&scc->tx_t);
1045 }
1046
1047 restore_flags(flags);
1048 }
1049
1050 static void scc_start_defer(struct scc_channel *scc)
1051 {
1052 unsigned long flags;
1053
1054 save_flags(flags);
1055 cli();
1056
1057 del_timer(&scc->tx_wdog);
1058
1059 if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1060 {
1061 scc->tx_wdog.data = (unsigned long) scc;
1062 scc->tx_wdog.function = t_busy;
1063 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1064 add_timer(&scc->tx_wdog);
1065 }
1066 restore_flags(flags);
1067 }
1068
1069 static void scc_start_maxkeyup(struct scc_channel *scc)
1070 {
1071 unsigned long flags;
1072
1073 save_flags(flags);
1074 cli();
1075
1076 del_timer(&scc->tx_wdog);
1077
1078 if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1079 {
1080 scc->tx_wdog.data = (unsigned long) scc;
1081 scc->tx_wdog.function = t_maxkeyup;
1082 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1083 add_timer(&scc->tx_wdog);
1084 }
1085
1086 restore_flags(flags);
1087 }
1088
1089 /*
1090 * This is called from scc_txint() when there are no more frames to send.
1091 * Not exactly a timer function, but it is a close friend of the family...
1092 */
1093
1094 static void scc_tx_done(struct scc_channel *scc)
1095 {
1096 /*
1097 * trx remains keyed in fulldup mode 2 until t_idle expires.
1098 */
1099
1100 switch (scc->kiss.fulldup)
1101 {
1102 case KISS_DUPLEX_LINK:
1103 scc->stat.tx_state = TXS_IDLE2;
1104 if (scc->kiss.idletime != TIMER_OFF)
1105 scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100);
1106 break;
1107 case KISS_DUPLEX_OPTIMA:
1108 scc_notify(scc, HWEV_ALL_SENT);
1109 break;
1110 default:
1111 scc->stat.tx_state = TXS_BUSY;
1112 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1113 }
1114
1115 scc_unlock_dev(scc);
1116 }
1117
1118
1119 static unsigned char Rand = 17;
1120
1121 static inline int is_grouped(struct scc_channel *scc)
1122 {
1123 int k;
1124 struct scc_channel *scc2;
1125 unsigned char grp1, grp2;
1126
1127 grp1 = scc->kiss.group;
1128
1129 for (k = 0; k < (Nchips * 2); k++)
1130 {
1131 scc2 = &SCC_Info[k];
1132 grp2 = scc2->kiss.group;
1133
1134 if (scc2 == scc || !(scc2->dev && grp2))
1135 continue;
1136
1137 if ((grp1 & 0x3f) == (grp2 & 0x3f))
1138 {
1139 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1140 return 1;
1141
1142 if ( (grp1 & RXGROUP) && scc2->dcd )
1143 return 1;
1144 }
1145 }
1146 return 0;
1147 }
1148
1149 /* DWAIT and SLOTTIME expired
1150 *
1151 * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer
1152 * else key trx and start txdelay
1153 * fulldup == 1: key trx and start txdelay
1154 * fulldup == 2: mintime expired, reset status or key trx and start txdelay
1155 */
1156
1157 static void t_dwait(unsigned long channel)
1158 {
1159 struct scc_channel *scc = (struct scc_channel *) channel;
1160
1161 if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */
1162 {
1163 if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */
1164 {
1165 scc->stat.tx_state = TXS_IDLE;
1166 scc_unlock_dev(scc); /* t_maxkeyup locked it. */
1167 return;
1168 }
1169
1170 scc->stat.tx_state = TXS_BUSY;
1171 }
1172
1173 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1174 {
1175 Rand = Rand * 17 + 31;
1176
1177 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1178 {
1179 scc_start_defer(scc);
1180 scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1181 return ;
1182 }
1183 }
1184
1185 if ( !(scc->wreg[R5] & RTS) )
1186 {
1187 scc_key_trx(scc, TX_ON);
1188 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1189 } else {
1190 scc_start_tx_timer(scc, t_txdelay, 0);
1191 }
1192 }
1193
1194
1195 /* TXDELAY expired
1196 *
1197 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1198 */
1199
1200 static void t_txdelay(unsigned long channel)
1201 {
1202 struct scc_channel *scc = (struct scc_channel *) channel;
1203
1204 scc_start_maxkeyup(scc);
1205
1206 if (scc->tx_buff == NULL)
1207 {
1208 disable_irq(scc->irq);
1209 scc_txint(scc);
1210 enable_irq(scc->irq);
1211 }
1212 }
1213
1214
1215 /* TAILTIME expired
1216 *
1217 * switch off transmitter. If we were stopped by Maxkeyup restart
1218 * transmission after 'mintime' seconds
1219 */
1220
1221 static void t_tail(unsigned long channel)
1222 {
1223 struct scc_channel *scc = (struct scc_channel *) channel;
1224 unsigned long flags;
1225
1226 save_flags(flags);
1227 cli();
1228
1229 del_timer(&scc->tx_wdog);
1230 scc_key_trx(scc, TX_OFF);
1231
1232 restore_flags(flags);
1233
1234 if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */
1235 {
1236 scc->stat.tx_state = TXS_WAIT;
1237
1238 if (scc->kiss.mintime != TIMER_OFF) /* try it again */
1239 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1240 else
1241 scc_start_tx_timer(scc, t_dwait, 0);
1242 return;
1243 }
1244
1245 scc->stat.tx_state = TXS_IDLE;
1246 scc_unlock_dev(scc);
1247 }
1248
1249
1250 /* BUSY timeout
1251 *
1252 * throw away send buffers if DCD remains active too long.
1253 */
1254
1255 static void t_busy(unsigned long channel)
1256 {
1257 struct scc_channel *scc = (struct scc_channel *) channel;
1258
1259 del_timer(&scc->tx_t);
1260 scc_lock_dev(scc);
1261
1262 scc_discard_buffers(scc);
1263
1264 scc->stat.txerrs++;
1265 scc->stat.tx_state = TXS_IDLE;
1266
1267 scc_unlock_dev(scc);
1268 }
1269
1270 /* MAXKEYUP timeout
1271 *
1272 * this is our watchdog.
1273 */
1274
1275 static void t_maxkeyup(unsigned long channel)
1276 {
1277 struct scc_channel *scc = (struct scc_channel *) channel;
1278 unsigned long flags;
1279
1280 save_flags(flags);
1281 cli();
1282
1283 /*
1284 * let things settle down before we start to
1285 * accept new data.
1286 */
1287
1288 scc_lock_dev(scc);
1289 scc_discard_buffers(scc);
1290
1291 del_timer(&scc->tx_t);
1292
1293 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */
1294 cl(scc, R15, TxUIE); /* count it. */
1295 OutReg(scc->ctrl, R0, RES_Tx_P);
1296
1297 restore_flags(flags);
1298
1299 scc->stat.txerrs++;
1300 scc->stat.tx_state = TXS_TIMEOUT;
1301 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1302 }
1303
1304 /* IDLE timeout
1305 *
1306 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1307 * of inactivity. We will not restart transmission before 'mintime'
1308 * expires.
1309 */
1310
1311 static void t_idle(unsigned long channel)
1312 {
1313 struct scc_channel *scc = (struct scc_channel *) channel;
1314
1315 del_timer(&scc->tx_wdog);
1316
1317 scc_key_trx(scc, TX_OFF);
1318
1319 if (scc->kiss.mintime != TIMER_OFF)
1320 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1321 scc->stat.tx_state = TXS_WAIT;
1322 }
1323
1324 static void scc_init_timer(struct scc_channel *scc)
1325 {
1326 unsigned long flags;
1327
1328 save_flags(flags);
1329 cli();
1330
1331 scc->stat.tx_state = TXS_IDLE;
1332
1333 restore_flags(flags);
1334 }
1335
1336
1337 /* ******************************************************************** */
1338 /* * Set/get L1 parameters * */
1339 /* ******************************************************************** */
1340
1341
1342 /*
1343 * this will set the "hardware" parameters through KISS commands or ioctl()
1344 */
1345
1346 #define CAST(x) (unsigned long)(x)
1347
1348 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1349 {
1350 switch (cmd)
1351 {
1352 case PARAM_TXDELAY: scc->kiss.txdelay=arg; break;
1353 case PARAM_PERSIST: scc->kiss.persist=arg; break;
1354 case PARAM_SLOTTIME: scc->kiss.slottime=arg; break;
1355 case PARAM_TXTAIL: scc->kiss.tailtime=arg; break;
1356 case PARAM_FULLDUP: scc->kiss.fulldup=arg; break;
1357 case PARAM_DTR: break; /* does someone need this? */
1358 case PARAM_GROUP: scc->kiss.group=arg; break;
1359 case PARAM_IDLE: scc->kiss.idletime=arg; break;
1360 case PARAM_MIN: scc->kiss.mintime=arg; break;
1361 case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break;
1362 case PARAM_WAIT: scc->kiss.waittime=arg; break;
1363 case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break;
1364 case PARAM_TX: scc->kiss.tx_inhibit=arg; break;
1365
1366 case PARAM_SOFTDCD:
1367 scc->kiss.softdcd=arg;
1368 if (arg)
1369 {
1370 or(scc, R15, SYNCIE);
1371 cl(scc, R15, DCDIE);
1372 start_hunt(scc);
1373 } else {
1374 or(scc, R15, DCDIE);
1375 cl(scc, R15, SYNCIE);
1376 }
1377 break;
1378
1379 case PARAM_SPEED:
1380 if (arg < 256)
1381 scc->modem.speed=arg*100;
1382 else
1383 scc->modem.speed=arg;
1384
1385 if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */
1386 set_speed(scc);
1387 break;
1388
1389 case PARAM_RTS:
1390 if ( !(scc->wreg[R5] & RTS) )
1391 {
1392 if (arg != TX_OFF)
1393 scc_key_trx(scc, TX_ON);
1394 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1395 } else {
1396 if (arg == TX_OFF)
1397 {
1398 scc->stat.tx_state = TXS_BUSY;
1399 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1400 }
1401 }
1402 break;
1403
1404 case PARAM_HWEVENT:
1405 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1406 break;
1407
1408 default: return -EINVAL;
1409 }
1410
1411 return 0;
1412 }
1413
1414
1415
1416 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1417 {
1418 switch (cmd)
1419 {
1420 case PARAM_TXDELAY: return CAST(scc->kiss.txdelay);
1421 case PARAM_PERSIST: return CAST(scc->kiss.persist);
1422 case PARAM_SLOTTIME: return CAST(scc->kiss.slottime);
1423 case PARAM_TXTAIL: return CAST(scc->kiss.tailtime);
1424 case PARAM_FULLDUP: return CAST(scc->kiss.fulldup);
1425 case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd);
1426 case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0);
1427 case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0);
1428 case PARAM_SPEED: return CAST(scc->modem.speed);
1429 case PARAM_GROUP: return CAST(scc->kiss.group);
1430 case PARAM_IDLE: return CAST(scc->kiss.idletime);
1431 case PARAM_MIN: return CAST(scc->kiss.mintime);
1432 case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup);
1433 case PARAM_WAIT: return CAST(scc->kiss.waittime);
1434 case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer);
1435 case PARAM_TX: return CAST(scc->kiss.tx_inhibit);
1436 default: return NO_SUCH_PARAM;
1437 }
1438
1439 }
1440
1441 #undef CAST
1442 #undef SVAL
1443
1444 /* ******************************************************************* */
1445 /* * Send calibration pattern * */
1446 /* ******************************************************************* */
1447
1448 static void scc_stop_calibrate(unsigned long channel)
1449 {
1450 struct scc_channel *scc = (struct scc_channel *) channel;
1451 unsigned long flags;
1452
1453 save_flags(flags);
1454 cli();
1455
1456 del_timer(&scc->tx_wdog);
1457 scc_key_trx(scc, TX_OFF);
1458 wr(scc, R6, 0);
1459 wr(scc, R7, FLAG);
1460 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1461 Outb(scc->ctrl,RES_EXT_INT);
1462
1463 scc_unlock_dev(scc);
1464
1465 restore_flags(flags);
1466 }
1467
1468
1469 static void
1470 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1471 {
1472 unsigned long flags;
1473
1474 save_flags(flags);
1475 cli();
1476
1477 scc_lock_dev(scc);
1478 scc_discard_buffers(scc);
1479
1480 del_timer(&scc->tx_wdog);
1481
1482 scc->tx_wdog.data = (unsigned long) scc;
1483 scc->tx_wdog.function = scc_stop_calibrate;
1484 scc->tx_wdog.expires = jiffies + HZ*duration;
1485 add_timer(&scc->tx_wdog);
1486
1487 /* This doesn't seem to work. Why not? */
1488 wr(scc, R6, 0);
1489 wr(scc, R7, pattern);
1490
1491 /*
1492 * Don't know if this works.
1493 * Damn, where is my Z8530 programming manual...?
1494 */
1495
1496 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1497 Outb(scc->ctrl,RES_EXT_INT);
1498
1499 scc_key_trx(scc, TX_ON);
1500
1501 restore_flags(flags);
1502 }
1503
1504 /* ******************************************************************* */
1505 /* * Init channel structures, special HW, etc... * */
1506 /* ******************************************************************* */
1507
1508 /*
1509 * Reset the Z8530s and setup special hardware
1510 */
1511
1512 static void z8530_init(void)
1513 {
1514 struct scc_channel *scc;
1515 int chip, k;
1516 unsigned long flags;
1517 char *flag;
1518
1519
1520 printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1521
1522 flag=" ";
1523 for (k = 0; k < 16; k++)
1524 if (Ivec[k].used)
1525 {
1526 printk("%s%d", flag, k);
1527 flag=",";
1528 }
1529 printk("\n");
1530
1531
1532 /* reset and pre-init all chips in the system */
1533 for (chip = 0; chip < Nchips; chip++)
1534 {
1535 scc=&SCC_Info[2*chip];
1536 if (!scc->ctrl) continue;
1537
1538 /* Special SCC cards */
1539
1540 if(scc->brand & EAGLE) /* this is an EAGLE card */
1541 Outb(scc->special,0x08); /* enable interrupt on the board */
1542
1543 if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */
1544 Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1545
1546
1547 /* Reset and pre-init Z8530 */
1548
1549 save_flags(flags);
1550 cli();
1551
1552 Outb(scc->ctrl, 0);
1553 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */
1554 udelay(100); /* give it 'a bit' more time than required */
1555 wr(scc, R2, chip*16); /* interrupt vector */
1556 wr(scc, R9, VIS); /* vector includes status */
1557
1558 restore_flags(flags);
1559 }
1560
1561
1562 Driver_Initialized = 1;
1563 }
1564
1565 /*
1566 * Allocate device structure, err, instance, and register driver
1567 */
1568
1569 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev)
1570 {
1571 unsigned char *buf;
1572 struct device *dev;
1573
1574 if (dev_get(name) != NULL)
1575 {
1576 printk(KERN_INFO "Z8530drv: device %s already exists.\n", name);
1577 return -EEXIST;
1578 }
1579
1580 if ((scc->dev = (struct device *) kmalloc(sizeof(struct device), GFP_KERNEL)) == NULL)
1581 return -ENOMEM;
1582
1583 dev = scc->dev;
1584 memset(dev, 0, sizeof(struct device));
1585
1586 buf = (unsigned char *) kmalloc(10, GFP_KERNEL);
1587 strcpy(buf, name);
1588
1589 dev->priv = (void *) scc;
1590 dev->name = buf;
1591 dev->init = scc_net_init;
1592
1593 if ((addev? register_netdevice(dev) : register_netdev(dev)) != 0)
1594 {
1595 kfree(dev);
1596 return -EIO;
1597 }
1598
1599 return 0;
1600 }
1601
1602
1603
1604 /* ******************************************************************** */
1605 /* * Network driver methods * */
1606 /* ******************************************************************** */
1607
1608 static unsigned char ax25_bcast[AX25_ADDR_LEN] =
1609 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
1610 static unsigned char ax25_nocall[AX25_ADDR_LEN] =
1611 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
1612
1613 /* ----> Initialize device <----- */
1614
1615 static int scc_net_init(struct device *dev)
1616 {
1617 dev_init_buffers(dev);
1618
1619 dev->tx_queue_len = 16; /* should be enough... */
1620
1621 dev->open = scc_net_open;
1622 dev->stop = scc_net_close;
1623
1624 dev->hard_start_xmit = scc_net_tx;
1625 dev->hard_header = scc_net_header;
1626 dev->rebuild_header = ax25_rebuild_header;
1627 dev->set_mac_address = scc_net_set_mac_address;
1628 dev->get_stats = scc_net_get_stats;
1629 dev->do_ioctl = scc_net_ioctl;
1630
1631 memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
1632 memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN);
1633
1634 dev->flags = 0;
1635
1636 dev->type = ARPHRD_AX25;
1637 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1638 dev->mtu = AX25_DEF_PACLEN;
1639 dev->addr_len = AX25_ADDR_LEN;
1640
1641 return 0;
1642 }
1643
1644 /* ----> open network device <---- */
1645
1646 static int scc_net_open(struct device *dev)
1647 {
1648 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1649
1650 if (scc == NULL || scc->magic != SCC_MAGIC)
1651 return -ENODEV;
1652
1653 if (!scc->init)
1654 return -EINVAL;
1655
1656 MOD_INC_USE_COUNT;
1657
1658 scc->tx_buff = NULL;
1659 skb_queue_head_init(&scc->tx_queue);
1660
1661 init_channel(scc);
1662
1663 dev->tbusy = 0;
1664 dev->start = 1;
1665
1666 return 0;
1667 }
1668
1669 /* ----> close network device <---- */
1670
1671 static int scc_net_close(struct device *dev)
1672 {
1673 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1674 unsigned long flags;
1675
1676 if (scc == NULL || scc->magic != SCC_MAGIC)
1677 return -ENODEV;
1678
1679 MOD_DEC_USE_COUNT;
1680
1681 save_flags(flags);
1682 cli();
1683
1684 Outb(scc->ctrl,0); /* Make sure pointer is written */
1685 wr(scc,R1,0); /* disable interrupts */
1686 wr(scc,R3,0);
1687
1688 del_timer(&scc->tx_t);
1689 del_timer(&scc->tx_wdog);
1690
1691 restore_flags(flags);
1692
1693 scc_discard_buffers(scc);
1694
1695 dev->tbusy = 1;
1696 dev->start = 0;
1697
1698 return 0;
1699 }
1700
1701 /* ----> receive frame, called from scc_rxint() <---- */
1702
1703 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1704 {
1705 if (skb->len == 0)
1706 {
1707 kfree_skb(skb);
1708 return;
1709 }
1710
1711 scc->dev_stat.rx_packets++;
1712
1713 skb->dev = scc->dev;
1714 skb->protocol = htons(ETH_P_AX25);
1715 skb->mac.raw = skb->data;
1716 skb->pkt_type = PACKET_HOST;
1717
1718 netif_rx(skb);
1719 return;
1720 }
1721
1722 /* ----> transmit frame <---- */
1723
1724 static int scc_net_tx(struct sk_buff *skb, struct device *dev)
1725 {
1726 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1727 unsigned long flags;
1728 char kisscmd;
1729
1730 if (scc == NULL || scc->magic != SCC_MAGIC || dev->tbusy)
1731 {
1732 dev_kfree_skb(skb);
1733 return 0;
1734 }
1735
1736 if (skb->len > scc->stat.bufsize || skb->len < 2)
1737 {
1738 scc->dev_stat.tx_dropped++; /* bogus frame */
1739 dev_kfree_skb(skb);
1740 return 0;
1741 }
1742
1743 scc->dev_stat.tx_packets++;
1744 scc->stat.txframes++;
1745
1746 kisscmd = *skb->data & 0x1f;
1747 skb_pull(skb, 1);
1748
1749 if (kisscmd)
1750 {
1751 scc_set_param(scc, kisscmd, *skb->data);
1752 dev_kfree_skb(skb);
1753 return 0;
1754 }
1755
1756 save_flags(flags);
1757 cli();
1758
1759 if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len)
1760 {
1761 struct sk_buff *skb_del;
1762 skb_del = __skb_dequeue(&scc->tx_queue);
1763 dev_kfree_skb(skb_del);
1764 }
1765 __skb_queue_tail(&scc->tx_queue, skb);
1766
1767 dev->trans_start = jiffies;
1768
1769 /*
1770 * Start transmission if the trx state is idle or
1771 * t_idle hasn't expired yet. Use dwait/persistance/slottime
1772 * algorithm for normal halfduplex operation.
1773 */
1774
1775 if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2)
1776 {
1777 scc->stat.tx_state = TXS_BUSY;
1778 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1779 scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1780 else
1781 scc_start_tx_timer(scc, t_dwait, 0);
1782 }
1783
1784 restore_flags(flags);
1785
1786 return 0;
1787 }
1788
1789 /* ----> ioctl functions <---- */
1790
1791 /*
1792 * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg
1793 * SIOCSCCINI - initialize driver arg: ---
1794 * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg
1795 * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg
1796 * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1797 * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1798 * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg
1799 * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg
1800 */
1801
1802 static int scc_net_ioctl(struct device *dev, struct ifreq *ifr, int cmd)
1803 {
1804 struct scc_kiss_cmd kiss_cmd;
1805 struct scc_mem_config memcfg;
1806 struct scc_hw_config hwcfg;
1807 struct scc_calibrate cal;
1808 int chan;
1809 unsigned char device_name[10];
1810 void *arg;
1811 struct scc_channel *scc;
1812
1813 scc = (struct scc_channel *) dev->priv;
1814 if (scc == NULL || scc->magic != SCC_MAGIC)
1815 return -EINVAL;
1816
1817 arg = (void *) ifr->ifr_data;
1818
1819 if (!Driver_Initialized)
1820 {
1821 if (cmd == SIOCSCCCFG)
1822 {
1823 int found = 1;
1824
1825 if (!suser()) return -EPERM;
1826 if (!arg) return -EFAULT;
1827
1828 if (Nchips >= SCC_MAXCHIPS)
1829 return -EINVAL;
1830
1831 if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1832 return -EFAULT;
1833
1834 if (hwcfg.irq == 2) hwcfg.irq = 9;
1835
1836 if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1837 {
1838 if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL))
1839 printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1840 else
1841 Ivec[hwcfg.irq].used = 1;
1842 }
1843
1844 if (hwcfg.vector_latch)
1845 Vector_Latch = hwcfg.vector_latch;
1846
1847 if (hwcfg.clock == 0)
1848 hwcfg.clock = SCC_DEFAULT_CLOCK;
1849
1850 #ifndef SCC_DONT_CHECK
1851 disable_irq(hwcfg.irq);
1852
1853 check_region(scc->ctrl, 1);
1854 Outb(hwcfg.ctrl_a, 0);
1855 OutReg(hwcfg.ctrl_a, R9, FHWRES);
1856 udelay(100);
1857 OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */
1858 udelay(5);
1859
1860 if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1861 found = 0;
1862
1863 enable_irq(hwcfg.irq);
1864 #endif
1865
1866 if (found)
1867 {
1868 SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a;
1869 SCC_Info[2*Nchips ].data = hwcfg.data_a;
1870 SCC_Info[2*Nchips ].irq = hwcfg.irq;
1871 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1872 SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1873 SCC_Info[2*Nchips+1].irq = hwcfg.irq;
1874
1875 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1876 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1877 SCC_ctrl[Nchips].irq = hwcfg.irq;
1878 }
1879
1880
1881 for (chan = 0; chan < 2; chan++)
1882 {
1883 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1884
1885 SCC_Info[2*Nchips+chan].special = hwcfg.special;
1886 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1887 SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1888 SCC_Info[2*Nchips+chan].option = hwcfg.option;
1889 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1890
1891 #ifdef SCC_DONT_CHECK
1892 printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n",
1893 device_name,
1894 SCC_Info[2*Nchips+chan].data,
1895 SCC_Info[2*Nchips+chan].ctrl);
1896
1897 #else
1898 printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n",
1899 device_name,
1900 chan? hwcfg.data_b : hwcfg.data_a,
1901 chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1902 found? "found" : "missing");
1903 #endif
1904
1905 if (found)
1906 {
1907 request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1908 request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1909 if (Nchips+chan != 0)
1910 scc_net_setup(&SCC_Info[2*Nchips+chan], device_name, 1);
1911 }
1912 }
1913
1914 if (found) Nchips++;
1915
1916 return 0;
1917 }
1918
1919 if (cmd == SIOCSCCINI)
1920 {
1921 if (!suser())
1922 return -EPERM;
1923
1924 if (Nchips == 0)
1925 return -EINVAL;
1926
1927 z8530_init();
1928 return 0;
1929 }
1930
1931 return -EINVAL; /* confuse the user */
1932 }
1933
1934 if (!scc->init)
1935 {
1936 if (cmd == SIOCSCCCHANINI)
1937 {
1938 if (!suser()) return -EPERM;
1939 if (!arg) return -EINVAL;
1940
1941 scc->stat.bufsize = SCC_BUFSIZE;
1942
1943 if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1944 return -EINVAL;
1945
1946 /* default KISS Params */
1947
1948 if (scc->modem.speed < 4800)
1949 {
1950 scc->kiss.txdelay = 36; /* 360 ms */
1951 scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */
1952 scc->kiss.slottime = 16; /* 160 ms */
1953 scc->kiss.tailtime = 4; /* minimal reasonable value */
1954 scc->kiss.fulldup = 0; /* CSMA */
1955 scc->kiss.waittime = 50; /* 500 ms */
1956 scc->kiss.maxkeyup = 10; /* 10 s */
1957 scc->kiss.mintime = 3; /* 3 s */
1958 scc->kiss.idletime = 30; /* 30 s */
1959 scc->kiss.maxdefer = 120; /* 2 min */
1960 scc->kiss.softdcd = 0; /* hardware dcd */
1961 } else {
1962 scc->kiss.txdelay = 10; /* 100 ms */
1963 scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */
1964 scc->kiss.slottime = 8; /* 160 ms */
1965 scc->kiss.tailtime = 1; /* minimal reasonable value */
1966 scc->kiss.fulldup = 0; /* CSMA */
1967 scc->kiss.waittime = 50; /* 500 ms */
1968 scc->kiss.maxkeyup = 7; /* 7 s */
1969 scc->kiss.mintime = 3; /* 3 s */
1970 scc->kiss.idletime = 30; /* 30 s */
1971 scc->kiss.maxdefer = 120; /* 2 min */
1972 scc->kiss.softdcd = 0; /* hardware dcd */
1973 }
1974
1975 scc->tx_buff = NULL;
1976 skb_queue_head_init(&scc->tx_queue);
1977 scc->init = 1;
1978
1979 return 0;
1980 }
1981
1982 return -EINVAL;
1983 }
1984
1985 switch(cmd)
1986 {
1987 case SIOCSCCRESERVED:
1988 return -ENOIOCTLCMD;
1989
1990 case SIOCSCCSMEM:
1991 if (!suser()) return -EPERM;
1992 if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1993 return -EINVAL;
1994 scc->stat.bufsize = memcfg.bufsize;
1995 return 0;
1996
1997 case SIOCSCCGSTAT:
1998 if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1999 return -EINVAL;
2000 return 0;
2001
2002 case SIOCSCCGKISS:
2003 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
2004 return -EINVAL;
2005 kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
2006 if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
2007 return -EINVAL;
2008 return 0;
2009
2010 case SIOCSCCSKISS:
2011 if (!suser()) return -EPERM;
2012 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
2013 return -EINVAL;
2014 return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
2015
2016 case SIOCSCCCAL:
2017 if (!suser()) return -EPERM;
2018 if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
2019 return -EINVAL;
2020
2021 scc_start_calibrate(scc, cal.time, cal.pattern);
2022 return 0;
2023
2024 default:
2025 return -ENOIOCTLCMD;
2026
2027 }
2028
2029 return -EINVAL;
2030 }
2031
2032 /* ----> set interface callsign <---- */
2033
2034 static int scc_net_set_mac_address(struct device *dev, void *addr)
2035 {
2036 struct sockaddr *sa = (struct sockaddr *) addr;
2037 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
2038 return 0;
2039 }
2040
2041 /* ----> "hard" header <---- */
2042
2043 static int scc_net_header(struct sk_buff *skb, struct device *dev,
2044 unsigned short type, void *daddr, void *saddr, unsigned len)
2045 {
2046 return ax25_encapsulate(skb, dev, type, daddr, saddr, len);
2047 }
2048
2049 /* ----> get statistics <---- */
2050
2051 static struct net_device_stats *scc_net_get_stats(struct device *dev)
2052 {
2053 struct scc_channel *scc = (struct scc_channel *) dev->priv;
2054
2055 if (scc == NULL || scc->magic != SCC_MAGIC)
2056 return NULL;
2057
2058 scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
2059 scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
2060 scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
2061 scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
2062
2063 return &scc->dev_stat;
2064 }
2065
2066 /* ******************************************************************** */
2067 /* * dump statistics to /proc/net/z8530drv * */
2068 /* ******************************************************************** */
2069
2070
2071 static int scc_net_get_info(char *buffer, char **start, off_t offset, int length, int dummy)
2072 {
2073 struct scc_channel *scc;
2074 struct scc_kiss *kiss;
2075 struct scc_stat *stat;
2076 int len = 0;
2077 off_t pos = 0;
2078 off_t begin = 0;
2079 int k;
2080
2081 len += sprintf(buffer, "z8530drv-"VERSION"\n");
2082
2083 if (!Driver_Initialized)
2084 {
2085 len += sprintf(buffer+len, "not initialized\n");
2086 goto done;
2087 }
2088
2089 if (!Nchips)
2090 {
2091 len += sprintf(buffer+len, "chips missing\n");
2092 goto done;
2093 }
2094
2095 for (k = 0; k < Nchips*2; k++)
2096 {
2097 scc = &SCC_Info[k];
2098 stat = &scc->stat;
2099 kiss = &scc->kiss;
2100
2101 if (!scc->init)
2102 continue;
2103
2104 /* dev data ctrl irq clock brand enh vector special option
2105 * baud nrz clocksrc softdcd bufsize
2106 * rxints txints exints spints
2107 * rcvd rxerrs over / xmit txerrs under / nospace bufsize
2108 * txd pers slot tail ful wait min maxk idl defr txof grp
2109 * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2110 * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2111 */
2112
2113 len += sprintf(buffer+len, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2114 scc->dev->name,
2115 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2116 scc->enhanced, Vector_Latch, scc->special,
2117 scc->option);
2118 len += sprintf(buffer+len, "\t%lu %d %d %d %d\n",
2119 scc->modem.speed, scc->modem.nrz,
2120 scc->modem.clocksrc, kiss->softdcd,
2121 stat->bufsize);
2122 len += sprintf(buffer+len, "\t%lu %lu %lu %lu\n",
2123 stat->rxints, stat->txints, stat->exints, stat->spints);
2124 len += sprintf(buffer+len, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2125 stat->rxframes, stat->rxerrs, stat->rx_over,
2126 stat->txframes, stat->txerrs, stat->tx_under,
2127 stat->nospace, stat->tx_state);
2128
2129 #define K(x) kiss->x
2130 len += sprintf(buffer+len, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2131 K(txdelay), K(persist), K(slottime), K(tailtime),
2132 K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2133 K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2134 #undef K
2135 #ifdef SCC_DEBUG
2136 {
2137 int reg;
2138
2139 len += sprintf(buffer+len, "\tW ");
2140 for (reg = 0; reg < 16; reg++)
2141 len += sprintf(buffer+len, "%2.2x ", scc->wreg[reg]);
2142 len += sprintf(buffer+len, "\n");
2143
2144 len += sprintf(buffer+len, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2145 for (reg = 3; reg < 8; reg++)
2146 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2147 len += sprintf(buffer+len, "XX ");
2148 for (reg = 9; reg < 16; reg++)
2149 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2150 len += sprintf(buffer+len, "\n");
2151 }
2152 #endif
2153 len += sprintf(buffer+len, "\n");
2154
2155 pos = begin + len;
2156
2157 if (pos < offset) {
2158 len = 0;
2159 begin = pos;
2160 }
2161
2162 if (pos > offset + length)
2163 break;
2164 }
2165
2166 done:
2167
2168 *start = buffer + (offset - begin);
2169 len -= (offset - begin);
2170
2171 if (len > length) len = length;
2172
2173 return len;
2174 }
2175
2176 #ifdef CONFIG_PROC_FS
2177
2178 struct proc_dir_entry scc_proc_dir_entry =
2179 {
2180 PROC_NET_Z8530, 8, "z8530drv", S_IFREG | S_IRUGO, 1, 0, 0, 0,
2181 &proc_net_inode_operations, scc_net_get_info
2182 };
2183
2184 #define scc_net_procfs_init() proc_net_register(&scc_proc_dir_entry);
2185 #define scc_net_procfs_remove() proc_net_unregister(PROC_NET_Z8530);
2186 #else
2187 #define scc_net_procfs_init()
2188 #define scc_net_procfs_remove()
2189 #endif
2190
2191
2192 /* ******************************************************************** */
2193 /* * Init SCC driver * */
2194 /* ******************************************************************** */
2195
2196 int __init scc_init (void)
2197 {
2198 int chip, chan, k, result;
2199 char devname[10];
2200
2201 printk(KERN_INFO BANNER);
2202
2203 memset(&SCC_ctrl, 0, sizeof(SCC_ctrl));
2204
2205 /* pre-init channel information */
2206
2207 for (chip = 0; chip < SCC_MAXCHIPS; chip++)
2208 {
2209 memset((char *) &SCC_Info[2*chip ], 0, sizeof(struct scc_channel));
2210 memset((char *) &SCC_Info[2*chip+1], 0, sizeof(struct scc_channel));
2211
2212 for (chan = 0; chan < 2; chan++)
2213 SCC_Info[2*chip+chan].magic = SCC_MAGIC;
2214 }
2215
2216 for (k = 0; k < 16; k++) Ivec[k].used = 0;
2217
2218 sprintf(devname,"%s0", SCC_DriverName);
2219
2220 result = scc_net_setup(SCC_Info, devname, 0);
2221 if (result)
2222 {
2223 printk(KERN_ERR "z8530drv: cannot initialize module\n");
2224 return result;
2225 }
2226
2227 scc_net_procfs_init();
2228
2229 return 0;
2230 }
2231
2232 /* ******************************************************************** */
2233 /* * Module support * */
2234 /* ******************************************************************** */
2235
2236
2237 #ifdef MODULE
2238 int init_module(void)
2239 {
2240 int result = 0;
2241
2242 result = scc_init();
2243
2244 if (result == 0)
2245 printk(KERN_INFO "Copyright 1993,1998 Joerg Reuter DL1BKE (jreuter@poboxes.com)\n");
2246
2247 return result;
2248 }
2249
2250 void cleanup_module(void)
2251 {
2252 long flags;
2253 io_port ctrl;
2254 int k;
2255 struct scc_channel *scc;
2256
2257 save_flags(flags);
2258 cli();
2259
2260 if (Nchips == 0)
2261 unregister_netdev(SCC_Info[0].dev);
2262
2263 for (k = 0; k < Nchips; k++)
2264 if ( (ctrl = SCC_ctrl[k].chan_A) )
2265 {
2266 Outb(ctrl, 0);
2267 OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2268 udelay(50);
2269 }
2270
2271 for (k = 0; k < Nchips*2; k++)
2272 {
2273 scc = &SCC_Info[k];
2274 if (scc)
2275 {
2276 release_region(scc->ctrl, 1);
2277 release_region(scc->data, 1);
2278 if (scc->dev)
2279 {
2280 unregister_netdev(scc->dev);
2281 kfree(scc->dev);
2282 }
2283 }
2284 }
2285
2286 for (k=0; k < 16 ; k++)
2287 if (Ivec[k].used) free_irq(k, NULL);
2288
2289 restore_flags(flags);
2290
2291 scc_net_procfs_remove();
2292 }
2293 #endif
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