Import 2.3.12pre2
[davej-history.git] / drivers / ap1000 / am79c864.h
blob0fef9579119fad65f49f7c9220e9dc65d0d94048
1 /*
2 * Copyright 1996 The Australian National University.
3 * Copyright 1996 Fujitsu Laboratories Limited
4 *
5 * This software may be distributed under the terms of the Gnu
6 * Public License version 2 or later
7 */
8 /*
9 * Definitions for Am79c864 PLC (Physical Layer Controller)
12 typedef int plc_reg;
14 struct plc {
15 plc_reg ctrl_a;
16 plc_reg ctrl_b;
17 plc_reg intr_mask;
18 plc_reg xmit_vector;
19 plc_reg vec_length;
20 plc_reg le_threshold;
21 plc_reg c_min;
22 plc_reg tl_min;
23 plc_reg tb_min;
24 plc_reg t_out;
25 plc_reg dummy1;
26 plc_reg lc_length;
27 plc_reg t_scrub;
28 plc_reg ns_max;
29 plc_reg tpc_load;
30 plc_reg tne_load;
31 plc_reg status_a;
32 plc_reg status_b;
33 plc_reg tpc;
34 plc_reg tne;
35 plc_reg clk_div;
36 plc_reg bist_sig;
37 plc_reg rcv_vector;
38 plc_reg intr_event;
39 plc_reg viol_sym_ct;
40 plc_reg min_idle_ct;
41 plc_reg link_err_ct;
44 /* Bits in ctrl_a */
45 #define CA_NOISE_TIMER 0x4000
46 #define CA_TNE_16BIT 0x2000
47 #define CA_TPC_16BIT 0x1000
48 #define CA_REQ_SCRUB 0x0800
49 #define CA_VSYM_INTR_MODE 0x0200
50 #define CA_MINI_INTR_MODE 0x0100
51 #define CA_LOOPBACK 0x0080
52 #define CA_FOT_OFF 0x0040
53 #define CA_EB_LOOP 0x0020
54 #define CA_LM_LOOP 0x0010
55 #define CA_BYPASS 0x0008
56 #define CA_REM_LOOP 0x0004
57 #define CA_RF_DISABLE 0x0002
58 #define CA_RUN_BIST 0x0001
60 /* Bits in ctrl_b */
61 #define CB_CONFIG_CTRL 0x8000
62 #define CB_MATCH_LS 0x7800
63 #define CB_MATCH_LS_ANY 0x0000
64 #define CB_MATCH_LS_QLS 0x4000
65 #define CB_MATCH_LS_MLS 0x2000
66 #define CB_MATCH_LS_HLS 0x1000
67 #define CB_MATCH_LS_ILS 0x0800
68 #define CB_MAINT_LS 0x0700
69 #define CB_MAINT_LS_QLS 0x0000
70 #define CB_MAINT_LS_ILS 0x0100
71 #define CB_MAINT_LS_HLS 0x0200
72 #define CB_MAINT_LS_MLS 0x0300
73 #define CB_MAINT_LS_PDR 0x0600
74 #define CB_CLASS_S 0x0080
75 #define CB_PC_LCT 0x0060
76 #define CB_PC_LCT_NONE 0x0000
77 #define CB_PC_LCT_PDR 0x0020
78 #define CB_PC_LCT_IDLE 0x0040
79 #define CB_PC_LCT_LOOP 0x0060
80 #define CB_PC_JOIN 0x0010
81 #define CB_LONG_LCT 0x0008
82 #define CB_PC_MAINT 0x0004
83 #define CB_PCM_CTRL 0x0003
84 #define CB_PC_START 0x0001
85 #define CB_PC_TRACE 0x0002
86 #define CB_PC_STOP 0x0003
88 /* Bits in status_a */
89 #define SA_SIG_DETECT 0x0400
90 #define SA_PREV_LS 0x0300
91 #define SA_PREV_LS_QLS 0x0000
92 #define SA_PREV_LS_MLS 0x0100
93 #define SA_PREV_LS_HLS 0x0200
94 #define SA_PREV_LS_ILS 0x0300
95 #define SA_LINE_ST 0x00e0
96 #define SA_LINE_ST_NLS 0x0000
97 #define SA_LINE_ST_ALS 0x0020
98 #define SA_LINE_ST_ILS4 0x0060
99 #define SA_LINE_ST_QLS 0x0080
100 #define SA_LINE_ST_MLS 0x00a0
101 #define SA_LINE_ST_HLS 0x00c0
102 #define SA_LINE_ST_ILS 0x00e0
103 #define SA_LSM_STATE 0x0010
104 #define SA_UNKN_LINE_ST 0x0008
105 #define SA_SYM_PAIR_CTR 0x0007
107 /* Bits in status_b */
108 #define SB_RF_STATE 0xc000
109 #define SB_RF_STATE_REPEAT 0x0000
110 #define SB_RF_STATE_IDLE 0x4000
111 #define SB_RF_STATE_HALT1 0x8000
112 #define SB_RF_STATE_HALT2 0xc000
113 #define SB_PCI_STATE 0x3000
114 #define SB_PCI_STATE_REMOVED 0x0000
115 #define SB_PCI_STATE_INS_SCR 0x1000
116 #define SB_PCI_STATE_REM_SCR 0x2000
117 #define SB_PCI_STATE_INSERTED 0x3000
118 #define SB_PCI_SCRUB 0x0800
119 #define SB_PCM_STATE 0x0780
120 #define SB_PCM_STATE_OFF 0x0000
121 #define SB_PCM_STATE_BREAK 0x0080
122 #define SB_PCM_STATE_TRACE 0x0100
123 #define SB_PCM_STATE_CONNECT 0x0180
124 #define SB_PCM_STATE_NEXT 0x0200
125 #define SB_PCM_STATE_SIGNAL 0x0280
126 #define SB_PCM_STATE_JOIN 0x0300
127 #define SB_PCM_STATE_VERIFY 0x0380
128 #define SB_PCM_STATE_ACTIVE 0x0400
129 #define SB_PCM_STATE_MAIN 0x0480
130 #define SB_PCM_SIGNALING 0x0040
131 #define SB_LSF 0x0020
132 #define SB_RCF 0x0010
133 #define SB_TCF 0x0008
134 #define SB_BREAK_REASON 0x0007
135 #define SB_BREAK_REASON_NONE 0x0000
136 #define SB_BREAK_REASON_START 0x0001
137 #define SB_BREAK_REASON_T_OUT 0x0002
138 #define SB_BREAK_REASON_NS_MAX 0x0003
139 #define SB_BREAK_REASON_QLS 0x0004
140 #define SB_BREAK_REASON_ILS 0x0005
141 #define SB_BREAK_REASON_HLS 0x0006
143 /* Bits in intr_event and intr_mask */
144 #define IE_NP_ERROR 0x8000
145 #define IE_SIGNAL_OFF 0x4000
146 #define IE_LE_CTR 0x2000
147 #define IE_MINI_CTR 0x1000
148 #define IE_VSYM_CTR 0x0800
149 #define IE_PHY_INVALID 0x0400
150 #define IE_EBUF_ERR 0x0200
151 #define IE_TNE_EXP 0x0100
152 #define IE_TPC_EXP 0x0080
153 #define IE_PCM_ENABLED 0x0040
154 #define IE_PCM_BREAK 0x0020
155 #define IE_SELF_TEST 0x0010
156 #define IE_TRACE_PROP 0x0008
157 #define IE_PCM_CODE 0x0004
158 #define IE_LS_MATCH 0x0002
159 #define IE_PARITY_ERR 0x0001
161 /* Correct value for BIST signature */
162 #define BIST_CORRECT 0x6ecd