arch/sparc/kernel/sun4c_irq.c

   1 /*  sun4c_irq.c
   2  *  arch/sparc/kernel/sun4c_irq.c:
   3  *
   4  *  djhr: Hacked out of irq.c into a CPU dependent version.
   5  *
   6  *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   7  *  Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
   8  *  Copyright (C) 1995 Pete A. Zaitcev (zaitcev@ipmce.su)
   9  *  Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/ptrace.h>
  14 #include <linux/errno.h>
  15 #include <linux/linkage.h>
  16 #include <linux/kernel_stat.h>
  17 #include <linux/signal.h>
  18 #include <linux/sched.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/malloc.h>
  21 #include <linux/init.h>
  22
  23 #include <asm/ptrace.h>
  24 #include <asm/processor.h>
  25 #include <asm/system.h>
  26 #include <asm/psr.h>
  27 #include <asm/vaddrs.h>
  28 #include <asm/timer.h>
  29 #include <asm/openprom.h>
  30 #include <asm/oplib.h>
  31 #include <asm/traps.h>
  32 #include <asm/irq.h>
  33 #include <asm/io.h>
  34 #include <asm/sun4paddr.h>
  35 #include <asm/idprom.h>
  36 #include <asm/machines.h>
  37
  38 /* Pointer to the interrupt enable byte
  39  *
  40  * Dave Redman (djhr@tadpole.co.uk)
  41  * What you may not be aware of is that entry.S requires this variable.
  42  *
  43  *  --- linux_trap_nmi_sun4c --
  44  *
  45  * so don't go making it static, like I tried. sigh.
  46  */
  47 unsigned char *interrupt_enable = 0;
  48
  49 static void sun4c_disable_irq(unsigned int irq_nr)
  50 {
  51         unsigned long flags;
  52         unsigned char current_mask, new_mask;
  53
  54         save_and_cli(flags);
  55         irq_nr &= NR_IRQS;
  56         current_mask = *interrupt_enable;
  57         switch(irq_nr) {
  58         case 1:
  59                 new_mask = ((current_mask) & (~(SUN4C_INT_E1)));
  60                 break;
  61         case 8:
  62                 new_mask = ((current_mask) & (~(SUN4C_INT_E8)));
  63                 break;
  64         case 10:
  65                 new_mask = ((current_mask) & (~(SUN4C_INT_E10)));
  66                 break;
  67         case 14:
  68                 new_mask = ((current_mask) & (~(SUN4C_INT_E14)));
  69                 break;
  70         default:
  71                 restore_flags(flags);
  72                 return;
  73         }
  74         *interrupt_enable = new_mask;
  75         restore_flags(flags);
  76 }
  77
  78 static void sun4c_enable_irq(unsigned int irq_nr)
  79 {
  80         unsigned long flags;
  81         unsigned char current_mask, new_mask;
  82
  83         save_and_cli(flags);
  84         irq_nr &= NR_IRQS;
  85         current_mask = *interrupt_enable;
  86         switch(irq_nr) {
  87         case 1:
  88                 new_mask = ((current_mask) | SUN4C_INT_E1);
  89                 break;
  90         case 8:
  91                 new_mask = ((current_mask) | SUN4C_INT_E8);
  92                 break;
  93         case 10:
  94                 new_mask = ((current_mask) | SUN4C_INT_E10);
  95                 break;
  96         case 14:
  97                 new_mask = ((current_mask) | SUN4C_INT_E14);
  98                 break;
  99         default:
 100                 restore_flags(flags);
 101                 return;
 102         }
 103         *interrupt_enable = new_mask;
 104         restore_flags(flags);
 105 }
 106
 107 #define TIMER_IRQ       10    /* Also at level 14, but we ignore that one. */
 108 #define PROFILE_IRQ     14    /* Level14 ticker.. used by OBP for polling */
 109
 110 volatile struct sun4c_timer_info *sun4c_timers;
 111
 112 #ifdef CONFIG_SUN4
 113 /* This is an ugly hack to work around the
 114    current timer code, and make it work with
 115    the sun4/260 intersil
 116    */
 117 volatile struct sun4c_timer_info sun4_timer;
 118 #endif
 119
 120 static void sun4c_clear_clock_irq(void)
 121 {
 122         volatile unsigned int clear_intr;
 123 #ifdef CONFIG_SUN4
 124         if (idprom->id_machtype == (SM_SUN4 | SM_4_260))
 125           clear_intr = sun4_timer.timer_limit10;
 126         else
 127 #endif
 128         clear_intr = sun4c_timers->timer_limit10;
 129 }
 130
 131 static void sun4c_clear_profile_irq(int cpu)
 132 {
 133         /* Errm.. not sure how to do this.. */
 134 }
 135
 136 static void sun4c_load_profile_irq(int cpu, unsigned int limit)
 137 {
 138         /* Errm.. not sure how to do this.. */
 139 }
 140
 141 __initfunc(static void sun4c_init_timers(void (*counter_fn)(int, void *, struct pt_regs *)))
 142 {
 143         int irq;
 144
 145         /* Map the Timer chip, this is implemented in hardware inside
 146          * the cache chip on the sun4c.
 147          */
 148 #ifdef CONFIG_SUN4
 149         if (idprom->id_machtype == (SM_SUN4 | SM_4_260))
 150                 sun4c_timers = &sun4_timer;
 151         else
 152 #endif
 153         sun4c_timers = sparc_alloc_io (SUN_TIMER_PHYSADDR, 0,
 154                                        sizeof(struct sun4c_timer_info),
 155                                        "timer", 0x0, 0x0);
 156
 157         /* Have the level 10 timer tick at 100HZ.  We don't touch the
 158          * level 14 timer limit since we are letting the prom handle
 159          * them until we have a real console driver so L1-A works.
 160          */
 161         sun4c_timers->timer_limit10 = (((1000000/HZ) + 1) << 10);
 162         master_l10_counter = &sun4c_timers->cur_count10;
 163         master_l10_limit = &sun4c_timers->timer_limit10;
 164
 165         irq = request_irq(TIMER_IRQ,
 166                           counter_fn,
 167                           (SA_INTERRUPT | SA_STATIC_ALLOC),
 168                           "timer", NULL);
 169         if (irq) {
 170                 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
 171                 prom_halt();
 172         }
 173
 174 #if 0
 175         /* This does not work on 4/330 */
 176         sun4c_enable_irq(10);
 177 #endif
 178         claim_ticker14(NULL, PROFILE_IRQ, 0);
 179 }
 180
 181 #ifdef __SMP__
 182 static void sun4c_nop(void) {}
 183 #endif
 184
 185 extern char *sun4m_irq_itoa(unsigned int irq);
 186
 187 __initfunc(void sun4c_init_IRQ(void))
 188 {
 189         struct linux_prom_registers int_regs[2];
 190         int ie_node;
 191
 192         if (ARCH_SUN4) {
 193                 interrupt_enable =
 194                         (char *) sparc_alloc_io(sun4_ie_physaddr, 0,
 195                                                 PAGE_SIZE,
 196                                                 "sun4c_interrupts",
 197                                                 0x0, 0x0);
 198         } else {
 199
 200                 ie_node = prom_searchsiblings (prom_getchild(prom_root_node),
 201                                         "interrupt-enable");
 202                 if(ie_node == 0)
 203                         panic("Cannot find /interrupt-enable node");
 204
 205                 /* Depending on the "address" property is bad news... */
 206                 prom_getproperty(ie_node, "reg", (char *) int_regs, sizeof(int_regs));
 207                 interrupt_enable =
 208                         (char *) sparc_alloc_io(int_regs[0].phys_addr, 0,
 209                                                 int_regs[0].reg_size,
 210                                                 "sun4c_interrupts",
 211                                                 int_regs[0].which_io, 0x0);
 212         }
 213
 214         BTFIXUPSET_CALL(enable_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
 215         BTFIXUPSET_CALL(disable_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
 216         BTFIXUPSET_CALL(enable_pil_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
 217         BTFIXUPSET_CALL(disable_pil_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
 218         BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);
 219         BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP);
 220         BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
 221         BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
 222         init_timers = sun4c_init_timers;
 223 #ifdef __SMP__
 224         BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
 225         BTFIXUPSET_CALL(clear_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
 226         BTFIXUPSET_CALL(set_irq_udt, sun4c_nop, BTFIXUPCALL_NOP);
 227 #endif
 228         *interrupt_enable = (SUN4C_INT_ENABLE);
 229         /* Cannot enable interrupts until OBP ticker is disabled. */
 230 }