?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Import 2.2.5pre2
[davej-history.git] / drivers / sound / sonicvibes.c
blobc2d9774f8a19ce02941355a9ea9e3ba423f4632d
1 /*****************************************************************************/
2
3 /*
4 * sonicvibes.c -- S3 Sonic Vibes audio driver.
5 *
6 * Copyright (C) 1998 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to David C. Niemi
23 *
24 *
25 * Module command line parameters:
26 * none so far
27 *
28 *
29 * Supported devices:
30 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
31 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
32 * /dev/midi simple MIDI UART interface, no ioctl
33 *
34 * The card has both an FM and a Wavetable synth, but I have to figure
35 * out first how to drive them...
36 *
37 * Revision history
38 * 06.05.98 0.1 Initial release
39 * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
40 * First stab at a simple midi interface (no bells&whistles)
41 * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
42 * set_dac_rate in the FMODE_WRITE case in sv_open
43 * Fix hwptr out of bounds (now mpg123 works)
44 * 14.05.98 0.4 Don't allow excessive interrupt rates
45 * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.98 0.6 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.98 0.7 Fix realplayer problems - dac.count issues
50 * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
51 * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
52 * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
53 * hopefully killed the egcs section type conflict
54 * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
55 * reported by Johan Maes <joma@telindus.be>
56 * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
57 * read/write cannot be executed
58 *
59 */
60
61 /*****************************************************************************/
62
63 #include <linux/version.h>
64 #include <linux/module.h>
65 #include <linux/string.h>
66 #include <linux/ioport.h>
67 #include <linux/sched.h>
68 #include <linux/delay.h>
69 #include <linux/sound.h>
70 #include <linux/malloc.h>
71 #include <linux/soundcard.h>
72 #include <linux/pci.h>
73 #include <asm/io.h>
74 #include <asm/dma.h>
75 #include <linux/init.h>
76 #include <linux/poll.h>
77 #include <asm/spinlock.h>
78 #include <asm/uaccess.h>
79 #include <asm/hardirq.h>
80
81 #include "dm.h"
82
83 /* --------------------------------------------------------------------- */
84
85 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
86
87 /* --------------------------------------------------------------------- */
88
89 #ifndef PCI_VENDOR_ID_S3
90 #define PCI_VENDOR_ID_S3 0x5333
91 #endif
92 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
93 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
94 #endif
95
96 #define SV_MAGIC ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
97
98 #define SV_EXTENT_SB 0x10
99 #define SV_EXTENT_ENH 0x10
100 #define SV_EXTENT_SYNTH 0x4
101 #define SV_EXTENT_MIDI 0x4
102 #define SV_EXTENT_GAME 0x8
103 #define SV_EXTENT_DMA 0x10
104
105
106 #define SV_MIDI_DATA 0
107 #define SV_MIDI_COMMAND 1
108 #define SV_MIDI_STATUS 1
109
110 #define SV_DMA_ADDR0 0
111 #define SV_DMA_ADDR1 1
112 #define SV_DMA_ADDR2 2
113 #define SV_DMA_ADDR3 3
114 #define SV_DMA_COUNT0 4
115 #define SV_DMA_COUNT1 5
116 #define SV_DMA_COUNT2 6
117 #define SV_DMA_MODE 0xb
118 #define SV_DMA_RESET 0xd
119 #define SV_DMA_MASK 0xf
120
121 /*
122 * DONT reset the DMA controllers unless you understand
123 * the reset semantics. Assuming reset semantics as in
124 * the 8237 does not work.
125 */
126
127 #define DMA_MODE_AUTOINIT 0x10
128 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
129 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
130
131 #define SV_CODEC_CONTROL 0
132 #define SV_CODEC_INTMASK 1
133 #define SV_CODEC_STATUS 2
134 #define SV_CODEC_IADDR 4
135 #define SV_CODEC_IDATA 5
136
137 #define SV_CCTRL_RESET 0x80
138 #define SV_CCTRL_INTADRIVE 0x20
139 #define SV_CCTRL_WAVETABLE 0x08
140 #define SV_CCTRL_REVERB 0x04
141 #define SV_CCTRL_ENHANCED 0x01
142
143 #define SV_CINTMASK_DMAA 0x01
144 #define SV_CINTMASK_DMAC 0x04
145 #define SV_CINTMASK_SPECIAL 0x08
146 #define SV_CINTMASK_UPDOWN 0x40
147 #define SV_CINTMASK_MIDI 0x80
148
149 #define SV_CSTAT_DMAA 0x01
150 #define SV_CSTAT_DMAC 0x04
151 #define SV_CSTAT_SPECIAL 0x08
152 #define SV_CSTAT_UPDOWN 0x40
153 #define SV_CSTAT_MIDI 0x80
154
155 #define SV_CIADDR_TRD 0x80
156 #define SV_CIADDR_MCE 0x40
157
158 /* codec indirect registers */
159 #define SV_CIMIX_ADCINL 0x00
160 #define SV_CIMIX_ADCINR 0x01
161 #define SV_CIMIX_AUX1INL 0x02
162 #define SV_CIMIX_AUX1INR 0x03
163 #define SV_CIMIX_CDINL 0x04
164 #define SV_CIMIX_CDINR 0x05
165 #define SV_CIMIX_LINEINL 0x06
166 #define SV_CIMIX_LINEINR 0x07
167 #define SV_CIMIX_MICIN 0x08
168 #define SV_CIMIX_SYNTHINL 0x0A
169 #define SV_CIMIX_SYNTHINR 0x0B
170 #define SV_CIMIX_AUX2INL 0x0C
171 #define SV_CIMIX_AUX2INR 0x0D
172 #define SV_CIMIX_ANALOGINL 0x0E
173 #define SV_CIMIX_ANALOGINR 0x0F
174 #define SV_CIMIX_PCMINL 0x10
175 #define SV_CIMIX_PCMINR 0x11
176
177 #define SV_CIGAMECONTROL 0x09
178 #define SV_CIDATAFMT 0x12
179 #define SV_CIENABLE 0x13
180 #define SV_CIUPDOWN 0x14
181 #define SV_CIREVISION 0x15
182 #define SV_CIADCOUTPUT 0x16
183 #define SV_CIDMAABASECOUNT1 0x18
184 #define SV_CIDMAABASECOUNT0 0x19
185 #define SV_CIDMACBASECOUNT1 0x1c
186 #define SV_CIDMACBASECOUNT0 0x1d
187 #define SV_CIPCMSR0 0x1e
188 #define SV_CIPCMSR1 0x1f
189 #define SV_CISYNTHSR0 0x20
190 #define SV_CISYNTHSR1 0x21
191 #define SV_CIADCCLKSOURCE 0x22
192 #define SV_CIADCALTSR 0x23
193 #define SV_CIADCPLLM 0x24
194 #define SV_CIADCPLLN 0x25
195 #define SV_CISYNTHPLLM 0x26
196 #define SV_CISYNTHPLLN 0x27
197 #define SV_CIUARTCONTROL 0x2a
198 #define SV_CIDRIVECONTROL 0x2b
199 #define SV_CISRSSPACE 0x2c
200 #define SV_CISRSCENTER 0x2d
201 #define SV_CIWAVETABLESRC 0x2e
202 #define SV_CIANALOGPWRDOWN 0x30
203 #define SV_CIDIGITALPWRDOWN 0x31
204
205
206 #define SV_CIMIX_ADCSRC_CD 0x20
207 #define SV_CIMIX_ADCSRC_DAC 0x40
208 #define SV_CIMIX_ADCSRC_AUX2 0x60
209 #define SV_CIMIX_ADCSRC_LINE 0x80
210 #define SV_CIMIX_ADCSRC_AUX1 0xa0
211 #define SV_CIMIX_ADCSRC_MIC 0xc0
212 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
213 #define SV_CIMIX_ADCSRC_MASK 0xe0
214
215 #define SV_CFMT_STEREO 0x01
216 #define SV_CFMT_16BIT 0x02
217 #define SV_CFMT_MASK 0x03
218 #define SV_CFMT_ASHIFT 0
219 #define SV_CFMT_CSHIFT 4
220
221 static const unsigned sample_size[] = { 1, 2, 2, 4 };
222 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
223
224 #define SV_CENABLE_PPE 0x4
225 #define SV_CENABLE_RE 0x2
226 #define SV_CENABLE_PE 0x1
227
228
229 /* MIDI buffer sizes */
230
231 #define MIDIINBUF 256
232 #define MIDIOUTBUF 256
233
234 #define FMODE_MIDI_SHIFT 2
235 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
236 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
237
238 #define FMODE_DMFM 0x10
239
240 #define SND_DEV_DSP16 5
241
242 /* --------------------------------------------------------------------- */
243
244 struct sv_state {
245 /* magic */
246 unsigned int magic;
247
248 /* we keep sv cards in a linked list */
249 struct sv_state *next;
250
251 /* soundcore stuff */
252 int dev_audio;
253 int dev_mixer;
254 int dev_midi;
255 int dev_dmfm;
256
257 /* hardware resources */
258 unsigned int iosb, ioenh, iosynth, iomidi, iogame, iodmaa, iodmac, irq;
259
260 /* mixer stuff */
261 struct {
262 unsigned int modcnt;
263 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
264 unsigned short vol[13];
265 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
266 } mix;
267
268 /* wave stuff */
269 unsigned int rateadc, ratedac;
270 unsigned char fmt, enable;
271
272 spinlock_t lock;
273 struct semaphore open_sem;
274 mode_t open_mode;
275 struct wait_queue *open_wait;
276
277 struct dmabuf {
278 void *rawbuf;
279 unsigned buforder;
280 unsigned numfrag;
281 unsigned fragshift;
282 unsigned hwptr, swptr;
283 unsigned total_bytes;
284 int count;
285 unsigned error; /* over/underrun */
286 struct wait_queue *wait;
287 /* redundant, but makes calculations easier */
288 unsigned fragsize;
289 unsigned dmasize;
290 unsigned fragsamples;
291 /* OSS stuff */
292 unsigned mapped:1;
293 unsigned ready:1;
294 unsigned endcleared:1;
295 unsigned ossfragshift;
296 int ossmaxfrags;
297 unsigned subdivision;
298 } dma_dac, dma_adc;
299
300 /* midi stuff */
301 struct {
302 unsigned ird, iwr, icnt;
303 unsigned ord, owr, ocnt;
304 struct wait_queue *iwait;
305 struct wait_queue *owait;
306 struct timer_list timer;
307 unsigned char ibuf[MIDIINBUF];
308 unsigned char obuf[MIDIOUTBUF];
309 } midi;
310 };
311
312 /* --------------------------------------------------------------------- */
313
314 static struct sv_state *devs = NULL;
315 static unsigned long wavetable_mem = 0;
316
317 /* --------------------------------------------------------------------- */
318
319 extern __inline__ unsigned ld2(unsigned int x)
320 {
321 unsigned r = 0;
322
323 if (x >= 0x10000) {
324 x >>= 16;
325 r += 16;
326 }
327 if (x >= 0x100) {
328 x >>= 8;
329 r += 8;
330 }
331 if (x >= 0x10) {
332 x >>= 4;
333 r += 4;
334 }
335 if (x >= 4) {
336 x >>= 2;
337 r += 2;
338 }
339 if (x >= 2)
340 r++;
341 return r;
342 }
343
344 /*
345 * hweightN: returns the hamming weight (i.e. the number
346 * of bits set) of a N-bit word
347 */
348
349 #ifdef hweight32
350 #undef hweight32
351 #endif
352
353 extern __inline__ unsigned int hweight32(unsigned int w)
354 {
355 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
356 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
357 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
358 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
359 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
360 }
361
362 /* --------------------------------------------------------------------- */
363
364 /*
365 * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
366 */
367
368 #undef DMABYTEIO
369
370 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
371 {
372 #ifdef DMABYTEIO
373 unsigned io = s->iodmaa, u;
374
375 count--;
376 for (u = 4; u > 0; u--, addr >>= 8, io++)
377 outb(addr & 0xff, io);
378 for (u = 3; u > 0; u--, count >>= 8, io++)
379 outb(count & 0xff, io);
380 #else /* DMABYTEIO */
381 count--;
382 outl(addr, s->iodmaa + SV_DMA_ADDR0);
383 outl(count, s->iodmaa + SV_DMA_COUNT0);
384 #endif /* DMABYTEIO */
385 outb(0x18, s->iodmaa + SV_DMA_MODE);
386 }
387
388 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
389 {
390 #ifdef DMABYTEIO
391 unsigned io = s->iodmac, u;
392
393 count >>= 1;
394 count--;
395 for (u = 4; u > 0; u--, addr >>= 8, io++)
396 outb(addr & 0xff, io);
397 for (u = 3; u > 0; u--, count >>= 8, io++)
398 outb(count & 0xff, io);
399 #else /* DMABYTEIO */
400 count >>= 1;
401 count--;
402 outl(addr, s->iodmac + SV_DMA_ADDR0);
403 outl(count, s->iodmac + SV_DMA_COUNT0);
404 #endif /* DMABYTEIO */
405 outb(0x14, s->iodmac + SV_DMA_MODE);
406 }
407
408 extern __inline__ unsigned get_dmaa(struct sv_state *s)
409 {
410 #ifdef DMABYTEIO
411 unsigned io = s->iodmaa+6, v = 0, u;
412
413 for (u = 3; u > 0; u--, io--) {
414 v <<= 8;
415 v |= inb(io);
416 }
417 return v + 1;
418 #else /* DMABYTEIO */
419 return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
420 #endif /* DMABYTEIO */
421 }
422
423 extern __inline__ unsigned get_dmac(struct sv_state *s)
424 {
425 #ifdef DMABYTEIO
426 unsigned io = s->iodmac+6, v = 0, u;
427
428 for (u = 3; u > 0; u--, io--) {
429 v <<= 8;
430 v |= inb(io);
431 }
432 return (v + 1) << 1;
433 #else /* DMABYTEIO */
434 return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
435 #endif /* DMABYTEIO */
436 }
437
438 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
439 {
440 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
441 udelay(10);
442 outb(data, s->ioenh + SV_CODEC_IDATA);
443 udelay(10);
444 }
445
446 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
447 {
448 unsigned char v;
449
450 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
451 udelay(10);
452 v = inb(s->ioenh + SV_CODEC_IDATA);
453 udelay(10);
454 return v;
455 }
456
457 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
458 {
459 unsigned long flags;
460
461 spin_lock_irqsave(&s->lock, flags);
462 outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
463 if (mask) {
464 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
465 udelay(10);
466 }
467 s->fmt = (s->fmt & mask) | data;
468 outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
469 udelay(10);
470 outb(0, s->ioenh + SV_CODEC_IADDR);
471 spin_unlock_irqrestore(&s->lock, flags);
472 udelay(10);
473 }
474
475 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
476 {
477 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
478 udelay(10);
479 outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
480 udelay(10);
481 }
482
483 #define REFFREQUENCY 24576000
484 #define ADCMULT 512
485 #define FULLRATE 48000
486
487 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
488 {
489 unsigned long flags;
490 unsigned char r, m, n;
491 unsigned xm, xn, xr, xd, metric = ~0U;
492 /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
493
494 if (rate < 625000/ADCMULT)
495 rate = 625000/ADCMULT;
496 if (rate > 150000000/ADCMULT)
497 rate = 150000000/ADCMULT;
498 /* slight violation of specs, needed for continuous sampling rates */
499 for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
500 for (xn = 3; xn < 35; xn++)
501 for (xm = 3; xm < 130; xm++) {
502 xr = REFFREQUENCY/ADCMULT * xm / xn;
503 xd = abs((signed)(xr - rate));
504 if (xd < metric) {
505 metric = xd;
506 m = xm - 2;
507 n = xn - 2;
508 }
509 }
510 reg &= 0x3f;
511 spin_lock_irqsave(&s->lock, flags);
512 outb(reg, s->ioenh + SV_CODEC_IADDR);
513 udelay(10);
514 outb(m, s->ioenh + SV_CODEC_IDATA);
515 udelay(10);
516 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
517 udelay(10);
518 outb(r | n, s->ioenh + SV_CODEC_IDATA);
519 spin_unlock_irqrestore(&s->lock, flags);
520 udelay(10);
521 return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
522 }
523
524 #if 0
525
526 static unsigned getpll(struct sv_state *s, unsigned char reg)
527 {
528 unsigned long flags;
529 unsigned char m, n;
530
531 reg &= 0x3f;
532 spin_lock_irqsave(&s->lock, flags);
533 outb(reg, s->ioenh + SV_CODEC_IADDR);
534 udelay(10);
535 m = inb(s->ioenh + SV_CODEC_IDATA);
536 udelay(10);
537 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
538 udelay(10);
539 n = inb(s->ioenh + SV_CODEC_IDATA);
540 spin_unlock_irqrestore(&s->lock, flags);
541 udelay(10);
542 return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
543 }
544
545 #endif
546
547 static void set_dac_rate(struct sv_state *s, unsigned rate)
548 {
549 unsigned div;
550 unsigned long flags;
551
552 if (rate > 48000)
553 rate = 48000;
554 if (rate < 4000)
555 rate = 4000;
556 div = (rate * 65536 + FULLRATE/2) / FULLRATE;
557 if (div > 65535)
558 div = 65535;
559 spin_lock_irqsave(&s->lock, flags);
560 wrindir(s, SV_CIPCMSR1, div >> 8);
561 wrindir(s, SV_CIPCMSR0, div);
562 spin_unlock_irqrestore(&s->lock, flags);
563 s->ratedac = (div * FULLRATE + 32768) / 65536;
564 }
565
566 static void set_adc_rate(struct sv_state *s, unsigned rate)
567 {
568 unsigned long flags;
569 unsigned rate1, rate2, div;
570
571 if (rate > 48000)
572 rate = 48000;
573 if (rate < 4000)
574 rate = 4000;
575 rate1 = setpll(s, SV_CIADCPLLM, rate);
576 div = (48000 + rate/2) / rate;
577 if (div > 8)
578 div = 8;
579 rate2 = (48000 + div/2) / div;
580 spin_lock_irqsave(&s->lock, flags);
581 wrindir(s, SV_CIADCALTSR, (div-1) << 4);
582 if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
583 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
584 s->rateadc = rate2;
585 } else {
586 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
587 s->rateadc = rate1;
588 }
589 spin_unlock_irqrestore(&s->lock, flags);
590 }
591
592 /* --------------------------------------------------------------------- */
593
594 extern inline void stop_adc(struct sv_state *s)
595 {
596 unsigned long flags;
597
598 spin_lock_irqsave(&s->lock, flags);
599 s->enable &= ~SV_CENABLE_RE;
600 wrindir(s, SV_CIENABLE, s->enable);
601 spin_unlock_irqrestore(&s->lock, flags);
602 }
603
604 extern inline void stop_dac(struct sv_state *s)
605 {
606 unsigned long flags;
607
608 spin_lock_irqsave(&s->lock, flags);
609 s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
610 wrindir(s, SV_CIENABLE, s->enable);
611 spin_unlock_irqrestore(&s->lock, flags);
612 }
613
614 static void start_dac(struct sv_state *s)
615 {
616 unsigned long flags;
617
618 spin_lock_irqsave(&s->lock, flags);
619 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
620 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
621 wrindir(s, SV_CIENABLE, s->enable);
622 }
623 spin_unlock_irqrestore(&s->lock, flags);
624 }
625
626 static void start_adc(struct sv_state *s)
627 {
628 unsigned long flags;
629
630 spin_lock_irqsave(&s->lock, flags);
631 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
632 && s->dma_adc.ready) {
633 s->enable |= SV_CENABLE_RE;
634 wrindir(s, SV_CIENABLE, s->enable);
635 }
636 spin_unlock_irqrestore(&s->lock, flags);
637 }
638
639 /* --------------------------------------------------------------------- */
640
641 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
642 #define DMABUF_MINORDER 1
643
644 static void dealloc_dmabuf(struct dmabuf *db)
645 {
646 unsigned long map, mapend;
647
648 if (db->rawbuf) {
649 /* undo marking the pages as reserved */
650 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
651 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
652 clear_bit(PG_reserved, &mem_map[map].flags);
653 free_pages((unsigned long)db->rawbuf, db->buforder);
654 }
655 db->rawbuf = NULL;
656 db->mapped = db->ready = 0;
657 }
658
659
660 /* DMAA is used for playback, DMAC is used for recording */
661
662 static int prog_dmabuf(struct sv_state *s, unsigned rec)
663 {
664 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
665 unsigned rate = rec ? s->rateadc : s->ratedac;
666 int order;
667 unsigned bytepersec;
668 unsigned bufs;
669 unsigned long map, mapend;
670 unsigned char fmt;
671 unsigned long flags;
672
673 spin_lock_irqsave(&s->lock, flags);
674 fmt = s->fmt;
675 if (rec) {
676 s->enable &= ~SV_CENABLE_RE;
677 fmt >>= SV_CFMT_CSHIFT;
678 } else {
679 s->enable &= ~SV_CENABLE_PE;
680 fmt >>= SV_CFMT_ASHIFT;
681 }
682 wrindir(s, SV_CIENABLE, s->enable);
683 spin_unlock_irqrestore(&s->lock, flags);
684 fmt &= SV_CFMT_MASK;
685 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
686 if (!db->rawbuf) {
687 db->ready = db->mapped = 0;
688 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER && !db->rawbuf; order--)
689 db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order);
690 if (!db->rawbuf)
691 return -ENOMEM;
692 db->buforder = order;
693 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
694 printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
695 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
696 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
697 printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
698 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
699 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
700 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
701 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
702 set_bit(PG_reserved, &mem_map[map].flags);
703 }
704 bytepersec = rate << sample_shift[fmt];
705 bufs = PAGE_SIZE << db->buforder;
706 if (db->ossfragshift) {
707 if ((1000 << db->ossfragshift) < bytepersec)
708 db->fragshift = ld2(bytepersec/1000);
709 else
710 db->fragshift = db->ossfragshift;
711 } else {
712 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
713 if (db->fragshift < 3)
714 db->fragshift = 3;
715 }
716 db->numfrag = bufs >> db->fragshift;
717 while (db->numfrag < 4 && db->fragshift > 3) {
718 db->fragshift--;
719 db->numfrag = bufs >> db->fragshift;
720 }
721 db->fragsize = 1 << db->fragshift;
722 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
723 db->numfrag = db->ossmaxfrags;
724 db->fragsamples = db->fragsize >> sample_shift[fmt];
725 db->dmasize = db->numfrag << db->fragshift;
726 memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
727 spin_lock_irqsave(&s->lock, flags);
728 if (rec) {
729 set_dmac(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
730 /* program enhanced mode registers */
731 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
732 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
733 } else {
734 set_dmaa(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
735 /* program enhanced mode registers */
736 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
737 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
738 }
739 spin_unlock_irqrestore(&s->lock, flags);
740 db->ready = 1;
741 return 0;
742 }
743
744 extern __inline__ void clear_advance(struct sv_state *s)
745 {
746 unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
747 unsigned char *buf = s->dma_dac.rawbuf;
748 unsigned bsize = s->dma_dac.dmasize;
749 unsigned bptr = s->dma_dac.swptr;
750 unsigned len = s->dma_dac.fragsize;
751
752 if (bptr + len > bsize) {
753 unsigned x = bsize - bptr;
754 memset(buf + bptr, c, x);
755 bptr = 0;
756 len -= x;
757 }
758 memset(buf + bptr, c, len);
759 }
760
761 /* call with spinlock held! */
762 static void sv_update_ptr(struct sv_state *s)
763 {
764 unsigned hwptr;
765 int diff;
766
767 /* update ADC pointer */
768 if (s->dma_adc.ready) {
769 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
770 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
771 s->dma_adc.hwptr = hwptr;
772 s->dma_adc.total_bytes += diff;
773 s->dma_adc.count += diff;
774 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
775 wake_up(&s->dma_adc.wait);
776 if (!s->dma_adc.mapped) {
777 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
778 s->enable &= ~SV_CENABLE_RE;
779 wrindir(s, SV_CIENABLE, s->enable);
780 s->dma_adc.error++;
781 }
782 }
783 }
784 /* update DAC pointer */
785 if (s->dma_dac.ready) {
786 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
787 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
788 s->dma_dac.hwptr = hwptr;
789 s->dma_dac.total_bytes += diff;
790 if (s->dma_dac.mapped) {
791 s->dma_dac.count += diff;
792 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
793 wake_up(&s->dma_dac.wait);
794 } else {
795 s->dma_dac.count -= diff;
796 if (s->dma_dac.count <= 0) {
797 s->enable &= ~SV_CENABLE_PE;
798 wrindir(s, SV_CIENABLE, s->enable);
799 s->dma_dac.error++;
800 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
801 clear_advance(s);
802 s->dma_dac.endcleared = 1;
803 }
804 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
805 wake_up(&s->dma_dac.wait);
806 }
807 }
808 }
809
810 /* hold spinlock for the following! */
811 static void sv_handle_midi(struct sv_state *s)
812 {
813 unsigned char ch;
814 int wake;
815
816 wake = 0;
817 while (!(inb(s->iomidi+1) & 0x80)) {
818 ch = inb(s->iomidi);
819 if (s->midi.icnt < MIDIINBUF) {
820 s->midi.ibuf[s->midi.iwr] = ch;
821 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
822 s->midi.icnt++;
823 }
824 wake = 1;
825 }
826 if (wake)
827 wake_up(&s->midi.iwait);
828 wake = 0;
829 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
830 outb(s->midi.obuf[s->midi.ord], s->iomidi);
831 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
832 s->midi.ocnt--;
833 if (s->midi.ocnt < MIDIOUTBUF-16)
834 wake = 1;
835 }
836 if (wake)
837 wake_up(&s->midi.owait);
838 }
839
840 static void sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
841 {
842 struct sv_state *s = (struct sv_state *)dev_id;
843 unsigned int intsrc;
844
845 /* fastpath out, to ease interrupt sharing */
846 intsrc = inb(s->ioenh + SV_CODEC_STATUS);
847 if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
848 return;
849 spin_lock(&s->lock);
850 sv_update_ptr(s);
851 sv_handle_midi(s);
852 spin_unlock(&s->lock);
853 }
854
855 static void sv_midi_timer(unsigned long data)
856 {
857 struct sv_state *s = (struct sv_state *)data;
858 unsigned long flags;
859
860 spin_lock_irqsave(&s->lock, flags);
861 sv_handle_midi(s);
862 spin_unlock_irqrestore(&s->lock, flags);
863 s->midi.timer.expires = jiffies+1;
864 add_timer(&s->midi.timer);
865 }
866
867 /* --------------------------------------------------------------------- */
868
869 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
870
871 #define VALIDATE_STATE(s) \
872 ({ \
873 if (!(s) || (s)->magic != SV_MAGIC) { \
874 printk(invalid_magic); \
875 return -ENXIO; \
876 } \
877 })
878
879 /* --------------------------------------------------------------------- */
880
881 #define MT_4 1
882 #define MT_5MUTE 2
883 #define MT_4MUTEMONO 3
884 #define MT_6MUTE 4
885
886 static const struct {
887 unsigned left:5;
888 unsigned right:5;
889 unsigned type:3;
890 unsigned rec:3;
891 } mixtable[SOUND_MIXER_NRDEVICES] = {
892 [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL, SV_CIMIX_ADCINR, MT_4, 0 },
893 [SOUND_MIXER_LINE1] = { SV_CIMIX_AUX1INL, SV_CIMIX_AUX1INR, MT_5MUTE, 5 },
894 [SOUND_MIXER_CD] = { SV_CIMIX_CDINL, SV_CIMIX_CDINR, MT_5MUTE, 1 },
895 [SOUND_MIXER_LINE] = { SV_CIMIX_LINEINL, SV_CIMIX_LINEINR, MT_5MUTE, 4 },
896 [SOUND_MIXER_MIC] = { SV_CIMIX_MICIN, SV_CIMIX_ADCINL, MT_4MUTEMONO, 6 },
897 [SOUND_MIXER_SYNTH] = { SV_CIMIX_SYNTHINL, SV_CIMIX_SYNTHINR, MT_5MUTE, 2 },
898 [SOUND_MIXER_LINE2] = { SV_CIMIX_AUX2INL, SV_CIMIX_AUX2INR, MT_5MUTE, 3 },
899 [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE, 7 },
900 [SOUND_MIXER_PCM] = { SV_CIMIX_PCMINL, SV_CIMIX_PCMINR, MT_6MUTE, 0 }
901 };
902
903 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
904
905 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
906 {
907 unsigned long flags;
908 unsigned char l, r, rl, rr;
909
910 spin_lock_irqsave(&s->lock, flags);
911 l = rdindir(s, mixtable[i].left);
912 r = rdindir(s, mixtable[i].right);
913 spin_unlock_irqrestore(&s->lock, flags);
914 switch (mixtable[i].type) {
915 case MT_4:
916 r &= 0xf;
917 l &= 0xf;
918 rl = 10 + 6 * (l & 15);
919 rr = 10 + 6 * (r & 15);
920 break;
921
922 case MT_4MUTEMONO:
923 rl = 55 - 3 * (l & 15);
924 if (r & 0x10)
925 rl += 45;
926 rr = rl;
927 r = l;
928 break;
929
930 case MT_5MUTE:
931 default:
932 rl = 100 - 3 * (l & 31);
933 rr = 100 - 3 * (r & 31);
934 break;
935
936 case MT_6MUTE:
937 rl = 100 - 3 * (l & 63) / 2;
938 rr = 100 - 3 * (r & 63) / 2;
939 break;
940 }
941 if (l & 0x80)
942 rl = 0;
943 if (r & 0x80)
944 rr = 0;
945 return put_user((rr << 8) | rl, arg);
946 }
947
948 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
949
950 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
951 {
952 [SOUND_MIXER_RECLEV] = 1,
953 [SOUND_MIXER_LINE1] = 2,
954 [SOUND_MIXER_CD] = 3,
955 [SOUND_MIXER_LINE] = 4,
956 [SOUND_MIXER_MIC] = 5,
957 [SOUND_MIXER_SYNTH] = 6,
958 [SOUND_MIXER_LINE2] = 7,
959 [SOUND_MIXER_VOLUME] = 8,
960 [SOUND_MIXER_PCM] = 9
961 };
962
963 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
964
965 static unsigned mixer_recmask(struct sv_state *s)
966 {
967 unsigned long flags;
968 int i, j;
969
970 spin_lock_irqsave(&s->lock, flags);
971 j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
972 spin_unlock_irqrestore(&s->lock, flags);
973 j &= 7;
974 for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
975 return 1 << i;
976 }
977
978 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
979 {
980 unsigned long flags;
981 int i, val;
982 unsigned char l, r, rl, rr;
983
984 VALIDATE_STATE(s);
985 if (cmd == SOUND_MIXER_INFO) {
986 mixer_info info;
987 strncpy(info.id, "SonicVibes", sizeof(info.id));
988 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
989 info.modify_counter = s->mix.modcnt;
990 if (copy_to_user((void *)arg, &info, sizeof(info)))
991 return -EFAULT;
992 return 0;
993 }
994 if (cmd == SOUND_OLD_MIXER_INFO) {
995 _old_mixer_info info;
996 strncpy(info.id, "SonicVibes", sizeof(info.id));
997 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
998 if (copy_to_user((void *)arg, &info, sizeof(info)))
999 return -EFAULT;
1000 return 0;
1001 }
1002 if (cmd == OSS_GETVERSION)
1003 return put_user(SOUND_VERSION, (int *)arg);
1004 if (cmd == SOUND_MIXER_PRIVATE1) { /* SRS settings */
1005 get_user_ret(val, (int *)arg, -EFAULT);
1006 spin_lock_irqsave(&s->lock, flags);
1007 if (val & 1) {
1008 if (val & 2) {
1009 l = 4 - ((val >> 2) & 7);
1010 if (l & ~3)
1011 l = 4;
1012 r = 4 - ((val >> 5) & 7);
1013 if (r & ~3)
1014 r = 4;
1015 wrindir(s, SV_CISRSSPACE, l);
1016 wrindir(s, SV_CISRSCENTER, r);
1017 } else
1018 wrindir(s, SV_CISRSSPACE, 0x80);
1019 }
1020 l = rdindir(s, SV_CISRSSPACE);
1021 r = rdindir(s, SV_CISRSCENTER);
1022 spin_unlock_irqrestore(&s->lock, flags);
1023 if (l & 0x80)
1024 return put_user(0, (int *)arg);
1025 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, (int *)arg);
1026 }
1027 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1028 return -EINVAL;
1029 if (_IOC_DIR(cmd) == _IOC_READ) {
1030 switch (_IOC_NR(cmd)) {
1031 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1032 return put_user(mixer_recmask(s), (int *)arg);
1033
1034 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1035 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1036 if (mixtable[i].type)
1037 val |= 1 << i;
1038 return put_user(val, (int *)arg);
1039
1040 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1041 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1042 if (mixtable[i].rec)
1043 val |= 1 << i;
1044 return put_user(val, (int *)arg);
1045
1046 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1047 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1048 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1049 val |= 1 << i;
1050 return put_user(val, (int *)arg);
1051
1052 case SOUND_MIXER_CAPS:
1053 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1054
1055 default:
1056 i = _IOC_NR(cmd);
1057 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1058 return -EINVAL;
1059 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1060 return return_mixval(s, i, (int *)arg);
1061 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1062 if (!volidx[i])
1063 return -EINVAL;
1064 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1065 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1066 }
1067 }
1068 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1069 return -EINVAL;
1070 s->mix.modcnt++;
1071 switch (_IOC_NR(cmd)) {
1072 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1073 get_user_ret(val, (int *)arg, -EFAULT);
1074 i = hweight32(val);
1075 if (i == 0)
1076 return 0; /*val = mixer_recmask(s);*/
1077 else if (i > 1)
1078 val &= ~mixer_recmask(s);
1079 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1080 if (!(val & (1 << i)))
1081 continue;
1082 if (mixtable[i].rec)
1083 break;
1084 }
1085 if (!mixtable[i].rec)
1086 return 0;
1087 spin_lock_irqsave(&s->lock, flags);
1088 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1089 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1090 spin_unlock_irqrestore(&s->lock, flags);
1091 return 0;
1092
1093 default:
1094 i = _IOC_NR(cmd);
1095 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1096 return -EINVAL;
1097 get_user_ret(val, (int *)arg, -EFAULT);
1098 l = val & 0xff;
1099 r = (val >> 8) & 0xff;
1100 if (mixtable[i].type == MT_4MUTEMONO)
1101 l = (r + l) / 2;
1102 if (l > 100)
1103 l = 100;
1104 if (r > 100)
1105 r = 100;
1106 spin_lock_irqsave(&s->lock, flags);
1107 switch (mixtable[i].type) {
1108 case MT_4:
1109 if (l >= 10)
1110 l -= 10;
1111 if (r >= 10)
1112 r -= 10;
1113 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1114 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1115 break;
1116
1117 case MT_4MUTEMONO:
1118 rr = 0;
1119 if (l < 10)
1120 rl = 0x80;
1121 else {
1122 if (l >= 55) {
1123 rr = 0x10;
1124 l -= 45;
1125 }
1126 rl = (55 - l) / 3;
1127 }
1128 wrindir(s, mixtable[i].left, rl);
1129 frobindir(s, mixtable[i].right, ~0x10, rr);
1130 break;
1131
1132 case MT_5MUTE:
1133 if (l < 7)
1134 rl = 0x80;
1135 else
1136 rl = (100 - l) / 3;
1137 if (r < 7)
1138 rr = 0x80;
1139 else
1140 rr = (100 - r) / 3;
1141 wrindir(s, mixtable[i].left, rl);
1142 wrindir(s, mixtable[i].right, rr);
1143 break;
1144
1145 case MT_6MUTE:
1146 if (l < 6)
1147 rl = 0x80;
1148 else
1149 rl = (100 - l) * 2 / 3;
1150 if (r < 6)
1151 rr = 0x80;
1152 else
1153 rr = (100 - r) * 2 / 3;
1154 wrindir(s, mixtable[i].left, rl);
1155 wrindir(s, mixtable[i].right, rr);
1156 break;
1157 }
1158 spin_unlock_irqrestore(&s->lock, flags);
1159 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1160 return return_mixval(s, i, (int *)arg);
1161 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1162 if (!volidx[i])
1163 return -EINVAL;
1164 s->mix.vol[volidx[i]-1] = val;
1165 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1166 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1167 }
1168 }
1169
1170 /* --------------------------------------------------------------------- */
1171
1172 static loff_t sv_llseek(struct file *file, loff_t offset, int origin)
1173 {
1174 return -ESPIPE;
1175 }
1176
1177 /* --------------------------------------------------------------------- */
1178
1179 static int sv_open_mixdev(struct inode *inode, struct file *file)
1180 {
1181 int minor = MINOR(inode->i_rdev);
1182 struct sv_state *s = devs;
1183
1184 while (s && s->dev_mixer != minor)
1185 s = s->next;
1186 if (!s)
1187 return -ENODEV;
1188 VALIDATE_STATE(s);
1189 file->private_data = s;
1190 MOD_INC_USE_COUNT;
1191 return 0;
1192 }
1193
1194 static int sv_release_mixdev(struct inode *inode, struct file *file)
1195 {
1196 struct sv_state *s = (struct sv_state *)file->private_data;
1197
1198 VALIDATE_STATE(s);
1199 MOD_DEC_USE_COUNT;
1200 return 0;
1201 }
1202
1203 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1204 {
1205 return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1206 }
1207
1208 static /*const*/ struct file_operations sv_mixer_fops = {
1209 &sv_llseek,
1210 NULL, /* read */
1211 NULL, /* write */
1212 NULL, /* readdir */
1213 NULL, /* poll */
1214 &sv_ioctl_mixdev,
1215 NULL, /* mmap */
1216 &sv_open_mixdev,
1217 NULL, /* flush */
1218 &sv_release_mixdev,
1219 NULL, /* fsync */
1220 NULL, /* fasync */
1221 NULL, /* check_media_change */
1222 NULL, /* revalidate */
1223 NULL, /* lock */
1224 };
1225
1226 /* --------------------------------------------------------------------- */
1227
1228 static int drain_dac(struct sv_state *s, int nonblock)
1229 {
1230 struct wait_queue wait = { current, NULL };
1231 unsigned long flags;
1232 int count, tmo;
1233
1234 if (s->dma_dac.mapped || !s->dma_dac.ready)
1235 return 0;
1236 current->state = TASK_INTERRUPTIBLE;
1237 add_wait_queue(&s->dma_dac.wait, &wait);
1238 for (;;) {
1239 spin_lock_irqsave(&s->lock, flags);
1240 count = s->dma_dac.count;
1241 spin_unlock_irqrestore(&s->lock, flags);
1242 if (count <= 0)
1243 break;
1244 if (signal_pending(current))
1245 break;
1246 if (nonblock) {
1247 remove_wait_queue(&s->dma_dac.wait, &wait);
1248 current->state = TASK_RUNNING;
1249 return -EBUSY;
1250 }
1251 tmo = (count * HZ) / s->ratedac;
1252 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1253 if (!schedule_timeout(tmo ? : 1) && tmo)
1254 printk(KERN_DEBUG "sv: dma timed out??\n");
1255 }
1256 remove_wait_queue(&s->dma_dac.wait, &wait);
1257 current->state = TASK_RUNNING;
1258 if (signal_pending(current))
1259 return -ERESTARTSYS;
1260 return 0;
1261 }
1262
1263 /* --------------------------------------------------------------------- */
1264
1265 static ssize_t sv_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1266 {
1267 struct sv_state *s = (struct sv_state *)file->private_data;
1268 ssize_t ret;
1269 unsigned long flags;
1270 unsigned swptr;
1271 int cnt;
1272
1273 VALIDATE_STATE(s);
1274 if (ppos != &file->f_pos)
1275 return -ESPIPE;
1276 if (s->dma_adc.mapped)
1277 return -ENXIO;
1278 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1279 return ret;
1280 if (!access_ok(VERIFY_WRITE, buffer, count))
1281 return -EFAULT;
1282 ret = 0;
1283 #if 0
1284 spin_lock_irqsave(&s->lock, flags);
1285 sv_update_ptr(s);
1286 spin_unlock_irqrestore(&s->lock, flags);
1287 #endif
1288 while (count > 0) {
1289 spin_lock_irqsave(&s->lock, flags);
1290 swptr = s->dma_adc.swptr;
1291 cnt = s->dma_adc.dmasize-swptr;
1292 if (s->dma_adc.count < cnt)
1293 cnt = s->dma_adc.count;
1294 spin_unlock_irqrestore(&s->lock, flags);
1295 if (cnt > count)
1296 cnt = count;
1297 if (cnt <= 0) {
1298 start_adc(s);
1299 if (file->f_flags & O_NONBLOCK)
1300 return ret ? ret : -EAGAIN;
1301 interruptible_sleep_on(&s->dma_adc.wait);
1302 if (signal_pending(current))
1303 return ret ? ret : -ERESTARTSYS;
1304 continue;
1305 }
1306 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1307 return ret ? ret : -EFAULT;
1308 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1309 spin_lock_irqsave(&s->lock, flags);
1310 s->dma_adc.swptr = swptr;
1311 s->dma_adc.count -= cnt;
1312 spin_unlock_irqrestore(&s->lock, flags);
1313 count -= cnt;
1314 buffer += cnt;
1315 ret += cnt;
1316 start_adc(s);
1317 }
1318 return ret;
1319 }
1320
1321 static ssize_t sv_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1322 {
1323 struct sv_state *s = (struct sv_state *)file->private_data;
1324 ssize_t ret;
1325 unsigned long flags;
1326 unsigned swptr;
1327 int cnt;
1328
1329 VALIDATE_STATE(s);
1330 if (ppos != &file->f_pos)
1331 return -ESPIPE;
1332 if (s->dma_dac.mapped)
1333 return -ENXIO;
1334 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1335 return ret;
1336 if (!access_ok(VERIFY_READ, buffer, count))
1337 return -EFAULT;
1338 ret = 0;
1339 #if 0
1340 spin_lock_irqsave(&s->lock, flags);
1341 sv_update_ptr(s);
1342 spin_unlock_irqrestore(&s->lock, flags);
1343 #endif
1344 while (count > 0) {
1345 spin_lock_irqsave(&s->lock, flags);
1346 if (s->dma_dac.count < 0) {
1347 s->dma_dac.count = 0;
1348 s->dma_dac.swptr = s->dma_dac.hwptr;
1349 }
1350 swptr = s->dma_dac.swptr;
1351 cnt = s->dma_dac.dmasize-swptr;
1352 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1353 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1354 spin_unlock_irqrestore(&s->lock, flags);
1355 if (cnt > count)
1356 cnt = count;
1357 if (cnt <= 0) {
1358 start_dac(s);
1359 if (file->f_flags & O_NONBLOCK)
1360 return ret ? ret : -EAGAIN;
1361 interruptible_sleep_on(&s->dma_dac.wait);
1362 if (signal_pending(current))
1363 return ret ? ret : -ERESTARTSYS;
1364 continue;
1365 }
1366 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1367 return ret ? ret : -EFAULT;
1368 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1369 spin_lock_irqsave(&s->lock, flags);
1370 s->dma_dac.swptr = swptr;
1371 s->dma_dac.count += cnt;
1372 s->dma_dac.endcleared = 0;
1373 spin_unlock_irqrestore(&s->lock, flags);
1374 count -= cnt;
1375 buffer += cnt;
1376 ret += cnt;
1377 start_dac(s);
1378 }
1379 return ret;
1380 }
1381
1382 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1383 {
1384 struct sv_state *s = (struct sv_state *)file->private_data;
1385 unsigned long flags;
1386 unsigned int mask = 0;
1387
1388 VALIDATE_STATE(s);
1389 if (file->f_mode & FMODE_WRITE)
1390 poll_wait(file, &s->dma_dac.wait, wait);
1391 if (file->f_mode & FMODE_READ)
1392 poll_wait(file, &s->dma_adc.wait, wait);
1393 spin_lock_irqsave(&s->lock, flags);
1394 sv_update_ptr(s);
1395 if (file->f_mode & FMODE_READ) {
1396 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1397 mask |= POLLIN | POLLRDNORM;
1398 }
1399 if (file->f_mode & FMODE_WRITE) {
1400 if (s->dma_dac.mapped) {
1401 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1402 mask |= POLLOUT | POLLWRNORM;
1403 } else {
1404 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1405 mask |= POLLOUT | POLLWRNORM;
1406 }
1407 }
1408 spin_unlock_irqrestore(&s->lock, flags);
1409 return mask;
1410 }
1411
1412 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1413 {
1414 struct sv_state *s = (struct sv_state *)file->private_data;
1415 struct dmabuf *db;
1416 int ret;
1417 unsigned long size;
1418
1419 VALIDATE_STATE(s);
1420 if (vma->vm_flags & VM_WRITE) {
1421 if ((ret = prog_dmabuf(s, 1)) != 0)
1422 return ret;
1423 db = &s->dma_dac;
1424 } else if (vma->vm_flags & VM_READ) {
1425 if ((ret = prog_dmabuf(s, 0)) != 0)
1426 return ret;
1427 db = &s->dma_adc;
1428 } else
1429 return -EINVAL;
1430 if (vma->vm_offset != 0)
1431 return -EINVAL;
1432 size = vma->vm_end - vma->vm_start;
1433 if (size > (PAGE_SIZE << db->buforder))
1434 return -EINVAL;
1435 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1436 return -EAGAIN;
1437 db->mapped = 1;
1438 return 0;
1439 }
1440
1441 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1442 {
1443 struct sv_state *s = (struct sv_state *)file->private_data;
1444 unsigned long flags;
1445 audio_buf_info abinfo;
1446 count_info cinfo;
1447 int val, mapped, ret;
1448 unsigned char fmtm, fmtd;
1449
1450 VALIDATE_STATE(s);
1451 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1452 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1453 switch (cmd) {
1454 case OSS_GETVERSION:
1455 return put_user(SOUND_VERSION, (int *)arg);
1456
1457 case SNDCTL_DSP_SYNC:
1458 if (file->f_mode & FMODE_WRITE)
1459 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1460 return 0;
1461
1462 case SNDCTL_DSP_SETDUPLEX:
1463 return 0;
1464
1465 case SNDCTL_DSP_GETCAPS:
1466 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1467
1468 case SNDCTL_DSP_RESET:
1469 if (file->f_mode & FMODE_WRITE) {
1470 stop_dac(s);
1471 synchronize_irq();
1472 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1473 }
1474 if (file->f_mode & FMODE_READ) {
1475 stop_adc(s);
1476 synchronize_irq();
1477 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1478 }
1479 return 0;
1480
1481 case SNDCTL_DSP_SPEED:
1482 get_user_ret(val, (int *)arg, -EFAULT);
1483 if (val >= 0) {
1484 if (file->f_mode & FMODE_READ) {
1485 stop_adc(s);
1486 s->dma_adc.ready = 0;
1487 set_adc_rate(s, val);
1488 }
1489 if (file->f_mode & FMODE_WRITE) {
1490 stop_dac(s);
1491 s->dma_dac.ready = 0;
1492 set_dac_rate(s, val);
1493 }
1494 }
1495 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1496
1497 case SNDCTL_DSP_STEREO:
1498 get_user_ret(val, (int *)arg, -EFAULT);
1499 fmtd = 0;
1500 fmtm = ~0;
1501 if (file->f_mode & FMODE_READ) {
1502 stop_adc(s);
1503 s->dma_adc.ready = 0;
1504 if (val)
1505 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1506 else
1507 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1508 }
1509 if (file->f_mode & FMODE_WRITE) {
1510 stop_dac(s);
1511 s->dma_dac.ready = 0;
1512 if (val)
1513 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1514 else
1515 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1516 }
1517 set_fmt(s, fmtm, fmtd);
1518 return 0;
1519
1520 case SNDCTL_DSP_CHANNELS:
1521 get_user_ret(val, (int *)arg, -EFAULT);
1522 if (val != 0) {
1523 fmtd = 0;
1524 fmtm = ~0;
1525 if (file->f_mode & FMODE_READ) {
1526 stop_adc(s);
1527 s->dma_adc.ready = 0;
1528 if (val >= 2)
1529 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1530 else
1531 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1532 }
1533 if (file->f_mode & FMODE_WRITE) {
1534 stop_dac(s);
1535 s->dma_dac.ready = 0;
1536 if (val >= 2)
1537 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1538 else
1539 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1540 }
1541 set_fmt(s, fmtm, fmtd);
1542 }
1543 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1544 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1545
1546 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1547 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1548
1549 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1550 get_user_ret(val, (int *)arg, -EFAULT);
1551 if (val != AFMT_QUERY) {
1552 fmtd = 0;
1553 fmtm = ~0;
1554 if (file->f_mode & FMODE_READ) {
1555 stop_adc(s);
1556 s->dma_adc.ready = 0;
1557 if (val == AFMT_S16_LE)
1558 fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1559 else
1560 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1561 }
1562 if (file->f_mode & FMODE_WRITE) {
1563 stop_dac(s);
1564 s->dma_dac.ready = 0;
1565 if (val == AFMT_S16_LE)
1566 fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1567 else
1568 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1569 }
1570 set_fmt(s, fmtm, fmtd);
1571 }
1572 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1573 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1574
1575 case SNDCTL_DSP_POST:
1576 return 0;
1577
1578 case SNDCTL_DSP_GETTRIGGER:
1579 val = 0;
1580 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1581 val |= PCM_ENABLE_INPUT;
1582 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1583 val |= PCM_ENABLE_OUTPUT;
1584 return put_user(val, (int *)arg);
1585
1586 case SNDCTL_DSP_SETTRIGGER:
1587 get_user_ret(val, (int *)arg, -EFAULT);
1588 if (file->f_mode & FMODE_READ) {
1589 if (val & PCM_ENABLE_INPUT) {
1590 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1591 return ret;
1592 start_adc(s);
1593 } else
1594 stop_adc(s);
1595 }
1596 if (file->f_mode & FMODE_WRITE) {
1597 if (val & PCM_ENABLE_OUTPUT) {
1598 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1599 return ret;
1600 start_dac(s);
1601 } else
1602 stop_dac(s);
1603 }
1604 return 0;
1605
1606 case SNDCTL_DSP_GETOSPACE:
1607 if (!(file->f_mode & FMODE_WRITE))
1608 return -EINVAL;
1609 if (!(s->enable & SV_CENABLE_PE) && (val = prog_dmabuf(s, 0)) != 0)
1610 return val;
1611 spin_lock_irqsave(&s->lock, flags);
1612 sv_update_ptr(s);
1613 abinfo.fragsize = s->dma_dac.fragsize;
1614 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1615 abinfo.fragstotal = s->dma_dac.numfrag;
1616 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1617 spin_unlock_irqrestore(&s->lock, flags);
1618 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1619
1620 case SNDCTL_DSP_GETISPACE:
1621 if (!(file->f_mode & FMODE_READ))
1622 return -EINVAL;
1623 if (!(s->enable & SV_CENABLE_RE) && (val = prog_dmabuf(s, 1)) != 0)
1624 return val;
1625 spin_lock_irqsave(&s->lock, flags);
1626 sv_update_ptr(s);
1627 abinfo.fragsize = s->dma_adc.fragsize;
1628 abinfo.bytes = s->dma_adc.count;
1629 abinfo.fragstotal = s->dma_adc.numfrag;
1630 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1631 spin_unlock_irqrestore(&s->lock, flags);
1632 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1633
1634 case SNDCTL_DSP_NONBLOCK:
1635 file->f_flags |= O_NONBLOCK;
1636 return 0;
1637
1638 case SNDCTL_DSP_GETODELAY:
1639 if (!(file->f_mode & FMODE_WRITE))
1640 return -EINVAL;
1641 spin_lock_irqsave(&s->lock, flags);
1642 sv_update_ptr(s);
1643 val = s->dma_dac.count;
1644 spin_unlock_irqrestore(&s->lock, flags);
1645 return put_user(val, (int *)arg);
1646
1647 case SNDCTL_DSP_GETIPTR:
1648 if (!(file->f_mode & FMODE_READ))
1649 return -EINVAL;
1650 spin_lock_irqsave(&s->lock, flags);
1651 sv_update_ptr(s);
1652 cinfo.bytes = s->dma_adc.total_bytes;
1653 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1654 cinfo.ptr = s->dma_adc.hwptr;
1655 if (s->dma_adc.mapped)
1656 s->dma_adc.count &= s->dma_adc.fragsize-1;
1657 spin_unlock_irqrestore(&s->lock, flags);
1658 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1659
1660 case SNDCTL_DSP_GETOPTR:
1661 if (!(file->f_mode & FMODE_WRITE))
1662 return -EINVAL;
1663 spin_lock_irqsave(&s->lock, flags);
1664 sv_update_ptr(s);
1665 cinfo.bytes = s->dma_dac.total_bytes;
1666 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1667 cinfo.ptr = s->dma_dac.hwptr;
1668 if (s->dma_dac.mapped)
1669 s->dma_dac.count &= s->dma_dac.fragsize-1;
1670 spin_unlock_irqrestore(&s->lock, flags);
1671 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1672
1673 case SNDCTL_DSP_GETBLKSIZE:
1674 if (file->f_mode & FMODE_WRITE) {
1675 if ((val = prog_dmabuf(s, 0)))
1676 return val;
1677 return put_user(s->dma_dac.fragsize, (int *)arg);
1678 }
1679 if ((val = prog_dmabuf(s, 1)))
1680 return val;
1681 return put_user(s->dma_adc.fragsize, (int *)arg);
1682
1683 case SNDCTL_DSP_SETFRAGMENT:
1684 get_user_ret(val, (int *)arg, -EFAULT);
1685 if (file->f_mode & FMODE_READ) {
1686 s->dma_adc.ossfragshift = val & 0xffff;
1687 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1688 if (s->dma_adc.ossfragshift < 4)
1689 s->dma_adc.ossfragshift = 4;
1690 if (s->dma_adc.ossfragshift > 15)
1691 s->dma_adc.ossfragshift = 15;
1692 if (s->dma_adc.ossmaxfrags < 4)
1693 s->dma_adc.ossmaxfrags = 4;
1694 }
1695 if (file->f_mode & FMODE_WRITE) {
1696 s->dma_dac.ossfragshift = val & 0xffff;
1697 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1698 if (s->dma_dac.ossfragshift < 4)
1699 s->dma_dac.ossfragshift = 4;
1700 if (s->dma_dac.ossfragshift > 15)
1701 s->dma_dac.ossfragshift = 15;
1702 if (s->dma_dac.ossmaxfrags < 4)
1703 s->dma_dac.ossmaxfrags = 4;
1704 }
1705 return 0;
1706
1707 case SNDCTL_DSP_SUBDIVIDE:
1708 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1709 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1710 return -EINVAL;
1711 get_user_ret(val, (int *)arg, -EFAULT);
1712 if (val != 1 && val != 2 && val != 4)
1713 return -EINVAL;
1714 if (file->f_mode & FMODE_READ)
1715 s->dma_adc.subdivision = val;
1716 if (file->f_mode & FMODE_WRITE)
1717 s->dma_dac.subdivision = val;
1718 return 0;
1719
1720 case SOUND_PCM_WRITE_FILTER:
1721 case SNDCTL_DSP_SETSYNCRO:
1722 case SOUND_PCM_READ_RATE:
1723 case SOUND_PCM_READ_CHANNELS:
1724 case SOUND_PCM_READ_BITS:
1725 case SOUND_PCM_READ_FILTER:
1726 return -EINVAL;
1727
1728 }
1729 return mixer_ioctl(s, cmd, arg);
1730 }
1731
1732 static int sv_open(struct inode *inode, struct file *file)
1733 {
1734 int minor = MINOR(inode->i_rdev);
1735 struct sv_state *s = devs;
1736 unsigned char fmtm = ~0, fmts = 0;
1737
1738 while (s && ((s->dev_audio ^ minor) & ~0xf))
1739 s = s->next;
1740 if (!s)
1741 return -ENODEV;
1742 VALIDATE_STATE(s);
1743 file->private_data = s;
1744 /* wait for device to become free */
1745 down(&s->open_sem);
1746 while (s->open_mode & file->f_mode) {
1747 if (file->f_flags & O_NONBLOCK) {
1748 up(&s->open_sem);
1749 return -EBUSY;
1750 }
1751 up(&s->open_sem);
1752 interruptible_sleep_on(&s->open_wait);
1753 if (signal_pending(current))
1754 return -ERESTARTSYS;
1755 down(&s->open_sem);
1756 }
1757 if (file->f_mode & FMODE_READ) {
1758 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1759 if ((minor & 0xf) == SND_DEV_DSP16)
1760 fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1761 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1762 set_adc_rate(s, 8000);
1763 }
1764 if (file->f_mode & FMODE_WRITE) {
1765 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1766 if ((minor & 0xf) == SND_DEV_DSP16)
1767 fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1768 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1769 set_dac_rate(s, 8000);
1770 }
1771 set_fmt(s, fmtm, fmts);
1772 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1773 up(&s->open_sem);
1774 MOD_INC_USE_COUNT;
1775 return 0;
1776 }
1777
1778 static int sv_release(struct inode *inode, struct file *file)
1779 {
1780 struct sv_state *s = (struct sv_state *)file->private_data;
1781
1782 VALIDATE_STATE(s);
1783 if (file->f_mode & FMODE_WRITE)
1784 drain_dac(s, file->f_flags & O_NONBLOCK);
1785 down(&s->open_sem);
1786 if (file->f_mode & FMODE_WRITE) {
1787 stop_dac(s);
1788 dealloc_dmabuf(&s->dma_dac);
1789 }
1790 if (file->f_mode & FMODE_READ) {
1791 stop_adc(s);
1792 dealloc_dmabuf(&s->dma_adc);
1793 }
1794 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1795 up(&s->open_sem);
1796 wake_up(&s->open_wait);
1797 MOD_DEC_USE_COUNT;
1798 return 0;
1799 }
1800
1801 static /*const*/ struct file_operations sv_audio_fops = {
1802 &sv_llseek,
1803 &sv_read,
1804 &sv_write,
1805 NULL, /* readdir */
1806 &sv_poll,
1807 &sv_ioctl,
1808 &sv_mmap,
1809 &sv_open,
1810 NULL, /* flush */
1811 &sv_release,
1812 NULL, /* fsync */
1813 NULL, /* fasync */
1814 NULL, /* check_media_change */
1815 NULL, /* revalidate */
1816 NULL, /* lock */
1817 };
1818
1819 /* --------------------------------------------------------------------- */
1820
1821 static ssize_t sv_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1822 {
1823 struct sv_state *s = (struct sv_state *)file->private_data;
1824 ssize_t ret;
1825 unsigned long flags;
1826 unsigned ptr;
1827 int cnt;
1828
1829 VALIDATE_STATE(s);
1830 if (ppos != &file->f_pos)
1831 return -ESPIPE;
1832 if (!access_ok(VERIFY_WRITE, buffer, count))
1833 return -EFAULT;
1834 ret = 0;
1835 while (count > 0) {
1836 spin_lock_irqsave(&s->lock, flags);
1837 ptr = s->midi.ird;
1838 cnt = MIDIINBUF - ptr;
1839 if (s->midi.icnt < cnt)
1840 cnt = s->midi.icnt;
1841 spin_unlock_irqrestore(&s->lock, flags);
1842 if (cnt > count)
1843 cnt = count;
1844 if (cnt <= 0) {
1845 if (file->f_flags & O_NONBLOCK)
1846 return ret ? ret : -EAGAIN;
1847 interruptible_sleep_on(&s->midi.iwait);
1848 if (signal_pending(current))
1849 return ret ? ret : -ERESTARTSYS;
1850 continue;
1851 }
1852 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
1853 return ret ? ret : -EFAULT;
1854 ptr = (ptr + cnt) % MIDIINBUF;
1855 spin_lock_irqsave(&s->lock, flags);
1856 s->midi.ird = ptr;
1857 s->midi.icnt -= cnt;
1858 spin_unlock_irqrestore(&s->lock, flags);
1859 count -= cnt;
1860 buffer += cnt;
1861 ret += cnt;
1862 }
1863 return ret;
1864 }
1865
1866 static ssize_t sv_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1867 {
1868 struct sv_state *s = (struct sv_state *)file->private_data;
1869 ssize_t ret;
1870 unsigned long flags;
1871 unsigned ptr;
1872 int cnt;
1873
1874 VALIDATE_STATE(s);
1875 if (ppos != &file->f_pos)
1876 return -ESPIPE;
1877 if (!access_ok(VERIFY_READ, buffer, count))
1878 return -EFAULT;
1879 ret = 0;
1880 while (count > 0) {
1881 spin_lock_irqsave(&s->lock, flags);
1882 ptr = s->midi.owr;
1883 cnt = MIDIOUTBUF - ptr;
1884 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1885 cnt = MIDIOUTBUF - s->midi.ocnt;
1886 if (cnt <= 0)
1887 sv_handle_midi(s);
1888 spin_unlock_irqrestore(&s->lock, flags);
1889 if (cnt > count)
1890 cnt = count;
1891 if (cnt <= 0) {
1892 if (file->f_flags & O_NONBLOCK)
1893 return ret ? ret : -EAGAIN;
1894 interruptible_sleep_on(&s->midi.owait);
1895 if (signal_pending(current))
1896 return ret ? ret : -ERESTARTSYS;
1897 continue;
1898 }
1899 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
1900 return ret ? ret : -EFAULT;
1901 ptr = (ptr + cnt) % MIDIOUTBUF;
1902 spin_lock_irqsave(&s->lock, flags);
1903 s->midi.owr = ptr;
1904 s->midi.ocnt += cnt;
1905 spin_unlock_irqrestore(&s->lock, flags);
1906 count -= cnt;
1907 buffer += cnt;
1908 ret += cnt;
1909 spin_lock_irqsave(&s->lock, flags);
1910 sv_handle_midi(s);
1911 spin_unlock_irqrestore(&s->lock, flags);
1912 }
1913 return ret;
1914 }
1915
1916 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
1917 {
1918 struct sv_state *s = (struct sv_state *)file->private_data;
1919 unsigned long flags;
1920 unsigned int mask = 0;
1921
1922 VALIDATE_STATE(s);
1923 if (file->f_mode & FMODE_WRITE)
1924 poll_wait(file, &s->midi.owait, wait);
1925 if (file->f_mode & FMODE_READ)
1926 poll_wait(file, &s->midi.iwait, wait);
1927 spin_lock_irqsave(&s->lock, flags);
1928 if (file->f_mode & FMODE_READ) {
1929 if (s->midi.icnt > 0)
1930 mask |= POLLIN | POLLRDNORM;
1931 }
1932 if (file->f_mode & FMODE_WRITE) {
1933 if (s->midi.ocnt < MIDIOUTBUF)
1934 mask |= POLLOUT | POLLWRNORM;
1935 }
1936 spin_unlock_irqrestore(&s->lock, flags);
1937 return mask;
1938 }
1939
1940 static int sv_midi_open(struct inode *inode, struct file *file)
1941 {
1942 int minor = MINOR(inode->i_rdev);
1943 struct sv_state *s = devs;
1944 unsigned long flags;
1945
1946 while (s && s->dev_midi != minor)
1947 s = s->next;
1948 if (!s)
1949 return -ENODEV;
1950 VALIDATE_STATE(s);
1951 file->private_data = s;
1952 /* wait for device to become free */
1953 down(&s->open_sem);
1954 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1955 if (file->f_flags & O_NONBLOCK) {
1956 up(&s->open_sem);
1957 return -EBUSY;
1958 }
1959 up(&s->open_sem);
1960 interruptible_sleep_on(&s->open_wait);
1961 if (signal_pending(current))
1962 return -ERESTARTSYS;
1963 down(&s->open_sem);
1964 }
1965 spin_lock_irqsave(&s->lock, flags);
1966 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1967 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1968 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1969 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
1970 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
1971 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
1972 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
1973 outb(0xff, s->iomidi+1); /* reset command */
1974 outb(0x3f, s->iomidi+1); /* uart command */
1975 if (!(inb(s->iomidi+1) & 0x80))
1976 inb(s->iomidi);
1977 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1978 init_timer(&s->midi.timer);
1979 s->midi.timer.expires = jiffies+1;
1980 s->midi.timer.data = (unsigned long)s;
1981 s->midi.timer.function = sv_midi_timer;
1982 add_timer(&s->midi.timer);
1983 }
1984 if (file->f_mode & FMODE_READ) {
1985 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1986 }
1987 if (file->f_mode & FMODE_WRITE) {
1988 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1989 }
1990 spin_unlock_irqrestore(&s->lock, flags);
1991 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1992 up(&s->open_sem);
1993 MOD_INC_USE_COUNT;
1994 return 0;
1995 }
1996
1997 static int sv_midi_release(struct inode *inode, struct file *file)
1998 {
1999 struct sv_state *s = (struct sv_state *)file->private_data;
2000 struct wait_queue wait = { current, NULL };
2001 unsigned long flags;
2002 unsigned count, tmo;
2003
2004 VALIDATE_STATE(s);
2005
2006 if (file->f_mode & FMODE_WRITE) {
2007 current->state = TASK_INTERRUPTIBLE;
2008 add_wait_queue(&s->midi.owait, &wait);
2009 for (;;) {
2010 spin_lock_irqsave(&s->lock, flags);
2011 count = s->midi.ocnt;
2012 spin_unlock_irqrestore(&s->lock, flags);
2013 if (count <= 0)
2014 break;
2015 if (signal_pending(current))
2016 break;
2017 if (file->f_flags & O_NONBLOCK) {
2018 remove_wait_queue(&s->midi.owait, &wait);
2019 current->state = TASK_RUNNING;
2020 return -EBUSY;
2021 }
2022 tmo = (count * HZ) / 3100;
2023 if (!schedule_timeout(tmo ? : 1) && tmo)
2024 printk(KERN_DEBUG "sv: midi timed out??\n");
2025 }
2026 remove_wait_queue(&s->midi.owait, &wait);
2027 current->state = TASK_RUNNING;
2028 }
2029 down(&s->open_sem);
2030 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2031 spin_lock_irqsave(&s->lock, flags);
2032 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2033 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2034 del_timer(&s->midi.timer);
2035 }
2036 spin_unlock_irqrestore(&s->lock, flags);
2037 up(&s->open_sem);
2038 wake_up(&s->open_wait);
2039 MOD_DEC_USE_COUNT;
2040 return 0;
2041 }
2042
2043 static /*const*/ struct file_operations sv_midi_fops = {
2044 &sv_llseek,
2045 &sv_midi_read,
2046 &sv_midi_write,
2047 NULL, /* readdir */
2048 &sv_midi_poll,
2049 NULL, /* ioctl */
2050 NULL, /* mmap */
2051 &sv_midi_open,
2052 NULL, /* flush */
2053 &sv_midi_release,
2054 NULL, /* fsync */
2055 NULL, /* fasync */
2056 NULL, /* check_media_change */
2057 NULL, /* revalidate */
2058 NULL, /* lock */
2059 };
2060
2061 /* --------------------------------------------------------------------- */
2062
2063 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2064 {
2065 static const unsigned char op_offset[18] = {
2066 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2067 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2068 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2069 };
2070 struct sv_state *s = (struct sv_state *)file->private_data;
2071 struct dm_fm_voice v;
2072 struct dm_fm_note n;
2073 struct dm_fm_params p;
2074 unsigned int io;
2075 unsigned int regb;
2076
2077 switch (cmd) {
2078 case FM_IOCTL_RESET:
2079 for (regb = 0xb0; regb < 0xb9; regb++) {
2080 outb(regb, s->iosynth);
2081 outb(0, s->iosynth+1);
2082 outb(regb, s->iosynth+2);
2083 outb(0, s->iosynth+3);
2084 }
2085 return 0;
2086
2087 case FM_IOCTL_PLAY_NOTE:
2088 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2089 return -EFAULT;
2090 if (n.voice >= 18)
2091 return -EINVAL;
2092 if (n.voice >= 9) {
2093 regb = n.voice - 9;
2094 io = s->iosynth+2;
2095 } else {
2096 regb = n.voice;
2097 io = s->iosynth;
2098 }
2099 outb(0xa0 + regb, io);
2100 outb(n.fnum & 0xff, io+1);
2101 outb(0xb0 + regb, io);
2102 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2103 return 0;
2104
2105 case FM_IOCTL_SET_VOICE:
2106 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2107 return -EFAULT;
2108 if (v.voice >= 18)
2109 return -EINVAL;
2110 regb = op_offset[v.voice];
2111 io = s->iosynth + ((v.op & 1) << 1);
2112 outb(0x20 + regb, io);
2113 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2114 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2115 outb(0x40 + regb, io);
2116 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2117 outb(0x60 + regb, io);
2118 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2119 outb(0x80 + regb, io);
2120 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2121 outb(0xe0 + regb, io);
2122 outb(v.waveform & 0x7, io+1);
2123 if (n.voice >= 9) {
2124 regb = n.voice - 9;
2125 io = s->iosynth+2;
2126 } else {
2127 regb = n.voice;
2128 io = s->iosynth;
2129 }
2130 outb(0xc0 + regb, io);
2131 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2132 (v.connection & 1), io+1);
2133 return 0;
2134
2135 case FM_IOCTL_SET_PARAMS:
2136 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2137 return -EFAULT;
2138 outb(0x08, s->iosynth);
2139 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2140 outb(0xbd, s->iosynth);
2141 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2142 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2143 return 0;
2144
2145 case FM_IOCTL_SET_OPL:
2146 outb(4, s->iosynth+2);
2147 outb(arg, s->iosynth+3);
2148 return 0;
2149
2150 case FM_IOCTL_SET_MODE:
2151 outb(5, s->iosynth+2);
2152 outb(arg & 1, s->iosynth+3);
2153 return 0;
2154
2155 default:
2156 return -EINVAL;
2157 }
2158 }
2159
2160 static int sv_dmfm_open(struct inode *inode, struct file *file)
2161 {
2162 int minor = MINOR(inode->i_rdev);
2163 struct sv_state *s = devs;
2164
2165 while (s && s->dev_dmfm != minor)
2166 s = s->next;
2167 if (!s)
2168 return -ENODEV;
2169 VALIDATE_STATE(s);
2170 file->private_data = s;
2171 /* wait for device to become free */
2172 down(&s->open_sem);
2173 while (s->open_mode & FMODE_DMFM) {
2174 if (file->f_flags & O_NONBLOCK) {
2175 up(&s->open_sem);
2176 return -EBUSY;
2177 }
2178 up(&s->open_sem);
2179 interruptible_sleep_on(&s->open_wait);
2180 if (signal_pending(current))
2181 return -ERESTARTSYS;
2182 down(&s->open_sem);
2183 }
2184 /* init the stuff */
2185 outb(1, s->iosynth);
2186 outb(0x20, s->iosynth+1); /* enable waveforms */
2187 outb(4, s->iosynth+2);
2188 outb(0, s->iosynth+3); /* no 4op enabled */
2189 outb(5, s->iosynth+2);
2190 outb(1, s->iosynth+3); /* enable OPL3 */
2191 s->open_mode |= FMODE_DMFM;
2192 up(&s->open_sem);
2193 MOD_INC_USE_COUNT;
2194 return 0;
2195 }
2196
2197 static int sv_dmfm_release(struct inode *inode, struct file *file)
2198 {
2199 struct sv_state *s = (struct sv_state *)file->private_data;
2200 unsigned int regb;
2201
2202 VALIDATE_STATE(s);
2203 down(&s->open_sem);
2204 s->open_mode &= ~FMODE_DMFM;
2205 for (regb = 0xb0; regb < 0xb9; regb++) {
2206 outb(regb, s->iosynth);
2207 outb(0, s->iosynth+1);
2208 outb(regb, s->iosynth+2);
2209 outb(0, s->iosynth+3);
2210 }
2211 up(&s->open_sem);
2212 wake_up(&s->open_wait);
2213 MOD_DEC_USE_COUNT;
2214 return 0;
2215 }
2216
2217 static /*const*/ struct file_operations sv_dmfm_fops = {
2218 &sv_llseek,
2219 NULL, /* read */
2220 NULL, /* write */
2221 NULL, /* readdir */
2222 NULL, /* poll */
2223 &sv_dmfm_ioctl,
2224 NULL, /* mmap */
2225 &sv_dmfm_open,
2226 NULL, /* flush */
2227 &sv_dmfm_release,
2228 NULL, /* fsync */
2229 NULL, /* fasync */
2230 NULL, /* check_media_change */
2231 NULL, /* revalidate */
2232 NULL, /* lock */
2233 };
2234
2235 /* --------------------------------------------------------------------- */
2236
2237 /* maximum number of devices */
2238 #define NR_DEVICE 5
2239
2240 static int reverb[NR_DEVICE] = { 0, };
2241
2242 #if 0
2243 static int wavetable[NR_DEVICE] = { 0, };
2244 #endif
2245
2246 static unsigned dmaio = 0xac00;
2247
2248 /* --------------------------------------------------------------------- */
2249
2250 static struct initvol {
2251 int mixch;
2252 int vol;
2253 } initvol[] __initdata = {
2254 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2255 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2256 { SOUND_MIXER_WRITE_CD, 0x4040 },
2257 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2258 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2259 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2260 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2261 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2262 { SOUND_MIXER_WRITE_PCM, 0x4040 }
2263 };
2264
2265 #ifdef MODULE
2266 __initfunc(int init_module(void))
2267 #else
2268 __initfunc(int init_sonicvibes(void))
2269 #endif
2270 {
2271 struct sv_state *s;
2272 struct pci_dev *pcidev = NULL;
2273 mm_segment_t fs;
2274 int i, val, index = 0;
2275
2276 if (!pci_present()) /* No PCI bus in this machine! */
2277 return -ENODEV;
2278 printk(KERN_INFO "sv: version v0.12 time " __TIME__ " " __DATE__ "\n");
2279 #if 0
2280 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2281 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2282 #endif
2283 while (index < NR_DEVICE &&
2284 (pcidev = pci_find_device(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, pcidev))) {
2285 if (pcidev->base_address[1] == 0 ||
2286 (pcidev->base_address[1] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2287 continue;
2288 if (pcidev->base_address[2] == 0 ||
2289 (pcidev->base_address[2] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2290 continue;
2291 if (pcidev->base_address[3] == 0 ||
2292 (pcidev->base_address[3] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2293 continue;
2294 if (pcidev->irq == 0)
2295 continue;
2296 if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2297 printk(KERN_WARNING "sv: out of memory\n");
2298 continue;
2299 }
2300 memset(s, 0, sizeof(struct sv_state));
2301 init_waitqueue(&s->dma_adc.wait);
2302 init_waitqueue(&s->dma_dac.wait);
2303 init_waitqueue(&s->open_wait);
2304 init_waitqueue(&s->midi.iwait);
2305 init_waitqueue(&s->midi.owait);
2306 s->open_sem = MUTEX;
2307 s->magic = SV_MAGIC;
2308 s->iosb = pcidev->base_address[0] & PCI_BASE_ADDRESS_IO_MASK;
2309 s->ioenh = pcidev->base_address[1] & PCI_BASE_ADDRESS_IO_MASK;
2310 s->iosynth = pcidev->base_address[2] & PCI_BASE_ADDRESS_IO_MASK;
2311 s->iomidi = pcidev->base_address[3] & PCI_BASE_ADDRESS_IO_MASK;
2312 s->iogame = pcidev->base_address[4] & PCI_BASE_ADDRESS_IO_MASK;
2313 pci_read_config_dword(pcidev, 0x40, &s->iodmaa);
2314 pci_read_config_dword(pcidev, 0x48, &s->iodmac);
2315 dmaio &= ~(SV_EXTENT_DMA-1);
2316 s->iodmaa &= ~(SV_EXTENT_DMA-1);
2317 s->iodmac &= ~(SV_EXTENT_DMA-1);
2318 if (!(s->iodmaa)) {
2319 s->iodmaa = dmaio;
2320 dmaio += SV_EXTENT_DMA;
2321 printk(KERN_INFO "sv: BIOS did not allocate DDMA channel A io, allocated at %#x\n",
2322 s->iodmaa);
2323 }
2324 if (!(s->iodmac)) {
2325 s->iodmac = dmaio;
2326 dmaio += SV_EXTENT_DMA;
2327 printk(KERN_INFO "sv: BIOS did not allocate DDMA channel C io, allocated at %#x\n",
2328 s->iodmac);
2329 }
2330 pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9); /* enable and use extended mode */
2331 pci_write_config_dword(pcidev, 0x48, s->iodmac | 9); /* enable */
2332 printk(KERN_DEBUG "sv: io ports: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
2333 s->iosb, s->ioenh, s->iosynth, s->iomidi, s->iogame, s->iodmaa, s->iodmac);
2334 if (s->ioenh == 0 || s->iodmaa == 0 || s->iodmac == 0)
2335 continue;
2336 s->irq = pcidev->irq;
2337
2338 /* hack */
2339 pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12); /* wavetable base address */
2340
2341 if (check_region(s->ioenh, SV_EXTENT_ENH)) {
2342 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2343 goto err_region5;
2344 }
2345 request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM");
2346 if (check_region(s->iodmaa, SV_EXTENT_DMA)) {
2347 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2348 goto err_region4;
2349 }
2350 request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA");
2351 if (check_region(s->iodmac, SV_EXTENT_DMA)) {
2352 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2353 goto err_region3;
2354 }
2355 request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC");
2356 if (check_region(s->iomidi, SV_EXTENT_MIDI)) {
2357 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2358 goto err_region2;
2359 }
2360 request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi");
2361 if (check_region(s->iosynth, SV_EXTENT_SYNTH)) {
2362 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2363 goto err_region1;
2364 }
2365 request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth");
2366 /* initialize codec registers */
2367 outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2368 udelay(50);
2369 outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2370 udelay(50);
2371 outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2372 | (reverb[index] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2373 inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2374 wrindir(s, SV_CIDRIVECONTROL, 0); /* drive current 16mA */
2375 wrindir(s, SV_CIENABLE, s->enable = 0); /* disable DMAA and DMAC */
2376 outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2377 //outb(0xff, s->iodmaa + SV_DMA_RESET);
2378 //outb(0xff, s->iodmac + SV_DMA_RESET);
2379 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2380 wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2381 wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2382 wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2383 setpll(s, SV_CIADCPLLM, 8000);
2384 wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2385 wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2386 wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2387 wrindir(s, SV_CIADCOUTPUT, 0);
2388 /* request irq */
2389 if (request_irq(s->irq, sv_interrupt, SA_SHIRQ, "S3 SonicVibes", s)) {
2390 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2391 goto err_irq;
2392 }
2393 printk(KERN_INFO "sv: found adapter at io %#06x irq %u dmaa %#06x dmac %#06x revision %u\n",
2394 s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2395 /* register devices */
2396 if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0)
2397 goto err_dev1;
2398 if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0)
2399 goto err_dev2;
2400 if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0)
2401 goto err_dev3;
2402 if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0)
2403 goto err_dev4;
2404 /* initialize the chips */
2405 fs = get_fs();
2406 set_fs(KERNEL_DS);
2407 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2408 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2409 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2410 val = initvol[i].vol;
2411 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2412 }
2413 set_fs(fs);
2414 /* queue it for later freeing */
2415 s->next = devs;
2416 devs = s;
2417 index++;
2418 continue;
2419
2420 err_dev4:
2421 unregister_sound_midi(s->dev_midi);
2422 err_dev3:
2423 unregister_sound_mixer(s->dev_mixer);
2424 err_dev2:
2425 unregister_sound_dsp(s->dev_audio);
2426 err_dev1:
2427 printk(KERN_ERR "sv: cannot register misc device\n");
2428 free_irq(s->irq, s);
2429 err_irq:
2430 release_region(s->iosynth, SV_EXTENT_SYNTH);
2431 err_region1:
2432 release_region(s->iomidi, SV_EXTENT_MIDI);
2433 err_region2:
2434 release_region(s->iodmac, SV_EXTENT_DMA);
2435 err_region3:
2436 release_region(s->iodmaa, SV_EXTENT_DMA);
2437 err_region4:
2438 release_region(s->ioenh, SV_EXTENT_ENH);
2439 err_region5:
2440 kfree_s(s, sizeof(struct sv_state));
2441 }
2442 if (!devs) {
2443 if (wavetable_mem)
2444 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2445 return -ENODEV;
2446 }
2447 return 0;
2448 }
2449
2450 /* --------------------------------------------------------------------- */
2451
2452 #ifdef MODULE
2453
2454 MODULE_PARM(reverb, "1-" __MODULE_STRING(NR_DEVICE) "i");
2455 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2456 #if 0
2457 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2458 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2459 #endif
2460
2461 MODULE_PARM(dmaio, "i");
2462 MODULE_PARM_DESC(dmaio, "if the motherboard BIOS did not allocate DDMA io, allocate them starting at this address");
2463
2464 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2465 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2466
2467 void cleanup_module(void)
2468 {
2469 struct sv_state *s;
2470
2471 while ((s = devs)) {
2472 devs = devs->next;
2473 outb(~0, s->ioenh + SV_CODEC_INTMASK); /* disable ints */
2474 synchronize_irq();
2475 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2476 wrindir(s, SV_CIENABLE, 0); /* disable DMAA and DMAC */
2477 //outb(0, s->iodmaa + SV_DMA_RESET);
2478 //outb(0, s->iodmac + SV_DMA_RESET);
2479 free_irq(s->irq, s);
2480 release_region(s->iodmac, SV_EXTENT_DMA);
2481 release_region(s->iodmaa, SV_EXTENT_DMA);
2482 release_region(s->ioenh, SV_EXTENT_ENH);
2483 release_region(s->iomidi, SV_EXTENT_MIDI);
2484 release_region(s->iosynth, SV_EXTENT_SYNTH);
2485 unregister_sound_dsp(s->dev_audio);
2486 unregister_sound_mixer(s->dev_mixer);
2487 unregister_sound_midi(s->dev_midi);
2488 unregister_sound_special(s->dev_dmfm);
2489 kfree_s(s, sizeof(struct sv_state));
2490 }
2491 if (wavetable_mem)
2492 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2493 printk(KERN_INFO "sv: unloading\n");
2494 }
2495
2496 #endif /* MODULE */
Copy of Dave Jones history.git as used by http://archive.org/details/git-history-of-linux