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Import 2.3.99pre7-1
[davej-history.git] / drivers / sound / trident.c
blob6f5a383cd3382fe62de8eb0116afbd1595be9c7c
1 /*
2 *
3 * Trident 4D-Wave/SiS 7018 OSS driver for Linux 2.2.x
4 *
5 * Driver: Alan Cox <alan@redhat.com>
6 *
7 * Built from:
8 * Low level code: <audio@tridentmicro.com> from ALSA
9 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
10 * Extended by: Zach Brown <zab@redhat.com>
11 *
12 * Hacked up by:
13 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
14 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
15 *
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
30 *
31 * History
32 * v0.14.2 Mar 29 2000 Ching Ling Lee
33 * Add clear to silence advance in trident_update_ptr
34 * fix invalid data of the end of the sound
35 * v0.14.1 Mar 24 2000 Ching Ling Lee
36 * ALi 5451 support added, playback and recording O.K.
37 * ALi 5451 originally developed and structured based on sonicvibes, and
38 * suggested to merge into this file by Alan Cox.
39 * v0.14 Mar 15 2000 Ollie Lho
40 * 5.1 channel output support with channel binding. What's the Matrix ?
41 * v0.13.1 Mar 10 2000 Ollie Lho
42 * few minor bugs on dual codec support, needs more testing
43 * v0.13 Mar 03 2000 Ollie Lho
44 * new pci_* for 2.4 kernel, back ported to 2.2
45 * v0.12 Feb 23 2000 Ollie Lho
46 * Preliminary Recording support
47 * v0.11.2 Feb 19 2000 Ollie Lho
48 * removed incomplete full-dulplex support
49 * v0.11.1 Jan 28 2000 Ollie Lho
50 * small bug in setting sample rate for 4d-nx (reported by Aaron)
51 * v0.11 Jan 27 2000 Ollie Lho
52 * DMA bug, scheduler latency, second try
53 * v0.10 Jan 24 2000 Ollie Lho
54 * DMA bug fixed, found kernel scheduling problem
55 * v0.09 Jan 20 2000 Ollie Lho
56 * Clean up of channel register access routine (prepare for channel binding)
57 * v0.08 Jan 14 2000 Ollie Lho
58 * Isolation of AC97 codec code
59 * v0.07 Jan 13 2000 Ollie Lho
60 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
61 * v0.06 Jan 11 2000 Ollie Lho
62 * Preliminary support for dual (more ?) AC97 codecs
63 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
64 * adapt to 2.3.x new __setup/__init call
65 * v0.04 Dec 31 1999 Ollie Lho
66 * Multiple Open, using Middle Loop Interrupt to smooth playback
67 * v0.03 Dec 24 1999 Ollie Lho
68 * mem leak in prog_dmabuf and dealloc_dmabuf removed
69 * v0.02 Dec 15 1999 Ollie Lho
70 * SiS 7018 support added, playback O.K.
71 * v0.01 Alan Cox et. al.
72 * Initial Release in kernel 2.3.30, does not work
73 *
74 * ToDo
75 * Clean up of low level channel register access code. (done)
76 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
77 * Dual AC97 codecs support (done)
78 * Recording support (done)
79 * Mmap support
80 * "Channel Binding" ioctl extension (done)
81 * new pci device driver interface for 2.4 kernel (done)
82 */
83
84 #include <linux/config.h>
85 #include <linux/module.h>
86 #include <linux/version.h>
87 #include <linux/string.h>
88 #include <linux/ctype.h>
89 #include <linux/ioport.h>
90 #include <linux/sched.h>
91 #include <linux/delay.h>
92 #include <linux/sound.h>
93 #include <linux/malloc.h>
94 #include <linux/soundcard.h>
95 #include <linux/pci.h>
96 #include <asm/io.h>
97 #include <asm/dma.h>
98 #include <linux/init.h>
99 #include <linux/poll.h>
100 #include <linux/spinlock.h>
101 #include <linux/ac97_codec.h>
102 #include <asm/uaccess.h>
103 #include <asm/hardirq.h>
104
105 #include "trident.h"
106
107 #define DRIVER_VERSION "0.14"
108
109 /* magic numbers to protect our data structures */
110 #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
111 #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
112
113 #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
114
115 #define NR_HW_CH 32
116
117 /* maxinum nuber of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
118 have 2 SDATA_IN lines (currently) */
119 #define NR_AC97 2
120
121 /* minor number of /dev/dspW */
122 #define SND_DEV_DSP8 3
123
124 /* minor number of /dev/dspW */
125 #define SND_DEV_DSP16 5
126
127 /* minor number of /dev/swmodem (temporary, experimental) */
128 #define SND_DEV_SWMODEM 7
129
130 static const unsigned sample_size[] = { 1, 2, 2, 4 };
131 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
132
133 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
134
135 enum {
136 TRIDENT_4D_DX = 0,
137 TRIDENT_4D_NX,
138 SIS_7018,
139 ALI_5451
140 };
141
142 static char * card_names[] = {
143 "Trident 4DWave DX",
144 "Trident 4DWave NX",
145 "SiS 7018 PCI Audio",
146 "ALi Audio Accelerator"
147 };
148
149 static struct pci_device_id trident_pci_tbl [] __initdata = {
150 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
151 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
152 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
153 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX},
154 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018,
155 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018},
156 {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451,
157 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451},
158 {0,}
159 };
160
161 MODULE_DEVICE_TABLE (pci, trident_pci_tbl);
162
163 /* "software" or virtual channel, an instance of opened /dev/dsp */
164 struct trident_state {
165 unsigned int magic;
166 struct trident_card *card; /* Card info */
167
168 /* single open lock mechanism, only used for recording */
169 struct semaphore open_sem;
170 wait_queue_head_t open_wait;
171
172 /* file mode */
173 mode_t open_mode;
174
175 /* virtual channel number */
176 int virt;
177
178 struct dmabuf {
179 /* wave sample stuff */
180 unsigned int rate;
181 unsigned char fmt, enable;
182
183 /* hardware channel */
184 struct trident_channel *channel;
185
186 /* OSS buffer management stuff */
187 void *rawbuf;
188 dma_addr_t dma_handle;
189 unsigned buforder;
190 unsigned numfrag;
191 unsigned fragshift;
192
193 /* our buffer acts like a circular ring */
194 unsigned hwptr; /* where dma last started, updated by update_ptr */
195 unsigned swptr; /* where driver last clear/filled, updated by read/write */
196 int count; /* bytes to be comsumed or been generated by dma machine */
197 unsigned total_bytes; /* total bytes dmaed by hardware */
198
199 unsigned error; /* number of over/underruns */
200 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
201
202 /* redundant, but makes calculations easier */
203 unsigned fragsize;
204 unsigned dmasize;
205 unsigned fragsamples;
206
207 /* OSS stuff */
208 unsigned mapped:1;
209 unsigned ready:1;
210 unsigned endcleared:1;
211 unsigned update_flag;
212 unsigned ossfragshift;
213 int ossmaxfrags;
214 unsigned subdivision;
215 } dmabuf;
216 };
217
218 /* hardware channels */
219 struct trident_channel {
220 int num; /* channel number */
221 u32 lba; /* Loop Begine Address, where dma buffer starts */
222 u32 eso; /* End Sample Offset, wehre dma buffer ends (in the unit of samples) */
223 u32 delta; /* delta value, sample rate / 48k for playback, 48k/sample rate for recording */
224 u16 attribute; /* control where PCM data go and come */
225 u16 fm_vol;
226 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
227 };
228
229 struct trident_pcm_bank_address {
230 u32 start;
231 u32 stop;
232 u32 aint;
233 u32 aint_en;
234 };
235 static struct trident_pcm_bank_address bank_a_addrs =
236 {
237 T4D_START_A,
238 T4D_STOP_A,
239 T4D_AINT_A,
240 T4D_AINTEN_A
241 };
242 static struct trident_pcm_bank_address bank_b_addrs =
243 {
244 T4D_START_B,
245 T4D_STOP_B,
246 T4D_AINT_B,
247 T4D_AINTEN_B
248 };
249 struct trident_pcm_bank {
250 /* register addresses to control bank operations */
251 struct trident_pcm_bank_address *addresses;
252 /* each bank has 32 channels */
253 u32 bitmap; /* channel allocation bitmap */
254 struct trident_channel channels[32];
255 };
256
257 struct trident_card {
258 unsigned int magic;
259
260 /* We keep trident cards in a linked list */
261 struct trident_card *next;
262
263 /* The trident has a certain amount of cross channel interaction
264 so we use a single per card lock */
265 spinlock_t lock;
266
267 /* PCI device stuff */
268 struct pci_dev * pci_dev;
269 u16 pci_id;
270 u8 revision;
271
272 /* soundcore stuff */
273 int dev_audio;
274
275 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
276 struct ac97_codec *ac97_codec[NR_AC97];
277 struct trident_pcm_bank banks[NR_BANKS];
278 struct trident_state *states[NR_HW_CH];
279
280 /* hardware resources */
281 unsigned long iobase;
282 u32 irq;
283
284 /* Function support */
285 struct trident_channel *(*alloc_pcm_channel)(struct trident_card *);
286 struct trident_channel *(*alloc_rec_pcm_channel)(struct trident_card *);
287 void (*free_pcm_channel)(struct trident_card *, int chan);
288 void (*address_interrupt)(struct trident_card *);
289 };
290
291 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
292 static u16 mask2attr [] =
293 {
294 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
295 HSET, MIC, MODEM_LINE1, MODEM_LINE2,
296 I2S_LR, SPDIF_LR
297 };
298 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
299 static int attr2mask [] = {
300 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
301 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
302 };
303
304 static struct trident_card *devs = NULL;
305
306 static void ali_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
307 static u16 ali_ac97_get(struct ac97_codec *codec, u8 reg);
308
309 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
310 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
311
312 static int trident_open_mixdev(struct inode *inode, struct file *file);
313 static int trident_release_mixdev(struct inode *inode, struct file *file);
314 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
315 unsigned long arg);
316 static loff_t trident_llseek(struct file *file, loff_t offset, int origin);
317
318 static int trident_enable_loop_interrupts(struct trident_card * card)
319 {
320 u32 global_control;
321
322 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
323
324 switch (card->pci_id)
325 {
326 case PCI_DEVICE_ID_SI_7018:
327 global_control |= (ENDLP_IE | MIDLP_IE| BANK_B_EN);
328 break;
329 case PCI_DEVICE_ID_ALI_5451:
330 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
331 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
332 global_control |= (ENDLP_IE | MIDLP_IE);
333 break;
334 default:
335 return FALSE;
336 }
337
338 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
339
340 #ifdef DEBUG
341 printk("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
342 global_control);
343 #endif
344 return (TRUE);
345 }
346
347 static int trident_disable_loop_interrupts(struct trident_card * card)
348 {
349 u32 global_control;
350
351 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
352 global_control &= ~(ENDLP_IE | MIDLP_IE);
353 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
354
355 #ifdef DEBUG
356 printk("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
357 global_control);
358 #endif
359 return (TRUE);
360 }
361
362 static void trident_enable_voice_irq(struct trident_card * card, unsigned int channel)
363 {
364 unsigned int mask = 1 << (channel & 0x1f);
365 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
366 u32 reg, addr = bank->addresses->aint_en;
367
368 reg = inl(TRID_REG(card, addr));
369 reg |= mask;
370 outl(reg, TRID_REG(card, addr));
371
372 #ifdef DEBUG
373 reg = inl(TRID_REG(card, T4D_AINTEN_B));
374 printk("trident: enabled IRQ on channel %d, AINTEN_B = 0x%08x\n",
375 channel, reg);
376 #endif
377 }
378
379 static void trident_disable_voice_irq(struct trident_card * card, unsigned int channel)
380 {
381 unsigned int mask = 1 << (channel & 0x1f);
382 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
383 u32 reg, addr = bank->addresses->aint_en;
384
385 reg = inl(TRID_REG(card, addr));
386 reg &= ~mask;
387 outl(reg, TRID_REG(card, addr));
388
389 /* Ack the channel in case the interrupt was set before we disable it. */
390 outl(mask, TRID_REG(card, bank->addresses->aint));
391
392 #ifdef DEBUG
393 reg = inl(TRID_REG(card, T4D_AINTEN_B));
394 printk("trident: disabled IRQ on channel %d, AINTEN_B = 0x%08x\n",
395 channel, reg);
396 #endif
397 }
398
399 static void trident_start_voice(struct trident_card * card, unsigned int channel)
400 {
401 unsigned int mask = 1 << (channel & 0x1f);
402 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
403 u32 addr = bank->addresses->start;
404
405 #ifdef DEBUG
406 u32 reg;
407 #endif
408
409 outl(mask, TRID_REG(card, addr));
410
411 #ifdef DEBUG
412 reg = inl(TRID_REG(card, T4D_START_B));
413 printk("trident: start voice on channel %d, START_B = 0x%08x\n",
414 channel, reg);
415 #endif
416 }
417
418 static void trident_stop_voice(struct trident_card * card, unsigned int channel)
419 {
420 unsigned int mask = 1 << (channel & 0x1f);
421 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
422 u32 addr = bank->addresses->stop;
423
424 #ifdef DEBUG
425 u32 reg;
426 #endif
427
428 outl(mask, TRID_REG(card, addr));
429
430 #ifdef DEBUG
431 reg = inl(TRID_REG(card, T4D_STOP_B));
432 printk("trident: stop voice on channel %d, STOP_B = 0x%08x\n",
433 channel, reg);
434 #endif
435 }
436
437 static int trident_check_channel_interrupt(struct trident_card * card, int channel)
438 {
439 unsigned int mask = 1 << (channel & 0x1f);
440 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
441 u32 reg, addr = bank->addresses->aint;
442
443 reg = inl(TRID_REG(card, addr));
444
445 #ifdef DEBUG
446 if (reg & mask)
447 printk("trident: channel %d has interrupt, AINT_B = 0x%08x\n",
448 channel, reg);
449 #endif
450 return (reg & mask) ? TRUE : FALSE;
451 }
452
453 static void trident_ack_channel_interrupt(struct trident_card * card, int channel)
454 {
455 unsigned int mask = 1 << (channel & 0x1f);
456 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
457 u32 reg, addr = bank->addresses->aint;
458
459 reg = inl(TRID_REG(card, addr));
460 reg &= mask;
461 outl(reg, TRID_REG(card, addr));
462
463 #ifdef DEBUG
464 reg = inl(TRID_REG(card, T4D_AINT_B));
465 printk("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
466 channel, reg);
467 #endif
468 }
469
470 static struct trident_channel * trident_alloc_pcm_channel(struct trident_card *card)
471 {
472 struct trident_pcm_bank *bank;
473 int idx;
474
475 bank = &card->banks[BANK_B];
476 if (bank->bitmap == ~0UL) {
477 /* no more free channels avaliable */
478 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
479 return NULL;
480 }
481 for (idx = 31; idx >= 0; idx--) {
482 if (!(bank->bitmap & (1 << idx))) {
483 struct trident_channel *channel = &bank->channels[idx];
484 bank->bitmap |= 1 << idx;
485 channel->num = idx + 32;
486 return channel;
487 }
488 }
489 return NULL;
490 }
491
492 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card)
493 {
494 struct trident_pcm_bank *bank;
495 int idx;
496
497 bank = &card->banks[BANK_A];
498
499 if (bank->bitmap == ~0UL) {
500 /* no more free channels avaliable */
501 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
502 return NULL;
503 }
504 for (idx = 0; idx <= 31; idx++) {
505 if (!(bank->bitmap & (1 << idx))) {
506 struct trident_channel *channel = &bank->channels[idx];
507 bank->bitmap |= 1 << idx;
508 channel->num = idx;
509 return channel;
510 }
511 }
512 return NULL;
513 }
514
515 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card)
516 {
517 struct trident_pcm_bank *bank;
518 int idx = ALI_PCM_IN_CHANNEL;
519
520 bank = &card->banks[BANK_A];
521
522 if (!(bank->bitmap & (1 << idx))) {
523 struct trident_channel *channel = &bank->channels[idx];
524 bank->bitmap |= 1 << idx;
525 channel->num = idx;
526 return channel;
527 }
528 return NULL;
529 }
530
531
532 static void trident_free_pcm_channel(struct trident_card *card, int channel)
533 {
534 int bank;
535
536 if (channel < 31 || channel > 63)
537 return;
538
539 bank = channel >> 5;
540 channel = channel & 0x1f;
541
542 if (card->banks[bank].bitmap & (1 << (channel))) {
543 card->banks[bank].bitmap &= ~(1 << (channel));
544 }
545 }
546
547 static void ali_free_pcm_channel(struct trident_card *card, int channel)
548 {
549 int bank;
550
551 if (channel > 31)
552 return;
553
554 bank = channel >> 5;
555 channel = channel & 0x1f;
556
557 if (card->banks[bank].bitmap & (1 << (channel))) {
558 card->banks[bank].bitmap &= ~(1 << (channel));
559 }
560 }
561
562
563 /* called with spin lock held */
564
565 static int trident_load_channel_registers(struct trident_card *card, u32 *data, unsigned int channel)
566 {
567 int i;
568
569 if (channel > 63)
570 return FALSE;
571
572 /* select hardware channel to write */
573 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
574 /* output the channel registers */
575 for (i = 0; i < CHANNEL_REGS; i++) {
576 outl(data[i], TRID_REG(card, CHANNEL_START + 4*i));
577 if (i == 2)
578 if (card->pci_id == PCI_DEVICE_ID_ALI_5451)
579 i++; //skip i=3
580 }
581
582 return TRUE;
583 }
584
585 /* called with spin lock held */
586 static int trident_write_voice_regs(struct trident_state *state)
587 {
588 unsigned int data[CHANNEL_REGS + 1];
589 struct trident_channel *channel;
590
591 channel = state->dmabuf.channel;
592
593 data[1] = channel->lba;
594 data[4] = channel->control;
595
596 switch (state->card->pci_id)
597 {
598 case PCI_DEVICE_ID_ALI_5451:
599 data[0] = 0; /* Current Sample Offset */
600 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
601 data[3] = 0;
602 break;
603 case PCI_DEVICE_ID_SI_7018:
604 data[0] = 0; /* Current Sample Offset */
605 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
606 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
607 break;
608 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
609 data[0] = 0; /* Current Sample Offset */
610 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
611 data[3] = channel->fm_vol & 0xffff;
612 break;
613 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
614 data[0] = (channel->delta << 24);
615 data[2] = ((channel->delta << 16) & 0xff000000) | (channel->eso & 0x00ffffff);
616 data[3] = channel->fm_vol & 0xffff;
617 break;
618 default:
619 return FALSE;
620 }
621
622 return trident_load_channel_registers(state->card, data, channel->num);
623 }
624
625 static int compute_rate_play(u32 rate)
626 {
627 int delta;
628 /* We special case 44100 and 8000 since rounding with the equation
629 does not give us an accurate enough value. For 11025 and 22050
630 the equation gives us the best answer. All other frequencies will
631 also use the equation. JDW */
632 if (rate == 44100)
633 delta = 0xeb3;
634 else if (rate == 8000)
635 delta = 0x2ab;
636 else if (rate == 48000)
637 delta = 0x1000;
638 else
639 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
640 return delta;
641 }
642
643 static int compute_rate_rec(u32 rate)
644 {
645 int delta;
646
647 if (rate == 44100)
648 delta = 0x116a;
649 else if (rate == 8000)
650 delta = 0x6000;
651 else if (rate == 48000)
652 delta = 0x1000;
653 else
654 delta = ((48000 << 12) / rate) & 0x0000ffff;
655
656 return delta;
657 }
658 /* set playback sample rate */
659 static unsigned int trident_set_dac_rate(struct trident_state * state, unsigned int rate)
660 {
661 struct dmabuf *dmabuf = &state->dmabuf;
662
663 if (rate > 48000)
664 rate = 48000;
665 if (rate < 4000)
666 rate = 4000;
667
668 dmabuf->rate = rate;
669 dmabuf->channel->delta = compute_rate_play(rate);
670
671 trident_write_voice_regs(state);
672
673 #ifdef DEBUG
674 printk("trident: called trident_set_dac_rate : rate = %d\n", rate);
675 #endif
676
677 return rate;
678 }
679
680 /* set recording sample rate */
681 static unsigned int trident_set_adc_rate(struct trident_state * state, unsigned int rate)
682 {
683 struct dmabuf *dmabuf = &state->dmabuf;
684
685 if (rate > 48000)
686 rate = 48000;
687 if (rate < 4000)
688 rate = 4000;
689
690 dmabuf->rate = rate;
691 dmabuf->channel->delta = compute_rate_rec(rate);
692
693 trident_write_voice_regs(state);
694
695 #ifdef DEBUG
696 printk("trident: called trident_set_adc_rate : rate = %d\n", rate);
697 #endif
698 return rate;
699 }
700
701 /* prepare channel attributes for playback */
702 static void trident_play_setup(struct trident_state *state)
703 {
704 struct dmabuf *dmabuf = &state->dmabuf;
705 struct trident_channel *channel = dmabuf->channel;
706
707 channel->lba = virt_to_bus(dmabuf->rawbuf);
708 channel->delta = compute_rate_play(dmabuf->rate);
709
710 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
711 channel->eso -= 1;
712
713 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
714 channel->attribute = 0;
715 }
716
717 channel->fm_vol = 0x0;
718
719 channel->control = CHANNEL_LOOP;
720 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
721 /* 16-bits */
722 channel->control |= CHANNEL_16BITS;
723 /* signed */
724 channel->control |= CHANNEL_SIGNED;
725 }
726 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
727 /* stereo */
728 channel->control |= CHANNEL_STEREO;
729 #ifdef DEBUG
730 printk("trident: trident_play_setup, LBA = 0x%08x, "
731 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
732 channel->lba, channel->delta, channel->eso, channel->control);
733 #endif
734 trident_write_voice_regs(state);
735 }
736
737 /* prepare channel attributes for recording */
738 static void trident_rec_setup(struct trident_state *state)
739 {
740 u16 w;
741 struct trident_card *card = state->card;
742 struct dmabuf *dmabuf = &state->dmabuf;
743 struct trident_channel *channel = dmabuf->channel;
744
745 /* Enable AC-97 ADC (capture) */
746 switch (card->pci_id)
747 {
748 case PCI_DEVICE_ID_ALI_5451:
749 case PCI_DEVICE_ID_SI_7018:
750 /* for 7018, the ac97 is always in playback/record (duplex) mode */
751 break;
752 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
753 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
754 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
755 /* enable and set record channel */
756 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
757 break;
758 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
759 w = inw(TRID_REG(card, T4D_MISCINT));
760 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
761 /* enable and set record channel */
762 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
763 break;
764 default:
765 return;
766 }
767
768 channel->lba = virt_to_bus(dmabuf->rawbuf);
769 channel->delta = compute_rate_rec(dmabuf->rate);
770
771 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
772 channel->eso -= 1;
773
774 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
775 channel->attribute = 0;
776 }
777
778 channel->fm_vol = 0x0;
779
780 channel->control = CHANNEL_LOOP;
781 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
782 /* 16-bits */
783 channel->control |= CHANNEL_16BITS;
784 /* signed */
785 channel->control |= CHANNEL_SIGNED;
786 }
787 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
788 /* stereo */
789 channel->control |= CHANNEL_STEREO;
790 #ifdef DEBUG
791 printk("trident: trident_rec_setup, LBA = 0x%08x, "
792 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
793 channel->lba, channel->delta, channel->eso, channel->control);
794 #endif
795 trident_write_voice_regs(state);
796 }
797
798 /* get current playback/recording dma buffer pointer (byte offset from LBA),
799 called with spinlock held! */
800 extern __inline__ unsigned trident_get_dma_addr(struct trident_state *state)
801 {
802 struct dmabuf *dmabuf = &state->dmabuf;
803 u32 cso;
804
805 if (!dmabuf->enable)
806 return 0;
807
808 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
809
810 switch (state->card->pci_id)
811 {
812 case PCI_DEVICE_ID_ALI_5451:
813 case PCI_DEVICE_ID_SI_7018:
814 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
815 /* 16 bits ESO, CSO for 7018 and DX */
816 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
817 break;
818 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
819 /* 24 bits ESO, CSO for NX */
820 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
821 break;
822 default:
823 return 0;
824 }
825
826 #ifdef DEBUG
827 printk("trident: trident_get_dma_addr: chip reported channel: %d, "
828 "cso = 0x%04x\n",
829 dmabuf->channel->num, cso);
830 #endif
831 /* ESO and CSO are in units of Samples, convert to byte offset */
832 cso <<= sample_shift[dmabuf->fmt];
833
834 return (cso % dmabuf->dmasize);
835 }
836
837 /* Stop recording (lock held) */
838 extern __inline__ void __stop_adc(struct trident_state *state)
839 {
840 struct dmabuf *dmabuf = &state->dmabuf;
841 unsigned int chan_num = dmabuf->channel->num;
842 struct trident_card *card = state->card;
843
844 dmabuf->enable &= ~ADC_RUNNING;
845 trident_stop_voice(card, chan_num);
846 trident_disable_voice_irq(card, chan_num);
847 }
848
849 static void stop_adc(struct trident_state *state)
850 {
851 struct trident_card *card = state->card;
852 unsigned long flags;
853
854 spin_lock_irqsave(&card->lock, flags);
855 __stop_adc(state);
856 spin_unlock_irqrestore(&card->lock, flags);
857 }
858
859 static void start_adc(struct trident_state *state)
860 {
861 struct dmabuf *dmabuf = &state->dmabuf;
862 unsigned int chan_num = dmabuf->channel->num;
863 struct trident_card *card = state->card;
864 unsigned long flags;
865
866 spin_lock_irqsave(&card->lock, flags);
867 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
868 dmabuf->enable |= ADC_RUNNING;
869 trident_enable_voice_irq(card, chan_num);
870 trident_start_voice(card, chan_num);
871 }
872 spin_unlock_irqrestore(&card->lock, flags);
873 }
874
875 /* stop playback (lock held) */
876 extern __inline__ void __stop_dac(struct trident_state *state)
877 {
878 struct dmabuf *dmabuf = &state->dmabuf;
879 unsigned int chan_num = dmabuf->channel->num;
880 struct trident_card *card = state->card;
881
882 dmabuf->enable &= ~DAC_RUNNING;
883 trident_stop_voice(card, chan_num);
884 trident_disable_voice_irq(card, chan_num);
885 }
886
887 static void stop_dac(struct trident_state *state)
888 {
889 struct trident_card *card = state->card;
890 unsigned long flags;
891
892 spin_lock_irqsave(&card->lock, flags);
893 __stop_dac(state);
894 spin_unlock_irqrestore(&card->lock, flags);
895 }
896
897 static void start_dac(struct trident_state *state)
898 {
899 struct dmabuf *dmabuf = &state->dmabuf;
900 unsigned int chan_num = dmabuf->channel->num;
901 struct trident_card *card = state->card;
902 unsigned long flags;
903
904 spin_lock_irqsave(&card->lock, flags);
905 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
906 dmabuf->enable |= DAC_RUNNING;
907 trident_enable_voice_irq(card, chan_num);
908 trident_start_voice(card, chan_num);
909 }
910 spin_unlock_irqrestore(&card->lock, flags);
911 }
912
913 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
914 #define DMABUF_MINORDER 1
915
916 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
917 static int alloc_dmabuf(struct trident_state *state)
918 {
919 struct dmabuf *dmabuf = &state->dmabuf;
920 void *rawbuf;
921 int order;
922 unsigned long map, mapend;
923
924 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
925 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
926 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
927 PAGE_SIZE << order,
928 &dmabuf->dma_handle)))
929 break;
930 if (!rawbuf)
931 return -ENOMEM;
932
933 #ifdef DEBUG
934 printk("trident: allocated %ld (order = %d) bytes at %p\n",
935 PAGE_SIZE << order, order, rawbuf);
936 #endif
937
938 dmabuf->ready = dmabuf->mapped = 0;
939 dmabuf->rawbuf = rawbuf;
940 dmabuf->buforder = order;
941
942 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
943 mapend = MAP_NR(rawbuf + (PAGE_SIZE << order) - 1);
944 for (map = MAP_NR(rawbuf); map <= mapend; map++)
945 set_bit(PG_reserved, &mem_map[map].flags);
946
947 return 0;
948 }
949
950 /* free DMA buffer */
951 static void dealloc_dmabuf(struct trident_state *state)
952 {
953 struct dmabuf *dmabuf = &state->dmabuf;
954 unsigned long map, mapend;
955
956 if (dmabuf->rawbuf) {
957 /* undo marking the pages as reserved */
958 mapend = MAP_NR(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
959 for (map = MAP_NR(dmabuf->rawbuf); map <= mapend; map++)
960 clear_bit(PG_reserved, &mem_map[map].flags);
961 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
962 dmabuf->rawbuf, dmabuf->dma_handle);
963 }
964 dmabuf->rawbuf = NULL;
965 dmabuf->mapped = dmabuf->ready = 0;
966 }
967
968 static int prog_dmabuf(struct trident_state *state, unsigned rec)
969 {
970 struct dmabuf *dmabuf = &state->dmabuf;
971 unsigned bytepersec;
972 unsigned bufsize;
973 unsigned long flags;
974 int ret;
975
976 spin_lock_irqsave(&state->card->lock, flags);
977 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
978 dmabuf->count = dmabuf->error = 0;
979 spin_unlock_irqrestore(&state->card->lock, flags);
980
981 /* allocate DMA buffer if not allocated yet */
982 if (!dmabuf->rawbuf)
983 if ((ret = alloc_dmabuf(state)))
984 return ret;
985
986 /* FIXME: figure out all this OSS fragment stuff */
987 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
988 bufsize = PAGE_SIZE << dmabuf->buforder;
989 if (dmabuf->ossfragshift) {
990 if ((1000 << dmabuf->ossfragshift) < bytepersec)
991 dmabuf->fragshift = ld2(bytepersec/1000);
992 else
993 dmabuf->fragshift = dmabuf->ossfragshift;
994 } else {
995 /* lets hand out reasonable big ass buffers by default */
996 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
997 }
998 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
999 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1000 dmabuf->fragshift--;
1001 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1002 }
1003 dmabuf->fragsize = 1 << dmabuf->fragshift;
1004 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1005 dmabuf->numfrag = dmabuf->ossmaxfrags;
1006 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1007 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1008
1009 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1010 dmabuf->dmasize);
1011
1012 spin_lock_irqsave(&state->card->lock, flags);
1013 if (rec) {
1014 trident_rec_setup(state);
1015 } else {
1016 trident_play_setup(state);
1017 }
1018 spin_unlock_irqrestore(&state->card->lock, flags);
1019
1020 /* set the ready flag for the dma buffer */
1021 dmabuf->ready = 1;
1022
1023 #ifdef DEBUG
1024 printk("trident: prog_dmabuf, sample rate = %d, format = %d, numfrag = %d, "
1025 "fragsize = %d dmasize = %d\n",
1026 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1027 dmabuf->fragsize, dmabuf->dmasize);
1028 #endif
1029
1030 return 0;
1031 }
1032
1033 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1034 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
1035 but we almost always get this
1036 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
1037 so we have to clear the tail space to "silence"
1038 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
1039 */
1040 static void trident_clear_tail(struct trident_state *state)
1041 {
1042 struct dmabuf *dmabuf = &state->dmabuf;
1043 unsigned swptr;
1044 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1045 unsigned int len;
1046 unsigned long flags;
1047
1048 spin_lock_irqsave(&state->card->lock, flags);
1049 swptr = dmabuf->swptr;
1050 spin_unlock_irqrestore(&state->card->lock, flags);
1051
1052 if (swptr == 0 || swptr == dmabuf->dmasize / 2 || swptr == dmabuf->dmasize)
1053 return;
1054
1055 if (swptr < dmabuf->dmasize/2)
1056 len = dmabuf->dmasize/2 - swptr;
1057 else
1058 len = dmabuf->dmasize - swptr;
1059
1060 memset(dmabuf->rawbuf + swptr, silence, len);
1061
1062 spin_lock_irqsave(&state->card->lock, flags);
1063 dmabuf->swptr += len;
1064 dmabuf->count += len;
1065 spin_unlock_irqrestore(&state->card->lock, flags);
1066
1067 /* restart the dma machine in case it is halted */
1068 start_dac(state);
1069 }
1070
1071 static int drain_dac(struct trident_state *state, int nonblock)
1072 {
1073 DECLARE_WAITQUEUE(wait, current);
1074 struct dmabuf *dmabuf = &state->dmabuf;
1075 unsigned long flags;
1076 unsigned long tmo;
1077 int count;
1078
1079 if (dmabuf->mapped || !dmabuf->ready)
1080 return 0;
1081
1082 add_wait_queue(&dmabuf->wait, &wait);
1083 for (;;) {
1084 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1085 every time to make the process really go to sleep */
1086 current->state = TASK_INTERRUPTIBLE;
1087
1088 spin_lock_irqsave(&state->card->lock, flags);
1089 count = dmabuf->count;
1090 spin_unlock_irqrestore(&state->card->lock, flags);
1091
1092 if (count <= 0)
1093 break;
1094
1095 if (signal_pending(current))
1096 break;
1097
1098 if (nonblock) {
1099 remove_wait_queue(&dmabuf->wait, &wait);
1100 current->state = TASK_RUNNING;
1101 return -EBUSY;
1102 }
1103
1104 /* No matter how much data left in the buffer, we have to wait untill
1105 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1106 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1107 tmo >>= sample_shift[dmabuf->fmt];
1108 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
1109 printk(KERN_ERR "trident: drain_dac, dma timeout?\n");
1110 break;
1111 }
1112 }
1113 remove_wait_queue(&dmabuf->wait, &wait);
1114 current->state = TASK_RUNNING;
1115 if (signal_pending(current))
1116 return -ERESTARTSYS;
1117
1118 return 0;
1119 }
1120
1121 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1122 static void trident_update_ptr(struct trident_state *state)
1123 {
1124 struct dmabuf *dmabuf = &state->dmabuf;
1125 unsigned hwptr, swptr;
1126 int clear_cnt = 0;
1127 int diff;
1128 unsigned char silence;
1129 unsigned half_dmasize;
1130
1131 /* update hardware pointer */
1132 hwptr = trident_get_dma_addr(state);
1133 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1134 dmabuf->hwptr = hwptr;
1135 dmabuf->total_bytes += diff;
1136
1137 /* error handling and process wake up for DAC */
1138 if (dmabuf->enable == ADC_RUNNING) {
1139 if (dmabuf->mapped) {
1140 dmabuf->count -= diff;
1141 if (dmabuf->count >= (signed)dmabuf->fragsize)
1142 wake_up(&dmabuf->wait);
1143 } else {
1144 dmabuf->count += diff;
1145
1146 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1147 /* buffer underrun or buffer overrun, we have no way to recover
1148 it here, just stop the machine and let the process force hwptr
1149 and swptr to sync */
1150 __stop_adc(state);
1151 dmabuf->error++;
1152 }
1153 else if (!dmabuf->endcleared) {
1154 swptr = dmabuf->swptr;
1155 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1156 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1157 /* We must clear end data of 1/2 dmabuf if needed.
1158 According to 1/2 algorithm of Address Engine Interrupt,
1159 check the validation of the data of half dmasize. */
1160 half_dmasize = dmabuf->dmasize / 2;
1161 if ((diff = hwptr - half_dmasize) < 0 )
1162 diff = hwptr;
1163 if ((dmabuf->count + diff) < half_dmasize) {
1164 //there is invalid data in the end of half buffer
1165 if ((clear_cnt = half_dmasize - swptr) < 0)
1166 clear_cnt += half_dmasize;
1167 memset (dmabuf->rawbuf + swptr, silence, clear_cnt); //clear the invalid data
1168 dmabuf->endcleared = 1;
1169 }
1170 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1171 clear_cnt = dmabuf->fragsize;
1172 if ((swptr + clear_cnt) > dmabuf->dmasize)
1173 clear_cnt = dmabuf->dmasize - swptr;
1174 memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
1175 dmabuf->endcleared = 1;
1176 }
1177 }
1178 /* since dma machine only interrupts at ESO and ESO/2, we sure have at
1179 least half of dma buffer free, so wake up the process unconditionally */
1180 wake_up(&dmabuf->wait);
1181 }
1182 }
1183 /* error handling and process wake up for DAC */
1184 if (dmabuf->enable == DAC_RUNNING) {
1185 if (dmabuf->mapped) {
1186 dmabuf->count += diff;
1187 if (dmabuf->count >= (signed)dmabuf->fragsize)
1188 wake_up(&dmabuf->wait);
1189 } else {
1190 dmabuf->count -= diff;
1191
1192 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1193 /* buffer underrun or buffer overrun, we have no way to recover
1194 it here, just stop the machine and let the process force hwptr
1195 and swptr to sync */
1196 __stop_dac(state);
1197 dmabuf->error++;
1198 }
1199 /* since dma machine only interrupts at ESO and ESO/2, we sure have at
1200 least half of dma buffer free, so wake up the process unconditionally */
1201 wake_up(&dmabuf->wait);
1202 }
1203 }
1204 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1205 }
1206
1207 static void trident_address_interrupt(struct trident_card *card)
1208 {
1209 int i;
1210 struct trident_state *state;
1211
1212 /* Update the pointers for all channels we are running. */
1213 /* FIXME: should read interrupt status only once */
1214 for (i = 0; i < NR_HW_CH; i++) {
1215 if (trident_check_channel_interrupt(card, 63 - i)) {
1216 trident_ack_channel_interrupt(card, 63 - i);
1217 if ((state = card->states[i]) != NULL) {
1218 trident_update_ptr(state);
1219 } else {
1220 printk("trident: spurious channel irq %d.\n",
1221 63 - i);
1222 trident_stop_voice(card, 63 - i);
1223 trident_disable_voice_irq(card, 63 - i);
1224 }
1225 }
1226 }
1227 }
1228
1229 static void ali_address_interrupt(struct trident_card *card)
1230 {
1231 int i;
1232 struct trident_state *state;
1233
1234 for (i = 0; i < NR_HW_CH; i++) {
1235 if (trident_check_channel_interrupt(card, i)) {
1236 trident_ack_channel_interrupt(card, i);
1237 if ((state = card->states[i]) != NULL) {
1238 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
1239 trident_update_ptr(state);
1240 } else {
1241 printk("ali: spurious channel irq %d.\n", i);
1242 trident_stop_voice(card, i);
1243 trident_disable_voice_irq(card, i);
1244 }
1245 }
1246 }
1247 }
1248
1249 static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1250 {
1251 struct trident_card *card = (struct trident_card *)dev_id;
1252 u32 event;
1253
1254 spin_lock(&card->lock);
1255 event = inl(TRID_REG(card, T4D_MISCINT));
1256
1257 #ifdef DEBUG
1258 printk("trident: trident_interrupt called, MISCINT = 0x%08x\n", event);
1259 #endif
1260
1261 if (event & ADDRESS_IRQ) {
1262 card->address_interrupt(card);
1263 }
1264
1265 /* manually clear interrupt status, bad hardware design, blame T^2 */
1266 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1267 TRID_REG(card, T4D_MISCINT));
1268 spin_unlock(&card->lock);
1269 }
1270
1271 static loff_t trident_llseek(struct file *file, loff_t offset, int origin)
1272 {
1273 return -ESPIPE;
1274 }
1275
1276 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
1277 the user's buffer. it is filled by the dma machine and drained by this loop. */
1278 static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1279 {
1280 struct trident_state *state = (struct trident_state *)file->private_data;
1281 struct dmabuf *dmabuf = &state->dmabuf;
1282 ssize_t ret;
1283 unsigned long flags;
1284 unsigned swptr;
1285 int cnt;
1286
1287 #ifdef DEBUG
1288 printk("trident: trident_read called, count = %d\n", count);
1289 #endif
1290
1291 VALIDATE_STATE(state);
1292 if (ppos != &file->f_pos)
1293 return -ESPIPE;
1294 if (dmabuf->mapped)
1295 return -ENXIO;
1296 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1297 return ret;
1298 if (!access_ok(VERIFY_WRITE, buffer, count))
1299 return -EFAULT;
1300 ret = 0;
1301
1302 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)
1303 outl ( inl (TRID_REG (state->card, ALI_GLOBAL_CONTROL)) | ALI_PCM_IN_ENABLE, TRID_REG (state->card, ALI_GLOBAL_CONTROL));
1304
1305 while (count > 0) {
1306 spin_lock_irqsave(&state->card->lock, flags);
1307 if (dmabuf->count > (signed) dmabuf->dmasize) {
1308 /* buffer overrun, we are recovering from sleep_on_timeout,
1309 resync hwptr and swptr, make process flush the buffer */
1310 dmabuf->count = dmabuf->dmasize;
1311 dmabuf->swptr = dmabuf->hwptr;
1312 }
1313 swptr = dmabuf->swptr;
1314 cnt = dmabuf->dmasize - swptr;
1315 if (dmabuf->count < cnt)
1316 cnt = dmabuf->count;
1317 spin_unlock_irqrestore(&state->card->lock, flags);
1318
1319 if (cnt > count)
1320 cnt = count;
1321 if (cnt <= 0) {
1322 unsigned long tmo;
1323 /* buffer is empty, start the dma machine and wait for data to be
1324 recorded */
1325 start_adc(state);
1326 if (file->f_flags & O_NONBLOCK) {
1327 if (!ret) ret = -EAGAIN;
1328 return ret;
1329 }
1330 /* No matter how much space left in the buffer, we have to wait untill
1331 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1332 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1333 tmo >>= sample_shift[dmabuf->fmt];
1334 /* There are two situations when sleep_on_timeout returns, one is when
1335 the interrupt is serviced correctly and the process is waked up by
1336 ISR ON TIME. Another is when timeout is expired, which means that
1337 either interrupt is NOT serviced correctly (pending interrupt) or it
1338 is TOO LATE for the process to be scheduled to run (scheduler latency)
1339 which results in a (potential) buffer overrun. And worse, there is
1340 NOTHING we can do to prevent it. */
1341 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1342 #ifdef DEBUG
1343 printk(KERN_ERR "trident: recording schedule timeout, "
1344 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1345 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1346 dmabuf->hwptr, dmabuf->swptr);
1347 #endif
1348 /* a buffer overrun, we delay the recovery untill next time the
1349 while loop begin and we REALLY have space to record */
1350 }
1351 if (signal_pending(current)) {
1352 ret = ret ? ret : -ERESTARTSYS;
1353 return ret;
1354 }
1355 continue;
1356 }
1357
1358 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1359 if (!ret) ret = -EFAULT;
1360 return ret;
1361 }
1362
1363 swptr = (swptr + cnt) % dmabuf->dmasize;
1364
1365 spin_lock_irqsave(&state->card->lock, flags);
1366 dmabuf->swptr = swptr;
1367 dmabuf->count -= cnt;
1368 spin_unlock_irqrestore(&state->card->lock, flags);
1369
1370 count -= cnt;
1371 buffer += cnt;
1372 ret += cnt;
1373 start_adc(state);
1374 }
1375 return ret;
1376 }
1377
1378 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1379 the soundcard. it is drained by the dma machine and filled by this loop. */
1380 static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1381 {
1382 struct trident_state *state = (struct trident_state *)file->private_data;
1383 struct dmabuf *dmabuf = &state->dmabuf;
1384 ssize_t ret;
1385 unsigned long flags;
1386 unsigned swptr;
1387 int cnt;
1388
1389 #ifdef DEBUG
1390 printk("trident: trident_write called, count = %d\n", count);
1391 #endif
1392
1393 VALIDATE_STATE(state);
1394 if (ppos != &file->f_pos)
1395 return -ESPIPE;
1396 if (dmabuf->mapped)
1397 return -ENXIO;
1398 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1399 return ret;
1400 if (!access_ok(VERIFY_READ, buffer, count))
1401 return -EFAULT;
1402 ret = 0;
1403
1404 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)
1405 if (dmabuf->channel->num == ALI_PCM_IN_CHANNEL)
1406 outl ( inl (TRID_REG (state->card, ALI_GLOBAL_CONTROL)) & ALI_PCM_IN_DISABLE, TRID_REG (state->card, ALI_GLOBAL_CONTROL));
1407
1408 while (count > 0) {
1409 spin_lock_irqsave(&state->card->lock, flags);
1410 if (dmabuf->count < 0) {
1411 /* buffer underrun, we are recovering from sleep_on_timeout,
1412 resync hwptr and swptr */
1413 dmabuf->count = 0;
1414 dmabuf->swptr = dmabuf->hwptr;
1415 }
1416 swptr = dmabuf->swptr;
1417 cnt = dmabuf->dmasize - swptr;
1418 if (dmabuf->count + cnt > dmabuf->dmasize)
1419 cnt = dmabuf->dmasize - dmabuf->count;
1420 spin_unlock_irqrestore(&state->card->lock, flags);
1421
1422 if (cnt > count)
1423 cnt = count;
1424 if (cnt <= 0) {
1425 unsigned long tmo;
1426 /* buffer is full, start the dma machine and wait for data to be
1427 played */
1428 start_dac(state);
1429 if (file->f_flags & O_NONBLOCK) {
1430 if (!ret) ret = -EAGAIN;
1431 return ret;
1432 }
1433 /* No matter how much data left in the buffer, we have to wait untill
1434 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1435 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1436 tmo >>= sample_shift[dmabuf->fmt];
1437 /* There are two situations when sleep_on_timeout returns, one is when
1438 the interrupt is serviced correctly and the process is waked up by
1439 ISR ON TIME. Another is when timeout is expired, which means that
1440 either interrupt is NOT serviced correctly (pending interrupt) or it
1441 is TOO LATE for the process to be scheduled to run (scheduler latency)
1442 which results in a (potential) buffer underrun. And worse, there is
1443 NOTHING we can do to prevent it. */
1444 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1445 #ifdef DEBUG
1446 printk(KERN_ERR "trident: playback schedule timeout, "
1447 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1448 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1449 dmabuf->hwptr, dmabuf->swptr);
1450 #endif
1451 /* a buffer underrun, we delay the recovery untill next time the
1452 while loop begin and we REALLY have data to play */
1453 }
1454 if (signal_pending(current)) {
1455 if (!ret) ret = -ERESTARTSYS;
1456 return ret;
1457 }
1458 continue;
1459 }
1460 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
1461 if (!ret) ret = -EFAULT;
1462 return ret;
1463 }
1464
1465 swptr = (swptr + cnt) % dmabuf->dmasize;
1466
1467 spin_lock_irqsave(&state->card->lock, flags);
1468 dmabuf->swptr = swptr;
1469 dmabuf->count += cnt;
1470 dmabuf->endcleared = 0;
1471 spin_unlock_irqrestore(&state->card->lock, flags);
1472
1473 count -= cnt;
1474 buffer += cnt;
1475 ret += cnt;
1476 start_dac(state);
1477 }
1478 return ret;
1479 }
1480
1481 /* No kernel lock - we have our own spinlock */
1482 static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait)
1483 {
1484 struct trident_state *state = (struct trident_state *)file->private_data;
1485 struct dmabuf *dmabuf = &state->dmabuf;
1486 unsigned long flags;
1487 unsigned int mask = 0;
1488
1489 VALIDATE_STATE(state);
1490 if (file->f_mode & FMODE_WRITE)
1491 poll_wait(file, &dmabuf->wait, wait);
1492 if (file->f_mode & FMODE_READ)
1493 poll_wait(file, &dmabuf->wait, wait);
1494
1495 spin_lock_irqsave(&state->card->lock, flags);
1496 trident_update_ptr(state);
1497 if (file->f_mode & FMODE_READ) {
1498 if (dmabuf->count >= (signed)dmabuf->fragsize)
1499 mask |= POLLIN | POLLRDNORM;
1500 }
1501 if (file->f_mode & FMODE_WRITE) {
1502 if (dmabuf->mapped) {
1503 if (dmabuf->count >= (signed)dmabuf->fragsize)
1504 mask |= POLLOUT | POLLWRNORM;
1505 } else {
1506 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
1507 mask |= POLLOUT | POLLWRNORM;
1508 }
1509 }
1510 spin_unlock_irqrestore(&state->card->lock, flags);
1511
1512 return mask;
1513 }
1514
1515 static int trident_mmap(struct file *file, struct vm_area_struct *vma)
1516 {
1517 struct trident_state *state = (struct trident_state *)file->private_data;
1518 struct dmabuf *dmabuf = &state->dmabuf;
1519 int ret;
1520 unsigned long size;
1521
1522 VALIDATE_STATE(state);
1523 if (vma->vm_flags & VM_WRITE) {
1524 if ((ret = prog_dmabuf(state, 0)) != 0)
1525 return ret;
1526 } else if (vma->vm_flags & VM_READ) {
1527 if ((ret = prog_dmabuf(state, 1)) != 0)
1528 return ret;
1529 } else
1530 return -EINVAL;
1531
1532 if (vma->vm_pgoff != 0)
1533 return -EINVAL;
1534 size = vma->vm_end - vma->vm_start;
1535 if (size > (PAGE_SIZE << dmabuf->buforder))
1536 return -EINVAL;
1537 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1538 size, vma->vm_page_prot))
1539 return -EAGAIN;
1540 dmabuf->mapped = 1;
1541
1542 return 0;
1543 }
1544
1545 static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1546 {
1547 struct trident_state *state = (struct trident_state *)file->private_data;
1548 struct dmabuf *dmabuf = &state->dmabuf;
1549 unsigned long flags;
1550 audio_buf_info abinfo;
1551 count_info cinfo;
1552 int val, mapped, ret;
1553
1554 VALIDATE_STATE(state);
1555 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
1556 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
1557 #ifdef DEBUG
1558 printk("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
1559 _IOC_NR(cmd), arg ? *(int *)arg : 0);
1560 #endif
1561
1562 switch (cmd)
1563 {
1564 case OSS_GETVERSION:
1565 return put_user(SOUND_VERSION, (int *)arg);
1566
1567 case SNDCTL_DSP_RESET:
1568 /* FIXME: spin_lock ? */
1569 if (file->f_mode & FMODE_WRITE) {
1570 stop_dac(state);
1571 synchronize_irq();
1572 dmabuf->ready = 0;
1573 dmabuf->swptr = dmabuf->hwptr = 0;
1574 dmabuf->count = dmabuf->total_bytes = 0;
1575 }
1576 if (file->f_mode & FMODE_READ) {
1577 stop_adc(state);
1578 synchronize_irq();
1579 dmabuf->ready = 0;
1580 dmabuf->swptr = dmabuf->hwptr = 0;
1581 dmabuf->count = dmabuf->total_bytes = 0;
1582 }
1583 return 0;
1584
1585 case SNDCTL_DSP_SYNC:
1586 if (file->f_mode & FMODE_WRITE)
1587 return drain_dac(state, file->f_flags & O_NONBLOCK);
1588 return 0;
1589
1590 case SNDCTL_DSP_SPEED: /* set smaple rate */
1591 get_user_ret(val, (int *)arg, -EFAULT);
1592 if (val >= 0) {
1593 if (file->f_mode & FMODE_WRITE) {
1594 stop_dac(state);
1595 dmabuf->ready = 0;
1596 spin_lock_irqsave(&state->card->lock, flags);
1597 trident_set_dac_rate(state, val);
1598 spin_unlock_irqrestore(&state->card->lock, flags);
1599 }
1600 if (file->f_mode & FMODE_READ) {
1601 stop_adc(state);
1602 dmabuf->ready = 0;
1603 spin_lock_irqsave(&state->card->lock, flags);
1604 trident_set_adc_rate(state, val);
1605 spin_unlock_irqrestore(&state->card->lock, flags);
1606 }
1607 }
1608 return put_user(dmabuf->rate, (int *)arg);
1609
1610 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1611 get_user_ret(val, (int *)arg, -EFAULT);
1612 if (file->f_mode & FMODE_WRITE) {
1613 stop_dac(state);
1614 dmabuf->ready = 0;
1615 if (val)
1616 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1617 else
1618 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1619 }
1620 if (file->f_mode & FMODE_READ) {
1621 stop_adc(state);
1622 dmabuf->ready = 0;
1623 if (val)
1624 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1625 else
1626 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1627 }
1628 return 0;
1629
1630 case SNDCTL_DSP_GETBLKSIZE:
1631 if (file->f_mode & FMODE_WRITE) {
1632 if ((val = prog_dmabuf(state, 0)))
1633 return val;
1634 return put_user(dmabuf->fragsize, (int *)arg);
1635 }
1636 if (file->f_mode & FMODE_READ) {
1637 if ((val = prog_dmabuf(state, 1)))
1638 return val;
1639 return put_user(dmabuf->fragsize, (int *)arg);
1640 }
1641
1642 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1643 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
1644
1645 case SNDCTL_DSP_SETFMT: /* Select sample format */
1646 get_user_ret(val, (int *)arg, -EFAULT);
1647 if (val != AFMT_QUERY) {
1648 if (file->f_mode & FMODE_WRITE) {
1649 stop_dac(state);
1650 dmabuf->ready = 0;
1651 if (val == AFMT_S16_LE)
1652 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1653 else
1654 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
1655 }
1656 if (file->f_mode & FMODE_READ) {
1657 stop_adc(state);
1658 dmabuf->ready = 0;
1659 if (val == AFMT_S16_LE)
1660 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1661 else
1662 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
1663 }
1664 }
1665 return put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
1666 AFMT_S16_LE : AFMT_U8, (int *)arg);
1667
1668 case SNDCTL_DSP_CHANNELS:
1669 get_user_ret(val, (int *)arg, -EFAULT);
1670 if (val != 0) {
1671 if (file->f_mode & FMODE_WRITE) {
1672 stop_dac(state);
1673 dmabuf->ready = 0;
1674 if (val >= 2)
1675 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1676 else
1677 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1678 }
1679 if (file->f_mode & FMODE_READ) {
1680 stop_adc(state);
1681 dmabuf->ready = 0;
1682 if (val >= 2)
1683 dmabuf->fmt |= TRIDENT_FMT_STEREO;
1684 else
1685 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
1686 }
1687 }
1688 return put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
1689 (int *)arg);
1690
1691 case SNDCTL_DSP_POST:
1692 /* FIXME: the same as RESET ?? */
1693 return 0;
1694
1695 case SNDCTL_DSP_SUBDIVIDE:
1696 if (dmabuf->subdivision)
1697 return -EINVAL;
1698 get_user_ret(val, (int *)arg, -EFAULT);
1699 if (val != 1 && val != 2 && val != 4)
1700 return -EINVAL;
1701 dmabuf->subdivision = val;
1702 return 0;
1703
1704 case SNDCTL_DSP_SETFRAGMENT:
1705 get_user_ret(val, (int *)arg, -EFAULT);
1706
1707 dmabuf->ossfragshift = val & 0xffff;
1708 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
1709 if (dmabuf->ossfragshift < 4)
1710 dmabuf->ossfragshift = 4;
1711 if (dmabuf->ossfragshift > 15)
1712 dmabuf->ossfragshift = 15;
1713 if (dmabuf->ossmaxfrags < 4)
1714 dmabuf->ossmaxfrags = 4;
1715
1716 return 0;
1717
1718 case SNDCTL_DSP_GETOSPACE:
1719 if (!(file->f_mode & FMODE_WRITE))
1720 return -EINVAL;
1721 if (!dmabuf->enable && (val = prog_dmabuf(state, 0)) != 0)
1722 return val;
1723 spin_lock_irqsave(&state->card->lock, flags);
1724 trident_update_ptr(state);
1725 abinfo.fragsize = dmabuf->fragsize;
1726 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
1727 abinfo.fragstotal = dmabuf->numfrag;
1728 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1729 spin_unlock_irqrestore(&state->card->lock, flags);
1730 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1731
1732 case SNDCTL_DSP_GETISPACE:
1733 if (!(file->f_mode & FMODE_READ))
1734 return -EINVAL;
1735 if (!dmabuf->enable && (val = prog_dmabuf(state, 1)) != 0)
1736 return val;
1737 spin_lock_irqsave(&state->card->lock, flags);
1738 trident_update_ptr(state);
1739 abinfo.fragsize = dmabuf->fragsize;
1740 abinfo.bytes = dmabuf->count;
1741 abinfo.fragstotal = dmabuf->numfrag;
1742 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1743 spin_unlock_irqrestore(&state->card->lock, flags);
1744 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1745
1746 case SNDCTL_DSP_NONBLOCK:
1747 file->f_flags |= O_NONBLOCK;
1748 return 0;
1749
1750 case SNDCTL_DSP_GETCAPS:
1751 return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
1752 (int *)arg);
1753
1754 case SNDCTL_DSP_GETTRIGGER:
1755 val = 0;
1756 if (file->f_mode & FMODE_READ && dmabuf->enable)
1757 val |= PCM_ENABLE_INPUT;
1758 if (file->f_mode & FMODE_WRITE && dmabuf->enable)
1759 val |= PCM_ENABLE_OUTPUT;
1760 return put_user(val, (int *)arg);
1761
1762 case SNDCTL_DSP_SETTRIGGER:
1763 get_user_ret(val, (int *)arg, -EFAULT);
1764 if (file->f_mode & FMODE_READ) {
1765 if (val & PCM_ENABLE_INPUT) {
1766 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1767 return ret;
1768 start_adc(state);
1769 } else
1770 stop_adc(state);
1771 }
1772 if (file->f_mode & FMODE_WRITE) {
1773 if (val & PCM_ENABLE_OUTPUT) {
1774 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1775 return ret;
1776 start_dac(state);
1777 } else
1778 stop_dac(state);
1779 }
1780 return 0;
1781
1782 case SNDCTL_DSP_GETIPTR:
1783 if (!(file->f_mode & FMODE_READ))
1784 return -EINVAL;
1785 spin_lock_irqsave(&state->card->lock, flags);
1786 trident_update_ptr(state);
1787 cinfo.bytes = dmabuf->total_bytes;
1788 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1789 cinfo.ptr = dmabuf->hwptr;
1790 if (dmabuf->mapped)
1791 dmabuf->count &= dmabuf->fragsize-1;
1792 spin_unlock_irqrestore(&state->card->lock, flags);
1793 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1794
1795 case SNDCTL_DSP_GETOPTR:
1796 if (!(file->f_mode & FMODE_WRITE))
1797 return -EINVAL;
1798 spin_lock_irqsave(&state->card->lock, flags);
1799 trident_update_ptr(state);
1800 cinfo.bytes = dmabuf->total_bytes;
1801 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1802 cinfo.ptr = dmabuf->hwptr;
1803 if (dmabuf->mapped)
1804 dmabuf->count &= dmabuf->fragsize-1;
1805 spin_unlock_irqrestore(&state->card->lock, flags);
1806 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1807
1808 case SNDCTL_DSP_SETDUPLEX:
1809 return -EINVAL;
1810
1811 case SNDCTL_DSP_GETODELAY:
1812 if (!(file->f_mode & FMODE_WRITE))
1813 return -EINVAL;
1814 spin_lock_irqsave(&state->card->lock, flags);
1815 trident_update_ptr(state);
1816 val = dmabuf->count;
1817 spin_unlock_irqrestore(&state->card->lock, flags);
1818 return put_user(val, (int *)arg);
1819
1820 case SOUND_PCM_READ_RATE:
1821 return put_user(dmabuf->rate, (int *)arg);
1822
1823 case SOUND_PCM_READ_CHANNELS:
1824 return put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
1825 (int *)arg);
1826
1827 case SOUND_PCM_READ_BITS:
1828 return put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
1829 AFMT_S16_LE : AFMT_U8, (int *)arg);
1830
1831 case SNDCTL_DSP_GETCHANNELMASK:
1832 return put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE,
1833 (int *)arg);
1834
1835 case SNDCTL_DSP_BIND_CHANNEL:
1836 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018)
1837 return -EINVAL;
1838
1839 get_user_ret(val, (int *)arg, -EFAULT);
1840 if (val == DSP_BIND_QUERY) {
1841 val = dmabuf->channel->attribute | 0x3c00;
1842 val = attr2mask[val >> 8];
1843 } else {
1844 dmabuf->ready = 0;
1845 if (file->f_mode & FMODE_READ)
1846 dmabuf->channel->attribute = (CHANNEL_REC|SRC_ENABLE);
1847 if (file->f_mode & FMODE_WRITE)
1848 dmabuf->channel->attribute = (CHANNEL_SPC_PB|SRC_ENABLE);
1849 dmabuf->channel->attribute |= mask2attr[ffs(val)];
1850 }
1851 return put_user(val, (int *)arg);
1852
1853 case SNDCTL_DSP_MAPINBUF:
1854 case SNDCTL_DSP_MAPOUTBUF:
1855 case SNDCTL_DSP_SETSYNCRO:
1856 case SOUND_PCM_WRITE_FILTER:
1857 case SOUND_PCM_READ_FILTER:
1858 return -EINVAL;
1859
1860 }
1861 return -EINVAL;
1862 }
1863
1864 static int trident_open(struct inode *inode, struct file *file)
1865 {
1866 int i = 0;
1867 int minor = MINOR(inode->i_rdev);
1868 struct trident_card *card = devs;
1869 struct trident_state *state = NULL;
1870 struct dmabuf *dmabuf = NULL;
1871
1872 /* find an avaiable virtual channel (instance of /dev/dsp) */
1873 while (card != NULL) {
1874 for (i = 0; i < NR_HW_CH; i++) {
1875 if (card->states[i] == NULL) {
1876 state = card->states[i] = (struct trident_state *)
1877 kmalloc(sizeof(struct trident_state), GFP_KERNEL);
1878 if (state == NULL)
1879 return -ENOMEM;
1880 memset(state, 0, sizeof(struct trident_state));
1881 dmabuf = &state->dmabuf;
1882 goto found_virt;
1883 }
1884 }
1885 card = card->next;
1886 }
1887 /* no more virtual channel avaiable */
1888 if (!state)
1889 return -ENODEV;
1890
1891 found_virt:
1892 /* found a free virtual channel, allocate hardware channels */
1893 if(file->f_mode & FMODE_READ)
1894 dmabuf->channel = card->alloc_rec_pcm_channel(card);
1895 else
1896 dmabuf->channel = card->alloc_pcm_channel(card);
1897
1898 if (dmabuf->channel == NULL) {
1899 kfree (card->states[i]);
1900 card->states[i] = NULL;;
1901 return -ENODEV;
1902 }
1903
1904 /* initialize the virtual channel */
1905 state->virt = i;
1906 state->card = card;
1907 state->magic = TRIDENT_STATE_MAGIC;
1908 init_waitqueue_head(&dmabuf->wait);
1909 init_MUTEX(&state->open_sem);
1910 file->private_data = state;
1911
1912 down(&state->open_sem);
1913
1914 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
1915 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
1916 /dev/dspW will accept 16-bits sample */
1917 if (file->f_mode & FMODE_WRITE) {
1918 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
1919 if ((minor & 0x0f) == SND_DEV_DSP16)
1920 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1921 dmabuf->ossfragshift = 0;
1922 dmabuf->ossmaxfrags = 0;
1923 dmabuf->subdivision = 0;
1924 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
1925 /* set default channel attribute to normal playback */
1926 dmabuf->channel->attribute = CHANNEL_PB;
1927 }
1928 trident_set_dac_rate(state, 8000);
1929 }
1930
1931 if (file->f_mode & FMODE_READ) {
1932 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
1933 card->states[ALI_PCM_IN_CHANNEL] = state;
1934 card->states[i] = NULL;
1935 state->virt = ALI_PCM_IN_CHANNEL;
1936 }
1937 /* FIXME: Trident 4d can only record in signed 16-bits stereo, 48kHz sample,
1938 to be dealed with in trident_set_adc_rate() ?? */
1939 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
1940 if ((minor & 0x0f) == SND_DEV_DSP16)
1941 dmabuf->fmt |= TRIDENT_FMT_16BIT;
1942 dmabuf->ossfragshift = 0;
1943 dmabuf->ossmaxfrags = 0;
1944 dmabuf->subdivision = 0;
1945 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
1946 /* set default channel attribute to 0x8a80, record from
1947 PCM L/R FIFO and mono = (left + right + 1)/2*/
1948 dmabuf->channel->attribute =
1949 (CHANNEL_REC|PCM_LR|MONO_MIX);
1950 }
1951 trident_set_adc_rate(state, 8000);
1952 }
1953
1954 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1955 up(&state->open_sem);
1956
1957 MOD_INC_USE_COUNT;
1958 return 0;
1959 }
1960
1961 static int trident_release(struct inode *inode, struct file *file)
1962 {
1963 struct trident_state *state = (struct trident_state *)file->private_data;
1964 struct dmabuf *dmabuf = &state->dmabuf;
1965
1966 VALIDATE_STATE(state);
1967
1968 if (file->f_mode & FMODE_WRITE) {
1969 trident_clear_tail(state);
1970 drain_dac(state, file->f_flags & O_NONBLOCK);
1971 }
1972
1973 /* stop DMA state machine and free DMA buffers/channels */
1974 down(&state->open_sem);
1975
1976 if (file->f_mode & FMODE_WRITE) {
1977 stop_dac(state);
1978 dealloc_dmabuf(state);
1979 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1980 }
1981 if (file->f_mode & FMODE_READ) {
1982 stop_adc(state);
1983 dealloc_dmabuf(state);
1984 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1985 }
1986
1987 kfree(state->card->states[state->virt]);
1988 state->card->states[state->virt] = NULL;
1989 state->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1990
1991 /* we're covered by the open_sem */
1992 up(&state->open_sem);
1993
1994 MOD_DEC_USE_COUNT;
1995 return 0;
1996 }
1997
1998 static /*const*/ struct file_operations trident_audio_fops = {
1999 llseek: trident_llseek,
2000 read: trident_read,
2001 write: trident_write,
2002 poll: trident_poll,
2003 ioctl: trident_ioctl,
2004 mmap: trident_mmap,
2005 open: trident_open,
2006 release: trident_release,
2007 };
2008
2009 /* trident specific AC97 functions */
2010 /* Write AC97 codec registers */
2011 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2012 {
2013 struct trident_card *card = (struct trident_card *)codec->private_data;
2014 unsigned int address, mask, busy;
2015 unsigned short count = 0xffff;
2016 unsigned long flags;
2017 u32 data;
2018
2019 data = ((u32) val) << 16;
2020
2021 switch (card->pci_id)
2022 {
2023 default:
2024 case PCI_DEVICE_ID_SI_7018:
2025 address = SI_AC97_WRITE;
2026 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2027 if (codec->id)
2028 mask |= SI_AC97_SECONDARY;
2029 busy = SI_AC97_BUSY_WRITE;
2030 break;
2031 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2032 address = DX_ACR0_AC97_W;
2033 mask = busy = DX_AC97_BUSY_WRITE;
2034 break;
2035 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2036 address = NX_ACR1_AC97_W;
2037 mask = NX_AC97_BUSY_WRITE;
2038 if (codec->id)
2039 mask |= NX_AC97_WRITE_SECONDARY;
2040 busy = NX_AC97_BUSY_WRITE;
2041 break;
2042 }
2043
2044 spin_lock_irqsave(&card->lock, flags);
2045 do {
2046 if ((inw(TRID_REG(card, address)) & busy) == 0)
2047 break;
2048 } while (count--);
2049
2050
2051 data |= (mask | (reg & AC97_REG_ADDR));
2052
2053 if (count == 0) {
2054 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2055 spin_unlock_irqrestore(&card->lock, flags);
2056 return;
2057 }
2058
2059 outl(data, TRID_REG(card, address));
2060 spin_unlock_irqrestore(&card->lock, flags);
2061 }
2062
2063 /* Read AC97 codec registers */
2064 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2065 {
2066 struct trident_card *card = (struct trident_card *)codec->private_data;
2067 unsigned int address, mask, busy;
2068 unsigned short count = 0xffff;
2069 unsigned long flags;
2070 u32 data;
2071
2072 switch (card->pci_id)
2073 {
2074 default:
2075 case PCI_DEVICE_ID_SI_7018:
2076 address = SI_AC97_READ;
2077 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2078 if (codec->id)
2079 mask |= SI_AC97_SECONDARY;
2080 busy = SI_AC97_BUSY_READ;
2081 break;
2082 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2083 address = DX_ACR1_AC97_R;
2084 mask = busy = DX_AC97_BUSY_READ;
2085 break;
2086 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2087 if (codec->id)
2088 address = NX_ACR3_AC97_R_SECONDARY;
2089 else
2090 address = NX_ACR2_AC97_R_PRIMARY;
2091 mask = NX_AC97_BUSY_READ;
2092 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2093 break;
2094 }
2095
2096 data = (mask | (reg & AC97_REG_ADDR));
2097
2098 spin_lock_irqsave(&card->lock, flags);
2099 outl(data, TRID_REG(card, address));
2100 do {
2101 data = inl(TRID_REG(card, address));
2102 if ((data & busy) == 0)
2103 break;
2104 } while (count--);
2105 spin_unlock_irqrestore(&card->lock, flags);
2106
2107 if (count == 0) {
2108 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
2109 data = 0;
2110 }
2111 return ((u16) (data >> 16));
2112 }
2113
2114 /* Write AC97 codec registers for ALi*/
2115 static void ali_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2116 {
2117 struct trident_card *card = (struct trident_card *)codec->private_data;
2118 unsigned int address, mask;
2119 unsigned int wCount1 = 0xffff;
2120 unsigned int wCount2= 0xffff;
2121 unsigned long chk1, chk2;
2122 unsigned long flags;
2123 u32 data;
2124
2125 data = ((u32) val) << 16;
2126
2127 address = ALI_AC97_WRITE;
2128 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
2129 if (codec->id)
2130 mask |= ALI_AC97_SECONDARY;
2131 if (card->revision == 0x02)
2132 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
2133
2134 spin_lock_irqsave(&card->lock, flags);
2135 while (wCount1--) {
2136 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_WRITE) == 0) {
2137 data |= (mask | (reg & AC97_REG_ADDR));
2138
2139 chk1 = inl(TRID_REG(card, ALI_STIMER));
2140 chk2 = inl(TRID_REG(card, ALI_STIMER));
2141 while (wCount2-- && (chk1 == chk2))
2142 chk2 = inl(TRID_REG(card, ALI_STIMER));
2143 if (wCount2 == 0) {
2144 spin_unlock_irqrestore(&card->lock, flags);
2145 return;
2146 }
2147 outl(data, TRID_REG(card, address)); //write!
2148 spin_unlock_irqrestore(&card->lock, flags);
2149 return; //success
2150 }
2151 inw(TRID_REG(card, address)); //wait a read cycle
2152 }
2153
2154 printk(KERN_ERR "ali: AC97 CODEC write timed out.\n");
2155 spin_unlock_irqrestore(&card->lock, flags);
2156 return;
2157 }
2158
2159 /* Read AC97 codec registers for ALi*/
2160 static u16 ali_ac97_get(struct ac97_codec *codec, u8 reg)
2161 {
2162 struct trident_card *card = (struct trident_card *)codec->private_data;
2163 unsigned int address, mask;
2164 unsigned int wCount1 = 0xffff;
2165 unsigned int wCount2= 0xffff;
2166 unsigned long chk1, chk2;
2167 unsigned long flags;
2168 u32 data;
2169
2170 address = ALI_AC97_READ;
2171 if (card->revision == 0x02) {
2172 address = ALI_AC97_WRITE;
2173 mask &= ALI_AC97_READ_MIXER_REGISTER;
2174 }
2175 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
2176 if (codec->id)
2177 mask |= ALI_AC97_SECONDARY;
2178
2179 spin_lock_irqsave(&card->lock, flags);
2180 data = (mask | (reg & AC97_REG_ADDR));
2181 while (wCount1--) {
2182 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2183 chk1 = inl(TRID_REG(card, ALI_STIMER));
2184 chk2 = inl(TRID_REG(card, ALI_STIMER));
2185 while (wCount2-- && (chk1 == chk2))
2186 chk2 = inl(TRID_REG(card, ALI_STIMER));
2187 if (wCount2 == 0) {
2188 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2189 spin_unlock_irqrestore(&card->lock, flags);
2190 return 0;
2191 }
2192 outl(data, TRID_REG(card, address)); //read!
2193 wCount2 = 0xffff;
2194 while (wCount2--) {
2195 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2196 data = inl(TRID_REG(card, address));
2197 spin_unlock_irqrestore(&card->lock, flags);
2198 return ((u16) (data >> 16));
2199 }
2200 }
2201 }
2202 inw(TRID_REG(card, address)); //wait a read cycle
2203 }
2204 spin_unlock_irqrestore(&card->lock, flags);
2205 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2206 return 0;
2207 }
2208
2209 /* OSS /dev/mixer file operation methods */
2210 static int trident_open_mixdev(struct inode *inode, struct file *file)
2211 {
2212 int i;
2213 int minor = MINOR(inode->i_rdev);
2214 struct trident_card *card = devs;
2215
2216 for (card = devs; card != NULL; card = card->next)
2217 for (i = 0; i < NR_AC97; i++)
2218 if (card->ac97_codec[i] != NULL &&
2219 card->ac97_codec[i]->dev_mixer == minor)
2220 goto match;
2221
2222 if (!card)
2223 return -ENODEV;
2224
2225 match:
2226 file->private_data = card->ac97_codec[i];
2227
2228 MOD_INC_USE_COUNT;
2229 return 0;
2230 }
2231
2232 static int trident_release_mixdev(struct inode *inode, struct file *file)
2233 {
2234 MOD_DEC_USE_COUNT;
2235 return 0;
2236 }
2237
2238 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2239 unsigned long arg)
2240 {
2241 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2242
2243 return codec->mixer_ioctl(codec, cmd, arg);
2244 }
2245
2246 static /*const*/ struct file_operations trident_mixer_fops = {
2247 llseek: trident_llseek,
2248 ioctl: trident_ioctl_mixdev,
2249 open: trident_open_mixdev,
2250 release: trident_release_mixdev,
2251 };
2252
2253 /* AC97 codec initialisation. */
2254 static int __init trident_ac97_init(struct trident_card *card)
2255 {
2256 int num_ac97 = 0;
2257 int ready_2nd = 0;
2258 struct ac97_codec *codec;
2259
2260 /* initialize controller side of AC link, and find out if secondary codes
2261 really exist */
2262 switch (card->pci_id)
2263 {
2264 case PCI_DEVICE_ID_ALI_5451:
2265 outl(PCMOUT|SECONDARY_ID, TRID_REG(card, SI_SERIAL_INTF_CTRL));
2266 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
2267 ready_2nd &= SI_AC97_SECONDARY_READY;
2268 break;
2269 case PCI_DEVICE_ID_SI_7018:
2270 /* disable AC97 GPIO interrupt */
2271 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
2272 /* when power up the AC link is in cold reset mode so stop it */
2273 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT|SECONDARY_ID,
2274 TRID_REG(card, SI_SERIAL_INTF_CTRL));
2275 /* it take a long time to recover from a cold reset (especially when you have
2276 more than one codec) */
2277 udelay(2000);
2278 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
2279 ready_2nd &= SI_AC97_SECONDARY_READY;
2280 break;
2281 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2282 /* playback on */
2283 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
2284 break;
2285 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2286 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
2287 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2288 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2289 ready_2nd &= NX_AC97_SECONDARY_READY;
2290 break;
2291 }
2292
2293 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
2294 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
2295 return -ENOMEM;
2296 memset(codec, 0, sizeof(struct ac97_codec));
2297
2298 /* initialize some basic codec information, other fields will be filled
2299 in ac97_probe_codec */
2300 codec->private_data = card;
2301 codec->id = num_ac97;
2302
2303 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2304 codec->codec_read = ali_ac97_get;
2305 codec->codec_write = ali_ac97_set;
2306 }
2307 else {
2308 codec->codec_read = trident_ac97_get;
2309 codec->codec_write = trident_ac97_set;
2310 }
2311
2312 if (ac97_probe_codec(codec) == 0)
2313 break;
2314
2315 if ((codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0) {
2316 printk(KERN_ERR "trident: couldn't register mixer!\n");
2317 kfree(codec);
2318 break;
2319 }
2320
2321 card->ac97_codec[num_ac97] = codec;
2322
2323 /* if there is no secondary codec at all, don't probe any more */
2324 if (!ready_2nd)
2325 return num_ac97+1;
2326 }
2327
2328 return num_ac97;
2329 }
2330
2331 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
2332 untill "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
2333 static int __init trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
2334 {
2335 unsigned long iobase;
2336 struct trident_card *card;
2337 u8 revision;
2338
2339 if (!pci_dma_supported(pci_dev, TRIDENT_DMA_MASK)) {
2340 printk(KERN_ERR "trident: architecture does not support"
2341 " 30bit PCI busmaster DMA\n");
2342 return -ENODEV;
2343 }
2344 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
2345
2346 iobase = pci_resource_start (pci_dev, 0);
2347 if (check_region(iobase, 256)) {
2348 printk(KERN_ERR "trident: can't allocate I/O space at 0x%4.4lx\n",
2349 iobase);
2350 return -ENODEV;
2351 }
2352
2353 if (pci_enable_device(pci_dev))
2354 return -ENODEV;
2355
2356 if ((card = kmalloc(sizeof(struct trident_card), GFP_KERNEL)) == NULL) {
2357 printk(KERN_ERR "trident: out of memory\n");
2358 return -ENOMEM;
2359 }
2360 memset(card, 0, sizeof(*card));
2361
2362 card->iobase = iobase;
2363 card->pci_dev = pci_dev;
2364 card->pci_id = pci_id->device;
2365 card->revision = revision;
2366 card->irq = pci_dev->irq;
2367 card->next = devs;
2368 card->magic = TRIDENT_CARD_MAGIC;
2369 card->banks[BANK_A].addresses = &bank_a_addrs;
2370 card->banks[BANK_A].bitmap = 0UL;
2371 card->banks[BANK_B].addresses = &bank_b_addrs;
2372 card->banks[BANK_B].bitmap = 0UL;
2373 spin_lock_init(&card->lock);
2374 devs = card;
2375
2376 pci_set_master(pci_dev);
2377
2378 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
2379 card_names[pci_id->driver_data], card->iobase, card->irq);
2380
2381 if(card->pci_id == PCI_DEVICE_ID_ALI_5451)
2382 {
2383 card->alloc_pcm_channel = ali_alloc_pcm_channel;
2384 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
2385 card->free_pcm_channel = ali_free_pcm_channel;
2386 card->address_interrupt = ali_address_interrupt;
2387 }
2388 else
2389 {
2390 card->alloc_pcm_channel = trident_alloc_pcm_channel;
2391 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
2392 card->free_pcm_channel = trident_free_pcm_channel;
2393 card->address_interrupt = trident_address_interrupt;
2394 }
2395 /* claim our iospace and irq */
2396 request_region(card->iobase, 256, card_names[pci_id->driver_data]);
2397 if (request_irq(card->irq, &trident_interrupt, SA_SHIRQ,
2398 card_names[pci_id->driver_data], card)) {
2399 printk(KERN_ERR "trident: unable to allocate irq %d\n", card->irq);
2400 release_region(card->iobase, 256);
2401 kfree(card);
2402 return -ENODEV;
2403 }
2404 /* register /dev/dsp */
2405 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
2406 printk(KERN_ERR "trident: couldn't register DSP device!\n");
2407 release_region(iobase, 256);
2408 free_irq(card->irq, card);
2409 kfree(card);
2410 return -ENODEV;
2411 }
2412 /* initilize AC97 codec and register /dev/mixer */
2413 if (trident_ac97_init(card) <= 0) {
2414 unregister_sound_dsp(card->dev_audio);
2415 release_region(iobase, 256);
2416 free_irq(card->irq, card);
2417 kfree(card);
2418 return -ENODEV;
2419 }
2420 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
2421
2422 if (card->pci_id == PCI_DEVICE_ID_ALI_5451)
2423 {
2424 /* edited by HMSEO for GT sound */
2425 #ifdef CONFIG_ALPHA_NAUTILUS
2426 ac97_data = trident_ac97_get (card->ac97_codec[0], AC97_POWER_CONTROL);
2427 trident_ac97_set (card->ac97_codec[0], AC97_POWER_CONTROL, ac97_data | ALI_EAPD_POWER_DOWN);
2428 #endif
2429 /* edited by HMSEO for GT sound*/
2430 }
2431
2432 pci_dev->driver_data = card;
2433 pci_dev->dma_mask = TRIDENT_DMA_MASK;
2434
2435 /* Enable Address Engine Interrupts */
2436 trident_enable_loop_interrupts(card);
2437
2438 return 0;
2439 }
2440
2441 static void __exit trident_remove(struct pci_dev *pci_dev)
2442 {
2443 int i;
2444 struct trident_card *card = pci_dev->driver_data;
2445
2446 /* Kill interrupts, and SP/DIF */
2447 trident_disable_loop_interrupts(card);
2448
2449 /* free hardware resources */
2450 free_irq(card->irq, card);
2451 release_region(card->iobase, 256);
2452
2453 /* unregister audio devices */
2454 for (i = 0; i < NR_AC97; i++)
2455 if (card->ac97_codec[i] != NULL) {
2456 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
2457 kfree (card->ac97_codec[i]);
2458 }
2459 unregister_sound_dsp(card->dev_audio);
2460
2461 kfree(card);
2462 }
2463
2464 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee");
2465 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 PCI Audio Driver");
2466
2467 #define TRIDENT_MODULE_NAME "trident"
2468
2469 static struct pci_driver trident_pci_driver = {
2470 name: TRIDENT_MODULE_NAME,
2471 id_table: trident_pci_tbl,
2472 probe: trident_probe,
2473 remove: trident_remove,
2474 };
2475
2476 static int __init trident_init_module (void)
2477 {
2478 if (!pci_present()) /* No PCI bus in this machine! */
2479 return -ENODEV;
2480
2481 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451 PCI Audio, version "
2482 DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
2483
2484 if (!pci_register_driver(&trident_pci_driver)) {
2485 pci_unregister_driver(&trident_pci_driver);
2486 return -ENODEV;
2487 }
2488 return 0;
2489 }
2490
2491 static void __exit trident_cleanup_module (void)
2492 {
2493 pci_unregister_driver(&trident_pci_driver);
2494 }
2495
2496 module_init(trident_init_module);
2497 module_exit(trident_cleanup_module);
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