include/asm-sparc/semaphore-helper.h

   1 #ifndef _SPARC_SEMAPHORE_HELPER_H
   2 #define _SPARC_SEMAPHORE_HELPER_H
   3
   4 /*
   5  * (barely) SMP- and interrupt-safe semaphore helper functions, sparc version.
   6  *
   7  * (C) Copyright 1999 David S. Miller (davem@redhat.com)
   8  * (C) Copyright 1999 Jakub Jelinek (jj@ultra.linux.cz)
   9  */
  10 #define wake_one_more(sem)      atomic_inc(&(sem)->waking)
  11 static __inline__ int waking_non_zero(struct semaphore *sem)
  12 {
  13         int ret;
  14
  15 #ifdef __SMP__
  16         int tmp;
  17
  18         __asm__ __volatile__("
  19                 rd      %%psr, %%g1
  20                 or      %%g1, %3, %0
  21                 wr      %0, 0x0, %%psr
  22                 nop; nop; nop;
  23 1:              ldstub  [%2 + 3], %0
  24                 tst     %0
  25                 bne     1b
  26                 ld      [%2], %0
  27                 andn    %0, 0xff, %1
  28                 subcc   %0, 0x1ff, %0
  29                 bl,a    1f
  30                  mov    0, %0
  31                 mov     %0, %1
  32                 mov     1, %0
  33 1:              st      %1, [%2]
  34                 wr      %%g1, 0x0, %%psr
  35                 nop; nop; nop\n"
  36         : "=&r" (ret), "=&r" (tmp)
  37         : "r" (&sem->waking), "i" (PSR_PIL)
  38         : "g1", "memory", "cc");
  39 #else
  40         __asm__ __volatile__("
  41                 rd      %%psr, %%g1
  42                 or      %%g1, %2, %0
  43                 wr      %0, 0x0, %%psr
  44                 nop; nop; nop;
  45                 ld      [%1], %0
  46                 subcc   %0, 1, %0
  47                 bl,a    1f
  48                  mov    0, %0
  49                 st      %0, [%1]
  50                 mov     1, %0
  51 1:              wr      %%g1, 0x0, %%psr
  52                 nop; nop; nop\n"
  53         : "=&r" (ret)
  54         : "r" (&sem->waking), "i" (PSR_PIL)
  55         : "g1", "memory", "cc");
  56 #endif
  57         return ret;
  58 }
  59
  60 static __inline__ int waking_non_zero_interruptible(struct semaphore *sem,
  61                                                     struct task_struct *tsk)
  62 {
  63         int ret;
  64
  65 #ifdef __SMP__
  66         int tmp;
  67
  68         __asm__ __volatile__("
  69                 rd      %%psr, %%g1
  70                 or      %%g1, %3, %0
  71                 wr      %0, 0x0, %%psr
  72                 nop; nop; nop;
  73 1:              ldstub  [%2 + 3], %0
  74                 tst     %0
  75                 bne     1b
  76                 ld      [%2], %0
  77                 andn    %0, 0xff, %1
  78                 subcc   %0, 0x1ff, %0
  79                 bl,a    1f
  80                  mov    0, %0
  81                 mov     %0, %1
  82                 mov     1, %0
  83 1:              st      %1, [%2]
  84                 wr      %%g1, 0x0, %%psr
  85                 nop; nop; nop\n"
  86         : "=&r" (ret), "=&r" (tmp)
  87         : "r" (&sem->waking), "i" (PSR_PIL)
  88         : "g1", "memory", "cc");
  89 #else
  90         __asm__ __volatile__("
  91                 rd      %%psr, %%g1
  92                 or      %%g1, %2, %0
  93                 wr      %0, 0x0, %%psr
  94                 nop; nop; nop;
  95                 ld      [%1], %0
  96                 subcc   %0, 1, %0
  97                 bl,a    1f
  98                  mov    0, %0
  99                 st      %0, [%1]
 100                 mov     1, %0
 101 1:              wr      %%g1, 0x0, %%psr
 102                 nop; nop; nop\n"
 103         : "=&r" (ret)
 104         : "r" (&sem->waking), "i" (PSR_PIL)
 105         : "g1", "memory", "cc");
 106 #endif
 107         if(ret == 0 && signal_pending(tsk)) {
 108                 atomic_inc(&sem->count);
 109                 ret = -EINTR;
 110         }
 111         return ret;
 112 }
 113
 114 static __inline__ int waking_non_zero_trylock(struct semaphore *sem)
 115 {
 116         int ret;
 117
 118 #ifdef __SMP__
 119         int tmp;
 120
 121         __asm__ __volatile__("
 122                 rd      %%psr, %%g1
 123                 or      %%g1, %3, %0
 124                 wr      %0, 0x0, %%psr
 125                 nop; nop; nop;
 126 1:              ldstub  [%2 + 3], %0
 127                 tst     %0
 128                 bne     1b
 129                 ld      [%2], %0
 130                 andn    %0, 0xff, %1
 131                 subcc   %0, 0x1ff, %0
 132                 bl,a    1f
 133                  mov    0, %0
 134                 mov     %0, %1
 135                 mov     1, %0
 136 1:              st      %1, [%2]
 137                 wr      %%g1, 0x0, %%psr
 138                 nop; nop; nop\n"
 139         : "=&r" (ret), "=&r" (tmp)
 140         : "r" (&sem->waking), "i" (PSR_PIL)
 141         : "g1", "memory", "cc");
 142 #else
 143         __asm__ __volatile__("
 144                 rd      %%psr, %%g1
 145                 or      %%g1, %2, %0
 146                 wr      %0, 0x0, %%psr
 147                 nop; nop; nop;
 148                 ld      [%1], %0
 149                 subcc   %0, 1, %0
 150                 bl,a    1f
 151                  mov    0, %0
 152                 st      %0, [%1]
 153                 mov     1, %0
 154 1:              wr      %%g1, 0x0, %%psr
 155                 nop; nop; nop\n"
 156         : "=&r" (ret)
 157         : "r" (&sem->waking), "i" (PSR_PIL)
 158         : "g1", "memory", "cc");
 159 #endif
 160         ret = !ret;
 161         if(ret == 1)
 162                 atomic_inc(&sem->count);
 163         return ret;
 164 }
 165
 166 #endif /* !(_SPARC_SEMAPHORE_HELPER_H) */
 167