include/asm-sparc/ide.h

   1 /* $Id: ide.h,v 1.2 2000/01/21 04:56:27 zaitcev Exp $
   2  * ide.h: SPARC PCI specific IDE glue.
   3  *
   4  * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
   6  * Adaptation from sparc64 version to sparc by Pete Zaitcev.
   7  */
   8
   9 #ifndef _SPARC_IDE_H
  10 #define _SPARC_IDE_H
  11
  12 #ifdef __KERNEL__
  13
  14 #include <asm/pgtable.h>
  15 #include <asm/io.h>
  16 #include <asm/hdreg.h>
  17 #include <asm/psr.h>
  18
  19 #undef  MAX_HWIFS
  20 #define MAX_HWIFS       2
  21
  22 #define ide__sti()      __sti()
  23
  24 static __inline__ int ide_default_irq(ide_ioreg_t base)
  25 {
  26         return 0;
  27 }
  28
  29 static __inline__ ide_ioreg_t ide_default_io_base(int index)
  30 {
  31         return 0;
  32 }
  33
  34 /*
  35  * Doing any sort of ioremap() here does not work
  36  * because this function may be called with null aguments.
  37  */
  38 static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
  39 {
  40         ide_ioreg_t reg =  data_port;
  41         int i;
  42
  43         for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
  44                 hw->io_ports[i] = reg;
  45                 reg += 1;
  46         }
  47         if (ctrl_port) {
  48                 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
  49         } else {
  50                 hw->io_ports[IDE_CONTROL_OFFSET] = 0;
  51         }
  52         if (irq != NULL)
  53                 *irq = 0;
  54 }
  55
  56 /*
  57  * This registers the standard ports for this architecture with the IDE
  58  * driver.
  59  */
  60 static __inline__ void ide_init_default_hwifs(void)
  61 {
  62 #ifdef __DO_I_NEED_THIS
  63         hw_regs_t hw;
  64         int index;
  65
  66         for (index = 0; index < MAX_HWIFS; index++) {
  67                 ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, 0);
  68                 hw.irq = ide_default_irq(ide_default_io_base(index));
  69                 ide_register_hw(&hw, NULL);
  70         }
  71 #endif /* __DO_I_NEED_THIS */
  72 }
  73
  74 typedef union {
  75         unsigned int            all     : 8;    /* all of the bits together */
  76         struct {
  77                 unsigned int    bit7    : 1;
  78                 unsigned int    lba     : 1;
  79                 unsigned int    bit5    : 1;
  80                 unsigned int    unit    : 1;
  81                 unsigned int    head    : 4;
  82         } b;
  83 } select_t;
  84
  85 static __inline__ int ide_request_irq(unsigned int irq,
  86                                       void (*handler)(int, void *, struct pt_regs *),
  87                                       unsigned long flags, const char *name, void *devid)
  88 {
  89         return request_irq(irq, handler, SA_SHIRQ, name, devid);
  90 }
  91
  92 static __inline__ void ide_free_irq(unsigned int irq, void *dev_id)
  93 {
  94         free_irq(irq, dev_id);
  95 }
  96
  97 static __inline__ int ide_check_region(ide_ioreg_t base, unsigned int size)
  98 {
  99         /* We leave these empty because pcic.c calls sparc_alloc_io() */
 100         return 0;
 101 }
 102
 103 static __inline__ void ide_request_region(ide_ioreg_t base, unsigned int size,
 104                                           const char *name)
 105 {
 106 }
 107
 108 static __inline__ void ide_release_region(ide_ioreg_t base, unsigned int size)
 109 {
 110 }
 111
 112 #undef  SUPPORT_SLOW_DATA_PORTS
 113 #define SUPPORT_SLOW_DATA_PORTS 0
 114
 115 #undef  SUPPORT_VLB_SYNC
 116 #define SUPPORT_VLB_SYNC 0
 117
 118 #undef  HD_DATA
 119 #define HD_DATA ((ide_ioreg_t)0)
 120
 121 /* From m68k code... */
 122
 123 #ifdef insl
 124 #undef insl
 125 #endif
 126 #ifdef outsl
 127 #undef outsl
 128 #endif
 129 #ifdef insw
 130 #undef insw
 131 #endif
 132 #ifdef outsw
 133 #undef outsw
 134 #endif
 135
 136 #define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1)
 137 #define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
 138
 139 #define insw(port, buf, nr) ide_insw((port), (buf), (nr))
 140 #define outsw(port, buf, nr) ide_outsw((port), (buf), (nr))
 141
 142 static __inline__ void ide_insw(unsigned long port,
 143                                 void *dst,
 144                                 unsigned long count)
 145 {
 146         volatile unsigned short *data_port;
 147         /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
 148         u16 *ps = dst;
 149         u32 *pi;
 150
 151         data_port = (volatile unsigned short *)port;
 152
 153         if(((unsigned long)ps) & 0x2) {
 154                 *ps++ = *data_port;
 155                 count--;
 156         }
 157         pi = (u32 *)ps;
 158         while(count >= 2) {
 159                 u32 w;
 160
 161                 w  = (*data_port) << 16;
 162                 w |= (*data_port);
 163                 *pi++ = w;
 164                 count -= 2;
 165         }
 166         ps = (u16 *)pi;
 167         if(count)
 168                 *ps++ = *data_port;
 169
 170         /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
 171 }
 172
 173 static __inline__ void ide_outsw(unsigned long port,
 174                                  const void *src,
 175                                  unsigned long count)
 176 {
 177         volatile unsigned short *data_port;
 178         /* unsigned long end = (unsigned long)src + (count << 1); */
 179         const u16 *ps = src;
 180         const u32 *pi;
 181
 182         data_port = (volatile unsigned short *)port;
 183
 184         if(((unsigned long)src) & 0x2) {
 185                 *data_port = *ps++;
 186                 count--;
 187         }
 188         pi = (const u32 *)ps;
 189         while(count >= 2) {
 190                 u32 w;
 191
 192                 w = *pi++;
 193                 *data_port = (w >> 16);
 194                 *data_port = w;
 195                 count -= 2;
 196         }
 197         ps = (const u16 *)pi;
 198         if(count)
 199                 *data_port = *ps;
 200
 201         /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
 202 }
 203
 204 #define T_CHAR          (0x0000)        /* char:  don't touch  */
 205 #define T_SHORT         (0x4000)        /* short: 12 -> 21     */
 206 #define T_INT           (0x8000)        /* int:   1234 -> 4321 */
 207 #define T_TEXT          (0xc000)        /* text:  12 -> 21     */
 208
 209 #define T_MASK_TYPE     (0xc000)
 210 #define T_MASK_COUNT    (0x3fff)
 211
 212 #define D_CHAR(cnt)     (T_CHAR  | (cnt))
 213 #define D_SHORT(cnt)    (T_SHORT | (cnt))
 214 #define D_INT(cnt)      (T_INT   | (cnt))
 215 #define D_TEXT(cnt)     (T_TEXT  | (cnt))
 216
 217 static u_short driveid_types[] = {
 218         D_SHORT(10),    /* config - vendor2 */
 219         D_TEXT(20),     /* serial_no */
 220         D_SHORT(3),     /* buf_type - ecc_bytes */
 221         D_TEXT(48),     /* fw_rev - model */
 222         D_CHAR(2),      /* max_multsect - vendor3 */
 223         D_SHORT(1),     /* dword_io */
 224         D_CHAR(2),      /* vendor4 - capability */
 225         D_SHORT(1),     /* reserved50 */
 226         D_CHAR(4),      /* vendor5 - tDMA */
 227         D_SHORT(4),     /* field_valid - cur_sectors */
 228         D_INT(1),       /* cur_capacity */
 229         D_CHAR(2),      /* multsect - multsect_valid */
 230         D_INT(1),       /* lba_capacity */
 231         D_SHORT(194)    /* dma_1word - reservedyy */
 232 };
 233
 234 #define num_driveid_types       (sizeof(driveid_types)/sizeof(*driveid_types))
 235
 236 static __inline__ void ide_fix_driveid(struct hd_driveid *id)
 237 {
 238         u_char *p = (u_char *)id;
 239         int i, j, cnt;
 240         u_char t;
 241
 242         for (i = 0; i < num_driveid_types; i++) {
 243                 cnt = driveid_types[i] & T_MASK_COUNT;
 244                 switch (driveid_types[i] & T_MASK_TYPE) {
 245                 case T_CHAR:
 246                         p += cnt;
 247                         break;
 248                 case T_SHORT:
 249                         for (j = 0; j < cnt; j++) {
 250                                 t = p[0];
 251                                 p[0] = p[1];
 252                                 p[1] = t;
 253                                 p += 2;
 254                         }
 255                         break;
 256                 case T_INT:
 257                         for (j = 0; j < cnt; j++) {
 258                                 t = p[0];
 259                                 p[0] = p[3];
 260                                 p[3] = t;
 261                                 t = p[1];
 262                                 p[1] = p[2];
 263                                 p[2] = t;
 264                                 p += 4;
 265                         }
 266                         break;
 267                 case T_TEXT:
 268                         for (j = 0; j < cnt; j += 2) {
 269                                 t = p[0];
 270                                 p[0] = p[1];
 271                                 p[1] = t;
 272                                 p += 2;
 273                         }
 274                         break;
 275                 };
 276         }
 277 }
 278
 279 /*
 280  * The following are not needed for the non-m68k ports
 281  */
 282 #define ide_ack_intr(hwif)              (1)
 283 /* #define ide_ack_intr(hwif)   ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) */
 284 #define ide_release_lock(lock)          do {} while (0)
 285 #define ide_get_lock(lock, hdlr, data)  do {} while (0)
 286
 287 #endif /* __KERNEL__ */
 288
 289 #endif /* _SPARC_IDE_H */