4 #include <linux/cache.h>
5 #include <linux/spinlock.h>
8 #include <asm/ptrace.h>
13 #define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */
14 #define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */
15 #define IRQ_PENDING 4 /* IRQ pending - replay on enable */
16 #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
17 #define IRQ_AUTODETECT 16 /* IRQ is being autodetected */
18 #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */
19 #define IRQ_LEVEL 64 /* IRQ level triggered */
20 #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */
23 * Interrupt controller descriptor. This is all we need
24 * to describe about the low-level hardware.
26 struct hw_interrupt_type
{
27 const char * typename
;
28 unsigned int (*startup
)(unsigned int irq
);
29 void (*shutdown
)(unsigned int irq
);
30 void (*enable
)(unsigned int irq
);
31 void (*disable
)(unsigned int irq
);
32 void (*ack
)(unsigned int irq
);
33 void (*end
)(unsigned int irq
);
34 void (*set_affinity
)(unsigned int irq
, unsigned long mask
);
37 typedef struct hw_interrupt_type hw_irq_controller
;
40 * This is the "IRQ descriptor", which contains various information
41 * about the irq, including what kind of hardware handling it has,
42 * whether it is disabled etc etc.
44 * Pad this out to 32 bytes for cache and indexing reasons.
47 unsigned int status
; /* IRQ status */
48 hw_irq_controller
*handler
;
49 struct irqaction
*action
; /* IRQ action list */
50 unsigned int depth
; /* nested irq disables */
52 } ____cacheline_aligned irq_desc_t
;
54 extern irq_desc_t irq_desc
[NR_IRQS
];
56 #include <asm/hw_irq.h> /* the arch dependent stuff */
58 extern int handle_IRQ_event(unsigned int, struct pt_regs
*, struct irqaction
*);
59 extern int setup_irq(unsigned int , struct irqaction
* );
61 extern hw_irq_controller no_irq_type
; /* needed in every arch ? */
62 extern void no_action(int cpl
, void *dev_id
, struct pt_regs
*regs
);
64 extern volatile unsigned long irq_err_count
;