include/linux/ibmtr.h

   1 /* Definitions for an IBM Token Ring card. */
   2 /* This file is distributed under the GNU GPL   */
   3
   4 /* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */
   5
   6 #define TR_RETRY_INTERVAL (5*HZ) /* 500 on PC = 5 s */
   7 #define TR_RESET_INTERVAL (HZ/20) /* 5 on PC = 50 ms */
   8 #define TR_BUSY_INTERVAL (HZ/5) /* 5 on PC = 200 ms */
   9 #define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */
  10 #define TR_RETRIES 6            /* number of open retries */
  11
  12 #define TR_ISA 1
  13 #define TR_MCA 2
  14 #define TR_ISAPNP 3
  15 #define NOTOK 0
  16 #define TOKDEBUG 1
  17
  18 #define IBMTR_SHARED_RAM_SIZE 0x10000
  19 #define IBMTR_IO_EXTENT 4
  20 #define IBMTR_MAX_ADAPTERS 2
  21
  22 #define CHANNEL_ID      0X1F30
  23 #define AIP             0X1F00
  24 #define AIPCHKSUM1      0X1F60
  25 #define AIPCHKSUM2      0X1FF0
  26 #define AIPADAPTYPE     0X1FA0
  27 #define AIPDATARATE     0X1FA2
  28 #define AIPEARLYTOKEN   0X1FA4
  29 #define AIPAVAILSHRAM   0X1FA6
  30 #define AIPSHRAMPAGE    0X1FA8
  31 #define AIP4MBDHB       0X1FAA
  32 #define AIP16MBDHB      0X1FAC
  33 #define AIPFID          0X1FBA
  34
  35 /* Note, 0xA20 == 0x220 since motherboard decodes 10 bits.  I left everything
  36    the way my documentation had it, ie: 0x0A20.     */
  37 #define ADAPTINTCNTRL   0x02f0  /* Adapter interrupt control */
  38 #define ADAPTRESET      0x1     /* Control Adapter reset (add to base) */
  39 #define ADAPTRESETREL   0x2     /* Release Adapter from reset ( """)  */
  40 #define ADAPTINTREL     0x3     /* Adapter interrupt release */
  41
  42 #define MMIOStartLocP   0x0a20  /* Primary adapter's starting MMIO area */
  43 #define MMIOStartLocA   0x0a24  /* Alternate adapter's starting MMIO area */
  44
  45 #define GLOBAL_INT_ENABLE 0x02f0
  46
  47 /* MMIO bits 0-4 select register */
  48 #define RRR_EVEN        0x00    /* Shared RAM relocation registers - even and odd */
  49 /* Used to set the starting address of shared RAM  */
  50 /* Bits 1 through 7 of this register map to bits 13 through 19 of the shared RAM address.*/
  51 /* ie: 0x02 sets RAM address to ...ato!  issy su wazzoo !! GODZILLA!!! */
  52 #define RRR_ODD         0x01
  53 /* Bits 2 and 3 of this register can be read to determine shared RAM size */
  54 /* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k  */
  55 #define WRBR_EVEN       0x02    /* Write region base registers - even and odd */
  56 #define WRBR_ODD        0x03
  57 #define WWOR_EVEN       0x04    /* Write window open registers - even and odd */
  58 #define WWOR_ODD        0x05
  59 #define WWCR_EVEN       0x06    /* Write window close registers - even and odd */
  60 #define WWCR_ODD        0x07
  61
  62 /* Interrupt status registers - PC system  - even and odd */
  63 #define ISRP_EVEN       0x08
  64
  65 #define TCR_INT 0x10    /* Bit 4 - Timer interrupt.  The TVR_EVEN timer has
  66                                                                    expired. */
  67 #define ERR_INT 0x08    /* Bit 3 - Error interrupt.  The adapter has had an
  68                                                                    internal error. */
  69 #define ACCESS_INT 0x04    /* Bit 2 - Access interrupt.  You have attempted to
  70                                                            write to an invalid area of shared RAM or an invalid
  71                                                                    register within the MMIO. */
  72 /*      In addition, the following bits within ISRP_EVEN can be turned on or off by you */
  73 /*      to control the interrupt processing:   */
  74 #define INT_IRQ 0x80    /* Bit 7 - If 0 the adapter will issue a CHCK, if 1 and
  75                                                               IRQ.  This should normally be set (by you) to 1.  */
  76 #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable.  If 0, no interrupts will
  77                                                                    occur.  If 1, interrupts will occur normally.
  78                                                                    Normally set to 1.  */
  79 /* Bit 0 - Primary or alternate adapter.  Set to zero if this adapter is the primary adapter,*/
  80 /*         1 if this adapter is the alternate adapter. */
  81
  82
  83 #define ISRP_ODD        0x09
  84
  85 #define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check.  the adapter has
  86                              encountered a serious problem and has closed
  87                              itself.  Whoa.  */
  88 #define SRB_RESP_INT 0x20 /* Bit 5 - SRB response.  The adapter has accepted
  89                              an SRB request and set the return code within
  90                              the SRB. */
  91 #define ASB_FREE_INT 0x10 /* Bit 4 - ASB free.  The adapter has read the ASB
  92                                                                           and this area can be safely reused. This interrupt
  93                                                                           is only used if your application has set the ASB
  94                                                                           free request bit in ISRA_ODD or if an error was
  95                                                                 detected in your response. */
  96 #define ARB_CMD_INT  0x08 /* Bit 3 - ARB command.  The adapter has given you a
  97                                                                           command for action.  The command is located in the
  98                                                                           ARB area of shared memory. */
  99 #define SSB_RESP_INT 0x04 /* Bit 2 - SSB response.  The adapter has posted a
 100                                                                           response to your SRB (the response is located in
 101                                                                           the SSB area of shared memory). */
 102 /* Bit 1 - Bridge frame forward complete. */
 103
 104
 105
 106 #define ISRA_EVEN       0x0A    /* Interrupt status registers - adapter  - even and odd */
 107 /* Bit 7 - Internal parity error (on adapter's internal bus) */
 108 /* Bit 6 - Timer interrupt pending */
 109 /* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */
 110 /* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */
 111 /* Bit 3 - Adapter processor check status */
 112 /* Bit 2 - Reserved */
 113 /* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */
 114 /* Bit 0 - Adapter software interrupt mask (prevents internal software interrupts) */
 115
 116 #define ISRA_ODD        0x0B
 117 #define CMD_IN_SRB 0x20 /* Bit 5  - Indicates that you have placed a new
 118                            command in the SRB and are ready for the adapter to
 119                            process the command. */
 120 #define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response
 121                                                                     (an ASB) in the shared RAM which is available for
 122                                                                          the adapter's use. */
 123 /* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but that a previous */
 124 /*         command is still pending.  The adapter will then interrupt you when the previous */
 125 /*         command is completed */
 126 /* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but that a previous */
 127 /*         ASB is still pending.  The adapter will then interrupt you when the previous ASB */
 128 /*         is copied.  */
 129 #define ARB_FREE 0x2
 130 #define SSB_FREE 0x1
 131
 132 #define TCR_EVEN        0x0C    /* Timer control registers - even and odd */
 133 #define TCR_ODD         0x0D
 134 #define TVR_EVEN        0x0E    /* Timer value registers - even and odd */
 135 #define TVR_ODD         0x0F
 136 #define SRPR_EVEN       0x18    /* Shared RAM paging registers - even and odd */
 137 #define SRPR_ENABLE_PAGING 0xc0
 138 #define SRPR_ODD        0x19 /* Not used. */
 139 #define TOKREAD         0x60
 140 #define TOKOR           0x40
 141 #define TOKAND          0x20
 142 #define TOKWRITE        0x00
 143
 144 /* MMIO bits 5-6 select operation */
 145 /* 00 is used to write to a register */
 146 /* 01 is used to bitwise AND a byte with a register */
 147 /* 10 is used to bitwise OR a byte with a register  */
 148 /* 11 is used to read from a register */
 149
 150 /* MMIO bits 7-8 select area of interest.. see below */
 151 /* 00 selects attachment control area. */
 152 /* 01 is reserved. */
 153 /* 10 selects adapter identification area A containing the adapter encoded address. */
 154 /* 11 selects the adapter identification area B containing test patterns. */
 155
 156 #define PCCHANNELID 5049434F3631313039393020
 157 #define MCCHANNELID 4D4152533633583435313820
 158
 159 #define ACA_OFFSET 0x1e00
 160 #define ACA_SET 0x40
 161 #define ACA_RESET 0x20
 162 #define ACA_RW 0x00
 163
 164 #ifdef ENABLE_PAGING
 165 #define SET_PAGE(x) (isa_writeb((x), \
 166   ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN))
 167 #else
 168 #define SET_PAGE(x)
 169 #endif
 170
 171 typedef enum { IN_PROGRESS, SUCCESS, FAILURE, CLOSED } open_state;
 172
 173 /* do_tok_int possible values */
 174 #define FIRST_INT 1
 175 #define NOT_FIRST 2
 176
 177 struct tok_info {
 178         unsigned char irq;
 179         __u32 mmio;
 180         unsigned char hw_address[32];
 181         unsigned char adapter_type;
 182         unsigned char data_rate;
 183         unsigned char token_release;
 184         unsigned char avail_shared_ram;
 185         unsigned char shared_ram_paging;
 186         unsigned short dhb_size4mb;
 187         unsigned short rbuf_len4;
 188         unsigned short rbuf_cnt4;
 189         unsigned short maxmtu4;
 190         unsigned short dhb_size16mb;
 191         unsigned short rbuf_len16;
 192         unsigned short rbuf_cnt16;
 193         unsigned short maxmtu16;
 194         /* Additions by David Morris       */
 195         unsigned char do_tok_int;
 196         wait_queue_head_t wait_for_tok_int;
 197         wait_queue_head_t wait_for_reset;
 198         unsigned char sram_base;
 199         /* Additions by Peter De Schrijver */
 200         unsigned char page_mask;          /* mask to select RAM page to Map*/
 201         unsigned char mapped_ram_size;    /* size of RAM page */
 202         __u32 sram;                       /* Shared memory base address */
 203         __u32 init_srb;                   /* Initial System Request Block address */
 204         __u32 srb;                        /* System Request Block address */
 205         __u32 ssb;                        /* System Status Block address */
 206         __u32 arb;                        /* Adapter Request Block address */
 207         __u32 asb;                        /* Adapter Status Block address */
 208         __u8  init_srb_page;
 209         __u8  srb_page;
 210         __u8  ssb_page;
 211         __u8  arb_page;
 212         __u8  asb_page;
 213         unsigned short exsap_station_id;
 214         unsigned short global_int_enable;
 215         struct sk_buff *current_skb;
 216         struct net_device_stats tr_stats;
 217         unsigned char auto_ringspeedsave;
 218         open_state open_status;
 219         unsigned char readlog_pending;
 220         unsigned short adapter_int_enable; /* Adapter-specific int enable */
 221         struct timer_list tr_timer;
 222         unsigned char ring_speed;
 223         __u32 func_addr;
 224         unsigned int retry_count;
 225         spinlock_t lock;                /* SMP protection */
 226 };
 227
 228 /* token ring adapter commands */
 229 #define DIR_INTERRUPT           0x00 /* struct srb_interrupt */
 230 #define DIR_MOD_OPEN_PARAMS     0x01
 231 #define DIR_OPEN_ADAPTER        0x03 /* struct dir_open_adapter */
 232 #define DIR_CLOSE_ADAPTER       0x04
 233 #define DIR_SET_GRP_ADDR        0x06
 234 #define DIR_SET_FUNC_ADDR       0x07 /* struct srb_set_funct_addr */
 235 #define DIR_READ_LOG            0x08 /* struct srb_read_log */
 236 #define DLC_OPEN_SAP            0x15 /* struct dlc_open_sap */
 237 #define DLC_CLOSE_SAP           0x16
 238 #define DATA_LOST               0x20 /* struct asb_rec */
 239 #define REC_DATA                0x81 /* struct arb_rec_req */
 240 #define XMIT_DATA_REQ           0x82 /* struct arb_xmit_req */
 241 #define DLC_STATUS              0x83 /* struct arb_dlc_status */
 242 #define RING_STAT_CHANGE        0x84 /* struct dlc_open_sap ??? */
 243
 244 /* DIR_OPEN_ADAPTER options */
 245 #define OPEN_PASS_BCON_MAC 0x0100
 246 #define NUM_RCV_BUF 2
 247 #define RCV_BUF_LEN 1024
 248 #define DHB_LENGTH 2048
 249 #define NUM_DHB 2
 250 #define DLC_MAX_SAP 2
 251 #define DLC_MAX_STA 1
 252
 253 /* DLC_OPEN_SAP options */
 254 #define MAX_I_FIELD 0x0088
 255 #define SAP_OPEN_IND_SAP 0x04
 256 #define SAP_OPEN_PRIORITY 0x20
 257 #define SAP_OPEN_STATION_CNT 0x1
 258 #define XMIT_DIR_FRAME 0x0A
 259 #define XMIT_UI_FRAME  0x0d
 260 #define XMIT_XID_CMD   0x0e
 261 #define XMIT_TEST_CMD  0x11
 262
 263 /* srb close return code */
 264 #define SIGNAL_LOSS  0x8000
 265 #define HARD_ERROR   0x4000
 266 #define XMIT_BEACON  0x1000
 267 #define LOBE_FAULT   0x0800
 268 #define AUTO_REMOVAL 0x0400
 269 #define REMOVE_RECV  0x0100
 270 #define LOG_OVERFLOW 0x0080
 271 #define RING_RECOVER 0x0020
 272
 273 struct srb_init_response {
 274         unsigned char command;
 275         unsigned char init_status;
 276         unsigned char init_status_2;
 277         unsigned char reserved[3];
 278         __u16 bring_up_code;
 279         __u16 encoded_address;
 280         __u16 level_address;
 281         __u16 adapter_address;
 282         __u16 parms_address;
 283         __u16 mac_address;
 284 };
 285
 286 struct dir_open_adapter {
 287         unsigned char command;
 288         char reserved[7];
 289         __u16 open_options;
 290         unsigned char node_address[6];
 291         unsigned char group_address[4];
 292         unsigned char funct_address[4];
 293         __u16 num_rcv_buf;
 294         __u16 rcv_buf_len;
 295         __u16 dhb_length;
 296         unsigned char num_dhb;
 297         char reserved2;
 298         unsigned char dlc_max_sap;
 299         unsigned char dlc_max_sta;
 300         unsigned char dlc_max_gsap;
 301         unsigned char dlc_max_gmem;
 302         unsigned char dlc_t1_tick_1;
 303         unsigned char dlc_t2_tick_1;
 304         unsigned char dlc_ti_tick_1;
 305         unsigned char dlc_t1_tick_2;
 306         unsigned char dlc_t2_tick_2;
 307         unsigned char dlc_ti_tick_2;
 308         unsigned char product_id[18];
 309 };
 310
 311 struct srb_open_response {
 312         unsigned char command;
 313         unsigned char reserved1;
 314         unsigned char ret_code;
 315         unsigned char reserved2[3];
 316         __u16 error_code;
 317         __u16 asb_addr;
 318         __u16 srb_addr;
 319         __u16 arb_addr;
 320         __u16 ssb_addr;
 321 };
 322
 323 struct dlc_open_sap {
 324         unsigned char command;
 325         unsigned char reserved1;
 326         unsigned char ret_code;
 327         unsigned char reserved2;
 328         __u16 station_id;
 329         unsigned char timer_t1;
 330         unsigned char timer_t2;
 331         unsigned char timer_ti;
 332         unsigned char maxout;
 333         unsigned char maxin;
 334         unsigned char maxout_incr;
 335         unsigned char max_retry_count;
 336         unsigned char gsap_max_mem;
 337         __u16 max_i_field;
 338         unsigned char sap_value;
 339         unsigned char sap_options;
 340         unsigned char station_count;
 341         unsigned char sap_gsap_mem;
 342         unsigned char gsap[0];
 343 };
 344
 345 struct srb_xmit {
 346         unsigned char command;
 347         unsigned char cmd_corr;
 348         unsigned char ret_code;
 349         unsigned char reserved1;
 350         __u16 station_id;
 351 };
 352
 353 struct srb_interrupt {
 354         unsigned char command;
 355         unsigned char cmd_corr;
 356         unsigned char ret_code;
 357 };
 358
 359 struct srb_read_log {
 360         unsigned char command;
 361         unsigned char reserved1;
 362         unsigned char ret_code;
 363         unsigned char reserved2;
 364         unsigned char line_errors;
 365         unsigned char internal_errors;
 366         unsigned char burst_errors;
 367         unsigned char A_C_errors;
 368         unsigned char abort_delimiters;
 369         unsigned char reserved3;
 370         unsigned char lost_frames;
 371         unsigned char recv_congest_count;
 372         unsigned char frame_copied_errors;
 373         unsigned char frequency_errors;
 374         unsigned char token_errors;
 375 };
 376
 377 struct asb_xmit_resp {
 378         unsigned char command;
 379         unsigned char cmd_corr;
 380         unsigned char ret_code;
 381         unsigned char reserved;
 382         __u16 station_id;
 383         __u16 frame_length;
 384         unsigned char hdr_length;
 385         unsigned char rsap_value;
 386 };
 387
 388 struct arb_xmit_req {
 389         unsigned char command;
 390         unsigned char cmd_corr;
 391         unsigned char reserved1[2];
 392         __u16 station_id;
 393         __u16 dhb_address;
 394 };
 395
 396 struct arb_rec_req {
 397         unsigned char command;
 398         unsigned char reserved1[3];
 399         __u16 station_id;
 400         __u16 rec_buf_addr;
 401         unsigned char lan_hdr_len;
 402         unsigned char dlc_hdr_len;
 403         __u16 frame_len;
 404         unsigned char msg_type;
 405 };
 406
 407 struct asb_rec {
 408         unsigned char command;
 409         unsigned char reserved1;
 410         unsigned char ret_code;
 411         unsigned char reserved2;
 412         __u16 station_id;
 413         __u16 rec_buf_addr;
 414 };
 415
 416 struct rec_buf {
 417   /*    unsigned char reserved1[2]; */
 418         __u16 buf_ptr;
 419         unsigned char reserved2;
 420         __u16 buf_len;
 421         unsigned char data[0];
 422 };
 423
 424 struct arb_dlc_status {
 425         unsigned char command;
 426         unsigned char reserved1[3];
 427         __u16 station_id;
 428         __u16 status;
 429         unsigned char frmr_data[5];
 430         unsigned char access_prio;
 431         unsigned char rem_addr[TR_ALEN];
 432         unsigned char rsap_value;
 433 };
 434
 435 struct arb_ring_stat_change {
 436         unsigned char command;
 437         unsigned char reserved1[5];
 438         __u16 ring_status;
 439 };
 440
 441 struct srb_close_adapter {
 442         unsigned char command;
 443         unsigned char reserved1;
 444         unsigned char ret_code;
 445 };
 446
 447 struct srb_set_funct_addr {
 448         unsigned char command;
 449         unsigned char reserved1;
 450         unsigned char ret_code;
 451         unsigned char reserved2[3];
 452         unsigned char funct_address[4];
 453 };
 454