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Import 2.4.0-test5pre2
[davej-history.git] / drivers / usb / usb-ohci.c
blobd1155e0eed8a9dfca0965d304261ac61f380bf59
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 *
6 * [ Initialisation is based on Linus' ]
7 * [ uhci code and gregs ohci fragments ]
8 * [ (C) Copyright 1999 Linus Torvalds ]
9 * [ (C) Copyright 1999 Gregory P. Smith]
10 *
11 *
12 * History:
13 *
14 * v5.2 1999/12/07 URB 3rd preview,
15 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
16 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
17 * i386: HUB, Keyboard, Mouse, Printer
18 *
19 * v4.3 1999/10/27 multiple HCs, bulk_request
20 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
21 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
22 * v4.0 1999/08/18
23 * v3.0 1999/06/25
24 * v2.1 1999/05/09 code clean up
25 * v2.0 1999/05/04
26 * v1.0 1999/04/27 initial release
27 *
28
29 */
30
31 #include <linux/config.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/kernel.h>
35 #include <linux/delay.h>
36 #include <linux/ioport.h>
37 #include <linux/sched.h>
38 #include <linux/malloc.h>
39 #include <linux/smp_lock.h>
40 #include <linux/errno.h>
41 #include <linux/timer.h>
42 #include <linux/list.h>
43 #include <linux/interrupt.h> /* for in_interrupt() */
44 #undef DEBUG
45 #include <linux/usb.h>
46
47 #include <asm/io.h>
48 #include <asm/irq.h>
49 #include <asm/system.h>
50 #include <asm/unaligned.h>
51
52 #define OHCI_USE_NPS // force NoPowerSwitching mode
53
54 #include "usb-ohci.h"
55
56 #include <linux/pm.h>
57 static int handle_pm_event (struct pm_dev *dev, pm_request_t rqst, void *data);
58
59 #ifdef CONFIG_PMAC_PBOOK
60 #include <linux/adb.h>
61 #include <linux/pmu.h>
62 #endif
63
64
65 /* For initializing controller (mask in an HCFS mode too) */
66 #define OHCI_CONTROL_INIT \
67 (OHCI_CTRL_CBSR & 0x3) \
68 | OHCI_CTRL_BLE | OHCI_CTRL_CLE | OHCI_CTRL_IE | OHCI_CTRL_PLE
69
70 static DECLARE_WAIT_QUEUE_HEAD (op_wakeup);
71 static LIST_HEAD (ohci_hcd_list);
72 static spinlock_t usb_ed_lock = SPIN_LOCK_UNLOCKED;
73
74 /*-------------------------------------------------------------------------*
75 * URB support functions
76 *-------------------------------------------------------------------------*/
77
78 /* free the private part of an URB */
79
80 static void urb_rm_priv (urb_t * urb)
81 {
82 urb_priv_t * urb_priv = urb->hcpriv;
83 int i;
84
85 if (!urb_priv) return;
86
87 for (i = 0; i < urb_priv->length; i++) {
88 if (urb_priv->td [i]) {
89 OHCI_FREE (urb_priv->td [i]);
90 }
91 }
92 kfree (urb->hcpriv);
93 urb->hcpriv = NULL;
94
95 }
96
97 /*-------------------------------------------------------------------------*/
98
99 #ifdef DEBUG
100 static int sohci_get_current_frame_number (struct usb_device * dev);
101
102 /* debug| print the main components of an URB
103 * small: 0) header + data packets 1) just header */
104
105 static void urb_print (urb_t * urb, char * str, int small)
106 {
107 unsigned int pipe= urb->pipe;
108 int i, len;
109
110 if (!urb->dev || !urb->dev->bus) {
111 dbg("%s URB: no dev", str);
112 return;
113 }
114
115 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)",
116 str,
117 sohci_get_current_frame_number (urb->dev),
118 usb_pipedevice (pipe),
119 usb_pipeendpoint (pipe),
120 usb_pipeout (pipe)? 'O': 'I',
121 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
122 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
123 urb->transfer_flags,
124 urb->actual_length,
125 urb->transfer_buffer_length,
126 urb->status, urb->status);
127 if (!small) {
128 if (usb_pipecontrol (pipe)) {
129 printk (KERN_DEBUG __FILE__ ": cmd(8):");
130 for (i = 0; i < 8 ; i++)
131 printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
132 printk ("\n");
133 }
134 if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
135 printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
136 urb->actual_length,
137 urb->transfer_buffer_length);
138 len = usb_pipeout (pipe)?
139 urb->transfer_buffer_length: urb->actual_length;
140 for (i = 0; i < 16 && i < len; i++)
141 printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
142 printk ("%s stat:%d\n", i < len? "...": "", urb->status);
143 }
144 }
145 }
146
147 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
148 void ep_print_int_eds (ohci_t * ohci, char * str) {
149 int i, j;
150 __u32 * ed_p;
151 for (i= 0; i < 32; i++) {
152 j = 5;
153 ed_p = &(ohci->hcca.int_table [i]);
154 if (*ed_p == 0)
155 continue;
156 printk (KERN_DEBUG __FILE__ ": %s branch int %2d(%2x):", str, i, i);
157 while (*ed_p != 0 && j--) {
158 ed_t *ed = (ed_t *) bus_to_virt(le32_to_cpup(ed_p));
159 printk (" ed: %4x;", ed->hwINFO);
160 ed_p = &ed->hwNextED;
161 }
162 printk ("\n");
163 }
164 }
165
166
167 static void ohci_dump_intr_mask (char *label, __u32 mask)
168 {
169 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
170 label,
171 mask,
172 (mask & OHCI_INTR_MIE) ? " MIE" : "",
173 (mask & OHCI_INTR_OC) ? " OC" : "",
174 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
175 (mask & OHCI_INTR_FNO) ? " FNO" : "",
176 (mask & OHCI_INTR_UE) ? " UE" : "",
177 (mask & OHCI_INTR_RD) ? " RD" : "",
178 (mask & OHCI_INTR_SF) ? " SF" : "",
179 (mask & OHCI_INTR_WDH) ? " WDH" : "",
180 (mask & OHCI_INTR_SO) ? " SO" : ""
181 );
182 }
183
184 static void maybe_print_eds (char *label, __u32 value)
185 {
186 if (value)
187 dbg ("%s %08x", label, value);
188 }
189
190 static char *hcfs2string (int state)
191 {
192 switch (state) {
193 case OHCI_USB_RESET: return "reset";
194 case OHCI_USB_RESUME: return "resume";
195 case OHCI_USB_OPER: return "operational";
196 case OHCI_USB_SUSPEND: return "suspend";
197 }
198 return "?";
199 }
200
201 // dump control and status registers
202 static void ohci_dump_status (ohci_t *controller)
203 {
204 struct ohci_regs *regs = controller->regs;
205 __u32 temp;
206
207 temp = readl (&regs->revision) & 0xff;
208 if (temp != 0x10)
209 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
210
211 temp = readl (&regs->control);
212 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
213 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
214 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
215 (temp & OHCI_CTRL_IR) ? " IR" : "",
216 hcfs2string (temp & OHCI_CTRL_HCFS),
217 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
218 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
219 (temp & OHCI_CTRL_IE) ? " IE" : "",
220 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
221 temp & OHCI_CTRL_CBSR
222 );
223
224 temp = readl (&regs->cmdstatus);
225 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
226 (temp & OHCI_SOC) >> 16,
227 (temp & OHCI_OCR) ? " OCR" : "",
228 (temp & OHCI_BLF) ? " BLF" : "",
229 (temp & OHCI_CLF) ? " CLF" : "",
230 (temp & OHCI_HCR) ? " HCR" : ""
231 );
232
233 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
234 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
235 // intrdisable always same as intrenable
236 // ohci_dump_intr_mask ("intrdisable", readl (&regs->intrdisable));
237
238 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
239
240 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
241 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
242
243 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
244 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
245
246 maybe_print_eds ("donehead", readl (&regs->donehead));
247 }
248
249 static void ohci_dump_roothub (ohci_t *controller, int verbose)
250 {
251 struct ohci_regs *regs = controller->regs;
252 __u32 temp, ndp, i;
253
254 temp = readl (&regs->roothub.a);
255 ndp = (temp & RH_A_NDP);
256
257 if (verbose) {
258 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
259 ((temp & RH_A_POTPGT) >> 24) & 0xff,
260 (temp & RH_A_NOCP) ? " NOCP" : "",
261 (temp & RH_A_OCPM) ? " OCPM" : "",
262 (temp & RH_A_DT) ? " DT" : "",
263 (temp & RH_A_NPS) ? " NPS" : "",
264 (temp & RH_A_PSM) ? " PSM" : "",
265 ndp
266 );
267 temp = readl (&regs->roothub.b);
268 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
269 temp,
270 (temp & RH_B_PPCM) >> 16,
271 (temp & RH_B_DR)
272 );
273 temp = readl (&regs->roothub.status);
274 dbg ("roothub.status: %08x%s%s%s%s%s%s",
275 temp,
276 (temp & RH_HS_CRWE) ? " CRWE" : "",
277 (temp & RH_HS_OCIC) ? " OCIC" : "",
278 (temp & RH_HS_LPSC) ? " LPSC" : "",
279 (temp & RH_HS_DRWE) ? " DRWE" : "",
280 (temp & RH_HS_OCI) ? " OCI" : "",
281 (temp & RH_HS_LPS) ? " LPS" : ""
282 );
283 }
284
285 for (i = 0; i < ndp; i++) {
286 temp = readl (&regs->roothub.portstatus [i]);
287 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
288 i,
289 temp,
290 (temp & RH_PS_PRSC) ? " PRSC" : "",
291 (temp & RH_PS_OCIC) ? " OCIC" : "",
292 (temp & RH_PS_PSSC) ? " PSSC" : "",
293 (temp & RH_PS_PESC) ? " PESC" : "",
294 (temp & RH_PS_CSC) ? " CSC" : "",
295
296 (temp & RH_PS_LSDA) ? " LSDA" : "",
297 (temp & RH_PS_PPS) ? " PPS" : "",
298 (temp & RH_PS_PRS) ? " PRS" : "",
299 (temp & RH_PS_POCI) ? " POCI" : "",
300 (temp & RH_PS_PSS) ? " PSS" : "",
301
302 (temp & RH_PS_PES) ? " PES" : "",
303 (temp & RH_PS_CCS) ? " CCS" : ""
304 );
305 }
306 }
307
308 static void ohci_dump (ohci_t *controller, int verbose)
309 {
310 dbg ("OHCI controller %s state", controller->ohci_dev->slot_name);
311
312 // dumps some of the state we know about
313 ohci_dump_status (controller);
314 if (verbose)
315 ep_print_int_eds (controller, "hcca");
316 dbg ("hcca frame #%04x", controller->hcca.frame_no);
317 ohci_dump_roothub (controller, 1);
318 }
319
320
321 #endif
322
323 /*-------------------------------------------------------------------------*
324 * Interface functions (URB)
325 *-------------------------------------------------------------------------*/
326
327 /* return a request to the completion handler */
328
329 static int sohci_return_urb (urb_t * urb)
330 {
331 urb_priv_t * urb_priv = urb->hcpriv;
332 urb_t * urbt;
333 unsigned long flags;
334 int i;
335
336 /* just to be sure */
337 if (!urb->complete) {
338 urb_rm_priv (urb);
339 usb_dec_dev_use (urb->dev);
340 return -1;
341 }
342
343 if (!urb_priv) return -1; /* urb already unlinked */
344
345 #ifdef DEBUG
346 urb_print (urb, "RET", usb_pipeout (urb->pipe));
347 #endif
348
349 switch (usb_pipetype (urb->pipe)) {
350 case PIPE_INTERRUPT:
351 urb->complete (urb); /* call complete and requeue URB */
352 urb->actual_length = 0;
353 urb->status = USB_ST_URB_PENDING;
354 if (urb_priv->state != URB_DEL)
355 td_submit_urb (urb);
356 break;
357
358 case PIPE_ISOCHRONOUS:
359 for (urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next);
360 if (urbt) { /* send the reply and requeue URB */
361 urb->complete (urb);
362
363 spin_lock_irqsave (&usb_ed_lock, flags);
364 urb->actual_length = 0;
365 urb->status = USB_ST_URB_PENDING;
366 urb->start_frame = urb_priv->ed->last_iso + 1;
367 if (urb_priv->state != URB_DEL) {
368 for (i = 0; i < urb->number_of_packets; i++) {
369 urb->iso_frame_desc[i].actual_length = 0;
370 urb->iso_frame_desc[i].status = -EXDEV;
371 }
372 td_submit_urb (urb);
373 }
374 spin_unlock_irqrestore (&usb_ed_lock, flags);
375
376 } else { /* unlink URB, call complete */
377 urb_rm_priv (urb);
378 usb_dec_dev_use (urb->dev);
379 urb->complete (urb);
380 }
381 break;
382
383 case PIPE_BULK:
384 case PIPE_CONTROL: /* unlink URB, call complete */
385 urb_rm_priv (urb);
386 usb_dec_dev_use (urb->dev);
387 urb->complete (urb);
388 break;
389 }
390 return 0;
391 }
392
393 /*-------------------------------------------------------------------------*/
394
395 /* get a transfer request */
396
397 static int sohci_submit_urb (urb_t * urb)
398 {
399 ohci_t * ohci;
400 ed_t * ed;
401 urb_priv_t * urb_priv;
402 unsigned int pipe = urb->pipe;
403 int i, size = 0;
404 unsigned long flags;
405
406 if (!urb->dev || !urb->dev->bus) return -EINVAL;
407
408 if (urb->hcpriv) return -EINVAL; /* urb already in use */
409
410 // if(usb_endpoint_halted (urb->dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)))
411 // return -EPIPE;
412
413 usb_inc_dev_use (urb->dev);
414 ohci = (ohci_t *) urb->dev->bus->hcpriv;
415
416 #ifdef DEBUG
417 urb_print (urb, "SUB", usb_pipein (pipe));
418 #endif
419
420 /* a request to the virtual root hub */
421 if (usb_pipedevice (pipe) == ohci->rh.devnum)
422 return rh_submit_urb (urb);
423
424 /* when controller's hung, permit only hub cleanup attempts
425 * such as powering down ports */
426 if (ohci->disabled)
427 return -ESHUTDOWN;
428
429 /* every endpoint has a ed, locate and fill it */
430 if (!(ed = ep_add_ed (urb->dev, pipe, urb->interval, 1))) {
431 usb_dec_dev_use (urb->dev);
432 return -ENOMEM;
433 }
434
435 /* for the private part of the URB we need the number of TDs (size) */
436 switch (usb_pipetype (pipe)) {
437 case PIPE_BULK: /* one TD for every 4096 Byte */
438 size = (urb->transfer_buffer_length - 1) / 4096 + 1;
439 break;
440 case PIPE_ISOCHRONOUS: /* number of packets from URB */
441 size = urb->number_of_packets;
442 for (i = 0; i < urb->number_of_packets; i++) {
443 urb->iso_frame_desc[i].actual_length = 0;
444 urb->iso_frame_desc[i].status = -EXDEV;
445 }
446 break;
447 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
448 size = (urb->transfer_buffer_length == 0)? 2:
449 (urb->transfer_buffer_length - 1) / 4096 + 3;
450 break;
451 case PIPE_INTERRUPT: /* one TD */
452 size = 1;
453
454 break;
455 }
456
457 /* allocate the private part or the URB */
458 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *),
459 in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
460 if (!urb_priv) {
461 usb_dec_dev_use (urb->dev);
462 return -ENOMEM;
463 }
464 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (td_t *));
465
466 /* fill the private part of the URB */
467 urb->hcpriv = urb_priv;
468 urb_priv->length = size;
469 urb_priv->td_cnt = 0;
470 urb_priv->state = 0;
471 urb_priv->ed = ed;
472
473 /* allocate the TDs */
474 for (i = 0; i < size; i++) {
475 OHCI_ALLOC (urb_priv->td[i], sizeof (td_t));
476 if (!urb_priv->td[i]) {
477 usb_dec_dev_use (urb->dev);
478 urb_rm_priv (urb);
479 return -ENOMEM;
480 }
481 }
482 spin_lock_irqsave (&usb_ed_lock, flags);
483 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
484 urb_rm_priv(urb);
485 usb_dec_dev_use (urb->dev);
486 spin_unlock_irqrestore(&usb_ed_lock, flags);
487 return -EINVAL;
488 }
489
490 /* for ISOC transfers calculate start frame index */
491 if (urb->transfer_flags & USB_ISO_ASAP) {
492 urb->start_frame = ((ed->state == ED_OPER)? (ed->last_iso + 1):
493 (le16_to_cpu (ohci->hcca.frame_no) + 10)) & 0xffff;
494 }
495 urb->status = USB_ST_URB_PENDING;
496 urb->actual_length = 0;
497
498 if (ed->state != ED_OPER) /* link the ed into a chain if is not already */
499 ep_link (ohci, ed);
500
501 urb->status = USB_ST_URB_PENDING;
502 td_submit_urb (urb); /* fill the TDs and link it to the ed */
503
504 spin_unlock_irqrestore (&usb_ed_lock, flags);
505
506 return 0;
507 }
508
509 /*-------------------------------------------------------------------------*/
510
511 /* deactivate all TDs and remove the private part of the URB */
512
513 static int sohci_unlink_urb (urb_t * urb)
514 {
515 unsigned long flags;
516 ohci_t * ohci;
517 DECLARE_WAITQUEUE (wait, current);
518
519 if (!urb) /* just to be sure */
520 return -EINVAL;
521
522 if (!urb->dev || !urb->dev->bus)
523 return -ENODEV;
524
525 ohci = (ohci_t *) urb->dev->bus->hcpriv;
526
527 #ifdef DEBUG
528 urb_print (urb, "UNLINK", 1);
529 #endif
530
531 if (usb_pipedevice (urb->pipe) == ohci->rh.devnum) {
532 usb_dec_dev_use(urb->dev);
533 return rh_unlink_urb (urb); /* a request to the virtual root hub */
534 }
535
536 if (urb->hcpriv) {
537 /* URB active? */
538 if (urb->status == USB_ST_URB_PENDING && !ohci->disabled) {
539 urb_priv_t * urb_priv = urb->hcpriv;
540 urb_priv->state = URB_DEL;
541
542 /* we want to delete the TDs of an URB from an ed
543 * request the deletion, it will be handled at the
544 * next USB-frame */
545
546 spin_lock_irqsave (&usb_ed_lock, flags);
547 ep_rm_ed (urb->dev, urb_priv->ed);
548 urb_priv->ed->state |= ED_URB_DEL;
549 spin_unlock_irqrestore (&usb_ed_lock, flags);
550 if (!(urb->transfer_flags & USB_ASYNC_UNLINK)) {
551 usb_dec_dev_use (urb->dev);
552 add_wait_queue (&op_wakeup, &wait);
553 current->state = TASK_UNINTERRUPTIBLE;
554 if (!schedule_timeout (HZ / 10)) /* wait until all TDs are deleted */
555 err("unlink URB timeout!");
556 remove_wait_queue (&op_wakeup, &wait);
557 urb->status = -ENOENT;
558 } else {
559 /* usb_dec_dev_use done in dl_del_list() */
560 urb->status = -EINPROGRESS;
561 }
562 } else {
563 usb_dec_dev_use (urb->dev);
564 urb_rm_priv (urb);
565 if (urb->complete && (urb->transfer_flags & USB_ASYNC_UNLINK)) {
566 urb->complete (urb);
567 urb->status = 0;
568 } else
569 urb->status = -ENOENT;
570 }
571 }
572 return 0;
573 }
574
575 /*-------------------------------------------------------------------------*/
576
577 /* allocate private data space for a usb device */
578
579 static int sohci_alloc_dev (struct usb_device *usb_dev)
580 {
581 struct ohci_device * dev;
582
583 dev = kmalloc (sizeof (*dev), GFP_KERNEL);
584 if (!dev)
585 return -ENOMEM;
586
587 memset (dev, 0, sizeof (*dev));
588
589 usb_dev->hcpriv = dev;
590
591 return 0;
592 }
593
594 /*-------------------------------------------------------------------------*/
595
596 /* free private data space of usb device */
597
598 static int sohci_free_dev (struct usb_device * usb_dev)
599 {
600 unsigned long flags;
601 int i, cnt = 0;
602 ed_t * ed;
603 DECLARE_WAITQUEUE (wait, current);
604 struct ohci_device * dev = usb_to_ohci (usb_dev);
605 ohci_t * ohci = usb_dev->bus->hcpriv;
606
607 if (!dev) return 0;
608
609 if (usb_dev->devnum >= 0) {
610
611 /* delete all TDs of all EDs */
612 spin_lock_irqsave (&usb_ed_lock, flags);
613 for(i = 0; i < NUM_EDS; i++) {
614 ed = &(dev->ed[i]);
615 if (ed->state != ED_NEW) {
616 if (ed->state == ED_OPER) ep_unlink (ohci, ed);
617 ep_rm_ed (usb_dev, ed);
618 ed->state = ED_DEL;
619 cnt++;
620 }
621 }
622 spin_unlock_irqrestore (&usb_ed_lock, flags);
623
624 if (cnt > 0) {
625 add_wait_queue (&op_wakeup, &wait);
626 current->state = TASK_UNINTERRUPTIBLE;
627 schedule_timeout (HZ / 10);
628 remove_wait_queue (&op_wakeup, &wait);
629 }
630 }
631 kfree (dev);
632
633 return 0;
634 }
635
636 /*-------------------------------------------------------------------------*/
637
638 /* tell us the current USB frame number */
639
640 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
641 {
642 ohci_t * ohci = usb_dev->bus->hcpriv;
643
644 return le16_to_cpu (ohci->hcca.frame_no);
645 }
646
647 /*-------------------------------------------------------------------------*/
648
649 struct usb_operations sohci_device_operations = {
650 sohci_alloc_dev,
651 sohci_free_dev,
652 sohci_get_current_frame_number,
653 sohci_submit_urb,
654 sohci_unlink_urb
655 };
656
657 /*-------------------------------------------------------------------------*
658 * ED handling functions
659 *-------------------------------------------------------------------------*/
660
661 /* search for the right branch to insert an interrupt ed into the int tree
662 * do some load ballancing;
663 * returns the branch and
664 * sets the interval to interval = 2^integer (ld (interval)) */
665
666 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
667 {
668 int i, branch = 0;
669
670 /* search for the least loaded interrupt endpoint branch of all 32 branches */
671 for (i = 0; i < 32; i++)
672 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i]) branch = i;
673
674 branch = branch % interval;
675 for (i = branch; i < 32; i += interval) ohci->ohci_int_load [i] += load;
676
677 return branch;
678 }
679
680 /*-------------------------------------------------------------------------*/
681
682 /* 2^int( ld (inter)) */
683
684 static int ep_2_n_interval (int inter)
685 {
686 int i;
687 for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
688 return 1 << i;
689 }
690
691 /*-------------------------------------------------------------------------*/
692
693 /* the int tree is a binary tree
694 * in order to process it sequentially the indexes of the branches have to be mapped
695 * the mapping reverses the bits of a word of num_bits length */
696
697 static int ep_rev (int num_bits, int word)
698 {
699 int i, wout = 0;
700
701 for (i = 0; i < num_bits; i++) wout |= (((word >> i) & 1) << (num_bits - i - 1));
702 return wout;
703 }
704
705 /*-------------------------------------------------------------------------*/
706
707 /* link an ed into one of the HC chains */
708
709 static int ep_link (ohci_t * ohci, ed_t * edi)
710 {
711 int int_branch;
712 int i;
713 int inter;
714 int interval;
715 int load;
716 __u32 * ed_p;
717 volatile ed_t * ed = edi;
718
719 ed->state = ED_OPER;
720
721 switch (ed->type) {
722 case CTRL:
723 ed->hwNextED = 0;
724 if (ohci->ed_controltail == NULL) {
725 writel (virt_to_bus (ed), &ohci->regs->ed_controlhead);
726 } else {
727 ohci->ed_controltail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
728 }
729 ed->ed_prev = ohci->ed_controltail;
730 ohci->ed_controltail = edi;
731 break;
732
733 case BULK:
734 ed->hwNextED = 0;
735 if (ohci->ed_bulktail == NULL) {
736 writel (virt_to_bus (ed), &ohci->regs->ed_bulkhead);
737 } else {
738 ohci->ed_bulktail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
739 }
740 ed->ed_prev = ohci->ed_bulktail;
741 ohci->ed_bulktail = edi;
742 break;
743
744 case INT:
745 load = ed->int_load;
746 interval = ep_2_n_interval (ed->int_period);
747 ed->int_interval = interval;
748 int_branch = ep_int_ballance (ohci, interval, load);
749 ed->int_branch = int_branch;
750
751 for (i = 0; i < ep_rev (6, interval); i += inter) {
752 inter = 1;
753 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i) + int_branch]);
754 (*ed_p != 0) && (((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval >= interval);
755 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED))
756 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
757 ed->hwNextED = *ed_p;
758 *ed_p = cpu_to_le32 (virt_to_bus (ed));
759 }
760 #ifdef DEBUG
761 ep_print_int_eds (ohci, "LINK_INT");
762 #endif
763 break;
764
765 case ISO:
766 ed->hwNextED = 0;
767 ed->int_interval = 1;
768 if (ohci->ed_isotail != NULL) {
769 ohci->ed_isotail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
770 ed->ed_prev = ohci->ed_isotail;
771 } else {
772 for ( i = 0; i < 32; i += inter) {
773 inter = 1;
774 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i)]);
775 *ed_p != 0;
776 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED))
777 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
778 *ed_p = cpu_to_le32 (virt_to_bus (ed));
779 }
780 ed->ed_prev = NULL;
781 }
782 ohci->ed_isotail = edi;
783 #ifdef DEBUG
784 ep_print_int_eds (ohci, "LINK_ISO");
785 #endif
786 break;
787 }
788 return 0;
789 }
790
791 /*-------------------------------------------------------------------------*/
792
793 /* unlink an ed from one of the HC chains.
794 * just the link to the ed is unlinked.
795 * the link from the ed still points to another operational ed or 0
796 * so the HC can eventually finish the processing of the unlinked ed */
797
798 static int ep_unlink (ohci_t * ohci, ed_t * ed)
799 {
800 int int_branch;
801 int i;
802 int inter;
803 int interval;
804 __u32 * ed_p;
805
806
807 switch (ed->type) {
808 case CTRL:
809 if (ed->ed_prev == NULL) {
810 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_controlhead);
811 } else {
812 ed->ed_prev->hwNextED = ed->hwNextED;
813 }
814 if(ohci->ed_controltail == ed) {
815 ohci->ed_controltail = ed->ed_prev;
816 } else {
817 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
818 }
819 break;
820
821 case BULK:
822 if (ed->ed_prev == NULL) {
823 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_bulkhead);
824 } else {
825 ed->ed_prev->hwNextED = ed->hwNextED;
826 }
827 if (ohci->ed_bulktail == ed) {
828 ohci->ed_bulktail = ed->ed_prev;
829 } else {
830 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
831 }
832 break;
833
834 case INT:
835 int_branch = ed->int_branch;
836 interval = ed->int_interval;
837
838 for (i = 0; i < ep_rev (6, interval); i += inter) {
839 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i) + int_branch]), inter = 1;
840 (*ed_p != 0) && (*ed_p != ed->hwNextED);
841 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED),
842 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval)) {
843 if(((ed_t *) bus_to_virt (le32_to_cpup (ed_p))) == ed) {
844 *ed_p = ed->hwNextED;
845 break;
846 }
847 }
848 }
849 for (i = int_branch; i < 32; i += interval)
850 ohci->ohci_int_load[i] -= ed->int_load;
851 #ifdef DEBUG
852 ep_print_int_eds (ohci, "UNLINK_INT");
853 #endif
854 break;
855
856 case ISO:
857 if (ohci->ed_isotail == ed)
858 ohci->ed_isotail = ed->ed_prev;
859 if (ed->hwNextED != 0)
860 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
861
862 if (ed->ed_prev != NULL) {
863 ed->ed_prev->hwNextED = ed->hwNextED;
864 } else {
865 for (i = 0; i < 32; i += inter) {
866 inter = 1;
867 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i)]);
868 *ed_p != 0;
869 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED)) {
870 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
871 if(((ed_t *) bus_to_virt (le32_to_cpup (ed_p))) == ed) {
872 *ed_p = ed->hwNextED;
873 break;
874 }
875 }
876 }
877 }
878 #ifdef DEBUG
879 ep_print_int_eds (ohci, "UNLINK_ISO");
880 #endif
881 break;
882 }
883 ed->state = ED_UNLINK;
884 return 0;
885 }
886
887
888 /*-------------------------------------------------------------------------*/
889
890 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
891 * but the USB stack is a little bit stateless so we do it at every transaction
892 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
893 * in all other cases the state is left unchanged
894 * the ed info fields are setted anyway even though most of them should not change */
895
896 static ed_t * ep_add_ed (struct usb_device * usb_dev, unsigned int pipe, int interval, int load)
897 {
898 ohci_t * ohci = usb_dev->bus->hcpriv;
899 td_t * td;
900 ed_t * ed_ret;
901 volatile ed_t * ed;
902
903
904 spin_lock (&usb_ed_lock);
905
906 ed = ed_ret = &(usb_to_ohci (usb_dev)->ed[(usb_pipeendpoint (pipe) << 1) |
907 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]);
908
909 if((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
910 return NULL; /* pending delete request */
911
912 if (ed->state == ED_NEW) {
913 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
914 OHCI_ALLOC (td, sizeof (*td)); /* dummy td; end of td list for ed */
915 if(!td) return NULL; /* out of memory */
916 ed->hwTailP = cpu_to_le32 (virt_to_bus (td));
917 ed->hwHeadP = ed->hwTailP;
918 ed->state = ED_UNLINK;
919 ed->type = usb_pipetype (pipe);
920 usb_to_ohci (usb_dev)->ed_cnt++;
921 }
922
923 ohci->dev[usb_pipedevice (pipe)] = usb_dev;
924
925 ed->hwINFO = cpu_to_le32 (usb_pipedevice (pipe)
926 | usb_pipeendpoint (pipe) << 7
927 | (usb_pipeisoc (pipe)? 0x8000: 0)
928 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
929 | usb_pipeslow (pipe) << 13
930 | usb_maxpacket (usb_dev, pipe, usb_pipeout (pipe)) << 16);
931
932 if (ed->type == INT && ed->state == ED_UNLINK) {
933 ed->int_period = interval;
934 ed->int_load = load;
935 }
936
937 spin_unlock(&usb_ed_lock);
938 return ed_ret;
939 }
940
941 /*-------------------------------------------------------------------------*/
942
943 /* request the removal of an endpoint
944 * put the ep on the rm_list and request a stop of the bulk or ctrl list
945 * real removal is done at the next start of frame (SOF) hardware interrupt */
946
947 static void ep_rm_ed (struct usb_device * usb_dev, ed_t * ed)
948 {
949 unsigned int frame;
950 ohci_t * ohci = usb_dev->bus->hcpriv;
951
952 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) return;
953
954 ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
955
956 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
957 writel (OHCI_INTR_SF, &ohci->regs->intrenable); /* enable sof interrupt */
958
959 frame = le16_to_cpu (ohci->hcca.frame_no) & 0x1;
960 ed->ed_rm_list = ohci->ed_rm_list[frame];
961 ohci->ed_rm_list[frame] = ed;
962
963 switch (ed->type) {
964 case CTRL: /* stop CTRL list */
965 writel (ohci->hc_control &= ~OHCI_CTRL_CLE, &ohci->regs->control);
966 break;
967 case BULK: /* stop BULK list */
968 writel (ohci->hc_control &= ~OHCI_CTRL_BLE, &ohci->regs->control);
969 break;
970 }
971 }
972
973 /*-------------------------------------------------------------------------*
974 * TD handling functions
975 *-------------------------------------------------------------------------*/
976
977 /* prepare a TD */
978
979 static void td_fill (unsigned int info, void * data, int len, urb_t * urb, int index)
980 {
981 volatile td_t * td, * td_pt;
982 urb_priv_t * urb_priv = urb->hcpriv;
983
984 if (index >= urb_priv->length) {
985 err("internal OHCI error: TD index > length");
986 return;
987 }
988
989 td_pt = urb_priv->td [index];
990 /* fill the old dummy TD */
991 td = urb_priv->td [index] = (td_t *) bus_to_virt (le32_to_cpup (&urb_priv->ed->hwTailP) & 0xfffffff0);
992 td->ed = urb_priv->ed;
993 td->index = index;
994 td->urb = urb;
995 td->hwINFO = cpu_to_le32 (info);
996 if ((td->ed->type & 3) == PIPE_ISOCHRONOUS) {
997 td->hwCBP = cpu_to_le32 (((!data || !len)?
998 0 : virt_to_bus (data)) & 0xFFFFF000);
999 td->ed->last_iso = info & 0xffff;
1000 } else {
1001 td->hwCBP = cpu_to_le32 (((!data || !len)? 0 : virt_to_bus (data)));
1002 }
1003 td->hwBE = cpu_to_le32 ((!data || !len )? 0: virt_to_bus (data + len - 1));
1004 td->hwNextTD = cpu_to_le32 (virt_to_bus (td_pt));
1005 td->hwPSW [0] = cpu_to_le16 ((virt_to_bus (data) & 0x0FFF) | 0xE000);
1006 td_pt->hwNextTD = 0;
1007 td->ed->hwTailP = td->hwNextTD;
1008
1009 td->next_dl_td = NULL; //td_pt;
1010 }
1011
1012 /*-------------------------------------------------------------------------*/
1013
1014 /* prepare all TDs of a transfer */
1015
1016 static void td_submit_urb (urb_t * urb)
1017 {
1018 urb_priv_t * urb_priv = urb->hcpriv;
1019 ohci_t * ohci = (ohci_t *) urb->dev->bus->hcpriv;
1020 void * ctrl = urb->setup_packet;
1021 void * data = urb->transfer_buffer;
1022 int data_len = urb->transfer_buffer_length;
1023 int cnt = 0;
1024 __u32 info = 0;
1025 unsigned int toggle = 0;
1026
1027 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
1028 if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe))) {
1029 toggle = TD_T_TOGGLE;
1030 } else {
1031 toggle = TD_T_DATA0;
1032 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1);
1033 }
1034
1035 urb_priv->td_cnt = 0;
1036
1037 switch (usb_pipetype (urb->pipe)) {
1038 case PIPE_BULK:
1039 info = usb_pipeout (urb->pipe)?
1040 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
1041 while(data_len > 4096) {
1042 td_fill (info | (cnt? TD_T_TOGGLE:toggle), data, 4096, urb, cnt);
1043 data += 4096; data_len -= 4096; cnt++;
1044 }
1045 info = usb_pipeout (urb->pipe)?
1046 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
1047 td_fill (info | (cnt? TD_T_TOGGLE:toggle), data, data_len, urb, cnt);
1048 cnt++;
1049 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
1050 break;
1051
1052 case PIPE_INTERRUPT:
1053 info = usb_pipeout (urb->pipe)?
1054 TD_CC | TD_DP_OUT | toggle: TD_CC | TD_R | TD_DP_IN | toggle;
1055 td_fill (info, data, data_len, urb, cnt++);
1056 break;
1057
1058 case PIPE_CONTROL:
1059 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1060 td_fill (info, ctrl, 8, urb, cnt++);
1061 if (data_len > 0) {
1062 info = usb_pipeout (urb->pipe)?
1063 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1064 td_fill (info, data, data_len, urb, cnt++);
1065 }
1066 info = usb_pipeout (urb->pipe)?
1067 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
1068 td_fill (info, NULL, 0, urb, cnt++);
1069 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
1070 break;
1071
1072 case PIPE_ISOCHRONOUS:
1073 for (cnt = 0; cnt < urb->number_of_packets; cnt++) {
1074 td_fill (TD_CC|TD_ISO | ((urb->start_frame + cnt) & 0xffff),
1075 (__u8 *) data + urb->iso_frame_desc[cnt].offset,
1076 urb->iso_frame_desc[cnt].length, urb, cnt);
1077 }
1078 break;
1079 }
1080 if (urb_priv->length != cnt)
1081 dbg("TD LENGTH %d != CNT %d", urb_priv->length, cnt);
1082 }
1083
1084 /*-------------------------------------------------------------------------*
1085 * Done List handling functions
1086 *-------------------------------------------------------------------------*/
1087
1088
1089 /* calculate the transfer length and update the urb */
1090
1091 static void dl_transfer_length(td_t * td)
1092 {
1093 __u32 tdINFO, tdBE, tdCBP;
1094 __u16 tdPSW;
1095 urb_t * urb = td->urb;
1096 urb_priv_t * urb_priv = urb->hcpriv;
1097 int dlen = 0;
1098 int cc = 0;
1099
1100 tdINFO = le32_to_cpup (&td->hwINFO);
1101 tdBE = le32_to_cpup (&td->hwBE);
1102 tdCBP = le32_to_cpup (&td->hwCBP);
1103
1104
1105 if (tdINFO & TD_ISO) {
1106 tdPSW = le16_to_cpu (td->hwPSW[0]);
1107 cc = (tdPSW >> 12) & 0xF;
1108 if (cc < 0xE) {
1109 if (usb_pipeout(urb->pipe)) {
1110 dlen = urb->iso_frame_desc[td->index].length;
1111 } else {
1112 dlen = tdPSW & 0x3ff;
1113 }
1114 urb->actual_length += dlen;
1115 urb->iso_frame_desc[td->index].actual_length = dlen;
1116 if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1117 cc = TD_CC_NOERROR;
1118
1119 urb->iso_frame_desc[td->index].status = cc_to_error[cc];
1120 }
1121 } else { /* BULK, INT, CONTROL DATA */
1122 if (!(usb_pipetype (urb->pipe) == PIPE_CONTROL &&
1123 ((td->index == 0) || (td->index == urb_priv->length - 1)))) {
1124 if (tdBE != 0) {
1125 if (td->hwCBP == 0)
1126 urb->actual_length = bus_to_virt (tdBE) - urb->transfer_buffer + 1;
1127 else
1128 urb->actual_length = bus_to_virt (tdCBP) - urb->transfer_buffer;
1129 }
1130 }
1131 }
1132 }
1133
1134 /*-------------------------------------------------------------------------*/
1135
1136 /* replies to the request have to be on a FIFO basis so
1137 * we reverse the reversed done-list */
1138
1139 static td_t * dl_reverse_done_list (ohci_t * ohci)
1140 {
1141 __u32 td_list_hc;
1142 td_t * td_rev = NULL;
1143 td_t * td_list = NULL;
1144 urb_priv_t * urb_priv = NULL;
1145 unsigned long flags;
1146
1147 spin_lock_irqsave (&usb_ed_lock, flags);
1148
1149 td_list_hc = le32_to_cpup (&ohci->hcca.done_head) & 0xfffffff0;
1150 ohci->hcca.done_head = 0;
1151
1152 while (td_list_hc) {
1153 td_list = (td_t *) bus_to_virt (td_list_hc);
1154
1155 if (TD_CC_GET (le32_to_cpup (&td_list->hwINFO))) {
1156 urb_priv = (urb_priv_t *) td_list->urb->hcpriv;
1157 dbg(" USB-error/status: %x : %p",
1158 TD_CC_GET (le32_to_cpup (&td_list->hwINFO)), td_list);
1159 if (td_list->ed->hwHeadP & cpu_to_le32 (0x1)) {
1160 if (urb_priv && ((td_list->index + 1) < urb_priv->length)) {
1161 td_list->ed->hwHeadP =
1162 (urb_priv->td[urb_priv->length - 1]->hwNextTD & cpu_to_le32 (0xfffffff0)) |
1163 (td_list->ed->hwHeadP & cpu_to_le32 (0x2));
1164 urb_priv->td_cnt += urb_priv->length - td_list->index - 1;
1165 } else
1166 td_list->ed->hwHeadP &= cpu_to_le32 (0xfffffff2);
1167 }
1168 }
1169
1170 td_list->next_dl_td = td_rev;
1171 td_rev = td_list;
1172 td_list_hc = le32_to_cpup (&td_list->hwNextTD) & 0xfffffff0;
1173 }
1174 spin_unlock_irqrestore (&usb_ed_lock, flags);
1175 return td_list;
1176 }
1177
1178 /*-------------------------------------------------------------------------*/
1179
1180 /* there are some pending requests to remove
1181 * - some of the eds (if ed->state & ED_DEL (set by sohci_free_dev)
1182 * - some URBs/TDs if urb_priv->state == URB_DEL */
1183
1184 static void dl_del_list (ohci_t * ohci, unsigned int frame)
1185 {
1186 unsigned long flags;
1187 ed_t * ed;
1188 __u32 edINFO;
1189 __u32 tdINFO;
1190 td_t * td = NULL, * td_next = NULL, * tdHeadP = NULL, * tdTailP;
1191 __u32 * td_p;
1192 int ctrl = 0, bulk = 0;
1193
1194 spin_lock_irqsave (&usb_ed_lock, flags);
1195 for (ed = ohci->ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list) {
1196
1197 tdTailP = bus_to_virt (le32_to_cpup (&ed->hwTailP) & 0xfffffff0);
1198 tdHeadP = bus_to_virt (le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
1199 edINFO = le32_to_cpup (&ed->hwINFO);
1200 td_p = &ed->hwHeadP;
1201
1202 for (td = tdHeadP; td != tdTailP; td = td_next) {
1203 urb_t * urb = td->urb;
1204 urb_priv_t * urb_priv = td->urb->hcpriv;
1205
1206 td_next = bus_to_virt (le32_to_cpup (&td->hwNextTD) & 0xfffffff0);
1207 if ((urb_priv->state == URB_DEL) || (ed->state & ED_DEL)) {
1208 tdINFO = le32_to_cpup (&td->hwINFO);
1209 if (TD_CC_GET (tdINFO) < 0xE) dl_transfer_length (td);
1210 *td_p = td->hwNextTD | (*td_p & cpu_to_le32 (0x3));
1211 if(++ (urb_priv->td_cnt) == urb_priv->length)
1212 urb_rm_priv (urb);
1213 if (urb->transfer_flags & USB_ASYNC_UNLINK) {
1214 usb_dec_dev_use (urb->dev);
1215 urb->status = -ECONNRESET;
1216 urb->complete (urb);
1217 } else {
1218 wake_up (&op_wakeup);
1219 }
1220 } else {
1221 td_p = &td->hwNextTD;
1222 }
1223
1224 }
1225 if (ed->state & ED_DEL) { /* set by sohci_free_dev */
1226 struct ohci_device * dev = usb_to_ohci (ohci->dev[edINFO & 0x7F]);
1227 OHCI_FREE (tdTailP); /* free dummy td */
1228 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP);
1229 ed->state = ED_NEW;
1230 /* if all eds are removed wake up sohci_free_dev */
1231 if (!--dev->ed_cnt)
1232 wake_up (&op_wakeup);
1233 }
1234 else {
1235 ed->state &= ~ED_URB_DEL;
1236 ed->hwINFO &= ~cpu_to_le32 (OHCI_ED_SKIP);
1237 }
1238
1239 if ((ed->type & 3) == CTRL) ctrl |= 1;
1240 if ((ed->type & 3) == BULK) bulk |= 1;
1241 }
1242
1243 if (ctrl) writel (0, &ohci->regs->ed_controlcurrent); /* reset CTRL list */
1244 if (bulk) writel (0, &ohci->regs->ed_bulkcurrent); /* reset BULK list */
1245 if (!ohci->ed_rm_list[!frame]) { /* enable CTRL and BULK lists */
1246 ohci->hc_control |= OHCI_CTRL_CLE | OHCI_CTRL_BLE;
1247 writel (ohci->hc_control, &ohci->regs->control);
1248 }
1249 ohci->ed_rm_list[frame] = NULL;
1250
1251 spin_unlock_irqrestore (&usb_ed_lock, flags);
1252 }
1253
1254
1255
1256 /*-------------------------------------------------------------------------*/
1257
1258 /* td done list */
1259
1260 static void dl_done_list (ohci_t * ohci, td_t * td_list)
1261 {
1262 td_t * td_list_next = NULL;
1263 ed_t * ed;
1264 int cc = 0;
1265 urb_t * urb;
1266 urb_priv_t * urb_priv;
1267 __u32 tdINFO, edHeadP, edTailP;
1268
1269 unsigned long flags;
1270
1271 while (td_list) {
1272 td_list_next = td_list->next_dl_td;
1273
1274 urb = td_list->urb;
1275 urb_priv = urb->hcpriv;
1276 tdINFO = le32_to_cpup (&td_list->hwINFO);
1277
1278 ed = td_list->ed;
1279
1280 dl_transfer_length(td_list);
1281
1282 /* error code of transfer */
1283 cc = TD_CC_GET (tdINFO);
1284 if( cc == TD_CC_STALL) usb_endpoint_halt(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
1285
1286 if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1287 cc = TD_CC_NOERROR;
1288 if (++(urb_priv->td_cnt) == urb_priv->length) {
1289 if (urb_priv->state != URB_DEL && !(ed->state & ED_DEL) && ed->state != ED_NEW) {
1290 urb->status = cc_to_error[cc];
1291 sohci_return_urb (urb);
1292 } else {
1293 urb_rm_priv (urb);
1294 }
1295 }
1296
1297 spin_lock_irqsave (&usb_ed_lock, flags);
1298 if (ed->state != ED_NEW) {
1299 edHeadP = le32_to_cpup (&ed->hwHeadP) & 0xfffffff0;
1300 edTailP = le32_to_cpup (&ed->hwTailP);
1301
1302 if((edHeadP == edTailP) && (ed->state == ED_OPER))
1303 ep_unlink (ohci, ed); /* unlink eds if they are not busy */
1304
1305 }
1306 spin_unlock_irqrestore (&usb_ed_lock, flags);
1307
1308 td_list = td_list_next;
1309 }
1310 }
1311
1312
1313
1314
1315 /*-------------------------------------------------------------------------*
1316 * Virtual Root Hub
1317 *-------------------------------------------------------------------------*/
1318
1319 /* Device descriptor */
1320 static __u8 root_hub_dev_des[] =
1321 {
1322 0x12, /* __u8 bLength; */
1323 0x01, /* __u8 bDescriptorType; Device */
1324 0x10, /* __u16 bcdUSB; v1.1 */
1325 0x01,
1326 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1327 0x00, /* __u8 bDeviceSubClass; */
1328 0x00, /* __u8 bDeviceProtocol; */
1329 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1330 0x00, /* __u16 idVendor; */
1331 0x00,
1332 0x00, /* __u16 idProduct; */
1333 0x00,
1334 0x00, /* __u16 bcdDevice; */
1335 0x00,
1336 0x00, /* __u8 iManufacturer; */
1337 0x02, /* __u8 iProduct; */
1338 0x01, /* __u8 iSerialNumber; */
1339 0x01 /* __u8 bNumConfigurations; */
1340 };
1341
1342
1343 /* Configuration descriptor */
1344 static __u8 root_hub_config_des[] =
1345 {
1346 0x09, /* __u8 bLength; */
1347 0x02, /* __u8 bDescriptorType; Configuration */
1348 0x19, /* __u16 wTotalLength; */
1349 0x00,
1350 0x01, /* __u8 bNumInterfaces; */
1351 0x01, /* __u8 bConfigurationValue; */
1352 0x00, /* __u8 iConfiguration; */
1353 0x40, /* __u8 bmAttributes;
1354 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1355 0x00, /* __u8 MaxPower; */
1356
1357 /* interface */
1358 0x09, /* __u8 if_bLength; */
1359 0x04, /* __u8 if_bDescriptorType; Interface */
1360 0x00, /* __u8 if_bInterfaceNumber; */
1361 0x00, /* __u8 if_bAlternateSetting; */
1362 0x01, /* __u8 if_bNumEndpoints; */
1363 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1364 0x00, /* __u8 if_bInterfaceSubClass; */
1365 0x00, /* __u8 if_bInterfaceProtocol; */
1366 0x00, /* __u8 if_iInterface; */
1367
1368 /* endpoint */
1369 0x07, /* __u8 ep_bLength; */
1370 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1371 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1372 0x03, /* __u8 ep_bmAttributes; Interrupt */
1373 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1374 0x00,
1375 0xff /* __u8 ep_bInterval; 255 ms */
1376 };
1377
1378 /* Hub class-specific descriptor is constructed dynamically */
1379
1380
1381 /*-------------------------------------------------------------------------*/
1382
1383 /* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */
1384
1385 static int rh_send_irq (ohci_t * ohci, void * rh_data, int rh_len)
1386 {
1387 int num_ports;
1388 int i;
1389 int ret;
1390 int len;
1391
1392 __u8 data[8];
1393
1394 num_ports = readl (&ohci->regs->roothub.a) & RH_A_NDP;
1395 if (num_ports > MAX_ROOT_PORTS) {
1396 err ("bogus NDP=%d for OHCI %s", num_ports,
1397 ohci->ohci_dev->slot_name);
1398 err ("rereads as NDP=%d",
1399 readl (&ohci->regs->roothub.a) & RH_A_NDP);
1400 /* retry later; "should not happen" */
1401 return 0;
1402 }
1403 *(__u8 *) data = (readl (&ohci->regs->roothub.status) & (RH_HS_LPSC | RH_HS_OCIC))
1404 ? 1: 0;
1405 ret = *(__u8 *) data;
1406
1407 for ( i = 0; i < num_ports; i++) {
1408 *(__u8 *) (data + (i + 1) / 8) |=
1409 ((readl (&ohci->regs->roothub.portstatus[i]) &
1410 (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | RH_PS_OCIC | RH_PS_PRSC))
1411 ? 1: 0) << ((i + 1) % 8);
1412 ret += *(__u8 *) (data + (i + 1) / 8);
1413 }
1414 len = i/8 + 1;
1415
1416 if (ret > 0) {
1417 memcpy (rh_data, data, min (len, min (rh_len, sizeof(data))));
1418 return len;
1419 }
1420 return 0;
1421 }
1422
1423 /*-------------------------------------------------------------------------*/
1424
1425 /* Virtual Root Hub INTs are polled by this timer every "interval" ms */
1426
1427 static void rh_int_timer_do (unsigned long ptr)
1428 {
1429 int len;
1430
1431 urb_t * urb = (urb_t *) ptr;
1432 ohci_t * ohci = urb->dev->bus->hcpriv;
1433
1434 if (ohci->disabled)
1435 return;
1436
1437 /* ignore timers firing during PM suspend, etc */
1438 if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER)
1439 return;
1440
1441 if(ohci->rh.send) {
1442 len = rh_send_irq (ohci, urb->transfer_buffer, urb->transfer_buffer_length);
1443 if (len > 0) {
1444 urb->actual_length = len;
1445 #ifdef DEBUG
1446 urb_print (urb, "RET-t(rh)", usb_pipeout (urb->pipe));
1447 #endif
1448 if (urb->complete) urb->complete (urb);
1449 }
1450 }
1451 rh_init_int_timer (urb);
1452 }
1453
1454 /*-------------------------------------------------------------------------*/
1455
1456 /* Root Hub INTs are polled by this timer */
1457
1458 static int rh_init_int_timer (urb_t * urb)
1459 {
1460 ohci_t * ohci = urb->dev->bus->hcpriv;
1461
1462 ohci->rh.interval = urb->interval;
1463 init_timer (&ohci->rh.rh_int_timer);
1464 ohci->rh.rh_int_timer.function = rh_int_timer_do;
1465 ohci->rh.rh_int_timer.data = (unsigned long) urb;
1466 ohci->rh.rh_int_timer.expires =
1467 jiffies + (HZ * (urb->interval < 30? 30: urb->interval)) / 1000;
1468 add_timer (&ohci->rh.rh_int_timer);
1469
1470 return 0;
1471 }
1472
1473 /*-------------------------------------------------------------------------*/
1474
1475 #define OK(x) len = (x); break
1476 #define WR_RH_STAT(x) writel((x), &ohci->regs->roothub.status)
1477 #define WR_RH_PORTSTAT(x) writel((x), &ohci->regs->roothub.portstatus[wIndex-1])
1478 #define RD_RH_STAT readl(&ohci->regs->roothub.status)
1479 #define RD_RH_PORTSTAT readl(&ohci->regs->roothub.portstatus[wIndex-1])
1480
1481 /* request to virtual root hub */
1482
1483 static int rh_submit_urb (urb_t * urb)
1484 {
1485 struct usb_device * usb_dev = urb->dev;
1486 ohci_t * ohci = usb_dev->bus->hcpriv;
1487 unsigned int pipe = urb->pipe;
1488 devrequest * cmd = (devrequest *) urb->setup_packet;
1489 void * data = urb->transfer_buffer;
1490 int leni = urb->transfer_buffer_length;
1491 int len = 0;
1492 int status = TD_CC_NOERROR;
1493
1494 __u32 datab[4];
1495 __u8 * data_buf = (__u8 *) datab;
1496
1497 __u16 bmRType_bReq;
1498 __u16 wValue;
1499 __u16 wIndex;
1500 __u16 wLength;
1501
1502 if (usb_pipeint(pipe)) {
1503
1504 ohci->rh.urb = urb;
1505 ohci->rh.send = 1;
1506 ohci->rh.interval = urb->interval;
1507 rh_init_int_timer(urb);
1508 urb->status = cc_to_error [TD_CC_NOERROR];
1509
1510 return 0;
1511 }
1512
1513 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1514 wValue = le16_to_cpu (cmd->value);
1515 wIndex = le16_to_cpu (cmd->index);
1516 wLength = le16_to_cpu (cmd->length);
1517
1518 dbg ("rh_submit_urb, req = %d(%x) len=%d", bmRType_bReq,
1519 bmRType_bReq, wLength);
1520
1521 switch (bmRType_bReq) {
1522 /* Request Destination:
1523 without flags: Device,
1524 RH_INTERFACE: interface,
1525 RH_ENDPOINT: endpoint,
1526 RH_CLASS means HUB here,
1527 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1528 */
1529
1530 case RH_GET_STATUS:
1531 *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1532 case RH_GET_STATUS | RH_INTERFACE:
1533 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1534 case RH_GET_STATUS | RH_ENDPOINT:
1535 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1536 case RH_GET_STATUS | RH_CLASS:
1537 *(__u32 *) data_buf = cpu_to_le32 (
1538 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1539 OK (4);
1540 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1541 *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1542
1543 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1544 switch (wValue) {
1545 case (RH_ENDPOINT_STALL): OK (0);
1546 }
1547 break;
1548
1549 case RH_CLEAR_FEATURE | RH_CLASS:
1550 switch (wValue) {
1551 case RH_C_HUB_LOCAL_POWER:
1552 OK(0);
1553 case (RH_C_HUB_OVER_CURRENT):
1554 WR_RH_STAT(RH_HS_OCIC); OK (0);
1555 }
1556 break;
1557
1558 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1559 switch (wValue) {
1560 case (RH_PORT_ENABLE):
1561 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1562 case (RH_PORT_SUSPEND):
1563 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1564 case (RH_PORT_POWER):
1565 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1566 case (RH_C_PORT_CONNECTION):
1567 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1568 case (RH_C_PORT_ENABLE):
1569 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1570 case (RH_C_PORT_SUSPEND):
1571 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1572 case (RH_C_PORT_OVER_CURRENT):
1573 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1574 case (RH_C_PORT_RESET):
1575 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1576 }
1577 break;
1578
1579 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1580 switch (wValue) {
1581 case (RH_PORT_SUSPEND):
1582 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1583 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1584 if (RD_RH_PORTSTAT & RH_PS_CCS)
1585 WR_RH_PORTSTAT (RH_PS_PRS);
1586 OK (0);
1587 case (RH_PORT_POWER):
1588 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1589 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1590 if (RD_RH_PORTSTAT & RH_PS_CCS)
1591 WR_RH_PORTSTAT (RH_PS_PES );
1592 OK (0);
1593 }
1594 break;
1595
1596 case RH_SET_ADDRESS: ohci->rh.devnum = wValue; OK(0);
1597
1598 case RH_GET_DESCRIPTOR:
1599 switch ((wValue & 0xff00) >> 8) {
1600 case (0x01): /* device descriptor */
1601 len = min (leni, min (sizeof (root_hub_dev_des), wLength));
1602 data_buf = root_hub_dev_des; OK(len);
1603 case (0x02): /* configuration descriptor */
1604 len = min (leni, min (sizeof (root_hub_config_des), wLength));
1605 data_buf = root_hub_config_des; OK(len);
1606 case (0x03): /* string descriptors */
1607 len = usb_root_hub_string (wValue & 0xff,
1608 (int)(long) ohci->regs, "OHCI",
1609 data, wLength);
1610 if (len > 0) {
1611 data_buf = data;
1612 OK (min (leni, len));
1613 }
1614 // else fallthrough
1615 default:
1616 status = TD_CC_STALL;
1617 }
1618 break;
1619
1620 case RH_GET_DESCRIPTOR | RH_CLASS:
1621 {
1622 __u32 temp = readl (&ohci->regs->roothub.a);
1623
1624 data_buf [0] = 9; // min length;
1625 data_buf [1] = 0x29;
1626 data_buf [2] = temp & RH_A_NDP;
1627 data_buf [3] = 0;
1628 if (temp & RH_A_PSM) /* per-port power switching? */
1629 data_buf [3] |= 0x1;
1630 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1631 data_buf [3] |= 0x10;
1632 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1633 data_buf [3] |= 0x8;
1634
1635 datab [1] = 0;
1636 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1637 temp = readl (&ohci->regs->roothub.b);
1638 data_buf [7] = temp & RH_B_DR;
1639 if (data_buf [2] < 7) {
1640 data_buf [8] = 0xff;
1641 } else {
1642 data_buf [0] += 2;
1643 data_buf [8] = (temp & RH_B_DR) >> 8;
1644 data_buf [10] = data_buf [9] = 0xff;
1645 }
1646
1647 len = min (leni, min (data_buf [0], wLength));
1648 OK (len);
1649 }
1650
1651 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1652
1653 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1654
1655 default:
1656 dbg ("unsupported root hub command");
1657 status = TD_CC_STALL;
1658 }
1659
1660 #ifdef DEBUG
1661 ohci_dump_roothub (ohci, 0);
1662 #endif
1663
1664 len = min(len, leni);
1665 if (data != data_buf)
1666 memcpy (data, data_buf, len);
1667 urb->actual_length = len;
1668 urb->status = cc_to_error [status];
1669
1670 #ifdef DEBUG
1671 urb_print (urb, "RET(rh)", usb_pipeout (urb->pipe));
1672 #endif
1673
1674 if (urb->complete) urb->complete (urb);
1675 return 0;
1676 }
1677
1678 /*-------------------------------------------------------------------------*/
1679
1680 static int rh_unlink_urb (urb_t * urb)
1681 {
1682 ohci_t * ohci = urb->dev->bus->hcpriv;
1683
1684 if (ohci->rh.urb == urb) {
1685 ohci->rh.send = 0;
1686 del_timer (&ohci->rh.rh_int_timer);
1687 }
1688 return 0;
1689 }
1690
1691 /*-------------------------------------------------------------------------*
1692 * HC functions
1693 *-------------------------------------------------------------------------*/
1694
1695 /* reset the HC and BUS */
1696
1697 static int hc_reset (ohci_t * ohci)
1698 {
1699 int timeout = 30;
1700 int smm_timeout = 50; /* 0,5 sec */
1701
1702 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1703 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1704 dbg("USB HC TakeOver from SMM");
1705 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1706 wait_ms (10);
1707 if (--smm_timeout == 0) {
1708 err("USB HC TakeOver failed!");
1709 return -1;
1710 }
1711 }
1712 }
1713
1714 /* Disable HC interrupts */
1715 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1716
1717 dbg("USB HC reset_hc %s: ctrl = %x ;",
1718 ohci->ohci_dev->slot_name,
1719 readl (&ohci->regs->control));
1720
1721 /* Reset USB (needed by some controllers) */
1722 writel (0, &ohci->regs->control);
1723
1724 /* HC Reset requires max 10 ms delay */
1725 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1726 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1727 if (--timeout == 0) {
1728 err("USB HC reset timed out!");
1729 return -1;
1730 }
1731 udelay (1);
1732 }
1733 ohci->disabled = 0;
1734 return 0;
1735 }
1736
1737 /*-------------------------------------------------------------------------*/
1738
1739 /* Start an OHCI controller, set the BUS operational
1740 * enable interrupts
1741 * connect the virtual root hub */
1742
1743 static int hc_start (ohci_t * ohci)
1744 {
1745 __u32 mask;
1746 unsigned int fminterval;
1747 struct usb_device * usb_dev;
1748 struct ohci_device * dev;
1749
1750 /* Tell the controller where the control and bulk lists are
1751 * The lists are empty now. */
1752
1753 writel (0, &ohci->regs->ed_controlhead);
1754 writel (0, &ohci->regs->ed_bulkhead);
1755
1756 writel (virt_to_bus (&ohci->hcca), &ohci->regs->hcca); /* a reset clears this */
1757
1758 fminterval = 0x2edf;
1759 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1760 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1761 writel (fminterval, &ohci->regs->fminterval);
1762 writel (0x628, &ohci->regs->lsthresh);
1763
1764 /* start controller operations */
1765 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1766 writel (ohci->hc_control, &ohci->regs->control);
1767
1768 /* Choose the interrupts we care about now, others later on demand */
1769 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1770 writel (mask, &ohci->regs->intrenable);
1771 writel (mask, &ohci->regs->intrstatus);
1772
1773 #ifdef OHCI_USE_NPS
1774 writel ((readl(&ohci->regs->roothub.a) | RH_A_NPS) & ~RH_A_PSM,
1775 &ohci->regs->roothub.a);
1776 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1777 // POTPGT delay is bits 24-31, in 2 ms units.
1778 mdelay ((readl(&ohci->regs->roothub.a) >> 23) & 0x1fe);
1779 #endif /* OHCI_USE_NPS */
1780
1781 /* connect the virtual root hub */
1782 ohci->rh.devnum = 0;
1783 usb_dev = usb_alloc_dev (NULL, ohci->bus);
1784 if (!usb_dev)
1785 return -ENOMEM;
1786
1787 dev = usb_to_ohci (usb_dev);
1788 ohci->bus->root_hub = usb_dev;
1789 usb_connect (usb_dev);
1790 if (usb_new_device (usb_dev) != 0) {
1791 usb_free_dev (usb_dev);
1792 return -ENODEV;
1793 }
1794
1795 return 0;
1796 }
1797
1798 /*-------------------------------------------------------------------------*/
1799
1800 /* an interrupt happens */
1801
1802 static void hc_interrupt (int irq, void * __ohci, struct pt_regs * r)
1803 {
1804 ohci_t * ohci = __ohci;
1805 struct ohci_regs * regs = ohci->regs;
1806 int ints;
1807
1808 if ((ohci->hcca.done_head != 0) && !(le32_to_cpup (&ohci->hcca.done_head) & 0x01)) {
1809 ints = OHCI_INTR_WDH;
1810 } else if ((ints = (readl (&regs->intrstatus) & readl (&regs->intrenable))) == 0) {
1811 return;
1812 }
1813
1814 // dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca.frame_no));
1815
1816 if (ints & OHCI_INTR_UE) {
1817 ohci->disabled++;
1818 err ("OHCI Unrecoverable Error, controller %s disabled",
1819 ohci->ohci_dev->slot_name);
1820 // e.g. due to PCI Master/Target Abort
1821
1822 #ifndef DEBUG
1823 // FIXME: be optimistic, hope that bug won't repeat often.
1824 // Make some non-interrupt context restart the controller.
1825 // Count and limit the retries though; either hardware or
1826 // software errors can go forever...
1827 #endif
1828 }
1829
1830 if (ints & OHCI_INTR_WDH) {
1831 writel (OHCI_INTR_WDH, &regs->intrdisable);
1832 dl_done_list (ohci, dl_reverse_done_list (ohci));
1833 writel (OHCI_INTR_WDH, &regs->intrenable);
1834 }
1835
1836 if (ints & OHCI_INTR_SO) {
1837 dbg("USB Schedule overrun");
1838 writel (OHCI_INTR_SO, &regs->intrenable);
1839 }
1840
1841 if (ints & OHCI_INTR_SF) {
1842 unsigned int frame = le16_to_cpu (ohci->hcca.frame_no) & 1;
1843 writel (OHCI_INTR_SF, &regs->intrdisable);
1844 if (ohci->ed_rm_list[!frame] != NULL) {
1845 dl_del_list (ohci, !frame);
1846 }
1847 if (ohci->ed_rm_list[frame] != NULL)
1848 writel (OHCI_INTR_SF, &regs->intrenable);
1849 }
1850 writel (ints, &regs->intrstatus);
1851 writel (OHCI_INTR_MIE, &regs->intrenable);
1852 }
1853
1854 /*-------------------------------------------------------------------------*/
1855
1856 /* reinitialize after controller reset */
1857
1858 static void hc_reinit_ohci (ohci_t *ohci)
1859 {
1860 int i;
1861
1862 /* for load balancing of the interrupt branches */
1863 for (i = 0; i < NUM_INTS; i++) ohci->ohci_int_load[i] = 0;
1864 for (i = 0; i < NUM_INTS; i++) ohci->hcca.int_table[i] = 0;
1865
1866 ohci->ed_rm_list [0] = NULL;
1867 ohci->ed_rm_list [1] = NULL;
1868
1869 /* end of control and bulk lists */
1870 ohci->ed_isotail = NULL;
1871 ohci->ed_controltail = NULL;
1872 ohci->ed_bulktail = NULL;
1873 }
1874
1875 /* allocate OHCI */
1876
1877 static ohci_t * hc_alloc_ohci (void * mem_base)
1878 {
1879 ohci_t * ohci;
1880 struct usb_bus * bus;
1881
1882 ohci = (ohci_t *) __get_free_pages (GFP_KERNEL, 1);
1883 if (!ohci)
1884 return NULL;
1885
1886 memset (ohci, 0, sizeof (ohci_t));
1887
1888 ohci->irq = -1;
1889 ohci->regs = mem_base;
1890
1891 bus = usb_alloc_bus (&sohci_device_operations);
1892 if (!bus) {
1893 free_pages ((unsigned long) ohci, 1);
1894 return NULL;
1895 }
1896
1897 ohci->bus = bus;
1898 bus->hcpriv = (void *) ohci;
1899
1900 return ohci;
1901 }
1902
1903
1904 /*-------------------------------------------------------------------------*/
1905
1906 /* De-allocate all resources.. */
1907
1908 static void hc_release_ohci (ohci_t * ohci)
1909 {
1910 dbg ("USB HC release ohci %s", ohci->ohci_dev->slot_name);
1911
1912 /* disconnect all devices */
1913 if (ohci->bus->root_hub)
1914 usb_disconnect (&ohci->bus->root_hub);
1915
1916 if (!ohci->disabled)
1917 hc_reset (ohci);
1918
1919 if (ohci->irq >= 0) {
1920 free_irq (ohci->irq, ohci);
1921 ohci->irq = -1;
1922 }
1923 ohci->ohci_dev->driver_data = 0;
1924
1925 usb_deregister_bus (ohci->bus);
1926 usb_free_bus (ohci->bus);
1927
1928 /* unmap the IO address space */
1929 iounmap (ohci->regs);
1930
1931 free_pages ((unsigned long) ohci, 1);
1932 }
1933
1934 /*-------------------------------------------------------------------------*/
1935
1936 /* Increment the module usage count, start the control thread and
1937 * return success. */
1938
1939 static int hc_found_ohci (struct pci_dev *dev, int irq, void * mem_base)
1940 {
1941 ohci_t * ohci;
1942 char buf[8], *bufp = buf;
1943
1944 #ifndef __sparc__
1945 sprintf(buf, "%d", irq);
1946 #else
1947 bufp = __irq_itoa(irq);
1948 #endif
1949 printk(KERN_INFO __FILE__ ": USB OHCI at membase 0x%lx, IRQ %s\n",
1950 (unsigned long) mem_base, bufp);
1951 printk(KERN_INFO __FILE__ ": pci slot %s, %s\n", dev->slot_name, dev->name);
1952
1953 ohci = hc_alloc_ohci (mem_base);
1954 if (!ohci) {
1955 return -ENOMEM;
1956 }
1957
1958 ohci->ohci_dev = dev;
1959 dev->driver_data = ohci;
1960 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
1961 list_add (&ohci->ohci_hcd_list, &ohci_hcd_list);
1962
1963 if (hc_reset (ohci) < 0) {
1964 hc_release_ohci (ohci);
1965 return -ENODEV;
1966 }
1967
1968 writel (ohci->hc_control = OHCI_USB_RESET, &ohci->regs->control);
1969 wait_ms (10);
1970 usb_register_bus (ohci->bus);
1971
1972 if (request_irq (irq, hc_interrupt, SA_SHIRQ, "usb-ohci", ohci) == 0) {
1973 struct pm_dev *pmdev;
1974
1975 ohci->irq = irq;
1976 hc_start (ohci);
1977
1978 pmdev = pm_register (PM_PCI_DEV,
1979 PM_PCI_ID(dev),
1980 handle_pm_event);
1981 if (pmdev)
1982 pmdev->data = ohci;
1983
1984 #ifdef DEBUG
1985 ohci_dump (ohci, 1);
1986 #endif
1987 return 0;
1988 }
1989 err("request interrupt %d failed", irq);
1990 hc_release_ohci (ohci);
1991 return -EBUSY;
1992 }
1993
1994 /*-------------------------------------------------------------------------*/
1995
1996 static int hc_start_ohci (struct pci_dev * dev)
1997 {
1998 unsigned long mem_base;
1999
2000 if (pci_enable_device(dev) < 0)
2001 return -ENODEV;
2002
2003 pci_set_master (dev);
2004 mem_base = pci_resource_start(dev, 0);
2005 mem_base = (unsigned long) ioremap_nocache (mem_base, 4096);
2006
2007 if (!mem_base) {
2008 err("Error mapping OHCI memory");
2009 return -EFAULT;
2010 }
2011 return hc_found_ohci (dev, dev->irq, (void *) mem_base);
2012 }
2013
2014 /*-------------------------------------------------------------------------*/
2015
2016 #ifdef CONFIG_PMAC_PBOOK
2017
2018 /* On Powerbooks, put the controller into suspend mode when going
2019 * to sleep, and do a resume when waking up. */
2020
2021 static int ohci_sleep_notify (struct pmu_sleep_notifier * self, int when)
2022 {
2023 struct list_head * ohci_l;
2024 ohci_t * ohci;
2025
2026 for (ohci_l = ohci_hcd_list.next; ohci_l != &ohci_hcd_list; ohci_l = ohci_l->next) {
2027 ohci = list_entry (ohci_l, ohci_t, ohci_hcd_list);
2028
2029 switch (when) {
2030 case PBOOK_SLEEP_NOW:
2031 disable_irq (ohci->irq);
2032 writel (ohci->hc_control = OHCI_USB_SUSPEND, &ohci->regs->control);
2033 wait_ms (10);
2034 break;
2035 case PBOOK_WAKE:
2036 writel (ohci->hc_control = OHCI_USB_RESUME, &ohci->regs->control);
2037 wait_ms (20);
2038 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2039 writel (ohci->hc_control, &ohci->regs->control);
2040 enable_irq (ohci->irq);
2041 break;
2042 }
2043 }
2044 return PBOOK_SLEEP_OK;
2045 }
2046
2047 static struct pmu_sleep_notifier ohci_sleep_notifier = {
2048 ohci_sleep_notify, SLEEP_LEVEL_MISC,
2049 };
2050 #endif /* CONFIG_PMAC_PBOOK */
2051
2052 /*-------------------------------------------------------------------------*/
2053
2054 static int handle_pm_event (struct pm_dev *dev, pm_request_t rqst, void *data)
2055 {
2056 ohci_t * ohci = (ohci_t*) dev->data;
2057 int temp = 0;
2058
2059 if (ohci) {
2060 switch (rqst) {
2061 case PM_SUSPEND:
2062 /* act as if usb suspend can always be used */
2063 dbg("USB suspend: %s", ohci->ohci_dev->slot_name);
2064 ohci->hc_control = OHCI_USB_SUSPEND;
2065 writel (ohci->hc_control, &ohci->regs->control);
2066 wait_ms (10);
2067 break;
2068
2069 case PM_RESUME:
2070 /* did we suspend, or were we powered off? */
2071 ohci->hc_control = readl (&ohci->regs->control);
2072 temp = ohci->hc_control & OHCI_CTRL_HCFS;
2073 switch (temp) {
2074
2075 case OHCI_USB_RESET: // lost power
2076 dbg("USB reset: %s", ohci->ohci_dev->slot_name);
2077 ohci->disabled = 1;
2078 if (ohci->bus->root_hub)
2079 usb_disconnect (&ohci->bus->root_hub);
2080 hc_reinit_ohci (ohci);
2081 if ((temp = hc_reset (ohci)) < 0
2082 || (temp = hc_start (ohci)) < 0) {
2083 ohci->disabled = 1;
2084 err ("can't restart %s, %d",
2085 ohci->ohci_dev->slot_name,
2086 temp);
2087 }
2088 dbg ("reset done");
2089 break;
2090
2091 case OHCI_USB_SUSPEND: // host wakeup
2092 case OHCI_USB_RESUME: // remote wakeup
2093 dbg("USB resume: %s", ohci->ohci_dev->slot_name);
2094 ohci->hc_control = OHCI_USB_RESUME;
2095 writel (ohci->hc_control, &ohci->regs->control);
2096 wait_ms (20);
2097
2098 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2099 writel (ohci->hc_control, &ohci->regs->control);
2100 break;
2101
2102 default:
2103 warn ("odd PM_RESUME");
2104 }
2105 break;
2106 }
2107 }
2108 return 0;
2109 }
2110
2111 /*-------------------------------------------------------------------------*/
2112
2113 #define PCI_CLASS_SERIAL_USB_OHCI 0x0C0310
2114
2115 int ohci_hcd_init (void)
2116 {
2117 int ret = -ENODEV;
2118 struct pci_dev * dev = NULL;
2119
2120 while ((dev = pci_find_class (PCI_CLASS_SERIAL_USB_OHCI, dev))) {
2121 if (hc_start_ohci(dev) >= 0) ret = 0;
2122 }
2123
2124 #ifdef CONFIG_PMAC_PBOOK
2125 pmu_register_sleep_notifier (&ohci_sleep_notifier);
2126 #endif
2127 return ret;
2128 }
2129
2130 /*-------------------------------------------------------------------------*/
2131
2132 #ifdef MODULE
2133 int init_module (void)
2134 {
2135 return ohci_hcd_init ();
2136 }
2137
2138 /*-------------------------------------------------------------------------*/
2139
2140 void cleanup_module (void)
2141 {
2142 ohci_t * ohci;
2143
2144 pm_unregister_all (handle_pm_event);
2145
2146 #ifdef CONFIG_PMAC_PBOOK
2147 pmu_unregister_sleep_notifier (&ohci_sleep_notifier);
2148 #endif
2149
2150 while (!list_empty (&ohci_hcd_list)) {
2151 ohci = list_entry (ohci_hcd_list.next, ohci_t, ohci_hcd_list);
2152 list_del (&ohci->ohci_hcd_list);
2153 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
2154 hc_release_ohci (ohci);
2155 }
2156 }
2157 #endif //MODULE
2158
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