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Import 2.3.28
[davej-history.git] / drivers / sound / maestro.c
blobc44b31ef3ffbffe9d50e61904321cc248920fe7d
1 /*****************************************************************************
2 *
3 * ESS Maestro/Maestro-2/Maestro-2E driver for Linux 2.2.x
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * (c) Copyright 1999 Alan Cox <alan.cox@linux.org>
20 *
21 * Based heavily on SonicVibes.c:
22 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
23 *
24 * Heavily modified by Zach Brown <zab@redhat.com> based on lunch
25 * with ESS engineers. Many thanks to Howard Kim for providing
26 * contacts and hardware. Honorable mention goes to Eric
27 * Brombaugh for all sorts of things. Best regards to the
28 * proprietors of Hack Central for fine lodging.
29 *
30 * Supported devices:
31 * /dev/dsp0-7 standard /dev/dsp device, (mostly) OSS compatible
32 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
33 *
34 * Hardware Description
35 *
36 * A working Maestro setup contains the Maestro chip wired to a
37 * codec or 2. In the Maestro we have the APUs, the ASP, and the
38 * Wavecache. The APUs can be though of as virtual audio routing
39 * channels. They can take data from a number of sources and perform
40 * basic encodings of the data. The wavecache is a storehouse for
41 * PCM data. Typically it deals with PCI and interracts with the
42 * APUs. The ASP is a wacky DSP like device that ESS is loth
43 * to release docs on. Thankfully it isn't required on the Maestro
44 * until you start doing insane things like FM emulation and surround
45 * encoding. The codecs are almost always AC-97 compliant codecs,
46 * but it appears that early Maestros may have had PT101 (an ESS
47 * part?) wired to them. The only real difference in the Maestro
48 * families is external goop like docking capability, memory for
49 * the ASP, and initialization differences.
50 *
51 * Driver Operation
52 *
53 * We only drive the APU/Wavecache as typical DACs and drive the
54 * mixers in the codecs. There are 64 APUs. We assign 6 to each
55 * /dev/dsp? device. 2 channels for output, and 4 channels for
56 * input.
57 *
58 * For output we maintain a ring buffer of data that we are DMAing
59 * to the card. In mono operation this is nice and easy. When
60 * we receive data we tack it onto the ring buffer and make sure
61 * the APU assigned to it is playing over the data. When we fill
62 * the ring buffer we put the client to sleep until there is
63 * room again. Easy.
64 *
65 * However, this starts to stink when we use stereo. The APUs
66 * supposedly can decode LRLR packed stereo data, but it
67 * doesn't work. So we're forced to use dual mono APUs walking over
68 * mono encoded data. This requires us to split the input from
69 * the client and complicates the buffer maths tremendously. Ick.
70 *
71 * This also pollutes the recording paths as well. We have to use
72 * 2 L/R incoming APUs that are fixed at 16bit/48khz. We then pipe
73 * these through 2 rate converion apus that mix them down to the
74 * requested frequency and write them to memory through the wavecache.
75 * We also apparently need a 512byte region thats used as temp space
76 * between the incoming APUs and the rate converters.
77 *
78 * The wavecache makes our life even more fun. First off, it can
79 * only address the first 28 bits of PCI address space, making it
80 * useless on quite a few architectures. Secondly, its insane.
81 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
82 * But that doesn't really work. You can only use 1 region. So all our
83 * allocations have to be in 4meg of each other. Booo. Hiss.
84 * So we have a module parameter, dsps_order, that is the order of
85 * the number of dsps to provide. All their buffer space is allocated
86 * on open time. The sonicvibes OSS routines we inherited really want
87 * power of 2 buffers, so we have all those next to each other, then
88 * 512 byte regions for the recording wavecaches. This ends up
89 * wasting quite a bit of memory. The only fixes I can see would be
90 * getting a kernel allocator that could work in zones, or figuring out
91 * just how to coerce the WP into doing what we want.
92 *
93 * The indirection of the various registers means we have to spinlock
94 * nearly all register accesses. We have the main register indirection
95 * like the wave cache, maestro registers, etc. Then we have beasts
96 * like the APU interface that is indirect registers gotten at through
97 * the main maestro indirection. Ouch. We spinlock around the actual
98 * ports on a per card basis. This means spinlock activity at each IO
99 * operation, but the only IO operation clusters are in non critical
100 * paths and it makes the code far easier to follow. Interrupts are
101 * blocked while holding the locks because the int handler has to
102 * get at some of them :(. The mixer interface doesn't, however.
103 * We also have an OSS state lock that is thrown around in a few
104 * places.
105 *
106 * This driver has brute force APM suspend support. We catch suspend
107 * notifications and stop all work being done on the chip. Any people
108 * that try between this shutdown and the real suspend operation will
109 * be put to sleep. When we resume we restore our software state on
110 * the chip and wake up the people that were using it. The code thats
111 * being used now is quite dirty and assumes we're on a uni-processor
112 * machine. Much of it will need to be cleaned up for SMP ACPI or
113 * similar.
114 *
115 * History
116 * v0.10 - Oct 28 1999 - Zach Brown <zab@redhat.com>
117 * aha, so, sometimes the WP writes a status word to offset 0
118 * from one of the PCMBARs. rearrange allocation accordingly..
119 * Jeroen Hoogervorst submits 7500 fix out of nowhere. yay. :)
120 * v0.09 - Oct 23 1999 - Zach Brown <zab@redhat.com>
121 * added APM support.
122 * re-order something such that some 2Es now work. Magic!
123 * new codec reset routine. made some codecs come to life.
124 * fix clear_advance, sync some control with ESS.
125 * now write to all base regs to be paranoid.
126 * v0.08 - Oct 20 1999 - Zach Brown <zab@redhat.com>
127 * Fix initial buflen bug. I am so smart. also smp compiling..
128 * I owe Eric yet another beer: fixed recmask, igain,
129 * muting, and adc sync consistency. Go Team.
130 * v0.07 - Oct 4 1999 - Zach Brown <zab@redhat.com>
131 * tweak adc/dac, formating, and stuff to allow full duplex
132 * allocate dsps memory at open() so we can fit in the wavecache window
133 * fix wavecache braindamage. again. no more scribbling?
134 * fix ess 1921 codec bug on some laptops.
135 * fix dumb pci scanning bug
136 * started 2.3 cleanup, redid spinlocks, little cleanups
137 * v0.06 - Sep 20 1999 - Zach Brown <zab@redhat.com>
138 * fix wavecache thinkos. limit to 1 /dev/dsp.
139 * eric is wearing his thinking toque this week.
140 * spotted apu mode bugs and gain ramping problem
141 * don't touch weird mixer regs, make recmask optional
142 * fixed igain inversion, defaults for mixers, clean up rec_start
143 * make mono recording work.
144 * report subsystem stuff, please send reports.
145 * littles: parallel out, amp now
146 * v0.05 - Sep 17 1999 - Zach Brown <zab@redhat.com>
147 * merged and fixed up Eric's initial recording code
148 * munged format handling to catch misuse, needs rewrite.
149 * revert ring bus init, fixup shared int, add pci busmaster setting
150 * fix mixer oss interface, fix mic mute and recmask
151 * mask off unsupported mixers, reset with all 1s, modularize defaults
152 * make sure bob is running while we need it
153 * got rid of device limit, initial minimal apm hooks
154 * pull out dead code/includes, only allow multimedia/audio maestros
155 * v0.04 - Sep 01 1999 - Zach Brown <zab@redhat.com>
156 * copied memory leak fix from sonicvibes driver
157 * different ac97 reset, play with 2.0 ac97, simplify ring bus setup
158 * bob freq code, region sanity, jitter sync fix; all from Eric
159 *
160 * TODO
161 * some people get indir reg timeouts?
162 * anyone have a pt101 codec?
163 * mmap(), but beware stereo encoding nastiness.
164 * actually post pci writes
165 * fix bob frequency
166 * do smart things with ac97 2.0 bits.
167 * ugh.. non aligned writes in the middle of a data stream.. ugh
168 * sort out 0x34->0x36 crap in init
169 * docking and dual codecs and 978?
170 * pcm_sync?
171 * actually use LRLR
172 *
173 * it also would be fun to have a mode that would not use pci dma at all
174 * but would copy into the wavecache on board memory and use that
175 * on architectures that don't like the maestro's pci dma ickiness.
176 */
177
178 /*****************************************************************************/
179
180 #include <linux/config.h>
181 #include <linux/version.h>
182 #include <linux/module.h>
183
184 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
185
186 #define DECLARE_WAITQUEUE(QUEUE,INIT) struct wait_queue QUEUE = {INIT, NULL}
187 #define wait_queue_head_t struct wait_queue *
188 #define SILLY_PCI_BASE_ADDRESS(PCIDEV) (PCIDEV->base_address[0] & PCI_BASE_ADDRESS_IO_MASK)
189 #define SILLY_INIT_SEM(SEM) SEM=MUTEX;
190 #define init_waitqueue_head init_waitqueue
191 #define SILLY_MAKE_INIT(FUNC) __initfunc(FUNC)
192
193 #else
194
195 #define SILLY_PCI_BASE_ADDRESS(PCIDEV) (PCIDEV->resource[0].start)
196 #define SILLY_INIT_SEM(SEM) init_MUTEX(&SEM)
197 #define SILLY_MAKE_INIT(FUNC) __init FUNC
198
199 #endif
200
201 #include <linux/string.h>
202 #include <linux/ctype.h>
203 #include <linux/ioport.h>
204 #include <linux/sched.h>
205 #include <linux/delay.h>
206 #include <linux/sound.h>
207 #include <linux/malloc.h>
208 #include <linux/soundcard.h>
209 #include <linux/pci.h>
210 #include <linux/spinlock.h>
211 #include <asm/io.h>
212 #include <asm/dma.h>
213 #include <linux/init.h>
214 #include <linux/poll.h>
215 #include <asm/uaccess.h>
216 #include <asm/hardirq.h>
217
218 #ifdef CONFIG_APM
219 #include <linux/apm_bios.h>
220 static int maestro_apm_callback(apm_event_t ae);
221 static int in_suspend=0;
222 wait_queue_head_t suspend_queue;
223 static void check_suspend(void);
224 #define CHECK_SUSPEND check_suspend();
225 #else
226 #define CHECK_SUSPEND
227 #endif
228
229 #include "maestro.h"
230
231 /* --------------------------------------------------------------------- */
232
233 #define M_DEBUG 1
234
235 #ifdef M_DEBUG
236 static int debug=0;
237 static int dsps_order=0;
238 #define M_printk(args...) {if (debug) printk(args);}
239 #else
240 #define M_printk(x)
241 #endif
242
243 /* --------------------------------------------------------------------- */
244 #define DRIVER_VERSION "0.10"
245
246 #ifndef PCI_VENDOR_ESS
247 #define PCI_VENDOR_ESS 0x125D
248 #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 /* Maestro 2 */
249 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 /* Maestro 2E */
250
251 #define PCI_VENDOR_ESS_OLD 0x1285 /* Platform Tech,
252 the people the maestro
253 was bought from */
254 #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 /* maestro 1 */
255 #endif /* PCI_VENDOR_ESS */
256
257 #define ESS_CHAN_HARD 0x100
258
259
260 /* changed so that I could actually find all the
261 references and fix them up. its a little more readable now. */
262 #define ESS_FMT_STEREO 0x01
263 #define ESS_FMT_16BIT 0x02
264 #define ESS_FMT_MASK 0x03
265 #define ESS_DAC_SHIFT 0
266 #define ESS_ADC_SHIFT 4
267
268 #define ESS_STATE_MAGIC 0x125D1968
269 #define ESS_CARD_MAGIC 0x19283746
270
271 #define DAC_RUNNING 1
272 #define ADC_RUNNING 2
273
274 #define MAX_DSP_ORDER 3
275 #define MAX_DSPS (1<<3)
276 #define NR_DSPS (1<<dsps_order)
277 #define NR_IDRS 32
278
279 #define SND_DEV_DSP16 5
280
281 #define NR_APUS 64
282 #define NR_APU_REGS 16
283
284 static const unsigned sample_size[] = { 1, 2, 2, 4 };
285 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
286
287 enum card_types_t {
288 TYPE_MAESTRO,
289 TYPE_MAESTRO2,
290 TYPE_MAESTRO2E
291 };
292
293 static const char *card_names[]={
294 [TYPE_MAESTRO] = "ESS Maestro",
295 [TYPE_MAESTRO2] = "ESS Maestro 2",
296 [TYPE_MAESTRO2E] = "ESS Maestro 2E"
297 };
298
299
300 /* --------------------------------------------------------------------- */
301
302 struct ess_state {
303 unsigned int magic;
304 /* FIXME: we probably want submixers in here, but only one record pair */
305 u8 apu[6]; /* l/r output, l/r intput converters, l/r input apus */
306 u8 apu_mode[6]; /* Running mode for this APU */
307 u8 apu_pan[6]; /* Panning setup for this APU */
308 u32 apu_base[6]; /* base address for this apu */
309 struct ess_card *card; /* Card info */
310 /* wave stuff */
311 unsigned int rateadc, ratedac;
312 unsigned char fmt, enable;
313
314 int index;
315
316 /* this locks around the oss state in the driver */
317 spinlock_t lock;
318 /* only let 1 be opening at a time */
319 struct semaphore open_sem;
320 wait_queue_head_t open_wait;
321 mode_t open_mode;
322
323 /* soundcore stuff */
324 int dev_audio;
325
326 struct dmabuf {
327 void *rawbuf;
328 unsigned buforder;
329 unsigned numfrag;
330 unsigned fragshift;
331 /* XXX zab - swptr only in here so that it can be referenced by
332 clear_advance, as far as I can tell :( */
333 unsigned hwptr, swptr;
334 unsigned total_bytes;
335 int count;
336 unsigned error; /* over/underrun */
337 wait_queue_head_t wait;
338 /* redundant, but makes calculations easier */
339 unsigned fragsize;
340 unsigned dmasize;
341 unsigned fragsamples;
342 /* OSS stuff */
343 unsigned mapped:1;
344 unsigned ready:1; /* our oss buffers are ready to go */
345 unsigned endcleared:1;
346 unsigned ossfragshift;
347 int ossmaxfrags;
348 unsigned subdivision;
349 u16 base; /* Offset for ptr */
350 } dma_dac, dma_adc;
351
352 /* pointer to each dsp?s piece of the apu->src buffer page */
353 void *mixbuf;
354 };
355
356 struct ess_card {
357 unsigned int magic;
358
359 /* We keep maestro cards in a linked list */
360 struct ess_card *next;
361
362 int dev_mixer;
363
364 int card_type;
365
366 /* as most of this is static,
367 perhaps it should be a pointer to a global struct */
368 struct mixer_goo {
369 int modcnt;
370 int supported_mixers;
371 int stereo_mixers;
372 int record_sources;
373 /* the caller must guarantee arg sanity before calling these */
374 /* int (*read_mixer)(struct ess_card *card, int index);*/
375 void (*write_mixer)(struct ess_card *card,int mixer, unsigned int left,unsigned int right);
376 int (*recmask_io)(struct ess_card *card,int rw,int mask);
377 unsigned int mixer_state[SOUND_MIXER_NRDEVICES];
378 } mix;
379
380 struct ess_state channels[MAX_DSPS];
381 u16 maestro_map[NR_IDRS]; /* Register map */
382 #ifdef CONFIG_APM
383 /* we have to store this junk so that we can come back from a
384 suspend */
385 u16 apu_map[NR_APUS][NR_APU_REGS]; /* contents of apu regs */
386 #endif
387
388 /* this locks around the physical registers on the card */
389 spinlock_t lock;
390
391 /* memory for this card.. wavecache limited :(*/
392 void *dmapages;
393 int dmaorder;
394
395 /* hardware resources */
396 struct pci_dev pcidev; /* uck.. */
397 u32 iobase;
398 u32 irq;
399
400 int bob_freq;
401 char dsps_open;
402 };
403
404 static unsigned
405 ld2(unsigned int x)
406 {
407 unsigned r = 0;
408
409 if (x >= 0x10000) {
410 x >>= 16;
411 r += 16;
412 }
413 if (x >= 0x100) {
414 x >>= 8;
415 r += 8;
416 }
417 if (x >= 0x10) {
418 x >>= 4;
419 r += 4;
420 }
421 if (x >= 4) {
422 x >>= 2;
423 r += 2;
424 }
425 if (x >= 2)
426 r++;
427 return r;
428 }
429
430
431 /* --------------------------------------------------------------------- */
432
433 static struct ess_card *devs = NULL;
434
435 /* --------------------------------------------------------------------- */
436
437
438 /*
439 * ESS Maestro AC97 codec programming interface.
440 */
441
442 static void maestro_ac97_set(int io, u8 cmd, u16 val)
443 {
444 int i;
445 /*
446 * Wait for the codec bus to be free
447 */
448
449 CHECK_SUSPEND;
450
451 for(i=0;i<10000;i++)
452 {
453 if(!(inb(io+ESS_AC97_INDEX)&1))
454 break;
455 }
456 /*
457 * Write the bus
458 */
459 outw(val, io+ESS_AC97_DATA);
460 mdelay(1);
461 outb(cmd, io+ESS_AC97_INDEX);
462 mdelay(1);
463 }
464
465 static u16 maestro_ac97_get(int io, u8 cmd)
466 {
467 int sanity=10000;
468 u16 data;
469 int i;
470
471 CHECK_SUSPEND;
472 /*
473 * Wait for the codec bus to be free
474 */
475
476 for(i=0;i<10000;i++)
477 {
478 if(!(inb(io+ESS_AC97_INDEX)&1))
479 break;
480 }
481
482 outb(cmd|0x80, io+ESS_AC97_INDEX);
483 mdelay(1);
484
485 while(inb(io+ESS_AC97_INDEX)&1)
486 {
487 sanity--;
488 if(!sanity)
489 {
490 printk(KERN_ERR "maestro: ac97 codec timeout reading 0x%x.\n",cmd);
491 return 0;
492 }
493 }
494 data=inw(io+ESS_AC97_DATA);
495 mdelay(1);
496 return data;
497 }
498
499 /* OSS interface to the ac97s.. */
500
501 #define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\
502 SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\
503 SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN)
504
505 #define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
506 SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\
507 SOUND_MASK_SPEAKER)
508
509 #define AC97_RECORD_MASK (SOUND_MASK_MIC|\
510 SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\
511 SOUND_MASK_PHONEIN)
512
513 #define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) )
514
515 /* this table has default mixer values for all OSS mixers.
516 be sure to fill it in if you add oss mixers
517 to anyone's supported mixer defines */
518
519 unsigned int mixer_defaults[SOUND_MIXER_NRDEVICES] = {
520 [SOUND_MIXER_VOLUME] = 0x3232,
521 [SOUND_MIXER_BASS] = 0x3232,
522 [SOUND_MIXER_TREBLE] = 0x3232,
523 [SOUND_MIXER_SPEAKER] = 0x3232,
524 [SOUND_MIXER_MIC] = 0x3232,
525 [SOUND_MIXER_LINE] = 0x3232,
526 [SOUND_MIXER_CD] = 0x3232,
527 [SOUND_MIXER_VIDEO] = 0x3232,
528 [SOUND_MIXER_LINE1] = 0x3232,
529 [SOUND_MIXER_PCM] = 0x3232,
530 [SOUND_MIXER_IGAIN] = 0x3232
531 };
532
533 static struct ac97_mixer_hw {
534 unsigned char offset;
535 int scale;
536 } ac97_hw[SOUND_MIXER_NRDEVICES]= {
537 [SOUND_MIXER_VOLUME] = {0x02,63},
538 [SOUND_MIXER_BASS] = {0x08,15},
539 [SOUND_MIXER_TREBLE] = {0x08,15},
540 [SOUND_MIXER_SPEAKER] = {0x0a,15},
541 [SOUND_MIXER_MIC] = {0x0e,31},
542 [SOUND_MIXER_LINE] = {0x10,31},
543 [SOUND_MIXER_CD] = {0x12,31},
544 [SOUND_MIXER_VIDEO] = {0x14,31},
545 [SOUND_MIXER_LINE1] = {0x16,31},
546 [SOUND_MIXER_PCM] = {0x18,31},
547 [SOUND_MIXER_IGAIN] = {0x1c,15}
548 };
549
550 #if 0 /* *shrug* removed simply because we never used it.
551 feel free to implement again if needed */
552
553 /* reads the given OSS mixer from the ac97
554 the caller must have insured that the ac97 knows
555 about that given mixer, and should be holding a
556 spinlock for the card */
557 static int ac97_read_mixer(struct ess_card *card, int mixer)
558 {
559 u16 val;
560 int ret=0;
561 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
562
563 val = maestro_ac97_get(card->iobase , mh->offset);
564
565 if(AC97_STEREO_MASK & (1<<mixer)) {
566 /* nice stereo mixers .. */
567 int left,right;
568
569 left = (val >> 8) & 0x7f;
570 right = val & 0x7f;
571
572 if (mixer == SOUND_MIXER_IGAIN) {
573 right = (right * 100) / mh->scale;
574 left = (left * 100) / mh->scale;
575 else {
576 right = 100 - ((right * 100) / mh->scale);
577 left = 100 - ((left * 100) / mh->scale);
578 }
579
580 ret = left | (right << 8);
581 } else if (mixer == SOUND_MIXER_SPEAKER) {
582 ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
583 } else if (mixer == SOUND_MIXER_MIC) {
584 ret = 100 - (((val & 0x1f) * 100) / mh->scale);
585 /* the low bit is optional in the tone sliders and masking
586 it lets is avoid the 0xf 'bypass'.. */
587 } else if (mixer == SOUND_MIXER_BASS) {
588 ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
589 } else if (mixer == SOUND_MIXER_TREBLE) {
590 ret = 100 - (((val & 0xe) * 100) / mh->scale);
591 }
592
593 M_printk("read mixer %d (0x%x) %x -> %x\n",mixer,mh->offset,val,ret);
594
595 return ret;
596 }
597 #endif
598
599 /* write the OSS encoded volume to the given OSS encoded mixer,
600 again caller's job to make sure all is well in arg land,
601 call with spinlock held */
602 static void ac97_write_mixer(struct ess_card *card,int mixer, unsigned int left, unsigned int right)
603 {
604 u16 val=0;
605 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
606
607 M_printk("wrote mixer %d (0x%x) %d,%d",mixer,mh->offset,left,right);
608
609 if(AC97_STEREO_MASK & (1<<mixer)) {
610 /* stereo mixers, mute them if we can */
611
612 if (mixer == SOUND_MIXER_IGAIN) {
613 /* igain's slider is reversed.. */
614 right = (right * mh->scale) / 100;
615 left = (left * mh->scale) / 100;
616 if ((left == 0) && (right == 0))
617 val |= 0x8000;
618 } else {
619 right = ((100 - right) * mh->scale) / 100;
620 left = ((100 - left) * mh->scale) / 100;
621 if((left == mh->scale) && (right == mh->scale))
622 val |= 0x8000;
623 }
624
625 val |= (left << 8) | right;
626
627 } else if (mixer == SOUND_MIXER_SPEAKER) {
628 val = (((100 - left) * mh->scale) / 100) << 1;
629 } else if (mixer == SOUND_MIXER_MIC) {
630 val = maestro_ac97_get(card->iobase , mh->offset) & ~0x801f;
631 val |= (((100 - left) * mh->scale) / 100);
632 /* the low bit is optional in the tone sliders and masking
633 it lets is avoid the 0xf 'bypass'.. */
634 } else if (mixer == SOUND_MIXER_BASS) {
635 val = maestro_ac97_get(card->iobase , mh->offset) & ~0x0f00;
636 val |= ((((100 - left) * mh->scale) / 100) << 8) & 0x0e00;
637 } else if (mixer == SOUND_MIXER_TREBLE) {
638 val = maestro_ac97_get(card->iobase , mh->offset) & ~0x000f;
639 val |= (((100 - left) * mh->scale) / 100) & 0x000e;
640 }
641
642 maestro_ac97_set(card->iobase , mh->offset, val);
643
644 M_printk(" -> %x\n",val);
645 }
646
647 /* the following tables allow us to go from
648 OSS <-> ac97 quickly. */
649
650 enum ac97_recsettings {
651 AC97_REC_MIC=0,
652 AC97_REC_CD,
653 AC97_REC_VIDEO,
654 AC97_REC_AUX,
655 AC97_REC_LINE,
656 AC97_REC_STEREO, /* combination of all enabled outputs.. */
657 AC97_REC_MONO, /*.. or the mono equivalent */
658 AC97_REC_PHONE
659 };
660
661 static unsigned int ac97_oss_mask[] = {
662 [AC97_REC_MIC] = SOUND_MASK_MIC,
663 [AC97_REC_CD] = SOUND_MASK_CD,
664 [AC97_REC_VIDEO] = SOUND_MASK_VIDEO,
665 [AC97_REC_AUX] = SOUND_MASK_LINE1,
666 [AC97_REC_LINE] = SOUND_MASK_LINE,
667 [AC97_REC_PHONE] = SOUND_MASK_PHONEIN
668 };
669
670 /* indexed by bit position */
671 static unsigned int ac97_oss_rm[] = {
672 [SOUND_MIXER_MIC] = AC97_REC_MIC,
673 [SOUND_MIXER_CD] = AC97_REC_CD,
674 [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO,
675 [SOUND_MIXER_LINE1] = AC97_REC_AUX,
676 [SOUND_MIXER_LINE] = AC97_REC_LINE,
677 [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE
678 };
679
680 /* read or write the recmask
681 the ac97 can really have left and right recording
682 inputs independantly set, but OSS doesn't seem to
683 want us to express that to the user.
684 the caller guarantees that we have a supported bit set,
685 and they must be holding the card's spinlock */
686 static int
687 ac97_recmask_io(struct ess_card *card, int read, int mask)
688 {
689 unsigned int val = ac97_oss_mask[ maestro_ac97_get(card->iobase, 0x1a) & 0x7 ];
690
691 if (read) return val;
692
693 /* oss can have many inputs, maestro cant. try
694 to pick the 'new' one */
695
696 if (mask != val) mask &= ~val;
697
698 val = ffs(mask) - 1;
699 val = ac97_oss_rm[val];
700 val |= val << 8; /* set both channels */
701
702 M_printk("maestro: setting ac97 recmask to 0x%x\n",val);
703
704 maestro_ac97_set(card->iobase,0x1a,val);
705
706 return 0;
707 };
708
709 /*
710 * The Maestro can be wired to a standard AC97 compliant codec
711 * (see www.intel.com for the pdf's on this), or to a PT101 codec
712 * which appears to be the ES1918 (data sheet on the esstech.com.tw site)
713 *
714 * The PT101 setup is untested.
715 */
716
717 static u16 maestro_ac97_init(struct ess_card *card, int iobase)
718 {
719 u16 vend1, vend2, caps;
720
721 card->mix.supported_mixers = AC97_SUPPORTED_MASK;
722 card->mix.stereo_mixers = AC97_STEREO_MASK;
723 card->mix.record_sources = AC97_RECORD_MASK;
724 /* card->mix.read_mixer = ac97_read_mixer;*/
725 card->mix.write_mixer = ac97_write_mixer;
726 card->mix.recmask_io = ac97_recmask_io;
727
728 vend1 = maestro_ac97_get(iobase, 0x7c);
729 vend2 = maestro_ac97_get(iobase, 0x7e);
730
731 caps = maestro_ac97_get(iobase, 0x00);
732
733 printk(KERN_INFO "maestro: AC97 Codec detected: v: 0x%2x%2x caps: 0x%x pwr: 0x%x\n",
734 vend1,vend2,caps,maestro_ac97_get(iobase,0x26) & 0xf);
735
736 if (! (caps & 0x4) ) {
737 /* no bass/treble nobs */
738 card->mix.supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE);
739 }
740
741 /* XXX endianness, dork head. */
742 /* vendor specifc bits.. */
743 switch ((long)(vend1 << 16) | vend2) {
744 case 0x545200ff: /* TriTech */
745 /* no idea what this does */
746 maestro_ac97_set(iobase,0x2a,0x0001);
747 maestro_ac97_set(iobase,0x2c,0x0000);
748 maestro_ac97_set(iobase,0x2c,0xffff);
749 break;
750 case 0x83847609: /* ESS 1921 */
751 /* writing to 0xe (mic) or 0x1a (recmask) seems
752 to hang this codec */
753 card->mix.supported_mixers &= ~(SOUND_MASK_MIC);
754 card->mix.record_sources = 0;
755 card->mix.recmask_io = NULL;
756 #if 0 /* don't ask. I have yet to see what these actually do. */
757 maestro_ac97_set(iobase,0x76,0xABBA); /* o/~ Take a chance on me o/~ */
758 udelay(20);
759 maestro_ac97_set(iobase,0x78,0x3002);
760 udelay(20);
761 maestro_ac97_set(iobase,0x78,0x3802);
762 udelay(20);
763 #endif
764 break;
765 default: break;
766 }
767
768 maestro_ac97_set(iobase, 0x1E, 0x0404);
769 /* null misc stuff */
770 maestro_ac97_set(iobase, 0x20, 0x0000);
771
772 return 0;
773 }
774
775 static u16 maestro_pt101_init(struct ess_card *card,int iobase)
776 {
777 printk(KERN_INFO "maestro: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
778 /* who knows.. */
779 maestro_ac97_set(iobase, 0x2A, 0x0001);
780 maestro_ac97_set(iobase, 0x2C, 0x0000);
781 maestro_ac97_set(iobase, 0x2C, 0xFFFF);
782 maestro_ac97_set(iobase, 0x10, 0x9F1F);
783 maestro_ac97_set(iobase, 0x12, 0x0808);
784 maestro_ac97_set(iobase, 0x14, 0x9F1F);
785 maestro_ac97_set(iobase, 0x16, 0x9F1F);
786 maestro_ac97_set(iobase, 0x18, 0x0404);
787 maestro_ac97_set(iobase, 0x1A, 0x0000);
788 maestro_ac97_set(iobase, 0x1C, 0x0000);
789 maestro_ac97_set(iobase, 0x02, 0x0404);
790 maestro_ac97_set(iobase, 0x04, 0x0808);
791 maestro_ac97_set(iobase, 0x0C, 0x801F);
792 maestro_ac97_set(iobase, 0x0E, 0x801F);
793 return 0;
794 }
795
796 /* this is very magic, and very slow.. */
797 static void
798 maestro_ac97_reset(int ioaddr, struct pci_dev *pcidev)
799 {
800 u16 save_68;
801 u16 w;
802
803 outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
804 outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
805 outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
806
807 /* reset the first codec */
808 outw(0x0000, ioaddr+0x36);
809 save_68 = inw(ioaddr+0x68);
810 pci_read_config_word(pcidev, 0x58, &w); /* something magical with gpio and bus arb. */
811 if( w & 0x1)
812 save_68 |= 0x10;
813 outw(0xfffe, ioaddr + 0x64); /* tickly gpio 0.. */
814 outw(0x0001, ioaddr + 0x68);
815 outw(0x0000, ioaddr + 0x60);
816 udelay(20);
817 outw(0x0001, ioaddr + 0x60);
818 mdelay(20);
819
820 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */
821 outw( (inw(ioaddr + 0x38) & 0xfffc)|0x1, ioaddr + 0x38);
822 outw( (inw(ioaddr + 0x3a) & 0xfffc)|0x1, ioaddr + 0x3a);
823 outw( (inw(ioaddr + 0x3c) & 0xfffc)|0x1, ioaddr + 0x3c);
824
825 /* now the second codec */
826 outw(0x0000, ioaddr+0x36);
827 outw(0xfff7, ioaddr + 0x64);
828 save_68 = inw(ioaddr+0x68);
829 outw(0x0009, ioaddr + 0x68);
830 outw(0x0001, ioaddr + 0x60);
831 udelay(20);
832 outw(0x0009, ioaddr + 0x60);
833 mdelay(500); /* .. ouch.. */
834 outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
835 outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
836 outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
837
838 #if 0 /* the loop here needs to be much better if we want it.. */
839 M_printk("trying software reset\n");
840 /* try and do a software reset */
841 outb(0x80|0x7c, ioaddr + 0x30);
842 for (w=0; ; w++) {
843 if ((inw(ioaddr+ 0x30) & 1) == 0) {
844 if(inb(ioaddr + 0x32) !=0) break;
845
846 outb(0x80|0x7d, ioaddr + 0x30);
847 if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
848 outb(0x80|0x7f, ioaddr + 0x30);
849 if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
850 }
851
852 if( w > 10000) {
853 outb( inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
854 mdelay(500); /* oh my.. */
855 outb( inb(ioaddr + 0x37) & ~0x08, ioaddr + 0x37);
856 udelay(1);
857 outw( 0x80, ioaddr+0x30);
858 for(w = 0 ; w < 10000; w++) {
859 if((inw(ioaddr + 0x30) & 1) ==0) break;
860 }
861 }
862 }
863 #endif
864 }
865 /*
866 * Indirect register access. Not all registers are readable so we
867 * need to keep register state ourselves
868 */
869
870 #define WRITEABLE_MAP 0xEFFFFF
871 #define READABLE_MAP 0x64003F
872
873 /*
874 * The Maestro engineers were a little indirection happy. These indirected
875 * registers themselves include indirect registers at another layer
876 */
877
878 static void __maestro_write(struct ess_card *card, u16 reg, u16 data)
879 {
880 long ioaddr = card->iobase;
881
882 outw(reg, ioaddr+0x02);
883 outw(data, ioaddr+0x00);
884 if( reg >= NR_IDRS) printk("maestro: IDR %d out of bounds!\n",reg);
885 else card->maestro_map[reg]=data;
886
887 }
888
889 static void maestro_write(struct ess_state *s, u16 reg, u16 data)
890 {
891 unsigned long flags;
892
893 CHECK_SUSPEND;
894 spin_lock_irqsave(&s->card->lock,flags);
895
896 __maestro_write(s->card,reg,data);
897
898 spin_unlock_irqrestore(&s->card->lock,flags);
899 }
900
901 static u16 __maestro_read(struct ess_card *card, u16 reg)
902 {
903 long ioaddr = card->iobase;
904
905 outw(reg, ioaddr+0x02);
906 return card->maestro_map[reg]=inw(ioaddr+0x00);
907 }
908
909 static u16 maestro_read(struct ess_state *s, u16 reg)
910 {
911 if(READABLE_MAP & (1<<reg))
912 {
913 unsigned long flags;
914 CHECK_SUSPEND;
915 spin_lock_irqsave(&s->card->lock,flags);
916
917 __maestro_read(s->card,reg);
918
919 spin_unlock_irqrestore(&s->card->lock,flags);
920 }
921 return s->card->maestro_map[reg];
922 }
923
924 /*
925 * These routines handle accessing the second level indirections to the
926 * wave ram.
927 */
928
929 /*
930 * The register names are the ones ESS uses (see 104T31.ZIP)
931 */
932
933 #define IDR0_DATA_PORT 0x00
934 #define IDR1_CRAM_POINTER 0x01
935 #define IDR2_CRAM_DATA 0x02
936 #define IDR3_WAVE_DATA 0x03
937 #define IDR4_WAVE_PTR_LOW 0x04
938 #define IDR5_WAVE_PTR_HI 0x05
939 #define IDR6_TIMER_CTRL 0x06
940 #define IDR7_WAVE_ROMRAM 0x07
941
942 static void apu_index_set(struct ess_card *card, u16 index)
943 {
944 int i;
945 __maestro_write(card, IDR1_CRAM_POINTER, index);
946 for(i=0;i<1000;i++)
947 if(__maestro_read(card, IDR1_CRAM_POINTER)==index)
948 return;
949 printk(KERN_WARNING "maestro: APU register select failed.\n");
950 }
951
952 static void apu_data_set(struct ess_card *card, u16 data)
953 {
954 int i;
955 for(i=0;i<1000;i++)
956 {
957 if(__maestro_read(card, IDR0_DATA_PORT)==data)
958 return;
959 __maestro_write(card, IDR0_DATA_PORT, data);
960 }
961 }
962
963 /*
964 * This is the public interface for APU manipulation. It handles the
965 * interlock to avoid two APU writes in parallel etc. Don't diddle
966 * directly with the stuff above.
967 */
968
969 static void apu_set_register(struct ess_state *s, u16 channel, u8 reg, u16 data)
970 {
971 unsigned long flags;
972
973 CHECK_SUSPEND;
974
975 if(channel&ESS_CHAN_HARD)
976 channel&=~ESS_CHAN_HARD;
977 else
978 {
979 if(channel>5)
980 printk("BAD CHANNEL %d.\n",channel);
981 else
982 channel = s->apu[channel];
983 #ifdef CONFIG_APM
984 /* store based on real hardware apu/reg */
985 s->card->apu_map[channel][reg]=data;
986 #endif
987 }
988 reg|=(channel<<4);
989
990 /* hooray for double indirection!! */
991 spin_lock_irqsave(&s->card->lock,flags);
992
993 apu_index_set(s->card, reg);
994 apu_data_set(s->card, data);
995
996 spin_unlock_irqrestore(&s->card->lock,flags);
997 }
998
999 static u16 apu_get_register(struct ess_state *s, u16 channel, u8 reg)
1000 {
1001 unsigned long flags;
1002 u16 v;
1003
1004 CHECK_SUSPEND;
1005
1006 if(channel&ESS_CHAN_HARD)
1007 channel&=~ESS_CHAN_HARD;
1008 else
1009 channel = s->apu[channel];
1010
1011 reg|=(channel<<4);
1012
1013 spin_lock_irqsave(&s->card->lock,flags);
1014
1015 apu_index_set(s->card, reg);
1016 v=__maestro_read(s->card, IDR0_DATA_PORT);
1017
1018 spin_unlock_irqrestore(&s->card->lock,flags);
1019 return v;
1020 }
1021
1022
1023 /*
1024 * The wavecache buffers between the APUs and
1025 * pci bus mastering
1026 */
1027
1028 static void wave_set_register(struct ess_state *s, u16 reg, u16 value)
1029 {
1030 long ioaddr = s->card->iobase;
1031 unsigned long flags;
1032 CHECK_SUSPEND;
1033
1034 spin_lock_irqsave(&s->card->lock,flags);
1035
1036 outw(reg, ioaddr+0x10);
1037 outw(value, ioaddr+0x12);
1038
1039 spin_unlock_irqrestore(&s->card->lock,flags);
1040 }
1041
1042 static u16 wave_get_register(struct ess_state *s, u16 reg)
1043 {
1044 long ioaddr = s->card->iobase;
1045 unsigned long flags;
1046 u16 value;
1047 CHECK_SUSPEND;
1048
1049 spin_lock_irqsave(&s->card->lock,flags);
1050 outw(reg, ioaddr+0x10);
1051 value=inw(ioaddr+0x12);
1052 spin_unlock_irqrestore(&s->card->lock,flags);
1053
1054 return value;
1055 }
1056
1057 static void sound_reset(int ioaddr)
1058 {
1059 outw(0x2000, 0x18+ioaddr);
1060 udelay(1);
1061 outw(0x0000, 0x18+ioaddr);
1062 udelay(1);
1063 }
1064
1065 /* sets the play formats of these apus, should be passed the already shifted format */
1066 static void set_apu_fmt(struct ess_state *s, int apu, int mode)
1067 {
1068 if(mode&ESS_FMT_16BIT) {
1069 s->apu_mode[apu] = 0x10;
1070 s->apu_mode[apu+1] = 0x10;
1071 } else {
1072 s->apu_mode[apu] = 0x30;
1073 s->apu_mode[apu+1] = 0x30;
1074 }
1075 }
1076
1077 /* this only fixes the output apu mode to be later set by start_dac and
1078 company. output apu modes are set in ess_rec_setup */
1079 static void set_fmt(struct ess_state *s, unsigned char mask, unsigned char data)
1080 {
1081 s->fmt = (s->fmt & mask) | data;
1082 set_apu_fmt(s, 0, (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK);
1083 }
1084
1085 static u16 compute_rate(u32 freq)
1086 {
1087 if(freq==48000)
1088 return 0xFFFF;
1089 freq<<=16;
1090 freq/=48000;
1091 return freq;
1092 }
1093
1094 static void set_dac_rate(struct ess_state *s, unsigned rate)
1095 {
1096 u32 freq;
1097
1098 if (rate > 48000)
1099 rate = 48000;
1100 if (rate < 4000)
1101 rate = 4000;
1102
1103 s->ratedac = rate;
1104
1105 if(!((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT))
1106 rate >>= 1; /* who knows */
1107
1108 /* M_printk("computing dac rate %d with mode %d\n",rate,s->fmt);*/
1109
1110 freq = compute_rate(rate);
1111
1112 /* Load the frequency, turn on 6dB */
1113 apu_set_register(s, 0, 2,(apu_get_register(s, 0, 2)&0x00FF)|
1114 ( ((freq&0xFF)<<8)|0x10 ));
1115 apu_set_register(s, 0, 3, freq>>8);
1116 apu_set_register(s, 1, 2,(apu_get_register(s, 1, 2)&0x00FF)|
1117 ( ((freq&0xFF)<<8)|0x10 ));
1118 apu_set_register(s, 1, 3, freq>>8);
1119 }
1120
1121 static void set_adc_rate(struct ess_state *s, unsigned rate)
1122 {
1123 u32 freq;
1124
1125 if (rate > 48000)
1126 rate = 48000;
1127 if (rate < 4000)
1128 rate = 4000;
1129
1130 s->rateadc = rate;
1131
1132 freq = compute_rate(rate);
1133
1134 /* Load the frequency, turn on 6dB */
1135 apu_set_register(s, 2, 2,(apu_get_register(s, 2, 2)&0x00FF)|
1136 ( ((freq&0xFF)<<8)|0x10 ));
1137 apu_set_register(s, 2, 3, freq>>8);
1138 apu_set_register(s, 3, 2,(apu_get_register(s, 3, 2)&0x00FF)|
1139 ( ((freq&0xFF)<<8)|0x10 ));
1140 apu_set_register(s, 3, 3, freq>>8);
1141
1142 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1143 freq = 0x10000;
1144
1145 apu_set_register(s, 4, 2,(apu_get_register(s, 4, 2)&0x00FF)|
1146 ( ((freq&0xFF)<<8)|0x10 ));
1147 apu_set_register(s, 4, 3, freq>>8);
1148 apu_set_register(s, 5, 2,(apu_get_register(s, 5, 2)&0x00FF)|
1149 ( ((freq&0xFF)<<8)|0x10 ));
1150 apu_set_register(s, 5, 3, freq>>8);
1151 }
1152
1153 /* Stop our host of recording apus */
1154 extern inline void stop_adc(struct ess_state *s)
1155 {
1156 /* XXX lets hope we don't have to lock around this */
1157 if (! (s->enable & ADC_RUNNING)) return;
1158
1159 s->enable &= ~ADC_RUNNING;
1160 apu_set_register(s, 2, 0, apu_get_register(s, 2, 0)&0xFF0F);
1161 apu_set_register(s, 3, 0, apu_get_register(s, 3, 0)&0xFF0F);
1162 apu_set_register(s, 4, 0, apu_get_register(s, 2, 0)&0xFF0F);
1163 apu_set_register(s, 5, 0, apu_get_register(s, 3, 0)&0xFF0F);
1164 }
1165
1166 /* stop output apus */
1167 extern inline void stop_dac(struct ess_state *s)
1168 {
1169 /* XXX have to lock around this? */
1170 if (! (s->enable & DAC_RUNNING)) return;
1171
1172 s->enable &= ~DAC_RUNNING;
1173 apu_set_register(s, 0, 0, apu_get_register(s, 0, 0)&0xFF0F);
1174 apu_set_register(s, 1, 0, apu_get_register(s, 1, 0)&0xFF0F);
1175 }
1176
1177 static void start_dac(struct ess_state *s)
1178 {
1179 /* XXX locks? */
1180 if ( (s->dma_dac.mapped || s->dma_dac.count > 0) &&
1181 s->dma_dac.ready &&
1182 (! (s->enable & DAC_RUNNING)) ) {
1183
1184 s->enable |= DAC_RUNNING;
1185
1186 apu_set_register(s, 0, 0,
1187 (apu_get_register(s, 0, 0)&0xFF0F)|s->apu_mode[0]);
1188
1189 if((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_STEREO)
1190 apu_set_register(s, 1, 0,
1191 (apu_get_register(s, 1, 0)&0xFF0F)|s->apu_mode[1]);
1192 }
1193 }
1194
1195 static void start_adc(struct ess_state *s)
1196 {
1197 /* XXX locks? */
1198 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
1199 && s->dma_adc.ready && (! (s->enable & ADC_RUNNING)) ) {
1200
1201 s->enable |= ADC_RUNNING;
1202 apu_set_register(s, 2, 0,
1203 (apu_get_register(s, 2, 0)&0xFF0F)|s->apu_mode[2]);
1204 apu_set_register(s, 4, 0,
1205 (apu_get_register(s, 4, 0)&0xFF0F)|s->apu_mode[4]);
1206
1207 if( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1208 apu_set_register(s, 3, 0,
1209 (apu_get_register(s, 3, 0)&0xFF0F)|s->apu_mode[3]);
1210 apu_set_register(s, 5, 0,
1211 (apu_get_register(s, 5, 0)&0xFF0F)|s->apu_mode[5]);
1212 }
1213
1214 }
1215 }
1216
1217
1218 /*
1219 * Native play back driver
1220 */
1221
1222 /* the mode passed should be already shifted and masked */
1223 static void
1224 ess_play_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1225 {
1226 u32 pa;
1227 u32 tmpval;
1228 int high_apu = 0;
1229 int channel;
1230
1231 M_printk("mode=%d rate=%d buf=%p len=%d.\n",
1232 mode, rate, buffer, size);
1233
1234 /* all maestro sizes are in 16bit words */
1235 size >>=1;
1236
1237 /* we're given the full size of the buffer, but
1238 in stereo each channel will only play its half */
1239 if(mode&ESS_FMT_STEREO) {
1240 size >>=1;
1241 high_apu++;
1242 }
1243
1244 for(channel=0; channel <= high_apu; channel++)
1245 {
1246 int i;
1247
1248 if(!channel)
1249 pa = virt_to_bus(buffer);
1250 else
1251 /* right channel plays its split half.
1252 *2 accomodates for rampant shifting earlier */
1253 pa = virt_to_bus(buffer + size*2);
1254
1255 /* set the wavecache control reg */
1256 tmpval = (pa - 0x10) & 0xFFF8;
1257 if(!(mode & 2)) tmpval |= 4; /* 8bit */
1258 ess->apu_base[channel]=tmpval;
1259 wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1260
1261 pa -= virt_to_bus(ess->card->dmapages);
1262 pa>>=1; /* words */
1263
1264 /* base offset of dma calcs when reading the pointer
1265 on this left one */
1266 if(!channel) ess->dma_dac.base = pa&0xFFFF;
1267
1268 pa|=0x00400000; /* System RAM */
1269
1270 /* Begin loading the APU */
1271 for(i=0;i<15;i++) /* clear all PBRs */
1272 apu_set_register(ess, channel, i, 0x0000);
1273
1274 /* XXX think about endianess when writing these registers */
1275 M_printk("maestro: ess_play_setup: APU[%d] pa = 0x%x\n", ess->apu[channel], pa);
1276 /* Load the buffer into the wave engine */
1277 apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1278 apu_set_register(ess, channel, 5, pa&0xFFFF);
1279 apu_set_register(ess, channel, 6, (pa+size)&0xFFFF);
1280 /* setting loop == sample len */
1281 apu_set_register(ess, channel, 7, size);
1282
1283 /* clear effects/env.. */
1284 apu_set_register(ess, channel, 8, 0x0000);
1285 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1286 apu_set_register(ess, channel, 9, 0xD000);
1287
1288 /* clear routing stuff */
1289 apu_set_register(ess, channel, 11, 0x0000);
1290 /* dma on, no envelopes, filter to all 1s) */
1291 apu_set_register(ess, channel, 0, 0x400F);
1292
1293 if(mode&ESS_FMT_STEREO)
1294 /* set panning: left or right */
1295 apu_set_register(ess, channel, 10, 0x8F00 | (channel ? 0x10 : 0));
1296 else
1297 apu_set_register(ess, channel, 10, 0x8F08);
1298
1299 if(mode&ESS_FMT_16BIT)
1300 ess->apu_mode[channel]=0x10;
1301 else
1302 ess->apu_mode[channel]=0x30;
1303 }
1304
1305 /* clear WP interupts */
1306 outw(1, ess->card->iobase+0x04);
1307 /* enable WP ints */
1308 outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1309
1310 /* go team! */
1311 set_dac_rate(ess,rate);
1312 start_dac(ess);
1313 }
1314
1315 /*
1316 * Native record driver
1317 */
1318
1319 /* again, passed mode is alrady shifted/masked */
1320 static void
1321 ess_rec_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1322 {
1323 int apu_step = 2;
1324 int channel;
1325
1326 M_printk("maestro: ess_rec_setup: mode=%d rate=%d buf=0x%p len=%d.\n",
1327 mode, rate, buffer, size);
1328
1329 /* all maestro sizes are in 16bit words */
1330 size >>=1;
1331
1332 /* we're given the full size of the buffer, but
1333 in stereo each channel will only use its half */
1334 if(mode&ESS_FMT_STEREO) {
1335 size >>=1;
1336 apu_step = 1;
1337 }
1338
1339 /* APU assignments: 2 = mono/left SRC
1340 3 = right SRC
1341 4 = mono/left Input Mixer
1342 5 = right Input Mixer */
1343 for(channel=2;channel<6;channel+=apu_step)
1344 {
1345 int i;
1346 int bsize, route;
1347 u32 pa;
1348 u32 tmpval;
1349
1350 /* data seems to flow from the codec, through an apu into
1351 the 'mixbuf' bit of page, then through the SRC apu
1352 and out to the real 'buffer'. ok. sure. */
1353
1354 if(channel & 0x04) {
1355 /* ok, we're an input mixer going from adc
1356 through the mixbuf to the other apus */
1357
1358 if(!(channel & 0x01)) {
1359 pa = virt_to_bus(ess->mixbuf);
1360 } else {
1361 pa = virt_to_bus(ess->mixbuf + (PAGE_SIZE >> 4));
1362 }
1363
1364 /* we source from a 'magic' apu */
1365 bsize = PAGE_SIZE >> 5; /* half of this channels alloc, in words */
1366 route = 0x14 + (channel - 4); /* parallel in crap, see maestro reg 0xC [8-11] */
1367 ess->apu_mode[channel] = 0x90; /* Input Mixer */
1368
1369 } else {
1370 /* we're a rate converter taking
1371 input from the input apus and outputing it to
1372 system memory */
1373 if(!(channel & 0x01)) {
1374 pa = virt_to_bus(buffer);
1375 } else {
1376 /* right channel records its split half.
1377 *2 accomodates for rampant shifting earlier */
1378 pa = virt_to_bus(buffer + size*2);
1379 }
1380
1381 ess->apu_mode[channel] = 0xB0; /* Sample Rate Converter */
1382
1383 bsize = size;
1384 /* get input from inputing apu */
1385 route = channel + 2;
1386 }
1387
1388 M_printk("maestro: ess_rec_setup: getting pa 0x%x from %d\n",pa,channel);
1389
1390 /* set the wavecache control reg */
1391 tmpval = (pa - 0x10) & 0xFFF8;
1392 ess->apu_base[channel]=tmpval;
1393 wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1394
1395 pa -= virt_to_bus(ess->card->dmapages);
1396 pa>>=1; /* words */
1397
1398 /* base offset of dma calcs when reading the pointer
1399 on this left one */
1400 if(channel==2) ess->dma_adc.base = pa&0xFFFF;
1401
1402 pa|=0x00400000; /* bit 22 -> System RAM */
1403
1404 M_printk("maestro: ess_rec_setup: APU[%d] pa = 0x%x size = 0x%x route = 0x%x\n",
1405 ess->apu[channel], pa, bsize, route);
1406
1407 /* Begin loading the APU */
1408 for(i=0;i<15;i++) /* clear all PBRs */
1409 apu_set_register(ess, channel, i, 0x0000);
1410
1411 apu_set_register(ess, channel, 0, 0x400F);
1412
1413 /* need to enable subgroups.. and we should probably
1414 have different groups for different /dev/dsps.. */
1415 apu_set_register(ess, channel, 2, 0x8);
1416
1417 /* Load the buffer into the wave engine */
1418 apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1419 /* XXX reg is little endian.. */
1420 apu_set_register(ess, channel, 5, pa&0xFFFF);
1421 apu_set_register(ess, channel, 6, (pa+bsize)&0xFFFF);
1422 apu_set_register(ess, channel, 7, bsize);
1423
1424 /* clear effects/env.. */
1425 apu_set_register(ess, channel, 8, 0x00F0);
1426
1427 /* amplitude now? sure. why not. */
1428 apu_set_register(ess, channel, 9, 0x0000);
1429
1430 /* set filter tune, radius, polar pan */
1431 apu_set_register(ess, channel, 10, 0x8F08);
1432
1433 /* route input */
1434 apu_set_register(ess, channel, 11, route);
1435 }
1436
1437 /* clear WP interupts */
1438 outw(1, ess->card->iobase+0x04);
1439 /* enable WP ints */
1440 outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1441
1442 /* let 'er rip */
1443 set_adc_rate(ess,rate);
1444 start_adc(ess);
1445 }
1446 /* --------------------------------------------------------------------- */
1447
1448 static void set_dmaa(struct ess_state *s, unsigned int addr, unsigned int count)
1449 {
1450 M_printk("set_dmaa??\n");
1451 }
1452
1453 static void set_dmac(struct ess_state *s, unsigned int addr, unsigned int count)
1454 {
1455 M_printk("set_dmac??\n");
1456 }
1457
1458 /* Playback pointer */
1459 extern __inline__ unsigned get_dmaa(struct ess_state *s)
1460 {
1461 int offset;
1462
1463 offset = apu_get_register(s,0,5);
1464
1465 /* M_printk("dmaa: offset: %d, base: %d\n",offset,s->dma_dac.base); */
1466
1467 offset-=s->dma_dac.base;
1468
1469 return (offset&0xFFFE)<<1; /* hardware is in words */
1470 }
1471
1472 /* Record pointer */
1473 extern __inline__ unsigned get_dmac(struct ess_state *s)
1474 {
1475 int offset;
1476
1477 offset = apu_get_register(s,2,5);
1478
1479 /* M_printk("dmac: offset: %d, base: %d\n",offset,s->dma_adc.base); */
1480
1481 /* The offset is an address not a position relative to base */
1482 offset-=s->dma_adc.base;
1483
1484 return (offset&0xFFFE)<<1; /* hardware is in words */
1485 }
1486
1487 /*
1488 * Meet Bob, the timer...
1489 */
1490
1491 static void ess_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1492
1493 static void stop_bob(struct ess_state *s)
1494 {
1495 /* Mask IDR 11,17 */
1496 maestro_write(s, 0x11, maestro_read(s, 0x11)&~1);
1497 maestro_write(s, 0x17, maestro_read(s, 0x17)&~1);
1498 }
1499
1500 /* eventually we could be clever and limit bob ints
1501 to the frequency at which our smallest duration
1502 chunks may expire */
1503 #define ESS_SYSCLK 50000000
1504 static void start_bob(struct ess_state *s)
1505 {
1506 int prescale;
1507 int divide;
1508
1509 /* XXX make freq selector much smarter, see calc_bob_rate */
1510 int freq = 150; /* requested frequency - calculate what we want here. */
1511
1512 /* compute ideal interrupt frequency for buffer size & play rate */
1513 /* first, find best prescaler value to match freq */
1514 for(prescale=5;prescale<12;prescale++)
1515 if(freq > (ESS_SYSCLK>>(prescale+9)))
1516 break;
1517
1518 /* next, back off prescaler whilst getting divider into optimum range */
1519 divide=1;
1520 while((prescale > 5) && (divide<32))
1521 {
1522 prescale--;
1523 divide <<=1;
1524 }
1525 divide>>=1;
1526
1527 /* now fine-tune the divider for best match */
1528 for(;divide<31;divide++)
1529 if(freq >= ((ESS_SYSCLK>>(prescale+9))/(divide+1)))
1530 break;
1531
1532 /* divide = 0 is illegal, but don't let prescale = 4! */
1533 if(divide == 0)
1534 {
1535 divide++;
1536 if(prescale>5)
1537 prescale--;
1538 }
1539
1540 maestro_write(s, 6, 0x9000 | (prescale<<5) | divide); /* set reg */
1541
1542 /* Now set IDR 11/17 */
1543 maestro_write(s, 0x11, maestro_read(s, 0x11)|1);
1544 maestro_write(s, 0x17, maestro_read(s, 0x17)|1);
1545 }
1546 /* --------------------------------------------------------------------- */
1547
1548 /* this quickly calculates the frequency needed for bob
1549 and sets it if its different than what bob is
1550 currently running at. its called often so
1551 needs to be fairly quick. */
1552 #define BOB_MIN 50
1553 #define BOB_MAX 400
1554 static void calc_bob_rate(struct ess_state *s) {
1555 #if 0 /* this thing tries to set the frequency of bob such that
1556 there are 2 interrupts / buffer walked by the dac/adc. That
1557 is probably very wrong for people who actually care about
1558 mid buffer positioning. it should be calculated as bytes/interrupt
1559 and that needs to be decided :) so for now just use the static 150
1560 in start_bob.*/
1561
1562 unsigned int dac_rate=2,adc_rate=1,newrate;
1563 static int israte=-1;
1564
1565 if (s->dma_dac.fragsize == 0) dac_rate = BOB_MIN;
1566 else {
1567 dac_rate = (2 * s->ratedac * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1568 (s->dma_dac.fragsize) ;
1569 }
1570
1571 if (s->dma_adc.fragsize == 0) adc_rate = BOB_MIN;
1572 else {
1573 adc_rate = (2 * s->rateadc * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1574 (s->dma_adc.fragsize) ;
1575 }
1576
1577 if(dac_rate > adc_rate) newrate = adc_rate;
1578 else newrate=dac_rate;
1579
1580 if(newrate > BOB_MAX) newrate = BOB_MAX;
1581 else {
1582 if(newrate < BOB_MIN)
1583 newrate = BOB_MIN;
1584 }
1585
1586 if( israte != newrate) {
1587 printk("dac: %d adc: %d rate: %d\n",dac_rate,adc_rate,israte);
1588 israte=newrate;
1589 }
1590 #endif
1591
1592 }
1593
1594 static int
1595 prog_dmabuf(struct ess_state *s, unsigned rec)
1596 {
1597 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1598 unsigned rate = rec ? s->rateadc : s->ratedac;
1599 unsigned bytepersec;
1600 unsigned bufs;
1601 unsigned char fmt;
1602 unsigned long flags;
1603
1604 spin_lock_irqsave(&s->lock, flags);
1605 fmt = s->fmt;
1606 if (rec) {
1607 stop_adc(s);
1608 fmt >>= ESS_ADC_SHIFT;
1609 } else {
1610 stop_dac(s);
1611 fmt >>= ESS_DAC_SHIFT;
1612 }
1613 spin_unlock_irqrestore(&s->lock, flags);
1614 fmt &= ESS_FMT_MASK;
1615
1616 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1617
1618 bytepersec = rate << sample_shift[fmt];
1619 bufs = PAGE_SIZE << db->buforder;
1620 if (db->ossfragshift) {
1621 if ((1000 << db->ossfragshift) < bytepersec)
1622 db->fragshift = ld2(bytepersec/1000);
1623 else
1624 db->fragshift = db->ossfragshift;
1625 } else {
1626 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1627 if (db->fragshift < 3)
1628 db->fragshift = 3;
1629 }
1630 db->numfrag = bufs >> db->fragshift;
1631 while (db->numfrag < 4 && db->fragshift > 3) {
1632 db->fragshift--;
1633 db->numfrag = bufs >> db->fragshift;
1634 }
1635 db->fragsize = 1 << db->fragshift;
1636 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1637 db->numfrag = db->ossmaxfrags;
1638 db->fragsamples = db->fragsize >> sample_shift[fmt];
1639 db->dmasize = db->numfrag << db->fragshift;
1640
1641 M_printk("maestro: setup oss: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize);
1642
1643 memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1644
1645 spin_lock_irqsave(&s->lock, flags);
1646 if (rec) {
1647 ess_rec_setup(s, fmt, s->rateadc,
1648 db->rawbuf, db->numfrag << db->fragshift);
1649 } else {
1650 ess_play_setup(s, fmt, s->ratedac,
1651 db->rawbuf, db->numfrag << db->fragshift);
1652 }
1653 spin_unlock_irqrestore(&s->lock, flags);
1654 db->ready = 1;
1655
1656 return 0;
1657 }
1658
1659 static __inline__ void
1660 clear_advance(struct ess_state *s)
1661 {
1662 unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80;
1663 unsigned char *buf = s->dma_dac.rawbuf;
1664 unsigned bsize = s->dma_dac.dmasize;
1665 /* swptr is always in bytes as read from an apu.. */
1666 unsigned bptr = s->dma_dac.swptr;
1667 unsigned len = s->dma_dac.fragsize;
1668 int i=1;
1669
1670 if((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_STEREO) {
1671 i++;
1672 bsize >>=1;
1673 }
1674
1675 for ( ;i; i-- , buf += bsize) {
1676
1677 if (bptr + len > bsize) {
1678 unsigned x = bsize - bptr;
1679 memset(buf + bptr, c, x);
1680 /* account for wrapping? */
1681 bptr = 0;
1682 len -= x;
1683 }
1684 memset(buf + bptr, c, len);
1685 }
1686 }
1687
1688 /* call with spinlock held! */
1689 static void
1690 ess_update_ptr(struct ess_state *s)
1691 {
1692 unsigned hwptr;
1693 int diff;
1694
1695 /* update ADC pointer */
1696 if (s->dma_adc.ready) {
1697 /* oh boy should this all be re-written. everything in the current code paths think
1698 that the various counters/pointers are expressed in bytes to the user but we have
1699 two apus doing stereo stuff so we fix it up here.. it propogates to all the various
1700 counters from here. Notice that this means that mono recording is very very
1701 broken right now. */
1702 if ( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1703 hwptr = (get_dmac(s)*2) % s->dma_adc.dmasize;
1704 } else {
1705 hwptr = get_dmac(s) % s->dma_adc.dmasize;
1706 }
1707 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1708 s->dma_adc.hwptr = hwptr;
1709 s->dma_adc.total_bytes += diff;
1710 s->dma_adc.count += diff;
1711 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1712 wake_up(&s->dma_adc.wait);
1713 if (!s->dma_adc.mapped) {
1714 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1715 /* FILL ME
1716 wrindir(s, SV_CIENABLE, s->enable); */
1717 stop_adc(s);
1718 /* brute force everyone back in sync, sigh */
1719 s->dma_adc.count = 0;
1720 s->dma_adc.swptr = 0;
1721 s->dma_adc.hwptr = 0;
1722 s->dma_adc.error++;
1723 }
1724 }
1725 }
1726 /* update DAC pointer */
1727 if (s->dma_dac.ready) {
1728 /* this is so gross. */
1729 hwptr = (/*s->dma_dac.dmasize -*/ get_dmaa(s)) % s->dma_dac.dmasize;
1730 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1731 /* M_printk("updating dac: hwptr: %d diff: %d\n",hwptr,diff);*/
1732 s->dma_dac.hwptr = hwptr;
1733 s->dma_dac.total_bytes += diff;
1734 if (s->dma_dac.mapped) {
1735 s->dma_dac.count += diff;
1736 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) {
1737 wake_up(&s->dma_dac.wait);
1738 }
1739 } else {
1740 s->dma_dac.count -= diff;
1741 /* M_printk("maestro: ess_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count); */
1742 if (s->dma_dac.count <= 0) {
1743 /* FILL ME
1744 wrindir(s, SV_CIENABLE, s->enable); */
1745 /* XXX how on earth can calling this with the lock held work.. */
1746 stop_dac(s);
1747 /* brute force everyone back in sync, sigh */
1748 s->dma_dac.count = 0;
1749 s->dma_dac.swptr = 0;
1750 s->dma_dac.hwptr = 0;
1751 s->dma_dac.error++;
1752 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1753 clear_advance(s);
1754 s->dma_dac.endcleared = 1;
1755 }
1756 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) {
1757 wake_up(&s->dma_dac.wait);
1758 }
1759 }
1760 }
1761 }
1762
1763 static void
1764 ess_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1765 {
1766 struct ess_state *s;
1767 struct ess_card *c = (struct ess_card *)dev_id;
1768 int i;
1769 u32 event;
1770
1771 if ( ! (event = inb(c->iobase+0x1A)) ) return;
1772
1773 outw(inw(c->iobase+4)&1, c->iobase+4);
1774
1775 /* M_printk("maestro int: %x\n",event);*/
1776
1777 if(event&(1<<6))
1778 {
1779 /* XXX if we have a hw volume control int enable
1780 all the ints? doesn't make sense.. */
1781 event = inw(c->iobase+0x18);
1782 outb(0xFF, c->iobase+0x1A);
1783 }
1784 else
1785 {
1786 /* else ack 'em all, i imagine */
1787 outb(0xFF, c->iobase+0x1A);
1788 }
1789
1790 /*
1791 * Update the pointers for all APU's we are running.
1792 */
1793 for(i=0;i<NR_DSPS;i++)
1794 {
1795 s=&c->channels[i];
1796 if(s->dev_audio == -1)
1797 break;
1798 spin_lock(&s->lock);
1799 ess_update_ptr(s);
1800 spin_unlock(&s->lock);
1801 }
1802 }
1803
1804
1805 /* --------------------------------------------------------------------- */
1806
1807 static const char invalid_magic[] = KERN_CRIT "maestro: invalid magic value in %s\n";
1808
1809 #define VALIDATE_MAGIC(FOO,MAG) \
1810 ({ \
1811 if (!(FOO) || (FOO)->magic != MAG) { \
1812 printk(invalid_magic,__FUNCTION__); \
1813 return -ENXIO; \
1814 } \
1815 })
1816
1817 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,ESS_STATE_MAGIC)
1818 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,ESS_CARD_MAGIC)
1819
1820 static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val )
1821 {
1822 unsigned int left,right;
1823 /* cleanse input a little */
1824 right = ((val >> 8) & 0xff) ;
1825 left = (val & 0xff) ;
1826
1827 if(right > 100) right = 100;
1828 if(left > 100) left = 100;
1829
1830 card->mix.mixer_state[mixer]=(right << 8) | left;
1831 card->mix.write_mixer(card,mixer,left,right);
1832 }
1833
1834 static void
1835 mixer_push_state(struct ess_card *card)
1836 {
1837 int i;
1838 for(i = 0 ; i < SOUND_MIXER_NRDEVICES ; i++) {
1839 if( ! supported_mixer(card,i)) continue;
1840
1841 set_mixer(card,i,card->mix.mixer_state[i]);
1842 }
1843 }
1844
1845 static int mixer_ioctl(struct ess_card *card, unsigned int cmd, unsigned long arg)
1846 {
1847 int i, val=0;
1848
1849 VALIDATE_CARD(card);
1850 if (cmd == SOUND_MIXER_INFO) {
1851 mixer_info info;
1852 strncpy(info.id, card_names[card->card_type], sizeof(info.id));
1853 strncpy(info.name,card_names[card->card_type],sizeof(info.name));
1854 info.modify_counter = card->mix.modcnt;
1855 if (copy_to_user((void *)arg, &info, sizeof(info)))
1856 return -EFAULT;
1857 return 0;
1858 }
1859 if (cmd == SOUND_OLD_MIXER_INFO) {
1860 _old_mixer_info info;
1861 strncpy(info.id, card_names[card->card_type], sizeof(info.id));
1862 strncpy(info.name,card_names[card->card_type],sizeof(info.name));
1863 if (copy_to_user((void *)arg, &info, sizeof(info)))
1864 return -EFAULT;
1865 return 0;
1866 }
1867 if (cmd == OSS_GETVERSION)
1868 return put_user(SOUND_VERSION, (int *)arg);
1869
1870 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1871 return -EINVAL;
1872
1873 if (_IOC_DIR(cmd) == _IOC_READ) {
1874 switch (_IOC_NR(cmd)) {
1875 case SOUND_MIXER_RECSRC: /* give them the current record source */
1876
1877 if(!card->mix.recmask_io) {
1878 val = 0;
1879 } else {
1880 spin_lock(&card->lock);
1881 val = card->mix.recmask_io(card,1,0);
1882 spin_unlock(&card->lock);
1883 }
1884 break;
1885
1886 case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
1887 val = card->mix.supported_mixers;
1888 break;
1889
1890 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1891 val = card->mix.record_sources;
1892 break;
1893
1894 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1895 val = card->mix.stereo_mixers;
1896 break;
1897
1898 case SOUND_MIXER_CAPS:
1899 val = SOUND_CAP_EXCL_INPUT;
1900 break;
1901
1902 default: /* read a specific mixer */
1903 i = _IOC_NR(cmd);
1904
1905 if ( ! supported_mixer(card,i))
1906 return -EINVAL;
1907
1908 /* do we ever want to touch the hardware? */
1909 /* spin_lock(&card->lock);
1910 val = card->mix.read_mixer(card,i);
1911 spin_unlock(&card->lock);*/
1912
1913 val = card->mix.mixer_state[i];
1914 /* M_printk("returned 0x%x for mixer %d\n",val,i);*/
1915
1916 break;
1917 }
1918 return put_user(val,(int *)arg);
1919 }
1920
1921 if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
1922 return -EINVAL;
1923
1924 card->mix.modcnt++;
1925
1926 get_user_ret(val, (int *)arg, -EFAULT);
1927
1928 switch (_IOC_NR(cmd)) {
1929 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1930
1931 if (!card->mix.recmask_io) return -EINVAL;
1932 if(!val) return 0;
1933 if(! (val &= card->mix.record_sources)) return -EINVAL;
1934
1935 spin_lock(&card->lock);
1936 card->mix.recmask_io(card,0,val);
1937 spin_unlock(&card->lock);
1938 return 0;
1939
1940 default:
1941 i = _IOC_NR(cmd);
1942
1943 if ( ! supported_mixer(card,i))
1944 return -EINVAL;
1945
1946 spin_lock(&card->lock);
1947 set_mixer(card,i,val);
1948 spin_unlock(&card->lock);
1949
1950 return 0;
1951 }
1952 }
1953
1954 /* --------------------------------------------------------------------- */
1955
1956 static loff_t ess_llseek(struct file *file, loff_t offset, int origin)
1957 {
1958 return -ESPIPE;
1959 }
1960
1961 /* --------------------------------------------------------------------- */
1962
1963 static int ess_open_mixdev(struct inode *inode, struct file *file)
1964 {
1965 int minor = MINOR(inode->i_rdev);
1966 struct ess_card *card = devs;
1967
1968 while (card && card->dev_mixer != minor)
1969 card = card->next;
1970 if (!card)
1971 return -ENODEV;
1972
1973 file->private_data = card;
1974 MOD_INC_USE_COUNT;
1975 return 0;
1976 }
1977
1978 static int ess_release_mixdev(struct inode *inode, struct file *file)
1979 {
1980 struct ess_card *card = (struct ess_card *)file->private_data;
1981
1982 VALIDATE_CARD(card);
1983
1984 MOD_DEC_USE_COUNT;
1985 return 0;
1986 }
1987
1988 static int ess_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1989 {
1990 struct ess_card *card = (struct ess_card *)file->private_data;
1991
1992 VALIDATE_CARD(card);
1993
1994 return mixer_ioctl(card, cmd, arg);
1995 }
1996
1997 static /*const*/ struct file_operations ess_mixer_fops = {
1998 &ess_llseek,
1999 NULL, /* read */
2000 NULL, /* write */
2001 NULL, /* readdir */
2002 NULL, /* poll */
2003 &ess_ioctl_mixdev,
2004 NULL, /* mmap */
2005 &ess_open_mixdev,
2006 NULL, /* flush */
2007 &ess_release_mixdev,
2008 NULL, /* fsync */
2009 NULL, /* fasync */
2010 NULL, /* check_media_change */
2011 NULL, /* revalidate */
2012 NULL, /* lock */
2013 };
2014
2015 /* --------------------------------------------------------------------- */
2016
2017 static int drain_dac(struct ess_state *s, int nonblock)
2018 {
2019 DECLARE_WAITQUEUE(wait,current);
2020 unsigned long flags;
2021 int count;
2022 signed long tmo;
2023
2024 if (s->dma_dac.mapped || !s->dma_dac.ready)
2025 return 0;
2026 current->state = TASK_INTERRUPTIBLE;
2027 add_wait_queue(&s->dma_dac.wait, &wait);
2028 for (;;) {
2029 /* XXX uhm.. questionable locking*/
2030 spin_lock_irqsave(&s->lock, flags);
2031 count = s->dma_dac.count;
2032 spin_unlock_irqrestore(&s->lock, flags);
2033 if (count <= 0)
2034 break;
2035 if (signal_pending(current))
2036 break;
2037 if (nonblock) {
2038 remove_wait_queue(&s->dma_dac.wait, &wait);
2039 current->state = TASK_RUNNING;
2040 return -EBUSY;
2041 }
2042 tmo = (count * HZ) / s->ratedac;
2043 tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK];
2044 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
2045 or something. who cares. - zach */
2046 if (!schedule_timeout(tmo ? tmo : 1) && tmo)
2047 M_printk(KERN_DEBUG "maestro: dma timed out?? %ld\n",jiffies);
2048 }
2049 remove_wait_queue(&s->dma_dac.wait, &wait);
2050 current->state = TASK_RUNNING;
2051 if (signal_pending(current))
2052 return -ERESTARTSYS;
2053 return 0;
2054 }
2055
2056 /* --------------------------------------------------------------------- */
2057 /* Zach sez: "god this is gross.." */
2058 static int
2059 comb_stereo(unsigned char *real_buffer,unsigned char *tmp_buffer, int offset,
2060 int count, int bufsize)
2061 {
2062 /* No such thing as stereo recording, so we
2063 use dual input mixers. which means we have to
2064 combine mono to stereo buffer. yuck.
2065
2066 but we don't have to be able to work a byte at a time..*/
2067
2068 unsigned char *so,*left,*right;
2069 int i;
2070
2071 so = tmp_buffer;
2072 left = real_buffer + offset;
2073 right = real_buffer + bufsize/2 + offset;
2074
2075 /* M_printk("comb_stereo writing %d to %p from %p and %p, offset: %d size: %d\n",count/2, tmp_buffer,left,right,offset,bufsize);*/
2076
2077 for(i=count/4; i ; i--) {
2078 (*(so+2)) = *(right++);
2079 (*(so+3)) = *(right++);
2080 (*so) = *(left++);
2081 (*(so+1)) = *(left++);
2082 so+=4;
2083 }
2084
2085 return 0;
2086 }
2087
2088 /* in this loop, dma_adc.count signifies the amount of data thats waiting
2089 to be copied to the user's buffer. it is filled by the interrupt
2090 handler and drained by this loop. */
2091 static ssize_t
2092 ess_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2093 {
2094 struct ess_state *s = (struct ess_state *)file->private_data;
2095 ssize_t ret;
2096 unsigned long flags;
2097 unsigned swptr;
2098 int cnt;
2099 unsigned char *combbuf = NULL;
2100
2101 VALIDATE_STATE(s);
2102 if (ppos != &file->f_pos)
2103 return -ESPIPE;
2104 if (s->dma_adc.mapped)
2105 return -ENXIO;
2106 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2107 return ret;
2108 if (!access_ok(VERIFY_WRITE, buffer, count))
2109 return -EFAULT;
2110 if(!(combbuf = kmalloc(count,GFP_KERNEL)))
2111 return -ENOMEM;
2112 ret = 0;
2113
2114 calc_bob_rate(s);
2115
2116 while (count > 0) {
2117 spin_lock_irqsave(&s->lock, flags);
2118 /* remember, all these things are expressed in bytes to be
2119 sent to the user.. hence the evil / 2 down below */
2120 swptr = s->dma_adc.swptr;
2121 cnt = s->dma_adc.dmasize-swptr;
2122 if (s->dma_adc.count < cnt)
2123 cnt = s->dma_adc.count;
2124 spin_unlock_irqrestore(&s->lock, flags);
2125
2126 if (cnt > count)
2127 cnt = count;
2128
2129 if ( cnt > 0 ) cnt &= ~3;
2130
2131 if (cnt <= 0) {
2132 start_adc(s);
2133 if (file->f_flags & O_NONBLOCK)
2134 {
2135 ret = ret ? ret : -EAGAIN;
2136 goto rec_return_free;
2137 }
2138 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
2139 #ifdef CONFIG_APM
2140 if(! in_suspend)
2141 #endif
2142 printk(KERN_DEBUG "maestro: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2143 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
2144 s->dma_adc.hwptr, s->dma_adc.swptr);
2145 stop_adc(s);
2146 spin_lock_irqsave(&s->lock, flags);
2147 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
2148 /* program enhanced mode registers */
2149 /* FILL ME */
2150 /* wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
2151 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1); */
2152 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
2153 spin_unlock_irqrestore(&s->lock, flags);
2154 }
2155 if (signal_pending(current))
2156 {
2157 ret = ret ? ret : -ERESTARTSYS;
2158 goto rec_return_free;
2159 }
2160 continue;
2161 }
2162
2163 if(s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
2164 /* swptr/2 so that we know the real offset in each apu's buffer */
2165 comb_stereo(s->dma_adc.rawbuf,combbuf,swptr/2,cnt,s->dma_adc.dmasize);
2166 if (copy_to_user(buffer, combbuf, cnt)) {
2167 ret = ret ? ret : -EFAULT;
2168 goto rec_return_free;
2169 }
2170 } else {
2171 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
2172 ret = ret ? ret : -EFAULT;
2173 goto rec_return_free;
2174 }
2175 }
2176
2177 swptr = (swptr + cnt) % s->dma_adc.dmasize;
2178 spin_lock_irqsave(&s->lock, flags);
2179 s->dma_adc.swptr = swptr;
2180 s->dma_adc.count -= cnt;
2181 spin_unlock_irqrestore(&s->lock, flags);
2182 count -= cnt;
2183 buffer += cnt;
2184 ret += cnt;
2185 start_adc(s);
2186 }
2187
2188 rec_return_free:
2189 if(combbuf) kfree(combbuf);
2190 return ret;
2191 }
2192
2193 /* god this is gross..*/
2194 /* again, the mode passed is shifted/masked */
2195 static int
2196 split_stereo(unsigned char *real_buffer,unsigned char *tmp_buffer, int offset,
2197 int count, int bufsize, int mode)
2198 {
2199 /* oh, bother. stereo decoding APU's don't work in 16bit so we
2200 use dual linear decoders. which means we have to hack up stereo
2201 buffer's we're given. yuck. */
2202
2203 unsigned char *so,*left,*right;
2204 int i;
2205
2206 so = tmp_buffer;
2207 left = real_buffer + offset;
2208 right = real_buffer + bufsize/2 + offset;
2209
2210 if(mode & ESS_FMT_16BIT) {
2211 for(i=count/4; i ; i--) {
2212 *(right++) = (*(so+2));
2213 *(right++) = (*(so+3));
2214 *(left++) = (*so);
2215 *(left++) = (*(so+1));
2216 so+=4;
2217 }
2218 } else {
2219 for(i=count/2; i ; i--) {
2220 *(right++) = (*(so+1));
2221 *(left++) = (*so);
2222 so+=2;
2223 }
2224 }
2225
2226 return 0;
2227 }
2228
2229 static ssize_t
2230 ess_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2231 {
2232 struct ess_state *s = (struct ess_state *)file->private_data;
2233 ssize_t ret;
2234 unsigned long flags;
2235 unsigned swptr;
2236 unsigned char *splitbuf = NULL;
2237 int cnt;
2238 int mode = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK;
2239
2240 VALIDATE_STATE(s);
2241 if (ppos != &file->f_pos)
2242 return -ESPIPE;
2243 if (s->dma_dac.mapped)
2244 return -ENXIO;
2245 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2246 return ret;
2247 if (!access_ok(VERIFY_READ, buffer, count))
2248 return -EFAULT;
2249 /* XXX be more clever than this.. */
2250 if (!(splitbuf = kmalloc(count,GFP_KERNEL)))
2251 return -ENOMEM;
2252 ret = 0;
2253
2254 calc_bob_rate(s);
2255
2256 while (count > 0) {
2257 spin_lock_irqsave(&s->lock, flags);
2258
2259 if (s->dma_dac.count < 0) {
2260 s->dma_dac.count = 0;
2261 s->dma_dac.swptr = s->dma_dac.hwptr;
2262 }
2263 swptr = s->dma_dac.swptr;
2264
2265 if(mode & ESS_FMT_STEREO) {
2266 /* in stereo we have the 'dual' buffers.. */
2267 cnt = ((s->dma_dac.dmasize/2)-swptr)*2;
2268 } else {
2269 cnt = s->dma_dac.dmasize-swptr;
2270 }
2271 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
2272 cnt = s->dma_dac.dmasize - s->dma_dac.count;
2273
2274 spin_unlock_irqrestore(&s->lock, flags);
2275
2276 if (cnt > count)
2277 cnt = count;
2278
2279 /* our goofball stereo splitter can only deal in mults of 4 */
2280 if (cnt > 0)
2281 cnt &= ~3;
2282
2283 if (cnt <= 0) {
2284 start_dac(s);
2285 if (file->f_flags & O_NONBLOCK) {
2286 if(!ret) ret = -EAGAIN;
2287 goto return_free;
2288 }
2289 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
2290 #ifdef CONFIG_APM
2291 if(! in_suspend)
2292 #endif
2293 printk(KERN_DEBUG "maestro: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2294 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
2295 s->dma_dac.hwptr, s->dma_dac.swptr);
2296 stop_dac(s);
2297 spin_lock_irqsave(&s->lock, flags);
2298 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
2299 /* program enhanced mode registers */
2300 /* wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
2301 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1); */
2302 /* FILL ME */
2303 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
2304 spin_unlock_irqrestore(&s->lock, flags);
2305 }
2306 if (signal_pending(current)) {
2307 if (!ret) ret = -ERESTARTSYS;
2308 goto return_free;
2309 }
2310 continue;
2311 }
2312 if(mode & ESS_FMT_STEREO) {
2313 if (copy_from_user(splitbuf, buffer, cnt)) {
2314 if (!ret) ret = -EFAULT;
2315 goto return_free;
2316 }
2317 split_stereo(s->dma_dac.rawbuf,splitbuf,swptr,cnt,s->dma_dac.dmasize,
2318 mode);
2319 } else {
2320 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
2321 if (!ret) ret = -EFAULT;
2322 goto return_free;
2323 }
2324 }
2325
2326 if(mode & ESS_FMT_STEREO) {
2327 /* again with the weird pointer magic */
2328 swptr = (swptr + (cnt/2)) % (s->dma_dac.dmasize/2);
2329 } else {
2330 swptr = (swptr + cnt) % s->dma_dac.dmasize;
2331 }
2332 spin_lock_irqsave(&s->lock, flags);
2333 s->dma_dac.swptr = swptr;
2334 s->dma_dac.count += cnt;
2335 s->dma_dac.endcleared = 0;
2336 spin_unlock_irqrestore(&s->lock, flags);
2337 count -= cnt;
2338 buffer += cnt;
2339 ret += cnt;
2340 start_dac(s);
2341 }
2342 return_free:
2343 if (splitbuf) kfree(splitbuf);
2344 return ret;
2345 }
2346
2347 static unsigned int ess_poll(struct file *file, struct poll_table_struct *wait)
2348 {
2349 struct ess_state *s = (struct ess_state *)file->private_data;
2350 unsigned long flags;
2351 unsigned int mask = 0;
2352
2353 VALIDATE_STATE(s);
2354 if (file->f_mode & FMODE_WRITE)
2355 poll_wait(file, &s->dma_dac.wait, wait);
2356 if (file->f_mode & FMODE_READ)
2357 poll_wait(file, &s->dma_adc.wait, wait);
2358 spin_lock_irqsave(&s->lock, flags);
2359 ess_update_ptr(s);
2360 if (file->f_mode & FMODE_READ) {
2361 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
2362 mask |= POLLIN | POLLRDNORM;
2363 }
2364 if (file->f_mode & FMODE_WRITE) {
2365 if (s->dma_dac.mapped) {
2366 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
2367 mask |= POLLOUT | POLLWRNORM;
2368 } else {
2369 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
2370 mask |= POLLOUT | POLLWRNORM;
2371 }
2372 }
2373 spin_unlock_irqrestore(&s->lock, flags);
2374 return mask;
2375 }
2376
2377 /* this needs to be fixed to deal with the dual apus/buffers */
2378 #if 0
2379 static int ess_mmap(struct file *file, struct vm_area_struct *vma)
2380 {
2381 struct ess_state *s = (struct ess_state *)file->private_data;
2382 struct dmabuf *db;
2383 int ret;
2384 unsigned long size;
2385
2386 VALIDATE_STATE(s);
2387 if (vma->vm_flags & VM_WRITE) {
2388 if ((ret = prog_dmabuf(s, 1)) != 0)
2389 return ret;
2390 db = &s->dma_dac;
2391 } else if (vma->vm_flags & VM_READ) {
2392 if ((ret = prog_dmabuf(s, 0)) != 0)
2393 return ret;
2394 db = &s->dma_adc;
2395 } else
2396 return -EINVAL;
2397 if (vma->vm_pgofft != 0)
2398 return -EINVAL;
2399 size = vma->vm_end - vma->vm_start;
2400 if (size > (PAGE_SIZE << db->buforder))
2401 return -EINVAL;
2402 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
2403 return -EAGAIN;
2404 db->mapped = 1;
2405 return 0;
2406 }
2407 #endif
2408
2409 static int ess_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2410 {
2411 struct ess_state *s = (struct ess_state *)file->private_data;
2412 unsigned long flags;
2413 audio_buf_info abinfo;
2414 count_info cinfo;
2415 int val, mapped, ret;
2416 unsigned char fmtm, fmtd;
2417
2418 /* printk("maestro: ess_ioctl: cmd %d\n", cmd);*/
2419
2420 VALIDATE_STATE(s);
2421 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
2422 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
2423 switch (cmd) {
2424 case OSS_GETVERSION:
2425 return put_user(SOUND_VERSION, (int *)arg);
2426
2427 case SNDCTL_DSP_SYNC:
2428 if (file->f_mode & FMODE_WRITE)
2429 return drain_dac(s, file->f_flags & O_NONBLOCK);
2430 return 0;
2431
2432 case SNDCTL_DSP_SETDUPLEX:
2433 /* XXX fix */
2434 return 0;
2435
2436 case SNDCTL_DSP_GETCAPS:
2437 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER /*| DSP_CAP_MMAP*/, (int *)arg);
2438
2439 case SNDCTL_DSP_RESET:
2440 if (file->f_mode & FMODE_WRITE) {
2441 stop_dac(s);
2442 synchronize_irq();
2443 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
2444 }
2445 if (file->f_mode & FMODE_READ) {
2446 stop_adc(s);
2447 synchronize_irq();
2448 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
2449 }
2450 return 0;
2451
2452 case SNDCTL_DSP_SPEED:
2453 get_user_ret(val, (int *)arg, -EFAULT);
2454 if (val >= 0) {
2455 if (file->f_mode & FMODE_READ) {
2456 stop_adc(s);
2457 s->dma_adc.ready = 0;
2458 set_adc_rate(s, val);
2459 }
2460 if (file->f_mode & FMODE_WRITE) {
2461 stop_dac(s);
2462 s->dma_dac.ready = 0;
2463 set_dac_rate(s, val);
2464 }
2465 }
2466 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2467
2468 case SNDCTL_DSP_STEREO:
2469 get_user_ret(val, (int *)arg, -EFAULT);
2470 fmtd = 0;
2471 fmtm = ~0;
2472 if (file->f_mode & FMODE_READ) {
2473 stop_adc(s);
2474 s->dma_adc.ready = 0;
2475 if (val)
2476 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2477 else
2478 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2479 }
2480 if (file->f_mode & FMODE_WRITE) {
2481 stop_dac(s);
2482 s->dma_dac.ready = 0;
2483 if (val)
2484 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2485 else
2486 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2487 }
2488 set_fmt(s, fmtm, fmtd);
2489 return 0;
2490
2491 case SNDCTL_DSP_CHANNELS:
2492 get_user_ret(val, (int *)arg, -EFAULT);
2493 if (val != 0) {
2494 fmtd = 0;
2495 fmtm = ~0;
2496 if (file->f_mode & FMODE_READ) {
2497 stop_adc(s);
2498 s->dma_adc.ready = 0;
2499 if (val >= 2)
2500 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2501 else
2502 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2503 }
2504 if (file->f_mode & FMODE_WRITE) {
2505 stop_dac(s);
2506 s->dma_dac.ready = 0;
2507 if (val >= 2)
2508 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2509 else
2510 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2511 }
2512 set_fmt(s, fmtm, fmtd);
2513 }
2514 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2515 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2516
2517 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2518 return put_user(AFMT_S8|AFMT_S16_LE, (int *)arg);
2519
2520 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2521 get_user_ret(val, (int *)arg, -EFAULT);
2522 if (val != AFMT_QUERY) {
2523 fmtd = 0;
2524 fmtm = ~0;
2525 if (file->f_mode & FMODE_READ) {
2526 stop_adc(s);
2527 s->dma_adc.ready = 0;
2528 /* fixed at 16bit for now */
2529 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2530 #if 0
2531 if (val == AFMT_S16_LE)
2532 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2533 else
2534 fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT);
2535 #endif
2536 }
2537 if (file->f_mode & FMODE_WRITE) {
2538 stop_dac(s);
2539 s->dma_dac.ready = 0;
2540 if (val == AFMT_S16_LE)
2541 fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2542 else
2543 fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT);
2544 }
2545 set_fmt(s, fmtm, fmtd);
2546 }
2547 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2548 (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2549 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ?
2550 AFMT_S16_LE :
2551 AFMT_S8,
2552 (int *)arg);
2553
2554 case SNDCTL_DSP_POST:
2555 return 0;
2556
2557 case SNDCTL_DSP_GETTRIGGER:
2558 val = 0;
2559 if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING))
2560 val |= PCM_ENABLE_INPUT;
2561 if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING))
2562 val |= PCM_ENABLE_OUTPUT;
2563 return put_user(val, (int *)arg);
2564
2565 case SNDCTL_DSP_SETTRIGGER:
2566 get_user_ret(val, (int *)arg, -EFAULT);
2567 if (file->f_mode & FMODE_READ) {
2568 if (val & PCM_ENABLE_INPUT) {
2569 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2570 return ret;
2571 start_adc(s);
2572 } else
2573 stop_adc(s);
2574 }
2575 if (file->f_mode & FMODE_WRITE) {
2576 if (val & PCM_ENABLE_OUTPUT) {
2577 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2578 return ret;
2579 start_dac(s);
2580 } else
2581 stop_dac(s);
2582 }
2583 return 0;
2584
2585 case SNDCTL_DSP_GETOSPACE:
2586 if (!(file->f_mode & FMODE_WRITE))
2587 return -EINVAL;
2588 if (!(s->enable & DAC_RUNNING) && (val = prog_dmabuf(s, 0)) != 0)
2589 return val;
2590 spin_lock_irqsave(&s->lock, flags);
2591 ess_update_ptr(s);
2592 abinfo.fragsize = s->dma_dac.fragsize;
2593 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
2594 abinfo.fragstotal = s->dma_dac.numfrag;
2595 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
2596 spin_unlock_irqrestore(&s->lock, flags);
2597 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2598
2599 case SNDCTL_DSP_GETISPACE:
2600 if (!(file->f_mode & FMODE_READ))
2601 return -EINVAL;
2602 if (!(s->enable & ADC_RUNNING) && (val = prog_dmabuf(s, 1)) != 0)
2603 return val;
2604 spin_lock_irqsave(&s->lock, flags);
2605 ess_update_ptr(s);
2606 abinfo.fragsize = s->dma_adc.fragsize;
2607 abinfo.bytes = s->dma_adc.count;
2608 abinfo.fragstotal = s->dma_adc.numfrag;
2609 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2610 spin_unlock_irqrestore(&s->lock, flags);
2611 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2612
2613 case SNDCTL_DSP_NONBLOCK:
2614 file->f_flags |= O_NONBLOCK;
2615 return 0;
2616
2617 case SNDCTL_DSP_GETODELAY:
2618 if (!(file->f_mode & FMODE_WRITE))
2619 return -EINVAL;
2620 spin_lock_irqsave(&s->lock, flags);
2621 ess_update_ptr(s);
2622 val = s->dma_dac.count;
2623 spin_unlock_irqrestore(&s->lock, flags);
2624 return put_user(val, (int *)arg);
2625
2626 case SNDCTL_DSP_GETIPTR:
2627 if (!(file->f_mode & FMODE_READ))
2628 return -EINVAL;
2629 spin_lock_irqsave(&s->lock, flags);
2630 ess_update_ptr(s);
2631 cinfo.bytes = s->dma_adc.total_bytes;
2632 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2633 cinfo.ptr = s->dma_adc.hwptr;
2634 if (s->dma_adc.mapped)
2635 s->dma_adc.count &= s->dma_adc.fragsize-1;
2636 spin_unlock_irqrestore(&s->lock, flags);
2637 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2638
2639 case SNDCTL_DSP_GETOPTR:
2640 if (!(file->f_mode & FMODE_WRITE))
2641 return -EINVAL;
2642 spin_lock_irqsave(&s->lock, flags);
2643 ess_update_ptr(s);
2644 cinfo.bytes = s->dma_dac.total_bytes;
2645 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2646 cinfo.ptr = s->dma_dac.hwptr;
2647 if (s->dma_dac.mapped)
2648 s->dma_dac.count &= s->dma_dac.fragsize-1;
2649 spin_unlock_irqrestore(&s->lock, flags);
2650 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2651
2652 case SNDCTL_DSP_GETBLKSIZE:
2653 if (file->f_mode & FMODE_WRITE) {
2654 if ((val = prog_dmabuf(s, 0)))
2655 return val;
2656 return put_user(s->dma_dac.fragsize, (int *)arg);
2657 }
2658 if ((val = prog_dmabuf(s, 1)))
2659 return val;
2660 return put_user(s->dma_adc.fragsize, (int *)arg);
2661
2662 case SNDCTL_DSP_SETFRAGMENT:
2663 get_user_ret(val, (int *)arg, -EFAULT);
2664 if (file->f_mode & FMODE_READ) {
2665 s->dma_adc.ossfragshift = val & 0xffff;
2666 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2667 if (s->dma_adc.ossfragshift < 4)
2668 s->dma_adc.ossfragshift = 4;
2669 if (s->dma_adc.ossfragshift > 15)
2670 s->dma_adc.ossfragshift = 15;
2671 if (s->dma_adc.ossmaxfrags < 4)
2672 s->dma_adc.ossmaxfrags = 4;
2673 }
2674 if (file->f_mode & FMODE_WRITE) {
2675 s->dma_dac.ossfragshift = val & 0xffff;
2676 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2677 if (s->dma_dac.ossfragshift < 4)
2678 s->dma_dac.ossfragshift = 4;
2679 if (s->dma_dac.ossfragshift > 15)
2680 s->dma_dac.ossfragshift = 15;
2681 if (s->dma_dac.ossmaxfrags < 4)
2682 s->dma_dac.ossmaxfrags = 4;
2683 }
2684 return 0;
2685
2686 case SNDCTL_DSP_SUBDIVIDE:
2687 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2688 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2689 return -EINVAL;
2690 get_user_ret(val, (int *)arg, -EFAULT);
2691 if (val != 1 && val != 2 && val != 4)
2692 return -EINVAL;
2693 if (file->f_mode & FMODE_READ)
2694 s->dma_adc.subdivision = val;
2695 if (file->f_mode & FMODE_WRITE)
2696 s->dma_dac.subdivision = val;
2697 return 0;
2698
2699 case SOUND_PCM_READ_RATE:
2700 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2701
2702 case SOUND_PCM_READ_CHANNELS:
2703 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2704 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2705
2706 case SOUND_PCM_READ_BITS:
2707 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2708 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, (int *)arg);
2709
2710 case SOUND_PCM_WRITE_FILTER:
2711 case SNDCTL_DSP_SETSYNCRO:
2712 case SOUND_PCM_READ_FILTER:
2713 return -EINVAL;
2714
2715 }
2716 return -EINVAL;
2717 }
2718
2719 static void
2720 set_base_registers(struct ess_state *s,void *vaddr)
2721 {
2722 unsigned long packed_phys = virt_to_bus(vaddr)>>12;
2723 wave_set_register(s, 0x01FC , packed_phys);
2724 wave_set_register(s, 0x01FD , packed_phys);
2725 wave_set_register(s, 0x01FE , packed_phys);
2726 wave_set_register(s, 0x01FF , packed_phys);
2727 }
2728
2729 /* we allocate a large power of two for all our memory.
2730 this is cut up into (not to scale :):
2731 |silly fifo word | 512byte mixbuf per adc | dac/adc * channels |
2732 */
2733 static int
2734 allocate_buffers(struct ess_state *s)
2735 {
2736 void *rawbuf=NULL;
2737 int order,i;
2738 unsigned long mapend,map;
2739
2740 /* alloc as big a chunk as we can */
2741 for (order = (dsps_order + (15-PAGE_SHIFT) + 1); order >= (dsps_order + 2 + 1); order--)
2742 if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order)))
2743 break;
2744
2745 if (!rawbuf)
2746 return 1;
2747
2748 M_printk("maestro: allocated %ld (%d) bytes at %p\n",PAGE_SIZE<<order,order, rawbuf);
2749
2750 if ((virt_to_bus(rawbuf) + (PAGE_SIZE << order) - 1) & ~((1<<28)-1)) {
2751 printk(KERN_ERR "maestro: DMA buffer beyond 256MB! busaddr 0x%lx size %ld\n",
2752 virt_to_bus(rawbuf), PAGE_SIZE << order);
2753 kfree(rawbuf);
2754 return 1;
2755 }
2756
2757 s->card->dmapages = rawbuf;
2758 s->card->dmaorder = order;
2759
2760 /* play bufs are in the same first region as record bufs */
2761 set_base_registers(s,rawbuf);
2762
2763 M_printk("maestro: writing %lx (%lx) to the wp\n",virt_to_bus(rawbuf),
2764 ((virt_to_bus(rawbuf))&0xFFE00000)>>12);
2765
2766 for(i=0;i<NR_DSPS;i++) {
2767 struct ess_state *ess = &s->card->channels[i];
2768
2769 if(ess->dev_audio == -1)
2770 continue;
2771
2772 ess->dma_dac.ready = s->dma_dac.mapped = 0;
2773 ess->dma_adc.ready = s->dma_adc.mapped = 0;
2774 ess->dma_adc.buforder = ess->dma_dac.buforder = order - 1 - dsps_order - 1;
2775
2776 /* offset dac and adc buffers starting half way through and then at each [da][ad]c's
2777 order's intervals.. */
2778 ess->dma_dac.rawbuf = rawbuf + (PAGE_SIZE<<(order-1)) + (i * ( PAGE_SIZE << (ess->dma_dac.buforder + 1 )));
2779 ess->dma_adc.rawbuf = ess->dma_dac.rawbuf + ( PAGE_SIZE << ess->dma_dac.buforder);
2780 /* offset mixbuf by a mixbuf so that the lame status fifo can
2781 happily scribble away.. */
2782 ess->mixbuf = rawbuf + (512 * (i+1));
2783
2784 M_printk("maestro: setup apu %d: %p %p %p\n",i,ess->dma_dac.rawbuf,
2785 ess->dma_adc.rawbuf, ess->mixbuf);
2786
2787 }
2788
2789 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
2790 mapend = MAP_NR(rawbuf + (PAGE_SIZE << order) - 1);
2791 for (map = MAP_NR(rawbuf); map <= mapend; map++) {
2792 set_bit(PG_reserved, &mem_map[map].flags);
2793 }
2794
2795 return 0;
2796 }
2797 static void
2798 free_buffers(struct ess_state *s)
2799 {
2800 unsigned long map, mapend;
2801
2802 s->dma_dac.rawbuf = s->dma_adc.rawbuf = NULL;
2803 s->dma_dac.mapped = s->dma_adc.mapped = 0;
2804 s->dma_dac.ready = s->dma_adc.ready = 0;
2805
2806 M_printk("maestro: freeing %p\n",s->card->dmapages);
2807 /* undo marking the pages as reserved */
2808
2809 mapend = MAP_NR(s->card->dmapages + (PAGE_SIZE << s->card->dmaorder) - 1);
2810 for (map = MAP_NR(s->card->dmapages); map <= mapend; map++)
2811 clear_bit(PG_reserved, &mem_map[map].flags);
2812
2813 free_pages((unsigned long)s->card->dmapages,s->card->dmaorder);
2814 s->card->dmapages = NULL;
2815 }
2816
2817 static int
2818 ess_open(struct inode *inode, struct file *file)
2819 {
2820 int minor = MINOR(inode->i_rdev);
2821 struct ess_card *c = devs;
2822 struct ess_state *s = NULL, *sp;
2823 int i;
2824 unsigned char fmtm = ~0, fmts = 0;
2825
2826 /*
2827 * Scan the cards and find the channel. We only
2828 * do this at open time so it is ok
2829 */
2830
2831 while (c!=NULL)
2832 {
2833 for(i=0;i<NR_DSPS;i++)
2834 {
2835 sp=&c->channels[i];
2836 if(sp->dev_audio < 0)
2837 continue;
2838 if((sp->dev_audio ^ minor) & ~0xf)
2839 continue;
2840 s=sp;
2841 }
2842 c=c->next;
2843 }
2844
2845 if (!s)
2846 return -ENODEV;
2847
2848 VALIDATE_STATE(s);
2849 file->private_data = s;
2850 /* wait for device to become free */
2851 down(&s->open_sem);
2852 while (s->open_mode & file->f_mode) {
2853 if (file->f_flags & O_NONBLOCK) {
2854 up(&s->open_sem);
2855 return -EWOULDBLOCK;
2856 }
2857 up(&s->open_sem);
2858 interruptible_sleep_on(&s->open_wait);
2859 if (signal_pending(current))
2860 return -ERESTARTSYS;
2861 down(&s->open_sem);
2862 }
2863
2864 /* under semaphore.. */
2865 if ((s->card->dmapages==NULL) && allocate_buffers(s)) {
2866 up(&s->open_sem);
2867 return -ENOMEM;
2868 }
2869
2870 if (file->f_mode & FMODE_READ) {
2871 /*
2872 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
2873 if ((minor & 0xf) == SND_DEV_DSP16)
2874 fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT; */
2875
2876 fmtm &= ~((ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT);
2877 fmts = (ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT;
2878
2879 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2880 set_adc_rate(s, 8000);
2881 }
2882 if (file->f_mode & FMODE_WRITE) {
2883 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT);
2884 if ((minor & 0xf) == SND_DEV_DSP16)
2885 fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2886
2887 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2888 set_dac_rate(s, 8000);
2889 }
2890 set_fmt(s, fmtm, fmts);
2891 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2892
2893 /* we're covered by the open_sem */
2894 if( ! s->card->dsps_open ) {
2895 start_bob(s);
2896 }
2897 s->card->dsps_open++;
2898 M_printk("maestro: open, %d bobs now\n",s->card->dsps_open);
2899
2900 up(&s->open_sem);
2901 MOD_INC_USE_COUNT;
2902 return 0;
2903 }
2904
2905 static int
2906 ess_release(struct inode *inode, struct file *file)
2907 {
2908 struct ess_state *s = (struct ess_state *)file->private_data;
2909
2910 VALIDATE_STATE(s);
2911 if (file->f_mode & FMODE_WRITE)
2912 drain_dac(s, file->f_flags & O_NONBLOCK);
2913 down(&s->open_sem);
2914 if (file->f_mode & FMODE_WRITE) {
2915 stop_dac(s);
2916 }
2917 if (file->f_mode & FMODE_READ) {
2918 stop_adc(s);
2919 }
2920
2921 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2922 /* we're covered by the open_sem */
2923 M_printk("maestro: %d dsps now alive\n",s->card->dsps_open-1);
2924 if( --s->card->dsps_open <= 0) {
2925 stop_bob(s);
2926 free_buffers(s);
2927 }
2928 up(&s->open_sem);
2929 wake_up(&s->open_wait);
2930 MOD_DEC_USE_COUNT;
2931 return 0;
2932 }
2933
2934 static struct file_operations ess_audio_fops = {
2935 &ess_llseek,
2936 &ess_read,
2937 &ess_write,
2938 NULL, /* readdir */
2939 &ess_poll,
2940 &ess_ioctl,
2941 NULL, /* XXX &ess_mmap, */
2942 &ess_open,
2943 NULL, /* flush */
2944 &ess_release,
2945 NULL, /* fsync */
2946 NULL, /* fasync */
2947 NULL, /* check_media_change */
2948 NULL, /* revalidate */
2949 NULL, /* lock */
2950 };
2951
2952 static int
2953 maestro_config(struct ess_card *card)
2954 {
2955 struct pci_dev *pcidev = &card->pcidev;
2956 struct ess_state *ess = &card->channels[0];
2957 int apu,iobase = card->iobase;
2958 u16 w;
2959 u32 n;
2960
2961 /*
2962 * Disable ACPI
2963 */
2964
2965 pci_write_config_dword(pcidev, 0x54, 0x00000000);
2966 pci_write_config_dword(pcidev, 0x56, 0x00000000);
2967
2968 /*
2969 * Use TDMA for now. TDMA works on all boards, so while its
2970 * not the most efficient its the simplest.
2971 */
2972
2973 pci_read_config_word(pcidev, 0x50, &w);
2974
2975 /* Clear DMA bits */
2976 w&=~(1<<10|1<<9|1<<8);
2977
2978 /* TDMA on */
2979 w|= (1<<8);
2980
2981 /*
2982 * Some of these are undocumented bits
2983 */
2984
2985 w&=~(1<<13)|(1<<14); /* PIC Snoop mode bits */
2986 w&=~(1<<11); /* Safeguard off */
2987 w|= (1<<7); /* Posted write */
2988 w|= (1<<6); /* ISA timing on */
2989 /* XXX huh? claims to be reserved.. */
2990 w&=~(1<<5); /* Don't swap left/right */
2991 w&=~(1<<1); /* Subtractive decode off */
2992
2993 pci_write_config_word(pcidev, 0x50, w);
2994
2995 pci_read_config_word(pcidev, 0x52, &w);
2996 w&=~(1<<15); /* Turn off internal clock multiplier */
2997 /* XXX how do we know which to use? */
2998 w&=~(1<<14); /* External clock */
2999
3000 w&=~(1<<7); /* HWV off */
3001 w&=~(1<<6); /* Debounce off */
3002 w&=~(1<<5); /* GPIO 4:5 */
3003 w|= (1<<4); /* Disconnect from the CHI. Enabling this in made a dell 7500 work. */
3004 w&=~(1<<3); /* IDMA off (undocumented) */
3005 w&=~(1<<2); /* MIDI fix off (undoc) */
3006 w&=~(1<<1); /* reserved, always write 0 */
3007 w&=~(1<<0); /* IRQ to ISA off (undoc) */
3008 pci_write_config_word(pcidev, 0x52, w);
3009
3010 /*
3011 * DDMA off
3012 */
3013
3014 pci_read_config_word(pcidev, 0x60, &w);
3015 w&=~(1<<0);
3016 pci_write_config_word(pcidev, 0x60, w);
3017
3018 /*
3019 * Legacy mode
3020 */
3021
3022 pci_read_config_word(pcidev, 0x40, &w);
3023 w|=(1<<15); /* legacy decode off */
3024 w&=~(1<<14); /* Disable SIRQ */
3025 w&=~(0x1f); /* disable mpu irq/io, game port, fm, SB */
3026
3027 pci_write_config_word(pcidev, 0x40, w);
3028
3029 /* stake our claim on the iospace */
3030 request_region(iobase, 256, card_names[card->card_type]);
3031
3032 sound_reset(iobase);
3033
3034 /*
3035 * Ring Bus Setup
3036 */
3037
3038 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
3039 outw(0xC090, iobase+0x34); /* direct sound, stereo */
3040 udelay(20);
3041 outw(0x3000, iobase+0x36); /* direct sound, stereo */
3042 udelay(20);
3043
3044
3045 /*
3046 * Reset the CODEC
3047 */
3048
3049 maestro_ac97_reset(iobase,pcidev);
3050
3051 /*
3052 * Ring Bus Setup
3053 */
3054
3055 n=inl(iobase+0x34);
3056 n&=~0xF000;
3057 n|=12<<12; /* Direct Sound, Stereo */
3058 outl(n, iobase+0x34);
3059
3060 n=inl(iobase+0x34);
3061 n&=~0x0F00; /* Modem off */
3062 outl(n, iobase+0x34);
3063
3064 n=inl(iobase+0x34);
3065 n&=~0x00F0;
3066 n|=9<<4; /* DAC, Stereo */
3067 outl(n, iobase+0x34);
3068
3069 n=inl(iobase+0x34);
3070 n&=~0x000F; /* ASSP off */
3071 outl(n, iobase+0x34);
3072
3073 n=inl(iobase+0x34);
3074 n|=(1<<29); /* Enable ring bus */
3075 outl(n, iobase+0x34);
3076
3077 n=inl(iobase+0x34);
3078 n|=(1<<28); /* Enable serial bus */
3079 outl(n, iobase+0x34);
3080
3081 n=inl(iobase+0x34);
3082 n&=~0x00F00000; /* MIC off */
3083 outl(n, iobase+0x34);
3084
3085 n=inl(iobase+0x34);
3086 n&=~0x000F0000; /* I2S off */
3087 outl(n, iobase+0x34);
3088
3089
3090 w=inw(iobase+0x18);
3091 w&=~(1<<7); /* ClkRun off */
3092 outw(w, iobase+0x18);
3093
3094 w=inw(iobase+0x18);
3095 w&=~(1<<6); /* Harpo off */
3096 outw(w, iobase+0x18);
3097
3098 w=inw(iobase+0x18);
3099 w&=~(1<<4); /* ASSP irq off */
3100 outw(w, iobase+0x18);
3101
3102 w=inw(iobase+0x18);
3103 w&=~(1<<3); /* ISDN irq off */
3104 outw(w, iobase+0x18);
3105
3106 w=inw(iobase+0x18);
3107 w|=(1<<2); /* Direct Sound IRQ on */
3108 outw(w, iobase+0x18);
3109
3110 w=inw(iobase+0x18);
3111 w&=~(1<<1); /* MPU401 IRQ off */
3112 outw(w, iobase+0x18);
3113
3114 w=inw(iobase+0x18);
3115 w|=(1<<0); /* SB IRQ on */
3116 outw(w, iobase+0x18);
3117
3118 /* it appears some maestros (dell 7500) only work if these are set,
3119 regardless of wether we use the assp or not. */
3120
3121 outb(0, iobase+0xA4);
3122 outb(3, iobase+0xA2);
3123 outb(0, iobase+0xA6);
3124
3125 for(apu=0;apu<16;apu++)
3126 {
3127 /* Write 0 into the buffer area 0x1E0->1EF */
3128 outw(0x01E0+apu, 0x10+iobase);
3129 outw(0x0000, 0x12+iobase);
3130
3131 /*
3132 * The 1.10 test program seem to write 0 into the buffer area
3133 * 0x1D0-0x1DF too.
3134 */
3135 outw(0x01D0+apu, 0x10+iobase);
3136 outw(0x0000, 0x12+iobase);
3137 }
3138
3139 #if 1
3140 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3141 (wave_get_register(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3142 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3143 wave_get_register(ess, IDR7_WAVE_ROMRAM)|0x100);
3144 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3145 wave_get_register(ess, IDR7_WAVE_ROMRAM)&~0x200);
3146 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3147 wave_get_register(ess, IDR7_WAVE_ROMRAM)|~0x400);
3148 #else
3149 maestro_write(ess, IDR7_WAVE_ROMRAM,
3150 (maestro_read(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3151 maestro_write(ess, IDR7_WAVE_ROMRAM,
3152 maestro_read(ess, IDR7_WAVE_ROMRAM)|0x100);
3153 maestro_write(ess, IDR7_WAVE_ROMRAM,
3154 maestro_read(ess, IDR7_WAVE_ROMRAM)&~0x200);
3155 maestro_write(ess, IDR7_WAVE_ROMRAM,
3156 maestro_read(ess, IDR7_WAVE_ROMRAM)|0x400);
3157 #endif
3158
3159 maestro_write(ess, IDR2_CRAM_DATA, 0x0000);
3160 maestro_write(ess, 0x08, 0xB004);
3161 /* Now back to the DirectSound stuff */
3162 maestro_write(ess, 0x09, 0x001B);
3163 maestro_write(ess, 0x0A, 0x8000);
3164 maestro_write(ess, 0x0B, 0x3F37);
3165 maestro_write(ess, 0x0C, 0x0098);
3166
3167 /* parallel out ?? */
3168 maestro_write(ess, 0x0C,
3169 (maestro_read(ess, 0x0C)&~0xF000)|0x8000);
3170 /* parallel in, has something to do with recording :) */
3171 maestro_write(ess, 0x0C,
3172 (maestro_read(ess, 0x0C)&~0x0F00)|0x0500);
3173
3174 maestro_write(ess, 0x0D, 0x7632);
3175
3176 /* Wave cache control on - test off, sg off,
3177 enable, enable extra chans 1Mb */
3178
3179 outw(inw(0x14+iobase)|(1<<8),0x14+iobase);
3180 outw(inw(0x14+iobase)&0xFE03,0x14+iobase);
3181 outw((inw(0x14+iobase)&0xFFFC), 0x14+iobase);
3182 outw(inw(0x14+iobase)|(1<<7),0x14+iobase);
3183
3184 outw(0xA1A0, 0x14+iobase); /* 0300 ? */
3185
3186 /* Now clear the APU control ram */
3187 for(apu=0;apu<NR_APUS;apu++)
3188 {
3189 for(w=0;w<NR_APU_REGS;w++)
3190 apu_set_register(ess, apu|ESS_CHAN_HARD, w, 0);
3191
3192 }
3193
3194 return 0;
3195
3196 }
3197
3198
3199 static int
3200 maestro_install(struct pci_dev *pcidev, int card_type)
3201 {
3202 u32 n;
3203 int iobase;
3204 int i;
3205 struct ess_card *card;
3206 struct ess_state *ess;
3207 int num = 0;
3208
3209 /* don't pick up weird modem maestros */
3210 if(((pcidev->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO)
3211 return 0;
3212
3213 iobase = SILLY_PCI_BASE_ADDRESS(pcidev);
3214
3215 if(check_region(iobase, 256))
3216 {
3217 printk(KERN_WARNING "maestro: can't allocate 256 bytes I/O at 0x%4.4x\n", iobase);
3218 return 0;
3219 }
3220
3221 /* this was tripping up some machines */
3222 if(pcidev->irq == 0)
3223 {
3224 printk(KERN_WARNING "maestro: pci subsystem reports irq 0, this might not be correct.\n");
3225 }
3226
3227 /* just to be sure */
3228 pci_set_master(pcidev);
3229
3230 card = kmalloc(sizeof(struct ess_card), GFP_KERNEL);
3231 if(card == NULL)
3232 {
3233 printk(KERN_WARNING "maestro: out of memory\n");
3234 return 0;
3235 }
3236
3237 memset(card, 0, sizeof(*card));
3238 memcpy(&card->pcidev,pcidev,sizeof(card->pcidev));
3239
3240 #ifdef CONFIG_APM
3241 if (apm_register_callback(maestro_apm_callback)) {
3242 printk(KERN_WARNING "maestro: apm suspend might not work.\n");
3243 }
3244 #endif
3245
3246 card->iobase = iobase;
3247 card->card_type = card_type;
3248 card->irq = pcidev->irq;
3249 card->next = devs;
3250 card->magic = ESS_CARD_MAGIC;
3251 spin_lock_init(&card->lock);
3252 devs = card;
3253
3254 /* init our groups of 6 apus */
3255 for(i=0;i<NR_DSPS;i++)
3256 {
3257 struct ess_state *s=&card->channels[i];
3258
3259 s->index = i;
3260
3261 s->card = card;
3262 init_waitqueue_head(&s->dma_adc.wait);
3263 init_waitqueue_head(&s->dma_dac.wait);
3264 init_waitqueue_head(&s->open_wait);
3265 spin_lock_init(&s->lock);
3266 SILLY_INIT_SEM(s->open_sem);
3267 s->magic = ESS_STATE_MAGIC;
3268
3269 s->apu[0] = 6*i;
3270 s->apu[1] = (6*i)+1;
3271 s->apu[2] = (6*i)+2;
3272 s->apu[3] = (6*i)+3;
3273 s->apu[4] = (6*i)+4;
3274 s->apu[5] = (6*i)+5;
3275
3276 if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
3277 printk("maestro: BOTCH!\n");
3278 /* register devices */
3279 if ((s->dev_audio = register_sound_dsp(&ess_audio_fops, -1)) < 0)
3280 break;
3281 }
3282
3283 num = i;
3284
3285 /* clear the rest if we ran out of slots to register */
3286 for(;i<NR_DSPS;i++)
3287 {
3288 struct ess_state *s=&card->channels[i];
3289 s->dev_audio = -1;
3290 }
3291
3292 ess = &card->channels[0];
3293
3294 /*
3295 * Ok card ready. Begin setup proper
3296 */
3297
3298 printk(KERN_INFO "maestro: Configuring %s found at IO 0x%04X IRQ %d\n",
3299 card_names[card_type],iobase,card->irq);
3300 pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &n);
3301 printk(KERN_INFO "maestro: subvendor id: 0x%08x\n",n);
3302
3303 maestro_config(card);
3304
3305 if(maestro_ac97_get(iobase, 0x00)==0x0080) {
3306 maestro_pt101_init(card,iobase);
3307 } else {
3308 maestro_ac97_init(card,iobase);
3309 }
3310
3311 if ((card->dev_mixer = register_sound_mixer(&ess_mixer_fops, -1)) < 0) {
3312 printk("maestro: couldn't register mixer!\n");
3313 } else {
3314 memcpy(card->mix.mixer_state,mixer_defaults,sizeof(card->mix.mixer_state));
3315 mixer_push_state(card);
3316 }
3317
3318 if(request_irq(card->irq, ess_interrupt, SA_SHIRQ, card_names[card_type], card))
3319 {
3320 printk(KERN_ERR "maestro: unable to allocate irq %d,\n", card->irq);
3321 unregister_sound_mixer(card->dev_mixer);
3322 for(i=0;i<NR_DSPS;i++)
3323 {
3324 struct ess_state *s = &card->channels[i];
3325 if(s->dev_audio != -1)
3326 unregister_sound_dsp(s->dev_audio);
3327 }
3328 release_region(card->iobase, 256);
3329 kfree(card);
3330 return 0;
3331 }
3332
3333 printk(KERN_INFO "maestro: %d channels configured.\n", num);
3334 return 1;
3335 }
3336
3337 #ifdef MODULE
3338 int init_module(void)
3339 #else
3340 int SILLY_MAKE_INIT(init_maestro(void))
3341 #endif
3342 {
3343 struct pci_dev *pcidev = NULL;
3344 int foundone = 0;
3345
3346 if (!pci_present()) /* No PCI bus in this machine! */
3347 return -ENODEV;
3348 printk(KERN_INFO "maestro: version " DRIVER_VERSION " time " __TIME__ " " __DATE__ "\n");
3349
3350 pcidev = NULL;
3351
3352 if (dsps_order < 0) {
3353 dsps_order = 1;
3354 printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3355 }
3356 else if (dsps_order > MAX_DSP_ORDER) {
3357 dsps_order = MAX_DSP_ORDER;
3358 printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3359 }
3360
3361 #ifdef CONFIG_APM
3362 init_waitqueue_head(&suspend_queue);
3363 #endif
3364
3365 /*
3366 * Find the ESS Maestro 2.
3367 */
3368
3369 while( (pcidev = pci_find_device(PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1968, pcidev))!=NULL ) {
3370 if (maestro_install(pcidev, TYPE_MAESTRO2))
3371 foundone=1;
3372 }
3373
3374 /*
3375 * Find the ESS Maestro 2E
3376 */
3377
3378 while( (pcidev = pci_find_device(PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1978, pcidev))!=NULL) {
3379 if (maestro_install(pcidev, TYPE_MAESTRO2E))
3380 foundone=1;
3381 }
3382
3383 /*
3384 * ESS Maestro 1
3385 */
3386
3387 while((pcidev = pci_find_device(PCI_VENDOR_ESS_OLD, PCI_DEVICE_ID_ESS_ESS0100, pcidev))!=NULL) {
3388 if (maestro_install(pcidev, TYPE_MAESTRO))
3389 foundone=1;
3390 }
3391 if( ! foundone ) {
3392 printk("maestro: no devices found.\n");
3393 return -ENODEV;
3394 }
3395 return 0;
3396 }
3397
3398 /* --------------------------------------------------------------------- */
3399
3400 #ifdef MODULE
3401 MODULE_AUTHOR("Zach Brown <zab@redhat.com>, Alan Cox <alan@redhat.com>");
3402 MODULE_DESCRIPTION("ESS Maestro Driver");
3403 #ifdef M_DEBUG
3404 MODULE_PARM(debug,"i");
3405 #endif
3406 MODULE_PARM(dsps_order,"i");
3407
3408 void cleanup_module(void)
3409 {
3410 struct ess_card *s;
3411
3412 #ifdef CONFIG_APM
3413 apm_unregister_callback(maestro_apm_callback);
3414 #endif
3415 while ((s = devs)) {
3416 int i;
3417 devs = devs->next;
3418
3419 /* XXX maybe should force stop bob, but should be all
3420 stopped by _release by now */
3421 free_irq(s->irq, s);
3422 unregister_sound_mixer(s->dev_mixer);
3423 for(i=0;i<NR_DSPS;i++)
3424 {
3425 struct ess_state *ess = &s->channels[i];
3426 if(ess->dev_audio != -1)
3427 unregister_sound_dsp(ess->dev_audio);
3428 }
3429 release_region(s->iobase, 256);
3430 kfree(s);
3431 }
3432 M_printk("maestro: unloading\n");
3433 }
3434
3435 #endif /* MODULE */
3436 #ifdef CONFIG_APM
3437
3438 void
3439 check_suspend(void)
3440 {
3441 DECLARE_WAITQUEUE(wait, current);
3442
3443 if(!in_suspend) return;
3444
3445 in_suspend++;
3446 add_wait_queue(&suspend_queue, &wait);
3447 current->state = TASK_UNINTERRUPTIBLE;
3448 schedule();
3449 remove_wait_queue(&suspend_queue, &wait);
3450 current->state = TASK_RUNNING;
3451 }
3452
3453 static int
3454 maestro_apm_suspend(void)
3455 {
3456 struct ess_card *card;
3457 unsigned long flags;
3458
3459 save_flags(flags);
3460 cli();
3461
3462 for (card = devs; card ; card = card->next) {
3463 int i,j;
3464
3465 M_printk("maestro: apm in dev %p\n",card);
3466
3467 for(i=0;i<NR_DSPS;i++) {
3468 struct ess_state *s = &card->channels[i];
3469
3470 if(s->dev_audio == -1)
3471 continue;
3472
3473 M_printk("maestro: stopping apus for device %d\n",i);
3474 stop_dac(s);
3475 stop_adc(s);
3476 for(j=0;j<6;j++)
3477 card->apu_map[s->apu[i]][5]=apu_get_register(s,i,5);
3478
3479 }
3480
3481 /* get rid of interrupts? */
3482 if( card->dsps_open > 0)
3483 stop_bob(&card->channels[0]);
3484 }
3485 in_suspend=1;
3486
3487 restore_flags(flags);
3488
3489 /* we'll let the bios do the rest of the power down.. */
3490
3491 return 0;
3492 }
3493 static int
3494 maestro_apm_resume(void)
3495 {
3496 struct ess_card *card;
3497 unsigned long flags;
3498
3499 save_flags(flags);
3500 cli();
3501 in_suspend=0;
3502 M_printk("maestro: resuming\n");
3503
3504 /* first lets just bring everything back. .*/
3505 for (card = devs; card ; card = card->next) {
3506 int i;
3507
3508 M_printk("maestro: apm in dev %p\n",card);
3509
3510 maestro_config(card);
3511 /* need to restore the base pointers.. */
3512 if(card->dmapages)
3513 set_base_registers(&card->channels[0],card->dmapages);
3514
3515 mixer_push_state(card);
3516
3517 for(i=0;i<NR_DSPS;i++) {
3518 struct ess_state *s = &card->channels[i];
3519 int chan,reg;
3520
3521 if(s->dev_audio == -1)
3522 continue;
3523
3524 for(chan = 0 ; chan < 6 ; chan++) {
3525 wave_set_register(s,s->apu[chan]<<3,s->apu_base[chan]);
3526 for(reg = 1 ; reg < NR_APU_REGS ; reg++)
3527 apu_set_register(s,chan,reg,s->card->apu_map[s->apu[chan]][reg]);
3528 }
3529 for(chan = 0 ; chan < 6 ; chan++)
3530 apu_set_register(s,chan,0,s->card->apu_map[s->apu[chan]][0] & 0xFF0F);
3531 }
3532 }
3533
3534 /* now we flip on the music */
3535 for (card = devs; card ; card = card->next) {
3536 int i;
3537
3538 M_printk("maestro: apm in dev %p\n",card);
3539
3540 for(i=0;i<NR_DSPS;i++) {
3541 struct ess_state *s = &card->channels[i];
3542
3543 /* these use the apu_mode, and can handle
3544 spurious calls */
3545 start_dac(s);
3546 start_adc(s);
3547 }
3548 if( card->dsps_open > 0)
3549 start_bob(&card->channels[0]);
3550 }
3551
3552 restore_flags(flags);
3553
3554 wake_up(&suspend_queue);
3555
3556 return 0;
3557 }
3558
3559 int
3560 maestro_apm_callback(apm_event_t ae) {
3561
3562 M_printk("maestro: apm event received: 0x%x\n",ae);
3563
3564 switch(ae) {
3565 case APM_SYS_SUSPEND:
3566 case APM_CRITICAL_SUSPEND:
3567 case APM_USER_SUSPEND:
3568 maestro_apm_suspend();break;
3569 case APM_NORMAL_RESUME:
3570 case APM_CRITICAL_RESUME:
3571 case APM_STANDBY_RESUME:
3572 maestro_apm_resume();break;
3573 default: break;
3574 }
3575
3576 return 0;
3577 }
3578 #endif
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