2 * Trantor T128/T128F/T228 defines
3 * Note : architecturally, the T100 and T128 are different and won't work
5 * Copyright 1993, Drew Eckhardt
7 * (Unix and Linux consulting and custom programming)
11 * DISTRIBUTION RELEASE 3.
13 * For more information, please consult
15 * Trantor Systems, Ltd.
16 * T128/T128F/T228 SCSI Host Adapter
17 * Hardware Specifications
19 * Trantor Systems, Ltd.
22 * 1+ (415) 770-1400, FAX 1+ (415) 770-9910
27 * SCSI Protocol Controller
30 * NCR Microelectronics
31 * 1635 Aeroplaza Drive
32 * Colorado Springs, CO 80916
44 #define T128_PUBLIC_RELEASE 3
46 #define TDEBUG_INIT 0x1
47 #define TDEBUG_TRANSFER 0x2
50 * The trantor boards are memory mapped. They use an NCR5380 or
51 * equivalent (my sample board had part second sourced from ZILOG).
52 * NCR's recommended "Pseudo-DMA" architecture is used, where
53 * a PAL drives the DMA signals on the 5380 allowing fast, blind
54 * transfers with proper handshaking.
58 * Note : a boot switch is provided for the purpose of informing the
59 * firmware to boot or not boot from attached SCSI devices. So, I imagine
60 * there are fewer people who've yanked the ROM like they do on the Seagate
61 * to make bootup faster, and I'll probably use this for autodetection.
63 #define T_ROM_OFFSET 0
66 * Note : my sample board *WAS NOT* populated with the SRAM, so this
67 * can't be used for autodetection without a ROM present.
69 #define T_RAM_OFFSET 0x1800
72 * All of the registers are allocated 32 bytes of address space, except
73 * for the data register (read/write to/from the 5380 in pseudo-DMA mode)
75 #define T_CONTROL_REG_OFFSET 0x1c00 /* rw */
76 #define T_CR_INT 0x10 /* Enable interrupts */
77 #define T_CR_CT 0x02 /* Reset watchdog timer */
79 #define T_STATUS_REG_OFFSET 0x1c20 /* ro */
80 #define T_ST_BOOT 0x80 /* Boot switch */
81 #define T_ST_S3 0x40 /* User settable switches, */
82 #define T_ST_S2 0x20 /* read 0 when switch is on, 1 off */
84 #define T_ST_PS2 0x08 /* Set for Microchannel 228 */
85 #define T_ST_RDY 0x04 /* 5380 DRQ */
86 #define T_ST_TIM 0x02 /* indicates 40us watchdog timer fired */
87 #define T_ST_ZERO 0x01 /* Always zero */
89 #define T_5380_OFFSET 0x1d00 /* 8 registers here, see NCR5380.h */
91 #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */
94 int t128_abort(Scsi_Cmnd
*);
95 int t128_biosparam(Disk
*, kdev_t
, int*);
96 int t128_detect(Scsi_Host_Template
*);
97 int t128_queue_command(Scsi_Cmnd
*, void (*done
)(Scsi_Cmnd
*));
98 int t128_reset(Scsi_Cmnd
*, unsigned int reset_flags
);
99 int t128_proc_info (char *buffer
, char **start
, off_t offset
,
100 int length
, int hostno
, int inout
);
107 #define CMD_PER_LUN 2
115 * I hadn't thought of this with the earlier drivers - but to prevent
116 * macro definition conflicts, we shouldn't define all of the internal
117 * macros when this is being used solely for the host stub.
120 #define TRANTOR_T128 { \
121 name: "Trantor T128/T128F/T228", \
122 detect: t128_detect, \
123 queuecommand: t128_queue_command, \
126 bios_param: t128_biosparam, \
127 can_queue: CAN_QUEUE, \
129 sg_tablesize: SG_ALL, \
130 cmd_per_lun: CMD_PER_LUN, \
131 use_clustering: DISABLE_CLUSTERING}
135 #define NCR5380_implementation_fields \
138 #define NCR5380_local_declare() \
141 #define NCR5380_setup(instance) \
142 base = (instance)->base
144 #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
146 #if !(TDEBUG & TDEBUG_TRANSFER)
147 #define NCR5380_read(reg) isa_readb(T128_address(reg))
148 #define NCR5380_write(reg, value) isa_writeb((value),(T128_address(reg)))
150 #define NCR5380_read(reg) \
151 (((unsigned char) printk("scsi%d : read register %d at address %08x\n"\
152 , instance->hostno, (reg), T128_address(reg))), isa_readb(T128_address(reg)))
154 #define NCR5380_write(reg, value) { \
155 printk("scsi%d : write %02x to register %d at address %08x\n", \
156 instance->hostno, (value), (reg), T128_address(reg)); \
157 isa_writeb((value), (T128_address(reg))); \
161 #define NCR5380_intr t128_intr
162 #define do_NCR5380_intr do_t128_intr
163 #define NCR5380_queue_command t128_queue_command
164 #define NCR5380_abort t128_abort
165 #define NCR5380_reset t128_reset
166 #define NCR5380_proc_info t128_proc_info
169 1101 0100 1010 1000 */
171 #define T128_IRQS 0xc4a8
173 #endif /* else def HOSTS_C */
174 #endif /* ndef ASM */