2 * dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
3 * and TURBOchannel PMAZ-A cards
5 * TURBOchannel changes by Harald Koerfgen
6 * PMAZ-A support by David Airlie
9 * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
11 * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
14 #include <linux/kernel.h>
15 #include <linux/delay.h>
16 #include <linux/types.h>
17 #include <linux/string.h>
18 #include <linux/malloc.h>
19 #include <linux/blk.h>
20 #include <linux/proc_fs.h>
21 #include <linux/stat.h>
30 #include <asm/jazzdma.h>
33 #include <asm/pgtable.h>
35 #include <asm/dec/tc.h>
36 #include <asm/dec/interrupts.h>
37 #include <asm/dec/ioasic_addrs.h>
38 #include <asm/dec/ioasic_ints.h>
39 #include <asm/dec/machtype.h>
42 * Once upon a time the pmaz code used to be working but
43 * it hasn't been maintained for quite some time.
44 * It isn't working anymore but I'll leave here as a
45 * starting point. #define this an be prepared for tons
46 * of warnings and errors :)
50 static int dma_bytes_sent(struct NCR_ESP
*esp
, int fifo_count
);
51 static void dma_drain(struct NCR_ESP
*esp
);
52 static int dma_can_transfer(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
);
53 static void dma_dump_state(struct NCR_ESP
*esp
);
54 static void dma_init_read(struct NCR_ESP
*esp
, __u32 vaddress
, int length
);
55 static void dma_init_write(struct NCR_ESP
*esp
, __u32 vaddress
, int length
);
56 static void dma_ints_off(struct NCR_ESP
*esp
);
57 static void dma_ints_on(struct NCR_ESP
*esp
);
58 static int dma_irq_p(struct NCR_ESP
*esp
);
59 static int dma_ports_p(struct NCR_ESP
*esp
);
60 static void dma_setup(struct NCR_ESP
*esp
, __u32 addr
, int count
, int write
);
61 static void dma_mmu_get_scsi_one(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
);
62 static void dma_mmu_get_scsi_sgl(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
);
63 static void dma_advance_sg(Scsi_Cmnd
* sp
);
66 static void pmaz_dma_drain(struct NCR_ESP
*esp
);
67 static void pmaz_dma_init_read(struct NCR_ESP
*esp
, __u32 vaddress
, int length
);
68 static void pmaz_dma_init_write(struct NCR_ESP
*esp
, __u32 vaddress
, int length
);
69 static void pmaz_dma_ints_off(struct NCR_ESP
*esp
);
70 static void pmaz_dma_ints_on(struct NCR_ESP
*esp
);
71 static void pmaz_dma_setup(struct NCR_ESP
*esp
, __u32 addr
, int count
, int write
);
72 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
);
73 static void pmaz_dma_mmu_get_scsi_sgl(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
);
75 volatile int *scsi_pmaz_dma_ptr_tc
;
78 #define TC_ESP_RAM_SIZE 0x20000
79 #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
82 #define TC_ESP_DMAR_MASK 0x1ffff
83 #define TC_ESP_DMAR_WRITE 0x80000000
84 #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
86 volatile unsigned char *scsi_pmaz_dma_ptrs_tc
[ESP_NCMD
];
87 unsigned char scsi_pmaz_dma_buff_used
[ESP_NCMD
];
88 unsigned char scsi_cur_buff
= 1; /* Leave space for command buffer */
89 __u32 esp_virt_buffer
;
90 int scsi_current_length
= 0;
92 volatile unsigned char cmd_buffer
[16];
93 volatile unsigned char pmaz_cmd_buffer
[16];
94 /* This is where all commands are put
95 * before they are trasfered to the ESP chip
99 volatile unsigned long *scsi_dma_ptr
;
100 volatile unsigned long *scsi_next_ptr
;
101 volatile unsigned long *scsi_scr
;
102 volatile unsigned long *ioasic_ssr
;
103 volatile unsigned long *scsi_sdr0
;
104 volatile unsigned long *scsi_sdr1
;
106 static void scsi_dma_int(int, void *, struct pt_regs
*);
108 /***************************************************************** Detection */
109 int dec_esp_detect(Scsi_Host_Template
* tpnt
)
112 struct ConfigDev
*esp_dev
;
115 unsigned long mem_start
;
116 volatile unsigned char *buffer
;
121 esp
= esp_allocate(tpnt
, (void *) esp_dev
);
123 scsi_dma_ptr
= (unsigned long *) (system_base
+ IOCTL
+ SCSI_DMA_P
);
124 scsi_next_ptr
= (unsigned long *) (system_base
+ IOCTL
+ SCSI_DMA_BP
);
125 scsi_scr
= (unsigned long *) (system_base
+ IOCTL
+ SCSI_SCR
);
126 ioasic_ssr
= (unsigned long *) (system_base
+ IOCTL
+ SSR
);
127 scsi_sdr0
= (unsigned long *) (system_base
+ IOCTL
+ SCSI_SDR0
);
128 scsi_sdr1
= (unsigned long *) (system_base
+ IOCTL
+ SCSI_SDR1
);
130 /* Do command transfer with programmed I/O */
131 esp
->do_pio_cmds
= 1;
133 /* Required functions */
134 esp
->dma_bytes_sent
= &dma_bytes_sent
;
135 esp
->dma_can_transfer
= &dma_can_transfer
;
136 esp
->dma_dump_state
= &dma_dump_state
;
137 esp
->dma_init_read
= &dma_init_read
;
138 esp
->dma_init_write
= &dma_init_write
;
139 esp
->dma_ints_off
= &dma_ints_off
;
140 esp
->dma_ints_on
= &dma_ints_on
;
141 esp
->dma_irq_p
= &dma_irq_p
;
142 esp
->dma_ports_p
= &dma_ports_p
;
143 esp
->dma_setup
= &dma_setup
;
145 /* Optional functions */
146 esp
->dma_barrier
= 0;
147 esp
->dma_drain
= &dma_drain
;
148 esp
->dma_invalidate
= 0;
149 esp
->dma_irq_entry
= 0;
150 esp
->dma_irq_exit
= 0;
153 esp
->dma_led_off
= 0;
156 /* virtual DMA functions */
157 esp
->dma_mmu_get_scsi_one
= &dma_mmu_get_scsi_one
;
158 esp
->dma_mmu_get_scsi_sgl
= &dma_mmu_get_scsi_sgl
;
159 esp
->dma_mmu_release_scsi_one
= 0;
160 esp
->dma_mmu_release_scsi_sgl
= 0;
161 esp
->dma_advance_sg
= &dma_advance_sg
;
164 /* SCSI chip speed */
165 esp
->cfreq
= 25000000;
168 * we don't give the address of DMA channel, but the number
169 * of DMA channel, so we can use the jazz DMA functions
172 esp
->dregs
= JAZZ_SCSI_DMA
;
174 /* ESP register base */
175 esp
->eregs
= (struct ESP_regs
*) (system_base
+ SCSI
);
177 /* Set the command buffer */
178 esp
->esp_command
= (volatile unsigned char *) cmd_buffer
;
180 /* get virtual dma address for command buffer */
181 esp
->esp_command_dvma
= (__u32
) KSEG1ADDR((volatile unsigned char *) cmd_buffer
);
184 request_irq(esp
->irq
, esp_intr
, SA_INTERRUPT
, "NCR 53C94 SCSI",
186 request_irq(SCSI_DMA_INT
, scsi_dma_int
, SA_INTERRUPT
, "JUNKIO SCSI DMA",
191 /* Check for differential SCSI-bus */
200 while ((slot
= search_tc_card("PMAZ_AA")) >= 0) {
202 mem_start
= get_tc_base_addr(slot
);
205 esp
= esp_allocate(tpnt
, (void *) esp_dev
);
208 esp
->eregs
= (struct ESP_regs
*) (mem_start
+ DEC_SCSI_SREG
);
209 esp
->do_pio_cmds
= 1;
211 /* Set the command buffer */
212 esp
->esp_command
= (volatile unsigned char *) pmaz_cmd_buffer
;
214 /* get virtual dma address for command buffer */
215 esp
->esp_command_dvma
= (__u32
) KSEG0ADDR((volatile unsigned char *) pmaz_cmd_buffer
);
217 buffer
= (volatile unsigned char *) (mem_start
+ DEC_SCSI_SRAM
);
219 scsi_pmaz_dma_ptr_tc
= (volatile int *) (mem_start
+ DEC_SCSI_DMAREG
);
221 for (i
= 0; i
< ESP_NCMD
; i
++) {
222 scsi_pmaz_dma_ptrs_tc
[i
] = (volatile unsigned char *) (buffer
+ ESP_TGT_DMA_SIZE
* i
);
225 scsi_pmaz_dma_buff_used
[0] = 1;
227 esp
->cfreq
= get_tc_speed();
229 esp
->irq
= get_tc_irq_nr(slot
);
231 /* Required functions */
232 esp
->dma_bytes_sent
= &dma_bytes_sent
;
233 esp
->dma_can_transfer
= &dma_can_transfer
;
234 esp
->dma_dump_state
= &dma_dump_state
;
235 esp
->dma_init_read
= &pmaz_dma_init_read
;
236 esp
->dma_init_write
= &pmaz_dma_init_write
;
237 esp
->dma_ints_off
= &pmaz_dma_ints_off
;
238 esp
->dma_ints_on
= &pmaz_dma_ints_on
;
239 esp
->dma_irq_p
= &dma_irq_p
;
240 esp
->dma_ports_p
= &dma_ports_p
;
241 esp
->dma_setup
= &pmaz_dma_setup
;
243 /* Optional functions */
244 esp
->dma_barrier
= 0;
245 esp
->dma_drain
= &pmaz_dma_drain
;
246 esp
->dma_invalidate
= 0;
247 esp
->dma_irq_entry
= 0;
248 esp
->dma_irq_exit
= 0;
251 esp
->dma_led_off
= 0;
254 esp
->dma_mmu_get_scsi_one
= pmaz_dma_mmu_get_scsi_one
;
255 esp
->dma_mmu_get_scsi_sgl
= 0;
256 esp
->dma_mmu_release_scsi_one
= 0;
257 esp
->dma_mmu_release_scsi_sgl
= 0;
258 esp
->dma_advance_sg
= 0;
260 request_irq(esp
->irq
, esp_intr
, SA_INTERRUPT
, "PMAZ_AA", NULL
);
269 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps
, esps_in_use
);
270 esps_running
= esps_in_use
;
276 /************************************************************* DMA Functions */
277 static void scsi_dma_int(int irq
, void *dev_id
, struct pt_regs
*regs
)
279 extern volatile unsigned int *isr
;
282 if (*isr
& SCSI_PTR_LOADED
) {
284 *scsi_next_ptr
= ((*scsi_dma_ptr
+ PAGE_SIZE
) & PAGE_MASK
) << 3;
285 *isr
&= ~SCSI_PTR_LOADED
;
287 if (*isr
& SCSI_PAGOVRRUN
)
288 *isr
&= ~SCSI_PAGOVRRUN
;
289 if (*isr
& SCSI_DMA_MEMRDERR
) {
290 printk("Got unexpected SCSI DMA Interrupt! < ");
291 printk("SCSI_DMA_MEMRDERR ");
293 *isr
&= ~SCSI_DMA_MEMRDERR
;
298 * This routine will only work on IOASIC machines
299 * so we can avoid an indirect function call here
300 * and flush the writeback buffer the fast way
306 static int dma_bytes_sent(struct NCR_ESP
*esp
, int fifo_count
)
311 static void dma_drain(struct NCR_ESP
*esp
)
313 unsigned long nw
= *scsi_scr
;
314 unsigned short *p
= KSEG1ADDR((unsigned short *) ((*scsi_dma_ptr
) >> 3));
317 * Is there something in the dma buffers left?
322 *p
= (unsigned short) *scsi_sdr0
;
325 *p
++ = (unsigned short) (*scsi_sdr0
);
326 *p
= (unsigned short) ((*scsi_sdr0
) >> 16);
329 *p
++ = (unsigned short) (*scsi_sdr0
);
330 *p
++ = (unsigned short) ((*scsi_sdr0
) >> 16);
331 *p
= (unsigned short) (*scsi_sdr1
);
334 printk("Strange: %d words in dma buffer left\n", (int) nw
);
340 static int dma_can_transfer(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
)
342 return sp
->SCp
.this_residual
;;
345 static void dma_dump_state(struct NCR_ESP
*esp
)
348 ESPLOG(("esp%d: dma -- enable <%08x> residue <%08x\n",
349 esp->esp_id, vdma_get_enable((int)esp->dregs), vdma_get_resdiue((int)esp->dregs)));
353 static void dma_init_read(struct NCR_ESP
*esp
, __u32 vaddress
, int length
)
355 extern volatile unsigned int *isr
;
359 panic("dec_efs.c: unable to handle partial word transfers, yet...");
361 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress
), length
);
363 *ioasic_ssr
&= ~SCSI_DMA_EN
;
365 *scsi_dma_ptr
= vaddress
<< 3;
367 /* prepare for next page */
368 *scsi_next_ptr
= ((vaddress
+ PAGE_SIZE
) & PAGE_MASK
) << 3;
369 *ioasic_ssr
|= (SCSI_DMA_DIR
| SCSI_DMA_EN
);
378 static void dma_init_write(struct NCR_ESP
*esp
, __u32 vaddress
, int length
)
380 extern volatile unsigned int *isr
;
384 panic("dec_efs.c: unable to handle partial word transfers, yet...");
386 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress
), length
);
388 *ioasic_ssr
&= ~(SCSI_DMA_DIR
| SCSI_DMA_EN
);
390 *scsi_dma_ptr
= vaddress
<< 3;
392 /* prepare for next page */
393 *scsi_next_ptr
= ((vaddress
+ PAGE_SIZE
) & PAGE_MASK
) << 3;
394 *ioasic_ssr
|= SCSI_DMA_EN
;
403 static void dma_ints_off(struct NCR_ESP
*esp
)
405 disable_irq(SCSI_DMA_INT
);
408 static void dma_ints_on(struct NCR_ESP
*esp
)
410 enable_irq(SCSI_DMA_INT
);
413 static int dma_irq_p(struct NCR_ESP
*esp
)
415 return (esp
->eregs
->esp_status
& ESP_STAT_INTR
);
418 static int dma_ports_p(struct NCR_ESP
*esp
)
421 * FIXME: what's this good for?
426 static void dma_setup(struct NCR_ESP
*esp
, __u32 addr
, int count
, int write
)
429 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
430 * so when (write) is true, it actually means READ!
433 dma_init_read(esp
, addr
, count
);
435 dma_init_write(esp
, addr
, count
);
440 * These aren't used yet
442 static void dma_mmu_get_scsi_one(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
)
444 sp
->SCp
.have_data_in
= PHYSADDR(sp
->SCp
.buffer
);
445 sp
->SCp
.ptr
= (char *) ((unsigned long) sp
->SCp
.have_data_in
);
448 static void dma_mmu_get_scsi_sgl(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
)
450 int sz
= sp
->SCp
.buffers_residual
;
451 struct mmu_sglist
*sg
= (struct mmu_sglist
*) sp
->SCp
.buffer
;
454 sg
[sz
].dvma_addr
= PHYSADDR(sg
[sz
].addr
);
457 sp
->SCp
.ptr
= (char *) ((unsigned long) sp
->SCp
.buffer
->dvma_address
);
460 static void dma_advance_sg(Scsi_Cmnd
* sp
)
462 sp
->SCp
.ptr
= (char *) ((unsigned long) sp
->SCp
.buffer
->dvma_address
);
467 static void pmaz_dma_drain(struct NCR_ESP
*esp
)
469 memcpy((void *) (KSEG0ADDR(esp_virt_buffer
)),
470 (void *) scsi_pmaz_dma_ptrs_tc
[scsi_cur_buff
], scsi_current_length
);
473 static void pmaz_dma_init_read(struct NCR_ESP
*esp
, __u32 vaddress
, int length
)
476 if (length
> ESP_TGT_DMA_SIZE
)
477 length
= ESP_TGT_DMA_SIZE
;
479 *scsi_pmaz_dma_ptr_tc
= TC_ESP_DMA_ADDR(scsi_pmaz_dma_ptrs_tc
[scsi_cur_buff
]);
480 esp_virt_buffer
= vaddress
;
481 scsi_current_length
= length
;
484 static void pmaz_dma_init_write(struct NCR_ESP
*esp
, __u32 vaddress
, int length
)
486 memcpy((void *)scsi_pmaz_dma_ptrs_tc
[scsi_cur_buff
], KSEG0ADDR((void *) vaddress
), length
);
488 *scsi_pmaz_dma_ptr_tc
= TC_ESP_DMAR_WRITE
| TC_ESP_DMA_ADDR(scsi_pmaz_dma_ptrs_tc
[scsi_cur_buff
]);
492 static void pmaz_dma_ints_off(struct NCR_ESP
*esp
)
496 static void pmaz_dma_ints_on(struct NCR_ESP
*esp
)
500 static void pmaz_dma_setup(struct NCR_ESP
*esp
, __u32 addr
, int count
, int write
)
503 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
504 * so when (write) is true, it actually means READ!
507 pmaz_dma_init_read(esp
, addr
, count
);
509 pmaz_dma_init_write(esp
, addr
, count
);
513 static void pmaz_dma_mmu_release_scsi_one(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
)
516 for (x
= 1; x
< 6; x
++)
517 if (sp
->SCp
.have_data_in
== PHYSADDR(scsi_pmaz_dma_ptrs_tc
[x
]))
518 scsi_pmaz_dma_buff_used
[x
] = 0;
521 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP
*esp
, Scsi_Cmnd
* sp
)
523 sp
->SCp
.have_data_in
= (int) sp
->SCp
.ptr
=
524 (char *) KSEG0ADDR((sp
->request_buffer
));