drivers/scsi/aha152x.h

   1 #ifndef _AHA152X_H
   2 #define _AHA152X_H
   3
   4 /*
   5  * $Id: aha152x.h,v 2.3 2000/11/04 16:41:37 fischer Exp $
   6  */
   7
   8 #if defined(__KERNEL__)
   9
  10 #include <linux/blk.h>
  11 #include "scsi.h"
  12 #include <asm/io.h>
  13 #include <linux/version.h>
  14
  15 int aha152x_detect(Scsi_Host_Template *);
  16 int aha152x_command(Scsi_Cmnd *);
  17 int aha152x_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
  18 int aha152x_abort(Scsi_Cmnd *);
  19 int aha152x_release(struct Scsi_Host *shpnt);
  20 int aha152x_device_reset(Scsi_Cmnd *);
  21 int aha152x_bus_reset(Scsi_Cmnd *);
  22 int aha152x_host_reset(Scsi_Cmnd *);
  23 int aha152x_biosparam(Disk *, kdev_t, int*);
  24 int aha152x_proc_info(char *buffer, char **start, off_t offset, int length, int hostno, int inout);
  25
  26 /* number of queueable commands
  27    (unless we support more than 1 cmd_per_lun this should do) */
  28 #define AHA152X_MAXQUEUE 7
  29
  30 #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 2.3 $"
  31
  32 /* Initial value of Scsi_Host entry */
  33 #define AHA152X { proc_name:                    "aha152x",              \
  34                   proc_info:                    aha152x_proc_info,      \
  35                   name:                         AHA152X_REVID,          \
  36                   detect:                       aha152x_detect,         \
  37                   command:                      aha152x_command,        \
  38                   queuecommand:                 aha152x_queue,          \
  39                   eh_abort_handler:             aha152x_abort,          \
  40                   eh_device_reset_handler:      aha152x_device_reset,   \
  41                   eh_bus_reset_handler:         aha152x_bus_reset,      \
  42                   eh_host_reset_handler:        aha152x_host_reset,     \
  43                   release:                      aha152x_release,        \
  44                   slave_attach:                 0,                      \
  45                   bios_param:                   aha152x_biosparam,      \
  46                   can_queue:                    1,                      \
  47                   this_id:                      7,                      \
  48                   sg_tablesize:                 SG_ALL,                 \
  49                   cmd_per_lun:                  1,                      \
  50                   present:                      0,                      \
  51                   unchecked_isa_dma:            0,                      \
  52                   use_clustering:               DISABLE_CLUSTERING,     \
  53                   use_new_eh_code:              1 }
  54 #endif
  55
  56
  57 /* port addresses */
  58 #define SCSISEQ      (HOSTIOPORT0+0x00)    /* SCSI sequence control */
  59 #define SXFRCTL0     (HOSTIOPORT0+0x01)    /* SCSI transfer control 0 */
  60 #define SXFRCTL1     (HOSTIOPORT0+0x02)    /* SCSI transfer control 1 */
  61 #define SCSISIG      (HOSTIOPORT0+0x03)    /* SCSI signal in/out */
  62 #define SCSIRATE     (HOSTIOPORT0+0x04)    /* SCSI rate control */
  63 #define SELID        (HOSTIOPORT0+0x05)    /* selection/reselection ID */
  64 #define SCSIID       SELID                 /* SCSI ID */
  65 #define SCSIDAT      (HOSTIOPORT0+0x06)    /* SCSI latched data */
  66 #define SCSIBUS      (HOSTIOPORT0+0x07)    /* SCSI data bus */
  67 #define STCNT0       (HOSTIOPORT0+0x08)    /* SCSI transfer count 0 */
  68 #define STCNT1       (HOSTIOPORT0+0x09)    /* SCSI transfer count 1 */
  69 #define STCNT2       (HOSTIOPORT0+0x0a)    /* SCSI transfer count 2 */
  70 #define SSTAT0       (HOSTIOPORT0+0x0b)    /* SCSI interrupt status 0 */
  71 #define SSTAT1       (HOSTIOPORT0+0x0c)    /* SCSI interrupt status 1 */
  72 #define SSTAT2       (HOSTIOPORT0+0x0d)    /* SCSI interrupt status 2 */
  73 #define SCSITEST     (HOSTIOPORT0+0x0e)    /* SCSI test control */
  74 #define SSTAT3       SCSITEST              /* SCSI interrupt status 3 */
  75 #define SSTAT4       (HOSTIOPORT0+0x0f)    /* SCSI status 4 */
  76 #define SIMODE0      (HOSTIOPORT1+0x10)    /* SCSI interrupt mode 0 */
  77 #define SIMODE1      (HOSTIOPORT1+0x11)    /* SCSI interrupt mode 1 */
  78 #define DMACNTRL0    (HOSTIOPORT1+0x12)    /* DMA control 0 */
  79 #define DMACNTRL1    (HOSTIOPORT1+0x13)    /* DMA control 1 */
  80 #define DMASTAT      (HOSTIOPORT1+0x14)    /* DMA status */
  81 #define FIFOSTAT     (HOSTIOPORT1+0x15)    /* FIFO status */
  82 #define DATAPORT     (HOSTIOPORT1+0x16)    /* DATA port */
  83 #define BRSTCNTRL    (HOSTIOPORT1+0x18)    /* burst control */
  84 #define PORTA        (HOSTIOPORT1+0x1a)    /* PORT A */
  85 #define PORTB        (HOSTIOPORT1+0x1b)    /* PORT B */
  86 #define REV          (HOSTIOPORT1+0x1c)    /* revision */
  87 #define STACK        (HOSTIOPORT1+0x1d)    /* stack */
  88 #define TEST         (HOSTIOPORT1+0x1e)    /* test register */
  89
  90 #define IO_RANGE        0x20
  91
  92 /* used in aha152x_porttest */
  93 #define O_PORTA         0x1a               /* PORT A */
  94 #define O_PORTB         0x1b               /* PORT B */
  95 #define O_DMACNTRL1     0x13               /* DMA control 1 */
  96 #define O_STACK         0x1d               /* stack */
  97
  98 /* used in tc1550_porttest */
  99 #define O_TC_PORTA      0x0a               /* PORT A */
 100 #define O_TC_PORTB      0x0b               /* PORT B */
 101 #define O_TC_DMACNTRL1  0x03               /* DMA control 1 */
 102 #define O_TC_STACK      0x0d               /* stack */
 103
 104 /* bits and bitmasks to ports */
 105
 106 /* SCSI sequence control */
 107 #define TEMODEO      0x80
 108 #define ENSELO       0x40
 109 #define ENSELI       0x20
 110 #define ENRESELI     0x10
 111 #define ENAUTOATNO   0x08
 112 #define ENAUTOATNI   0x04
 113 #define ENAUTOATNP   0x02
 114 #define SCSIRSTO     0x01
 115
 116 /* SCSI transfer control 0 */
 117 #define SCSIEN       0x80
 118 #define DMAEN        0x40
 119 #define CH1          0x20
 120 #define CLRSTCNT     0x10
 121 #define SPIOEN       0x08
 122 #define CLRCH1       0x02
 123
 124 /* SCSI transfer control 1 */
 125 #define BITBUCKET    0x80
 126 #define SWRAPEN      0x40
 127 #define ENSPCHK      0x20
 128 #define STIMESEL     0x18    /* mask */
 129 #define STIMESEL_    3
 130 #define ENSTIMER     0x04
 131 #define BYTEALIGN    0x02
 132
 133 /* SCSI signal IN */
 134 #define SIG_CDI          0x80
 135 #define SIG_IOI          0x40
 136 #define SIG_MSGI         0x20
 137 #define SIG_ATNI         0x10
 138 #define SIG_SELI         0x08
 139 #define SIG_BSYI         0x04
 140 #define SIG_REQI         0x02
 141 #define SIG_ACKI         0x01
 142
 143 /* SCSI Phases */
 144 #define P_MASK       (SIG_MSGI|SIG_CDI|SIG_IOI)
 145 #define P_DATAO      (0)
 146 #define P_DATAI      (SIG_IOI)
 147 #define P_CMD        (SIG_CDI)
 148 #define P_STATUS     (SIG_CDI|SIG_IOI)
 149 #define P_MSGO       (SIG_MSGI|SIG_CDI)
 150 #define P_MSGI       (SIG_MSGI|SIG_CDI|SIG_IOI)
 151
 152 /* SCSI signal OUT */
 153 #define SIG_CDO          0x80
 154 #define SIG_IOO          0x40
 155 #define SIG_MSGO         0x20
 156 #define SIG_ATNO         0x10
 157 #define SIG_SELO         0x08
 158 #define SIG_BSYO         0x04
 159 #define SIG_REQO         0x02
 160 #define SIG_ACKO         0x01
 161
 162 /* SCSI rate control */
 163 #define SXFR         0x70    /* mask */
 164 #define SXFR_        4
 165 #define SOFS         0x0f    /* mask */
 166
 167 /* SCSI ID */
 168 #define OID          0x70
 169 #define OID_         4
 170 #define TID          0x07
 171
 172 /* SCSI transfer count */
 173 #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
 174                    + (GETPORT(STCNT1)<< 8) \
 175                    + GETPORT(STCNT0) )
 176
 177 #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
 178                       SETPORT(STCNT1, ((X) & 0x00FF00) >>  8); \
 179                       SETPORT(STCNT0, ((X) & 0x0000FF) ); }
 180
 181 /* SCSI interrupt status */
 182 #define TARGET       0x80
 183 #define SELDO        0x40
 184 #define SELDI        0x20
 185 #define SELINGO      0x10
 186 #define SWRAP        0x08
 187 #define SDONE        0x04
 188 #define SPIORDY      0x02
 189 #define DMADONE      0x01
 190
 191 #define SETSDONE     0x80
 192 #define CLRSELDO     0x40
 193 #define CLRSELDI     0x20
 194 #define CLRSELINGO   0x10
 195 #define CLRSWRAP     0x08
 196 #define CLRSDONE     0x04
 197 #define CLRSPIORDY   0x02
 198 #define CLRDMADONE   0x01
 199
 200 /* SCSI status 1 */
 201 #define SELTO        0x80
 202 #define ATNTARG      0x40
 203 #define SCSIRSTI     0x20
 204 #define PHASEMIS     0x10
 205 #define BUSFREE      0x08
 206 #define SCSIPERR     0x04
 207 #define PHASECHG     0x02
 208 #define REQINIT      0x01
 209
 210 #define CLRSELTIMO   0x80
 211 #define CLRATNO      0x40
 212 #define CLRSCSIRSTI  0x20
 213 #define CLRBUSFREE   0x08
 214 #define CLRSCSIPERR  0x04
 215 #define CLRPHASECHG  0x02
 216 #define CLRREQINIT   0x01
 217
 218 /* SCSI status 2 */
 219 #define SOFFSET      0x20
 220 #define SEMPTY       0x10
 221 #define SFULL        0x08
 222 #define SFCNT        0x07    /* mask */
 223
 224 /* SCSI status 3 */
 225 #define SCSICNT      0xf0    /* mask */
 226 #define SCSICNT_     4
 227 #define OFFCNT       0x0f    /* mask */
 228
 229 /* SCSI TEST control */
 230 #define SCTESTU      0x08
 231 #define SCTESTD      0x04
 232 #define STCTEST      0x01
 233
 234 /* SCSI status 4 */
 235 #define SYNCERR      0x04
 236 #define FWERR        0x02
 237 #define FRERR        0x01
 238
 239 #define CLRSYNCERR   0x04
 240 #define CLRFWERR     0x02
 241 #define CLRFRERR     0x01
 242
 243 /* SCSI interrupt mode 0 */
 244 #define ENSELDO      0x40
 245 #define ENSELDI      0x20
 246 #define ENSELINGO    0x10
 247 #define ENSWRAP      0x08
 248 #define ENSDONE      0x04
 249 #define ENSPIORDY    0x02
 250 #define ENDMADONE    0x01
 251
 252 /* SCSI interrupt mode 1 */
 253 #define ENSELTIMO    0x80
 254 #define ENATNTARG    0x40
 255 #define ENSCSIRST    0x20
 256 #define ENPHASEMIS   0x10
 257 #define ENBUSFREE    0x08
 258 #define ENSCSIPERR   0x04
 259 #define ENPHASECHG   0x02
 260 #define ENREQINIT    0x01
 261
 262 /* DMA control 0 */
 263 #define ENDMA        0x80
 264 #define _8BIT        0x40
 265 #define DMA          0x20
 266 #define WRITE_READ   0x08
 267 #define INTEN        0x04
 268 #define RSTFIFO      0x02
 269 #define SWINT        0x01
 270
 271 /* DMA control 1 */
 272 #define PWRDWN       0x80
 273 #define STK          0x07    /* mask */
 274
 275 /* DMA status */
 276 #define ATDONE       0x80
 277 #define WORDRDY      0x40
 278 #define INTSTAT      0x20
 279 #define DFIFOFULL    0x10
 280 #define DFIFOEMP     0x08
 281
 282 /* BURST control */
 283 #define BON          0xf0
 284 #define BOFF         0x0f
 285
 286 /* TEST REGISTER */
 287 #define BOFFTMR      0x40
 288 #define BONTMR       0x20
 289 #define STCNTH       0x10
 290 #define STCNTM       0x08
 291 #define STCNTL       0x04
 292 #define SCSIBLK      0x02
 293 #define DMABLK       0x01
 294
 295 /* On the AHA-152x board PORTA and PORTB contain
 296    some information about the board's configuration. */
 297 typedef union {
 298   struct {
 299     unsigned reserved:2;    /* reserved */
 300     unsigned tardisc:1;     /* Target disconnect: 0=disabled, 1=enabled */
 301     unsigned syncneg:1;     /* Initial sync neg: 0=disabled, 1=enabled */
 302     unsigned msgclasses:2;  /* Message classes
 303                                  0=#4
 304                                  1=#0, #1, #2, #3, #4
 305                                  2=#0, #3, #4
 306                                  3=#0, #4
 307                              */
 308     unsigned boot:1;        /* boot: 0=disabled, 1=enabled */
 309     unsigned dma:1;         /* Transfer mode: 0=PIO; 1=DMA */
 310     unsigned id:3;          /* SCSI-id */
 311     unsigned irq:2;         /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
 312     unsigned dmachan:2;     /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
 313     unsigned parity:1;      /* SCSI-parity: 1=enabled 0=disabled */
 314   } fields;
 315   unsigned short port;
 316 } aha152x_config ;
 317
 318 #define cf_parity     fields.parity
 319 #define cf_dmachan    fields.dmachan
 320 #define cf_irq        fields.irq
 321 #define cf_id         fields.id
 322 #define cf_dma        fields.dma
 323 #define cf_boot       fields.boot
 324 #define cf_msgclasses fields.msgclasses
 325 #define cf_syncneg    fields.syncneg
 326 #define cf_tardisc    fields.tardisc
 327 #define cf_port       port
 328
 329 /* Some macros to manipulate ports and their bits */
 330
 331 #define SETPORT(PORT, VAL)      outb( (VAL), (PORT) )
 332 #define GETPORT(PORT)           inb( PORT )
 333 #define SETBITS(PORT, BITS)     outb( (inb(PORT) | (BITS)), (PORT) )
 334 #define CLRBITS(PORT, BITS)     outb( (inb(PORT) & ~(BITS)), (PORT) )
 335 #define TESTHI(PORT, BITS)      ((inb(PORT) & (BITS)) == (BITS))
 336 #define TESTLO(PORT, BITS)      ((inb(PORT) & (BITS)) == 0)
 337
 338 #define SETRATE(RATE)           SETPORT(SCSIRATE,(RATE) & 0x7f)
 339
 340 #if defined(AHA152X_DEBUG)
 341 enum {
 342   debug_procinfo  = 0x0001,
 343   debug_queue     = 0x0002,
 344   debug_locks     = 0x0004,
 345   debug_intr      = 0x0008,
 346   debug_selection = 0x0010,
 347   debug_msgo      = 0x0020,
 348   debug_msgi      = 0x0040,
 349   debug_status    = 0x0080,
 350   debug_cmd       = 0x0100,
 351   debug_datai     = 0x0200,
 352   debug_datao     = 0x0400,
 353   debug_eh        = 0x0800,
 354   debug_done      = 0x1000,
 355   debug_phases    = 0x2000,
 356 };
 357 #endif
 358
 359 #endif /* _AHA152X_H */