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- Kai Germaschewski: ISDN update (including Makefiles)
[davej-history.git] / drivers / scsi / NCR53c406a.c
blob5069c33cb74b2d33986155e3740cde3d54deceb1
1 /*
2 * NCR53c406.c
3 * Low-level SCSI driver for NCR53c406a chip.
4 * Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
5 *
6 * LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 * Specify IRQ = 0 for non-interrupt driven mode.
8 * FASTPIO = 1 for fast pio mode, 0 for slow mode.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2, or (at your option) any
13 * later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 */
21
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
24
25 /* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
26 #define USE_PIO 1
27
28 #define USE_BIOS 0
29 /* #define BIOS_ADDR 0xD8000 */ /* define this if autoprobe fails */
30 /* #define PORT_BASE 0x330 */ /* define this if autoprobe fails */
31 /* #define IRQ_LEV 0 */ /* define this if autoprobe fails */
32 #define DMA_CHAN 5 /* this is ignored if DMA is disabled */
33
34 /* Set this to 0 if you encounter kernel lockups while transferring
35 * data in PIO mode */
36 #define USE_FAST_PIO 1
37
38 /* ============= End of user configurable parameters ============= */
39
40 #include <linux/module.h>
41
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/sched.h>
45 #include <linux/interrupt.h>
46 #include <linux/proc_fs.h>
47 #include <linux/stat.h>
48 #include <linux/init.h>
49 #include <asm/io.h>
50 #include <asm/dma.h>
51 #include <asm/bitops.h>
52 #include <asm/irq.h>
53
54 #include <linux/blk.h>
55 #include <linux/spinlock.h>
56 #include "scsi.h"
57 #include "hosts.h"
58 #include "sd.h"
59
60 #include "NCR53c406a.h"
61
62 /* ============================================================= */
63
64 #define WATCHDOG 5000000
65
66 #define SYNC_MODE 0 /* Synchronous transfer mode */
67
68 #if DEBUG
69 #undef NCR53C406A_DEBUG
70 #define NCR53C406A_DEBUG 1
71 #endif
72
73 #if USE_PIO
74 #define USE_DMA 0
75 #else
76 #define USE_DMA 1
77 #endif
78
79 /* Default configuration */
80 #define C1_IMG 0x07 /* ID=7 */
81 #define C2_IMG 0x48 /* FE SCSI2 */
82 #if USE_DMA
83 #define C3_IMG 0x21 /* CDB TE */
84 #else
85 #define C3_IMG 0x20 /* CDB */
86 #endif
87 #define C4_IMG 0x04 /* ANE */
88 #define C5_IMG 0xb6 /* AA PI SIE POL */
89
90 #define REG0 (outb(C4_IMG, CONFIG4))
91 #define REG1 (outb(C5_IMG, CONFIG5))
92
93 #if NCR53C406A_DEBUG
94 #define DEB(x) x
95 #else
96 #define DEB(x)
97 #endif
98
99 #if VERBOSE_NCR53C406A_DEBUG
100 #define VDEB(x) x
101 #else
102 #define VDEB(x)
103 #endif
104
105 #define LOAD_DMA_COUNT(count) \
106 outb(count & 0xff, TC_LSB); \
107 outb((count >> 8) & 0xff, TC_MSB); \
108 outb((count >> 16) & 0xff, TC_HIGH);
109
110 /* Chip commands */
111 #define DMA_OP 0x80
112
113 #define SCSI_NOP 0x00
114 #define FLUSH_FIFO 0x01
115 #define CHIP_RESET 0x02
116 #define SCSI_RESET 0x03
117 #define RESELECT 0x40
118 #define SELECT_NO_ATN 0x41
119 #define SELECT_ATN 0x42
120 #define SELECT_ATN_STOP 0x43
121 #define ENABLE_SEL 0x44
122 #define DISABLE_SEL 0x45
123 #define SELECT_ATN3 0x46
124 #define RESELECT3 0x47
125 #define TRANSFER_INFO 0x10
126 #define INIT_CMD_COMPLETE 0x11
127 #define MSG_ACCEPT 0x12
128 #define TRANSFER_PAD 0x18
129 #define SET_ATN 0x1a
130 #define RESET_ATN 0x1b
131 #define SEND_MSG 0x20
132 #define SEND_STATUS 0x21
133 #define SEND_DATA 0x22
134 #define DISCONN_SEQ 0x23
135 #define TERMINATE_SEQ 0x24
136 #define TARG_CMD_COMPLETE 0x25
137 #define DISCONN 0x27
138 #define RECV_MSG 0x28
139 #define RECV_CMD 0x29
140 #define RECV_DATA 0x2a
141 #define RECV_CMD_SEQ 0x2b
142 #define TARGET_ABORT_DMA 0x04
143
144 /*----------------------------------------------------------------*/
145 /* the following will set the monitor border color (useful to find
146 where something crashed or gets stuck at */
147 /* 1 = blue
148 2 = green
149 3 = cyan
150 4 = red
151 5 = magenta
152 6 = yellow
153 7 = white
154 */
155
156 #if NCR53C406A_DEBUG
157 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
158 #else
159 #define rtrc(i) {}
160 #endif
161 /*----------------------------------------------------------------*/
162
163 enum Phase {
164 idle,
165 data_out,
166 data_in,
167 command_ph,
168 status_ph,
169 message_out,
170 message_in
171 };
172
173 /* Static function prototypes */
174 static void NCR53c406a_intr(int, void *, struct pt_regs *);
175 static void do_NCR53c406a_intr(int, void *, struct pt_regs *);
176 static void internal_done(Scsi_Cmnd *);
177 static void wait_intr(void);
178 static void chip_init(void);
179 static void calc_port_addr(void);
180 #ifndef IRQ_LEV
181 static int irq_probe(void);
182 #endif
183
184 /* ================================================================= */
185
186 #if USE_BIOS
187 static void *bios_base = (void *)0;
188 #endif
189
190 #if PORT_BASE
191 static int port_base = PORT_BASE;
192 #else
193 static int port_base = 0;
194 #endif
195
196 #if IRQ_LEV
197 static int irq_level = IRQ_LEV;
198 #else
199 static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized'*/
200 #endif
201
202 #if USE_DMA
203 static int dma_chan = 0;
204 #endif
205
206 #if USE_PIO
207 static int fast_pio = USE_FAST_PIO;
208 #endif
209
210 static Scsi_Cmnd *current_SC = NULL;
211 static volatile int internal_done_flag = 0;
212 static volatile int internal_done_errcode = 0;
213 static char info_msg[256];
214
215 /* ================================================================= */
216
217 /* possible BIOS locations */
218 #if USE_BIOS
219 static void *addresses[] = {
220 (void *)0xd8000,
221 (void *)0xc8000
222 };
223 #define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))
224 #endif USE_BIOS
225
226 /* possible i/o port addresses */
227 static unsigned short ports[] =
228 { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
229 #define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))
230
231 /* possible interrupt channels */
232 static unsigned short intrs[] = { 10, 11, 12, 15 };
233 #define INTR_COUNT (sizeof( intrs ) / sizeof( unsigned short ))
234
235 /* signatures for NCR 53c406a based controllers */
236 #if USE_BIOS
237 struct signature {
238 char *signature;
239 int sig_offset;
240 int sig_length;
241 } signatures[] __initdata = {
242 /* 1 2 3 4 5 6 */
243 /* 123456789012345678901234567890123456789012345678901234567890 */
244 { "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82 },
245 };
246 #define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))
247 #endif USE_BIOS
248
249 /* ============================================================ */
250
251 /* Control Register Set 0 */
252 static int TC_LSB; /* transfer counter lsb */
253 static int TC_MSB; /* transfer counter msb */
254 static int SCSI_FIFO; /* scsi fifo register */
255 static int CMD_REG; /* command register */
256 static int STAT_REG; /* status register */
257 static int DEST_ID; /* selection/reselection bus id */
258 static int INT_REG; /* interrupt status register */
259 static int SRTIMOUT; /* select/reselect timeout reg */
260 static int SEQ_REG; /* sequence step register */
261 static int SYNCPRD; /* synchronous transfer period */
262 static int FIFO_FLAGS; /* indicates # of bytes in fifo */
263 static int SYNCOFF; /* synchronous offset register */
264 static int CONFIG1; /* configuration register */
265 static int CLKCONV; /* clock conversion reg */
266 /*static int TESTREG;*/ /* test mode register */
267 static int CONFIG2; /* Configuration 2 Register */
268 static int CONFIG3; /* Configuration 3 Register */
269 static int CONFIG4; /* Configuration 4 Register */
270 static int TC_HIGH; /* Transfer Counter High */
271 /*static int FIFO_BOTTOM;*/ /* Reserve FIFO byte register */
272
273 /* Control Register Set 1 */
274 /*static int JUMPER_SENSE;*/ /* Jumper sense port reg (r/w) */
275 /*static int SRAM_PTR;*/ /* SRAM address pointer reg (r/w) */
276 /*static int SRAM_DATA;*/ /* SRAM data register (r/w) */
277 static int PIO_FIFO; /* PIO FIFO registers (r/w) */
278 /*static int PIO_FIFO1;*/ /* */
279 /*static int PIO_FIFO2;*/ /* */
280 /*static int PIO_FIFO3;*/ /* */
281 static int PIO_STATUS; /* PIO status (r/w) */
282 /*static int ATA_CMD;*/ /* ATA command/status reg (r/w) */
283 /*static int ATA_ERR;*/ /* ATA features/error register (r/w)*/
284 static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */
285 static int CONFIG5; /* Configuration 5 register (r/w) */
286 /*static int SIGNATURE;*/ /* Signature Register (r) */
287 /*static int CONFIG6;*/ /* Configuration 6 register (r) */
288
289 /* ============================================================== */
290
291 #if USE_DMA
292 static __inline__ int
293 NCR53c406a_dma_setup (unsigned char *ptr,
294 unsigned int count,
295 unsigned char mode) {
296 unsigned limit;
297 unsigned long flags = 0;
298
299 VDEB(printk("dma: before count=%d ", count));
300 if (dma_chan <=3) {
301 if (count > 65536)
302 count = 65536;
303 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
304 } else {
305 if (count > (65536<<1))
306 count = (65536<<1);
307 limit = (65536<<1) - (((unsigned) ptr) & 0x1FFFF);
308 }
309
310 if (count > limit) count = limit;
311
312 VDEB(printk("after count=%d\n", count));
313 if ((count & 1) || (((unsigned) ptr) & 1))
314 panic ("NCR53c406a: attempted unaligned DMA transfer\n");
315
316 flags=claim_dma_lock();
317 disable_dma(dma_chan);
318 clear_dma_ff(dma_chan);
319 set_dma_addr(dma_chan, (long) ptr);
320 set_dma_count(dma_chan, count);
321 set_dma_mode(dma_chan, mode);
322 enable_dma(dma_chan);
323 release_dma_lock(flags);
324
325 return count;
326 }
327
328 static __inline__ int
329 NCR53c406a_dma_write(unsigned char *src, unsigned int count) {
330 return NCR53c406a_dma_setup (src, count, DMA_MODE_WRITE);
331 }
332
333 static __inline__ int
334 NCR53c406a_dma_read(unsigned char *src, unsigned int count) {
335 return NCR53c406a_dma_setup (src, count, DMA_MODE_READ);
336 }
337
338 static __inline__ int
339 NCR53c406a_dma_residual (void) {
340 register int tmp;
341 unsigned long flags;
342
343 flags=claim_dma_lock();
344 clear_dma_ff(dma_chan);
345 tmp = get_dma_residue(dma_chan);
346 release_dma_lock(flags);
347
348 return tmp;
349 }
350 #endif USE_DMA
351
352 #if USE_PIO
353 static __inline__ int NCR53c406a_pio_read(unsigned char *request,
354 unsigned int reqlen)
355 {
356 int i;
357 int len; /* current scsi fifo size */
358 unsigned long flags = 0;
359
360 REG1;
361 while (reqlen) {
362 i = inb(PIO_STATUS);
363 /* VDEB(printk("pio_status=%x\n", i)); */
364 if (i & 0x80)
365 return 0;
366
367 switch( i & 0x1e ) {
368 default:
369 case 0x10:
370 len=0; break;
371 case 0x0:
372 len=1; break;
373 case 0x8:
374 len=42; break;
375 case 0xc:
376 len=84; break;
377 case 0xe:
378 len=128; break;
379 }
380
381 if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */
382 return 0;
383 }
384
385 if (len) {
386 if( len > reqlen )
387 len = reqlen;
388
389 save_flags(flags);
390 cli();
391 if( fast_pio && len > 3 ) {
392 insl(PIO_FIFO,request,len>>2);
393 request += len & 0xfc;
394 reqlen -= len & 0xfc;
395 }
396 else {
397 while(len--) {
398 *request++ = inb(PIO_FIFO);
399 reqlen--;
400 }
401 }
402 restore_flags(flags);
403 }
404 }
405 return 0;
406 }
407
408 static __inline__ int NCR53c406a_pio_write(unsigned char *request,
409 unsigned int reqlen)
410 {
411 int i = 0;
412 int len; /* current scsi fifo size */
413 unsigned long flags = 0;
414
415 REG1;
416 while (reqlen && !(i&0x40)) {
417 i = inb(PIO_STATUS);
418 /* VDEB(printk("pio_status=%x\n", i)); */
419 if (i & 0x80) /* error */
420 return 0;
421
422 switch( i & 0x1e ) {
423 case 0x10:
424 len=128; break;
425 case 0x0:
426 len=84; break;
427 case 0x8:
428 len=42; break;
429 case 0xc:
430 len=1; break;
431 default:
432 case 0xe:
433 len=0; break;
434 }
435
436 if (len) {
437 if( len > reqlen )
438 len = reqlen;
439
440 save_flags(flags);
441 cli();
442 if( fast_pio && len > 3 ) {
443 outsl(PIO_FIFO,request,len>>2);
444 request += len & 0xfc;
445 reqlen -= len & 0xfc;
446 }
447 else {
448 while(len--) {
449 outb(*request++, PIO_FIFO);
450 reqlen--;
451 }
452 }
453 restore_flags(flags);
454 }
455 }
456 return 0;
457 }
458 #endif USE_PIO
459
460 int __init
461 NCR53c406a_detect(Scsi_Host_Template * tpnt){
462 struct Scsi_Host *shpnt;
463 #ifndef PORT_BASE
464 int i;
465 #endif
466
467 #if USE_BIOS
468 int ii, jj;
469 bios_base = 0;
470 /* look for a valid signature */
471 for( ii=0; ii < ADDRESS_COUNT && !bios_base; ii++)
472 for( jj=0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
473 if(!memcmp((void *) addresses[ii]+signatures[jj].sig_offset,
474 (void *) signatures[jj].signature,
475 (int) signatures[jj].sig_length))
476 bios_base=addresses[ii];
477
478 if(!bios_base){
479 printk("NCR53c406a: BIOS signature not found\n");
480 return 0;
481 }
482
483 DEB(printk("NCR53c406a BIOS found at %X\n", (unsigned int) bios_base););
484 #endif USE_BIOS
485
486 #ifdef PORT_BASE
487 if (check_region(port_base, 0x10)) /* ports already snatched */
488 port_base = 0;
489
490 #else /* autodetect */
491 if (port_base) { /* LILO override */
492 if (check_region(port_base, 0x10))
493 port_base = 0;
494 }
495 else {
496 for(i=0; i<PORT_COUNT && !port_base; i++){
497 if(check_region(ports[i], 0x10)){
498 DEB(printk("NCR53c406a: port %x in use\n", ports[i]));
499 }
500 else {
501 VDEB(printk("NCR53c406a: port %x available\n", ports[i]));
502 outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */
503 if( (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
504 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7
505 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58 ) {
506 VDEB(printk("NCR53c406a: Sig register valid\n"));
507 VDEB(printk("port_base=%x\n", port_base));
508 port_base = ports[i];
509 }
510 }
511 }
512 }
513 #endif PORT_BASE
514
515 if(!port_base){ /* no ports found */
516 printk("NCR53c406a: no available ports found\n");
517 return 0;
518 }
519
520 DEB(printk("NCR53c406a detected\n"));
521
522 calc_port_addr();
523 chip_init();
524
525 #ifndef IRQ_LEV
526 if (irq_level < 0) { /* LILO override if >= 0*/
527 irq_level=irq_probe();
528 if (irq_level < 0) { /* Trouble */
529 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
530 return 0;
531 }
532 }
533 #endif
534
535 DEB(printk("NCR53c406a: using port_base %x\n", port_base));
536 request_region(port_base, 0x10, "NCR53c406a");
537
538 if(irq_level > 0) {
539 if(request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", NULL)){
540 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
541 return 0;
542 }
543 tpnt->can_queue = 1;
544 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
545 }
546 else if (irq_level == 0) {
547 tpnt->can_queue = 0;
548 DEB(printk("NCR53c406a: No interrupts detected\n"));
549 #if USE_DMA
550 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
551 return 0;
552 #endif USE_DMA
553 }
554 else {
555 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
556 return 0;
557 }
558
559 #if USE_DMA
560 dma_chan = DMA_CHAN;
561 if(request_dma(dma_chan, "NCR53c406a") != 0){
562 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
563 return 0;
564 }
565
566 DEB(printk("Allocated DMA channel %d\n", dma_chan));
567 #endif USE_DMA
568
569 tpnt->present = 1;
570 tpnt->proc_name = "NCR53c406a";
571
572 shpnt = scsi_register(tpnt, 0);
573 shpnt->irq = irq_level;
574 shpnt->io_port = port_base;
575 shpnt->n_io_port = 0x10;
576 #if USE_DMA
577 shpnt->dma = dma_chan;
578 #endif
579
580 #if USE_DMA
581 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.",
582 port_base, irq_level, dma_chan);
583 #else
584 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.",
585 port_base, irq_level, fast_pio ? "fast" : "slow");
586 #endif
587
588 return (tpnt->present);
589 }
590
591 /* called from init/main.c */
592 void __init NCR53c406a_setup(char *str, int *ints)
593 {
594 static size_t setup_idx = 0;
595 size_t i;
596
597 DEB(printk("NCR53c406a: Setup called\n"););
598
599 if (setup_idx >= PORT_COUNT - 1) {
600 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
601 return;
602 }
603 if (ints[0] < 1 || ints[0] > 3) {
604 printk("NCR53c406a: Malformed command line\n");
605 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
606 return;
607 }
608 for (i = 0; i < PORT_COUNT && !port_base; i++)
609 if (ports[i] == ints[1]) {
610 port_base = ints[1];
611 DEB(printk("NCR53c406a: Specified port_base 0x%X\n", port_base);)
612 }
613 if (!port_base) {
614 printk("NCR53c406a: Invalid PORTBASE 0x%X specified\n", ints[1]);
615 return;
616 }
617
618 if (ints[0] > 1) {
619 if (ints[2] == 0) {
620 irq_level = 0;
621 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);)
622 }
623 else
624 for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
625 if (intrs[i] == ints[2]) {
626 irq_level = ints[2];
627 DEB(printk("NCR53c406a: Specified irq %d\n", port_base);)
628 }
629 if (irq_level < 0)
630 printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
631 }
632
633 if (ints[0] > 2)
634 fast_pio = ints[3];
635
636 DEB(printk("NCR53c406a: port_base=0x%X, irq=%d, fast_pio=%d\n",
637 port_base, irq_level, fast_pio);)
638 }
639
640 const char*
641 NCR53c406a_info(struct Scsi_Host *SChost){
642 DEB(printk("NCR53c406a_info called\n"));
643 return (info_msg);
644 }
645
646 static void internal_done(Scsi_Cmnd *SCpnt) {
647 internal_done_errcode = SCpnt->result;
648 ++internal_done_flag;
649 }
650
651
652 static void wait_intr() {
653 int i = jiffies + WATCHDOG;
654
655 while(time_after(i,jiffies) && !(inb(STAT_REG)&0xe0)) /* wait for a pseudo-interrupt */
656 barrier();
657
658 if (time_before_eq(i,jiffies)) { /* Timed out */
659 rtrc(0);
660 current_SC->result = DID_TIME_OUT << 16;
661 current_SC->SCp.phase = idle;
662 current_SC->scsi_done(current_SC);
663 return;
664 }
665
666 NCR53c406a_intr(0, NULL, NULL);
667 }
668
669 int NCR53c406a_command(Scsi_Cmnd *SCpnt){
670 DEB(printk("NCR53c406a_command called\n"));
671 NCR53c406a_queue(SCpnt, internal_done);
672 if(irq_level)
673 while (!internal_done_flag);
674 else /* interrupts not supported */
675 while (!internal_done_flag)
676 wait_intr();
677
678 internal_done_flag = 0;
679 return internal_done_errcode;
680 }
681
682
683 int
684 NCR53c406a_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)){
685 int i;
686 unsigned long flags = 0;
687
688 VDEB(printk("NCR53c406a_queue called\n"));
689 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n",
690 SCpnt->cmnd[0],
691 SCpnt->cmd_len,
692 SCpnt->target,
693 SCpnt->lun,
694 SCpnt->request_bufflen));
695
696 #if 0
697 VDEB(for(i=0; i<SCpnt->cmd_len; i++)
698 printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
699 VDEB(printk("\n"));
700 #endif
701
702 current_SC = SCpnt;
703 current_SC->scsi_done = done;
704 current_SC->SCp.phase = command_ph;
705 current_SC->SCp.Status = 0;
706 current_SC->SCp.Message = 0;
707
708 save_flags(flags);
709 cli();
710 REG0;
711 outb(SCpnt->target, DEST_ID); /* set destination */
712 outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
713
714 for(i=0; i<SCpnt->cmd_len; i++){
715 outb(SCpnt->cmnd[i], SCSI_FIFO);
716 }
717 outb(SELECT_NO_ATN, CMD_REG);
718 restore_flags(flags);
719
720 rtrc(1);
721 return 0;
722 }
723
724 int
725 NCR53c406a_abort(Scsi_Cmnd *SCpnt){
726 DEB(printk("NCR53c406a_abort called\n"));
727 return SCSI_ABORT_SNOOZE; /* Don't know how to abort */
728 }
729
730 int
731 NCR53c406a_reset(Scsi_Cmnd *SCpnt, unsigned int ignored){
732 DEB(printk("NCR53c406a_reset called\n"));
733 outb(C4_IMG, CONFIG4); /* Select reg set 0 */
734 outb(CHIP_RESET, CMD_REG);
735 outb(SCSI_NOP, CMD_REG); /* required after reset */
736 outb(SCSI_RESET, CMD_REG);
737 chip_init();
738
739 rtrc(2);
740 if (irq_level)
741 return SCSI_RESET_PENDING; /* should get an interrupt */
742 else
743 return SCSI_RESET_WAKEUP; /* won't get any interrupts */
744 }
745
746 int
747 NCR53c406a_biosparm(Scsi_Disk *disk, kdev_t dev, int* info_array){
748 int size;
749
750 DEB(printk("NCR53c406a_biosparm called\n"));
751
752 size = disk->capacity;
753 info_array[0] = 64; /* heads */
754 info_array[1] = 32; /* sectors */
755 info_array[2] = size>>11; /* cylinders */
756 if (info_array[2] > 1024) { /* big disk */
757 info_array[0] = 255;
758 info_array[1] = 63;
759 info_array[2] = size / (255*63);
760 }
761 return 0;
762 }
763
764 static void
765 do_NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){
766 unsigned long flags;
767
768 spin_lock_irqsave(&io_request_lock, flags);
769 NCR53c406a_intr(0, dev_id, regs);
770 spin_unlock_irqrestore(&io_request_lock, flags);
771 }
772
773 static void
774 NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){
775 DEB(unsigned char fifo_size;)
776 DEB(unsigned char seq_reg;)
777 unsigned char status, int_reg;
778 unsigned long flags = 0;
779 #if USE_PIO
780 unsigned char pio_status;
781 struct scatterlist *sglist;
782 unsigned int sgcount;
783 #endif
784
785 VDEB(printk("NCR53c406a_intr called\n"));
786
787 save_flags(flags);
788 cli();
789 #if USE_PIO
790 REG1;
791 pio_status = inb(PIO_STATUS);
792 #endif
793 REG0;
794 status = inb(STAT_REG);
795 DEB(seq_reg = inb(SEQ_REG));
796 int_reg = inb(INT_REG);
797 DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
798 restore_flags(flags);
799
800 #if NCR53C406A_DEBUG
801 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x",
802 status, seq_reg, int_reg, fifo_size);
803 #if (USE_DMA)
804 printk("\n");
805 #else
806 printk(", pio=%02x\n", pio_status);
807 #endif USE_DMA
808 #endif NCR53C406A_DEBUG
809
810 if(int_reg & 0x80){ /* SCSI reset intr */
811 rtrc(3);
812 DEB(printk("NCR53c406a: reset intr received\n"));
813 current_SC->SCp.phase = idle;
814 current_SC->result = DID_RESET << 16;
815 current_SC->scsi_done(current_SC);
816 return;
817 }
818
819 #if USE_PIO
820 if(pio_status & 0x80) {
821 printk("NCR53C406A: Warning: PIO error!\n");
822 current_SC->SCp.phase = idle;
823 current_SC->result = DID_ERROR << 16;
824 current_SC->scsi_done(current_SC);
825 return;
826 }
827 #endif USE_PIO
828
829 if(status & 0x20) { /* Parity error */
830 printk("NCR53c406a: Warning: parity error!\n");
831 current_SC->SCp.phase = idle;
832 current_SC->result = DID_PARITY << 16;
833 current_SC->scsi_done(current_SC);
834 return;
835 }
836
837 if(status & 0x40) { /* Gross error */
838 printk("NCR53c406a: Warning: gross error!\n");
839 current_SC->SCp.phase = idle;
840 current_SC->result = DID_ERROR << 16;
841 current_SC->scsi_done(current_SC);
842 return;
843 }
844
845 if(int_reg & 0x20){ /* Disconnect */
846 DEB(printk("NCR53c406a: disconnect intr received\n"));
847 if(current_SC->SCp.phase != message_in){ /* Unexpected disconnect */
848 current_SC->result = DID_NO_CONNECT << 16;
849 }
850 else{ /* Command complete, return status and message */
851 current_SC->result = (current_SC->SCp.Status & 0xff)
852 | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
853 }
854
855 rtrc(0);
856 current_SC->SCp.phase = idle;
857 current_SC->scsi_done( current_SC );
858 return;
859 }
860
861 switch(status & 0x07){ /* scsi phase */
862 case 0x00: /* DATA-OUT */
863 if(int_reg & 0x10){ /* Target requesting info transfer */
864 rtrc(5);
865 current_SC->SCp.phase = data_out;
866 VDEB(printk("NCR53c406a: Data-Out phase\n"));
867 outb(FLUSH_FIFO, CMD_REG);
868 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
869 #if USE_DMA /* No s/g support for DMA */
870 NCR53c406a_dma_write(current_SC->request_buffer,
871 current_SC->request_bufflen);
872 #endif USE_DMA
873 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
874 #if USE_PIO
875 if (!current_SC->use_sg) /* Don't use scatter-gather */
876 NCR53c406a_pio_write(current_SC->request_buffer,
877 current_SC->request_bufflen);
878 else { /* use scatter-gather */
879 sgcount = current_SC->use_sg;
880 sglist = current_SC->request_buffer;
881 while( sgcount-- ) {
882 NCR53c406a_pio_write(sglist->address, sglist->length);
883 sglist++;
884 }
885 }
886 REG0;
887 #endif USE_PIO
888 }
889 break;
890
891 case 0x01: /* DATA-IN */
892 if(int_reg & 0x10){ /* Target requesting info transfer */
893 rtrc(6);
894 current_SC->SCp.phase = data_in;
895 VDEB(printk("NCR53c406a: Data-In phase\n"));
896 outb(FLUSH_FIFO, CMD_REG);
897 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
898 #if USE_DMA /* No s/g support for DMA */
899 NCR53c406a_dma_read(current_SC->request_buffer,
900 current_SC->request_bufflen);
901 #endif USE_DMA
902 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
903 #if USE_PIO
904 if (!current_SC->use_sg) /* Don't use scatter-gather */
905 NCR53c406a_pio_read(current_SC->request_buffer,
906 current_SC->request_bufflen);
907 else { /* Use scatter-gather */
908 sgcount = current_SC->use_sg;
909 sglist = current_SC->request_buffer;
910 while( sgcount-- ) {
911 NCR53c406a_pio_read(sglist->address, sglist->length);
912 sglist++;
913 }
914 }
915 REG0;
916 #endif USE_PIO
917 }
918 break;
919
920 case 0x02: /* COMMAND */
921 current_SC->SCp.phase = command_ph;
922 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
923 break;
924
925 case 0x03: /* STATUS */
926 rtrc(7);
927 current_SC->SCp.phase = status_ph;
928 VDEB(printk("NCR53c406a: Status phase\n"));
929 outb(FLUSH_FIFO, CMD_REG);
930 outb(INIT_CMD_COMPLETE, CMD_REG);
931 break;
932
933 case 0x04: /* Reserved */
934 case 0x05: /* Reserved */
935 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
936 break;
937
938 case 0x06: /* MESSAGE-OUT */
939 DEB(printk("NCR53c406a: Message-Out phase\n"));
940 current_SC->SCp.phase = message_out;
941 outb(SET_ATN, CMD_REG); /* Reject the message */
942 outb(MSG_ACCEPT, CMD_REG);
943 break;
944
945 case 0x07: /* MESSAGE-IN */
946 rtrc(4);
947 VDEB(printk("NCR53c406a: Message-In phase\n"));
948 current_SC->SCp.phase = message_in;
949
950 current_SC->SCp.Status = inb(SCSI_FIFO);
951 current_SC->SCp.Message = inb(SCSI_FIFO);
952
953 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
954 DEB(printk("Status = %02x Message = %02x\n",
955 current_SC->SCp.Status, current_SC->SCp.Message));
956
957 if(current_SC->SCp.Message == SAVE_POINTERS ||
958 current_SC->SCp.Message == DISCONNECT) {
959 outb(SET_ATN, CMD_REG); /* Reject message */
960 DEB(printk("Discarding SAVE_POINTERS message\n"));
961 }
962 outb(MSG_ACCEPT, CMD_REG);
963 break;
964 }
965 }
966
967 #ifndef IRQ_LEV
968 static int irq_probe()
969 {
970 int irqs, irq;
971 int i;
972
973 inb(INT_REG); /* clear the interrupt register */
974 irqs = probe_irq_on();
975
976 /* Invalid command will cause an interrupt */
977 REG0;
978 outb(0xff, CMD_REG);
979
980 /* Wait for the interrupt to occur */
981 i = jiffies + WATCHDOG;
982 while(time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
983 barrier();
984 if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */
985 probe_irq_off(irqs);
986 return -1;
987 }
988
989 irq = probe_irq_off(irqs);
990
991 /* Kick the chip */
992 outb(CHIP_RESET, CMD_REG);
993 outb(SCSI_NOP, CMD_REG);
994 chip_init();
995
996 return irq;
997 }
998 #endif IRQ_LEV
999
1000 static void chip_init()
1001 {
1002 REG1;
1003 #if USE_DMA
1004 outb(0x00, PIO_STATUS);
1005 #else /* USE_PIO */
1006 outb(0x01, PIO_STATUS);
1007 #endif
1008 outb(0x00, PIO_FLAG);
1009
1010 outb(C4_IMG, CONFIG4); /* REG0; */
1011 outb(C3_IMG, CONFIG3);
1012 outb(C2_IMG, CONFIG2);
1013 outb(C1_IMG, CONFIG1);
1014
1015 outb(0x05, CLKCONV); /* clock conversion factor */
1016 outb(0x9C, SRTIMOUT); /* Selection timeout */
1017 outb(0x05, SYNCPRD); /* Synchronous transfer period */
1018 outb(SYNC_MODE, SYNCOFF); /* synchronous mode */
1019 }
1020
1021 void __init calc_port_addr(void)
1022 {
1023 /* Control Register Set 0 */
1024 TC_LSB = (port_base+0x00);
1025 TC_MSB = (port_base+0x01);
1026 SCSI_FIFO = (port_base+0x02);
1027 CMD_REG = (port_base+0x03);
1028 STAT_REG = (port_base+0x04);
1029 DEST_ID = (port_base+0x04);
1030 INT_REG = (port_base+0x05);
1031 SRTIMOUT = (port_base+0x05);
1032 SEQ_REG = (port_base+0x06);
1033 SYNCPRD = (port_base+0x06);
1034 FIFO_FLAGS = (port_base+0x07);
1035 SYNCOFF = (port_base+0x07);
1036 CONFIG1 = (port_base+0x08);
1037 CLKCONV = (port_base+0x09);
1038 /* TESTREG = (port_base+0x0A); */
1039 CONFIG2 = (port_base+0x0B);
1040 CONFIG3 = (port_base+0x0C);
1041 CONFIG4 = (port_base+0x0D);
1042 TC_HIGH = (port_base+0x0E);
1043 /* FIFO_BOTTOM = (port_base+0x0F); */
1044
1045 /* Control Register Set 1 */
1046 /* JUMPER_SENSE = (port_base+0x00);*/
1047 /* SRAM_PTR = (port_base+0x01);*/
1048 /* SRAM_DATA = (port_base+0x02);*/
1049 PIO_FIFO = (port_base+0x04);
1050 /* PIO_FIFO1 = (port_base+0x05);*/
1051 /* PIO_FIFO2 = (port_base+0x06);*/
1052 /* PIO_FIFO3 = (port_base+0x07);*/
1053 PIO_STATUS = (port_base+0x08);
1054 /* ATA_CMD = (port_base+0x09);*/
1055 /* ATA_ERR = (port_base+0x0A);*/
1056 PIO_FLAG = (port_base+0x0B);
1057 CONFIG5 = (port_base+0x0D);
1058 /* SIGNATURE = (port_base+0x0E);*/
1059 /* CONFIG6 = (port_base+0x0F);*/
1060 }
1061
1062 /* Eventually this will go into an include file, but this will be later */
1063 static Scsi_Host_Template driver_template = NCR53c406a;
1064
1065 #include "scsi_module.c"
1066
1067 /*
1068 * Overrides for Emacs so that we get a uniform tabbing style.
1069 * Emacs will notice this stuff at the end of the file and automatically
1070 * adjust the settings for this buffer only. This must remain at the end
1071 * of the file.
1072 * ---------------------------------------------------------------------------
1073 * Local variables:
1074 * c-indent-level: 4
1075 * c-brace-imaginary-offset: 0
1076 * c-brace-offset: -4
1077 * c-argdecl-indent: 4
1078 * c-label-offset: -4
1079 * c-continued-statement-offset: 4
1080 * c-continued-brace-offset: 0
1081 * indent-tabs-mode: nil
1082 * tab-width: 8
1083 * End:
1084 */
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