arch/sparc64/kernel/time.c

   1 /* $Id: time.c,v 1.32 2000/09/22 23:02:13 davem Exp $
   2  * time.c: UltraSparc timer and TOD clock support.
   3  *
   4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   6  *
   7  * Based largely on code which is:
   8  *
   9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/errno.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/param.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/timex.h>
  21 #include <linux/init.h>
  22 #include <linux/ioport.h>
  23
  24 #include <asm/oplib.h>
  25 #include <asm/mostek.h>
  26 #include <asm/timer.h>
  27 #include <asm/irq.h>
  28 #include <asm/io.h>
  29 #include <asm/sbus.h>
  30 #include <asm/fhc.h>
  31 #include <asm/pbm.h>
  32 #include <asm/ebus.h>
  33 #include <asm/starfire.h>
  34
  35 extern rwlock_t xtime_lock;
  36
  37 unsigned long mstk48t02_regs = 0UL;
  38 static unsigned long mstk48t08_regs = 0UL;
  39 static unsigned long mstk48t59_regs = 0UL;
  40
  41 static int set_rtc_mmss(unsigned long);
  42
  43 /* timer_interrupt() needs to keep up the real-time clock,
  44  * as well as call the "do_timer()" routine every clocktick
  45  *
  46  * NOTE: On SUN5 systems the ticker interrupt comes in using 2
  47  *       interrupts, one at level14 and one with softint bit 0.
  48  */
  49 unsigned long timer_tick_offset;
  50 unsigned long timer_tick_compare;
  51 unsigned long timer_ticks_per_usec_quotient;
  52
  53 static __inline__ void timer_check_rtc(void)
  54 {
  55         /* last time the cmos clock got updated */
  56         static long last_rtc_update=0;
  57
  58         /* Determine when to update the Mostek clock. */
  59         if ((time_status & STA_UNSYNC) == 0 &&
  60             xtime.tv_sec > last_rtc_update + 660 &&
  61             xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
  62             xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
  63                 if (set_rtc_mmss(xtime.tv_sec) == 0)
  64                         last_rtc_update = xtime.tv_sec;
  65                 else
  66                         last_rtc_update = xtime.tv_sec - 600;
  67                         /* do it again in 60 s */
  68         }
  69 }
  70
  71 void sparc64_do_profile(unsigned long pc, unsigned long o7)
  72 {
  73         if (prof_buffer && current->pid) {
  74                 extern int _stext;
  75                 extern int rwlock_impl_begin, rwlock_impl_end;
  76                 extern int atomic_impl_begin, atomic_impl_end;
  77                 extern int __memcpy_begin, __memcpy_end;
  78                 extern int __bitops_begin, __bitops_end;
  79
  80                 if ((pc >= (unsigned long) &atomic_impl_begin &&
  81                      pc < (unsigned long) &atomic_impl_end) ||
  82                     (pc >= (unsigned long) &rwlock_impl_begin &&
  83                      pc < (unsigned long) &rwlock_impl_end) ||
  84                     (pc >= (unsigned long) &__memcpy_begin &&
  85                      pc < (unsigned long) &__memcpy_end) ||
  86                     (pc >= (unsigned long) &__bitops_begin &&
  87                      pc < (unsigned long) &__bitops_end))
  88                         pc = o7;
  89
  90                 pc -= (unsigned long) &_stext;
  91                 pc >>= prof_shift;
  92
  93                 if(pc >= prof_len)
  94                         pc = prof_len - 1;
  95                 atomic_inc((atomic_t *)&prof_buffer[pc]);
  96         }
  97 }
  98
  99 static void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 100 {
 101         unsigned long ticks, pstate;
 102
 103         write_lock(&xtime_lock);
 104
 105         do {
 106 #ifndef CONFIG_SMP
 107                 if ((regs->tstate & TSTATE_PRIV) != 0)
 108                         sparc64_do_profile(regs->tpc, regs->u_regs[UREG_RETPC]);
 109 #endif
 110                 do_timer(regs);
 111
 112                 /* Guarentee that the following sequences execute
 113                  * uninterrupted.
 114                  */
 115                 __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 116                                      "wrpr      %0, %1, %%pstate"
 117                                      : "=r" (pstate)
 118                                      : "i" (PSTATE_IE));
 119
 120                 /* Workaround for Spitfire Errata (#54 I think??), I discovered
 121                  * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 122                  * number 103640.
 123                  *
 124                  * On Blackbird writes to %tick_cmpr can fail, the
 125                  * workaround seems to be to execute the wr instruction
 126                  * at the start of an I-cache line, and perform a dummy
 127                  * read back from %tick_cmpr right after writing to it. -DaveM
 128                  *
 129                  * Just to be anal we add a workaround for Spitfire
 130                  * Errata 50 by preventing pipeline bypasses on the
 131                  * final read of the %tick register into a compare
 132                  * instruction.  The Errata 50 description states
 133                  * that %tick is not prone to this bug, but I am not
 134                  * taking any chances.
 135                  */
 136                 __asm__ __volatile__("
 137                         rd      %%tick_cmpr, %0
 138                         ba,pt   %%xcc, 1f
 139                          add    %0, %2, %0
 140                         .align  64
 141                      1: wr      %0, 0, %%tick_cmpr
 142                         rd      %%tick_cmpr, %%g0
 143                         rd      %%tick, %1
 144                         mov     %1, %1"
 145                         : "=&r" (timer_tick_compare), "=r" (ticks)
 146                         : "r" (timer_tick_offset));
 147
 148                 /* Restore PSTATE_IE. */
 149                 __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 150                                      : /* no outputs */
 151                                      : "r" (pstate));
 152         } while (ticks >= timer_tick_compare);
 153
 154         timer_check_rtc();
 155
 156         write_unlock(&xtime_lock);
 157 }
 158
 159 #ifdef CONFIG_SMP
 160 void timer_tick_interrupt(struct pt_regs *regs)
 161 {
 162         write_lock(&xtime_lock);
 163
 164         do_timer(regs);
 165
 166         /*
 167          * Only keep timer_tick_offset uptodate, but don't set TICK_CMPR.
 168          */
 169         __asm__ __volatile__("
 170                 rd      %%tick_cmpr, %0
 171                 add     %0, %1, %0"
 172                 : "=&r" (timer_tick_compare)
 173                 : "r" (timer_tick_offset));
 174
 175         timer_check_rtc();
 176
 177         write_unlock(&xtime_lock);
 178 }
 179 #endif
 180
 181 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 182 static void __init kick_start_clock(void)
 183 {
 184         unsigned long regs = mstk48t02_regs;
 185         u8 sec, tmp;
 186         int i, count;
 187
 188         prom_printf("CLOCK: Clock was stopped. Kick start ");
 189
 190         /* Turn on the kick start bit to start the oscillator. */
 191         tmp = mostek_read(regs + MOSTEK_CREG);
 192         tmp |= MSTK_CREG_WRITE;
 193         mostek_write(regs + MOSTEK_CREG, tmp);
 194         tmp = mostek_read(regs + MOSTEK_SEC);
 195         tmp &= ~MSTK_STOP;
 196         mostek_write(regs + MOSTEK_SEC, tmp);
 197         tmp = mostek_read(regs + MOSTEK_HOUR);
 198         tmp |= MSTK_KICK_START;
 199         mostek_write(regs + MOSTEK_HOUR, tmp);
 200         tmp = mostek_read(regs + MOSTEK_CREG);
 201         tmp &= ~MSTK_CREG_WRITE;
 202         mostek_write(regs + MOSTEK_CREG, tmp);
 203
 204         /* Delay to allow the clock oscillator to start. */
 205         sec = MSTK_REG_SEC(regs);
 206         for (i = 0; i < 3; i++) {
 207                 while (sec == MSTK_REG_SEC(regs))
 208                         for (count = 0; count < 100000; count++)
 209                                 /* nothing */ ;
 210                 prom_printf(".");
 211                 sec = MSTK_REG_SEC(regs);
 212         }
 213         prom_printf("\n");
 214
 215         /* Turn off kick start and set a "valid" time and date. */
 216         tmp = mostek_read(regs + MOSTEK_CREG);
 217         tmp |= MSTK_CREG_WRITE;
 218         mostek_write(regs + MOSTEK_CREG, tmp);
 219         tmp = mostek_read(regs + MOSTEK_HOUR);
 220         tmp &= ~MSTK_KICK_START;
 221         mostek_write(regs + MOSTEK_HOUR, tmp);
 222         MSTK_SET_REG_SEC(regs,0);
 223         MSTK_SET_REG_MIN(regs,0);
 224         MSTK_SET_REG_HOUR(regs,0);
 225         MSTK_SET_REG_DOW(regs,5);
 226         MSTK_SET_REG_DOM(regs,1);
 227         MSTK_SET_REG_MONTH(regs,8);
 228         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 229         tmp = mostek_read(regs + MOSTEK_CREG);
 230         tmp &= ~MSTK_CREG_WRITE;
 231         mostek_write(regs + MOSTEK_CREG, tmp);
 232
 233         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 234         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 235                 prom_printf("CLOCK: Kick start still on!\n");
 236                 tmp = mostek_read(regs + MOSTEK_CREG);
 237                 tmp |= MSTK_CREG_WRITE;
 238                 mostek_write(regs + MOSTEK_CREG, tmp);
 239
 240                 tmp = mostek_read(regs + MOSTEK_HOUR);
 241                 tmp &= ~MSTK_KICK_START;
 242                 mostek_write(regs + MOSTEK_HOUR, tmp);
 243
 244                 tmp = mostek_read(regs + MOSTEK_CREG);
 245                 tmp &= ~MSTK_CREG_WRITE;
 246                 mostek_write(regs + MOSTEK_CREG, tmp);
 247         }
 248
 249         prom_printf("CLOCK: Kick start procedure successful.\n");
 250 }
 251
 252 /* Return nonzero if the clock chip battery is low. */
 253 static int __init has_low_battery(void)
 254 {
 255         unsigned long regs = mstk48t02_regs;
 256         u8 data1, data2;
 257
 258         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 259         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 260         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 261         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 262
 263         return (data1 == data2);        /* Was the write blocked? */
 264 }
 265
 266
 267 /* Probe for the real time clock chip. */
 268 static void __init set_system_time(void)
 269 {
 270         unsigned int year, mon, day, hour, min, sec;
 271         unsigned long mregs = mstk48t02_regs;
 272         u8 tmp;
 273
 274         do_get_fast_time = do_gettimeofday;
 275
 276         if(!mregs) {
 277                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 278                 prom_halt();
 279         }
 280
 281         tmp = mostek_read(mregs + MOSTEK_CREG);
 282         tmp |= MSTK_CREG_READ;
 283         mostek_write(mregs + MOSTEK_CREG, tmp);
 284
 285         sec = MSTK_REG_SEC(mregs);
 286         min = MSTK_REG_MIN(mregs);
 287         hour = MSTK_REG_HOUR(mregs);
 288         day = MSTK_REG_DOM(mregs);
 289         mon = MSTK_REG_MONTH(mregs);
 290         year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 291         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 292         xtime.tv_usec = 0;
 293
 294         tmp = mostek_read(mregs + MOSTEK_CREG);
 295         tmp &= ~MSTK_CREG_READ;
 296         mostek_write(mregs + MOSTEK_CREG, tmp);
 297 }
 298
 299 void __init clock_probe(void)
 300 {
 301         struct linux_prom_registers clk_reg[2];
 302         char model[128];
 303         int node, busnd = -1, err;
 304         unsigned long flags;
 305 #ifdef CONFIG_PCI
 306         struct linux_ebus *ebus = NULL;
 307 #endif
 308
 309
 310         if (this_is_starfire) {
 311                 /* davem suggests we keep this within the 4M locked kernel image */
 312                 static char obp_gettod[256];
 313                 static u32 unix_tod;
 314
 315                 sprintf(obp_gettod, "h# %08x unix-gettod",
 316                         (unsigned int) (long) &unix_tod);
 317                 prom_feval(obp_gettod);
 318                 xtime.tv_sec = unix_tod;
 319                 xtime.tv_usec = 0;
 320                 return;
 321         }
 322
 323         __save_and_cli(flags);
 324
 325         if(central_bus != NULL) {
 326                 busnd = central_bus->child->prom_node;
 327         }
 328 #ifdef CONFIG_PCI
 329         else if (ebus_chain != NULL) {
 330                 ebus = ebus_chain;
 331                 busnd = ebus->prom_node;
 332         }
 333 #endif
 334         else if (sbus_root != NULL) {
 335                 busnd = sbus_root->prom_node;
 336         }
 337
 338         if(busnd == -1) {
 339                 prom_printf("clock_probe: problem, cannot find bus to search.\n");
 340                 prom_halt();
 341         }
 342
 343         node = prom_getchild(busnd);
 344
 345         while(1) {
 346                 if (!node)
 347                         model[0] = 0;
 348                 else
 349                         prom_getstring(node, "model", model, sizeof(model));
 350                 if(strcmp(model, "mk48t02") &&
 351                    strcmp(model, "mk48t08") &&
 352                    strcmp(model, "mk48t59")) {
 353                         if (node)
 354                                 node = prom_getsibling(node);
 355 #ifdef CONFIG_PCI
 356                         while ((node == 0) && ebus != NULL) {
 357                                 ebus = ebus->next;
 358                                 if (ebus != NULL) {
 359                                         busnd = ebus->prom_node;
 360                                         node = prom_getchild(busnd);
 361                                 }
 362                         }
 363 #endif
 364                         if(node == 0) {
 365                                 prom_printf("clock_probe: Cannot find timer chip\n");
 366                                 prom_halt();
 367                         }
 368                         continue;
 369                 }
 370
 371                 err = prom_getproperty(node, "reg", (char *)clk_reg,
 372                                        sizeof(clk_reg));
 373                 if(err == -1) {
 374                         prom_printf("clock_probe: Cannot get Mostek reg property\n");
 375                         prom_halt();
 376                 }
 377
 378                 if(central_bus) {
 379                         apply_fhc_ranges(central_bus->child, clk_reg, 1);
 380                         apply_central_ranges(central_bus, clk_reg, 1);
 381                 }
 382 #ifdef CONFIG_PCI
 383                 else if (ebus_chain != NULL) {
 384                         struct linux_ebus_device *edev;
 385
 386                         for_each_ebusdev(edev, ebus)
 387                                 if (edev->prom_node == node)
 388                                         break;
 389                         if (edev == NULL) {
 390                                 prom_printf("%s: Mostek not probed by EBUS\n",
 391                                             __FUNCTION__);
 392                                 prom_halt();
 393                         }
 394
 395                         mstk48t59_regs = edev->resource[0].start;
 396                         mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 397                         break;
 398                 }
 399 #endif
 400                 else {
 401                         if (sbus_root->num_sbus_ranges) {
 402                                 int nranges = sbus_root->num_sbus_ranges;
 403                                 int rngc;
 404
 405                                 for (rngc = 0; rngc < nranges; rngc++)
 406                                         if (clk_reg[0].which_io ==
 407                                             sbus_root->sbus_ranges[rngc].ot_child_space)
 408                                                 break;
 409                                 if (rngc == nranges) {
 410                                         prom_printf("clock_probe: Cannot find ranges for "
 411                                                     "clock regs.\n");
 412                                         prom_halt();
 413                                 }
 414                                 clk_reg[0].which_io =
 415                                         sbus_root->sbus_ranges[rngc].ot_parent_space;
 416                                 clk_reg[0].phys_addr +=
 417                                         sbus_root->sbus_ranges[rngc].ot_parent_base;
 418                         }
 419                 }
 420
 421                 if(model[5] == '0' && model[6] == '2') {
 422                         mstk48t02_regs = (((u64)clk_reg[0].phys_addr) |
 423                                           (((u64)clk_reg[0].which_io)<<32UL));
 424                 } else if(model[5] == '0' && model[6] == '8') {
 425                         mstk48t08_regs = (((u64)clk_reg[0].phys_addr) |
 426                                           (((u64)clk_reg[0].which_io)<<32UL));
 427                         mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 428                 } else {
 429                         mstk48t59_regs = (((u64)clk_reg[0].phys_addr) |
 430                                           (((u64)clk_reg[0].which_io)<<32UL));
 431                         mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 432                 }
 433                 break;
 434         }
 435
 436         /* Report a low battery voltage condition. */
 437         if (has_low_battery())
 438                 prom_printf("NVRAM: Low battery voltage!\n");
 439
 440         /* Kick start the clock if it is completely stopped. */
 441         if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 442                 kick_start_clock();
 443
 444         set_system_time();
 445
 446         __restore_flags(flags);
 447 }
 448
 449 #ifndef BCD_TO_BIN
 450 #define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
 451 #endif
 452
 453 #ifndef BIN_TO_BCD
 454 #define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10)
 455 #endif
 456
 457 extern void init_timers(void (*func)(int, void *, struct pt_regs *),
 458                         unsigned long *);
 459
 460 void __init time_init(void)
 461 {
 462         /* clock_probe() is now done at end of [se]bus_init on sparc64
 463          * so that sbus, fhc and ebus bus information is probed and
 464          * available.
 465          */
 466         unsigned long clock;
 467
 468         init_timers(timer_interrupt, &clock);
 469         timer_tick_offset = clock / HZ;
 470         timer_ticks_per_usec_quotient = ((1UL<<32) / (clock / 1000020));
 471 }
 472
 473 static __inline__ unsigned long do_gettimeoffset(void)
 474 {
 475         unsigned long ticks;
 476
 477         __asm__ __volatile__("
 478                 rd      %%tick, %%g1
 479                 add     %1, %%g1, %0
 480                 sub     %0, %2, %0
 481 "
 482                 : "=r" (ticks)
 483                 : "r" (timer_tick_offset), "r" (timer_tick_compare)
 484                 : "g1", "g2");
 485
 486         return (ticks * timer_ticks_per_usec_quotient) >> 32UL;
 487 }
 488
 489 void do_settimeofday(struct timeval *tv)
 490 {
 491         if (this_is_starfire)
 492                 return;
 493
 494         write_lock_irq(&xtime_lock);
 495
 496         tv->tv_usec -= do_gettimeoffset();
 497         if(tv->tv_usec < 0) {
 498                 tv->tv_usec += 1000000;
 499                 tv->tv_sec--;
 500         }
 501
 502         xtime = *tv;
 503         time_adjust = 0;                /* stop active adjtime() */
 504         time_status |= STA_UNSYNC;
 505         time_maxerror = NTP_PHASE_LIMIT;
 506         time_esterror = NTP_PHASE_LIMIT;
 507
 508         write_unlock_irq(&xtime_lock);
 509 }
 510
 511 static int set_rtc_mmss(unsigned long nowtime)
 512 {
 513         int real_seconds, real_minutes, mostek_minutes;
 514         unsigned long regs = mstk48t02_regs;
 515         u8 tmp;
 516
 517         /*
 518          * Not having a register set can lead to trouble.
 519          * Also starfire doesnt have a tod clock.
 520          */
 521         if (!regs)
 522                 return -1;
 523
 524         /* Read the current RTC minutes. */
 525         tmp = mostek_read(regs + MOSTEK_CREG);
 526         tmp |= MSTK_CREG_READ;
 527         mostek_write(regs + MOSTEK_CREG, tmp);
 528
 529         mostek_minutes = MSTK_REG_MIN(regs);
 530
 531         tmp = mostek_read(regs + MOSTEK_CREG);
 532         tmp &= ~MSTK_CREG_READ;
 533         mostek_write(regs + MOSTEK_CREG, tmp);
 534
 535         /*
 536          * since we're only adjusting minutes and seconds,
 537          * don't interfere with hour overflow. This avoids
 538          * messing with unknown time zones but requires your
 539          * RTC not to be off by more than 15 minutes
 540          */
 541         real_seconds = nowtime % 60;
 542         real_minutes = nowtime / 60;
 543         if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
 544                 real_minutes += 30;     /* correct for half hour time zone */
 545         real_minutes %= 60;
 546
 547         if (abs(real_minutes - mostek_minutes) < 30) {
 548                 tmp = mostek_read(regs + MOSTEK_CREG);
 549                 tmp |= MSTK_CREG_WRITE;
 550                 mostek_write(regs + MOSTEK_CREG, tmp);
 551
 552                 MSTK_SET_REG_SEC(regs,real_seconds);
 553                 MSTK_SET_REG_MIN(regs,real_minutes);
 554
 555                 tmp = mostek_read(regs + MOSTEK_CREG);
 556                 tmp &= ~MSTK_CREG_WRITE;
 557                 mostek_write(regs + MOSTEK_CREG, tmp);
 558         } else
 559                 return -1;
 560
 561         return 0;
 562 }