arch/sparc64/kernel/pci_impl.h

   1 /* $Id: pci_impl.h,v 1.6 2000/03/25 05:18:11 davem Exp $
   2  * pci_impl.h: Helper definitions for PCI controller support.
   3  *
   4  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
   5  */
   6
   7 #ifndef PCI_IMPL_H
   8 #define PCI_IMPL_H
   9
  10 #include <linux/types.h>
  11 #include <linux/spinlock.h>
  12 #include <asm/io.h>
  13
  14 extern spinlock_t pci_controller_lock;
  15 extern struct pci_controller_info *pci_controller_root;
  16
  17 extern struct pci_pbm_info *pci_bus2pbm[256];
  18 extern unsigned char pci_highest_busnum;
  19 extern int pci_num_controllers;
  20
  21 /* PCI bus scanning and fixup support. */
  22 extern void pci_fill_in_pbm_cookies(struct pci_bus *pbus,
  23                                     struct pci_pbm_info *pbm,
  24                                     int prom_node);
  25 extern void pci_record_assignments(struct pci_pbm_info *pbm,
  26                                    struct pci_bus *pbus);
  27 extern void pci_assign_unassigned(struct pci_pbm_info *pbm,
  28                                   struct pci_bus *pbus);
  29 extern void pci_fixup_irq(struct pci_pbm_info *pbm,
  30                           struct pci_bus *pbus);
  31 extern void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
  32                                             struct pci_bus *pbus);
  33 extern void pci_setup_busmastering(struct pci_pbm_info *pbm,
  34                                    struct pci_bus *pbus);
  35
  36 /* Error reporting support. */
  37 extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
  38 extern void pci_scan_for_master_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
  39 extern void pci_scan_for_parity_error(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
  40
  41 /* Configuration space access. */
  42 extern spinlock_t pci_poke_lock;
  43 extern volatile int pci_poke_in_progress;
  44 extern volatile int pci_poke_faulted;
  45
  46 static __inline__ void pci_config_read8(u8 *addr, u8 *ret)
  47 {
  48         unsigned long flags;
  49         u8 byte;
  50
  51         spin_lock_irqsave(&pci_poke_lock, flags);
  52         pci_poke_in_progress = 1;
  53         pci_poke_faulted = 0;
  54         __asm__ __volatile__("membar #Sync\n\t"
  55                              "lduba [%1] %2, %0\n\t"
  56                              "membar #Sync"
  57                              : "=r" (byte)
  58                              : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
  59                              : "memory");
  60         pci_poke_in_progress = 0;
  61         if (!pci_poke_faulted)
  62                 *ret = byte;
  63         spin_unlock_irqrestore(&pci_poke_lock, flags);
  64 }
  65
  66 static __inline__ void pci_config_read16(u16 *addr, u16 *ret)
  67 {
  68         unsigned long flags;
  69         u16 word;
  70
  71         spin_lock_irqsave(&pci_poke_lock, flags);
  72         pci_poke_in_progress = 1;
  73         pci_poke_faulted = 0;
  74         __asm__ __volatile__("membar #Sync\n\t"
  75                              "lduha [%1] %2, %0\n\t"
  76                              "membar #Sync"
  77                              : "=r" (word)
  78                              : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
  79                              : "memory");
  80         pci_poke_in_progress = 0;
  81         if (!pci_poke_faulted)
  82                 *ret = word;
  83         spin_unlock_irqrestore(&pci_poke_lock, flags);
  84 }
  85
  86 static __inline__ void pci_config_read32(u32 *addr, u32 *ret)
  87 {
  88         unsigned long flags;
  89         u32 dword;
  90
  91         spin_lock_irqsave(&pci_poke_lock, flags);
  92         pci_poke_in_progress = 1;
  93         pci_poke_faulted = 0;
  94         __asm__ __volatile__("membar #Sync\n\t"
  95                              "lduwa [%1] %2, %0\n\t"
  96                              "membar #Sync"
  97                              : "=r" (dword)
  98                              : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
  99                              : "memory");
 100         pci_poke_in_progress = 0;
 101         if (!pci_poke_faulted)
 102                 *ret = dword;
 103         spin_unlock_irqrestore(&pci_poke_lock, flags);
 104 }
 105
 106 static __inline__ void pci_config_write8(u8 *addr, u8 val)
 107 {
 108         unsigned long flags;
 109
 110         spin_lock_irqsave(&pci_poke_lock, flags);
 111         pci_poke_in_progress = 1;
 112         pci_poke_faulted = 0;
 113         __asm__ __volatile__("membar #Sync\n\t"
 114                              "stba %0, [%1] %2\n\t"
 115                              "membar #Sync"
 116                              : /* no outputs */
 117                              : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 118                              : "memory");
 119         pci_poke_in_progress = 0;
 120         spin_unlock_irqrestore(&pci_poke_lock, flags);
 121 }
 122
 123 static __inline__ void pci_config_write16(u16 *addr, u16 val)
 124 {
 125         unsigned long flags;
 126
 127         spin_lock_irqsave(&pci_poke_lock, flags);
 128         pci_poke_in_progress = 1;
 129         pci_poke_faulted = 0;
 130         __asm__ __volatile__("membar #Sync\n\t"
 131                              "stha %0, [%1] %2\n\t"
 132                              "membar #Sync"
 133                              : /* no outputs */
 134                              : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 135                              : "memory");
 136         pci_poke_in_progress = 0;
 137         spin_unlock_irqrestore(&pci_poke_lock, flags);
 138 }
 139
 140 static __inline__ void pci_config_write32(u32 *addr, u32 val)
 141 {
 142         unsigned long flags;
 143
 144         spin_lock_irqsave(&pci_poke_lock, flags);
 145         pci_poke_in_progress = 1;
 146         pci_poke_faulted = 0;
 147         __asm__ __volatile__("membar #Sync\n\t"
 148                              "stwa %0, [%1] %2\n\t"
 149                              "membar #Sync"
 150                              : /* no outputs */
 151                              : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 152                              : "memory");
 153         pci_poke_in_progress = 0;
 154         spin_unlock_irqrestore(&pci_poke_lock, flags);
 155 }
 156
 157 #endif /* !(PCI_IMPL_H) */