2 * include/asm-s390/smp.h
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
11 #include <linux/config.h>
15 #include <asm/lowcore.h>
16 #include <linux/tasks.h> // FOR NR_CPUS definition only.
17 #include <linux/kernel.h> // FOR FASTCALL definition
19 #define smp_processor_id() (current->processor)
20 #define NO_PROC_ID 0xFF /* No processor magic marker */
23 * This magic constant controls our willingness to transfer
24 * a process across CPUs. Such a transfer incurs misses on the L1
25 * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
26 * gut feeling is this will vary by board in value. For a board
27 * with separate L2 cache it probably depends also on the RSS, and
28 * for a board with shared L2 cache it ought to decay fast as other
32 #define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
34 extern unsigned long ipi_count
;
35 extern void count_cpus(void);
37 extern __inline__
int cpu_logical_map(int cpu
)
42 extern __inline__
int cpu_number_map(int cpu
)
47 extern __inline__ __u16
hard_smp_processor_id(void)
51 __asm__ ("stap %0\n" : "=m" (cpu_address
));
55 #define cpu_logical_map(cpu) (cpu)
57 void smp_local_timer_interrupt(struct pt_regs
* regs
);
60 s390 specific smp.c headers
70 sigp_ccode
smp_ext_call_sync(int cpu
, ec_cmd_sig cmd
,void *parms
);
71 sigp_ccode
smp_ext_call_async(int cpu
, ec_bit_sig sig
);
72 void smp_ext_call_sync_others(ec_cmd_sig cmd
, void *parms
);
73 void smp_ext_call_async_others(ec_bit_sig sig
);
75 int smp_signal_others(sigp_order_code order_code
,__u32 parameter
,
76 int spin
,sigp_info
*info
);