include/asm-mips64/mmu_context.h

   1 /* $Id: mmu_context.h,v 1.4 2000/02/23 00:41:38 ralf Exp $
   2  *
   3  * Switch a MMU context.
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file "COPYING" in the main directory of this archive
   7  * for more details.
   8  *
   9  * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle
  10  * Copyright (C) 1999 Silicon Graphics, Inc.
  11  */
  12 #ifndef _ASM_MMU_CONTEXT_H
  13 #define _ASM_MMU_CONTEXT_H
  14
  15 #include <linux/config.h>
  16 #include <linux/slab.h>
  17 #include <asm/pgalloc.h>
  18 #include <asm/processor.h>
  19
  20 /*
  21  * For the fast tlb miss handlers, we currently keep a per cpu array
  22  * of pointers to the current pgd for each processor. Also, the proc.
  23  * id is stuffed into the context register. This should be changed to
  24  * use the processor id via current->processor, where current is stored
  25  * in watchhi/lo. The context register should be used to contiguously
  26  * map the page tables.
  27  */
  28 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
  29         pgd_current[smp_processor_id()] = (unsigned long)(pgd)
  30 #define TLBMISS_HANDLER_SETUP() \
  31         set_context((unsigned long) smp_processor_id() << (23 + 3)); \
  32         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
  33 extern unsigned long pgd_current[];
  34
  35 #ifndef CONFIG_SMP
  36 #define CPU_CONTEXT(cpu, mm)    (mm)->context
  37 #else
  38 #define CPU_CONTEXT(cpu, mm)    (*((unsigned long *)((mm)->context) + cpu))
  39 #endif
  40 #define ASID_CACHE(cpu)         cpu_data[cpu].asid_cache
  41
  42 #define ASID_INC        0x1
  43 #define ASID_MASK       0xff
  44
  45 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
  46 {
  47 }
  48
  49 /*
  50  *  All unused by hardware upper bits will be considered
  51  *  as a software asid extension.
  52  */
  53 #define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
  54 #define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
  55
  56 extern inline void
  57 get_new_cpu_mmu_context(struct mm_struct *mm, unsigned long cpu)
  58 {
  59         unsigned long asid = ASID_CACHE(cpu);
  60
  61         if (! ((asid += ASID_INC) & ASID_MASK) ) {
  62                 _flush_tlb_all(); /* start new asid cycle */
  63                 if (!asid)      /* fix version if needed */
  64                         asid = ASID_FIRST_VERSION;
  65         }
  66         CPU_CONTEXT(cpu, mm) = ASID_CACHE(cpu) = asid;
  67 }
  68
  69 /*
  70  * Initialize the context related info for a new mm_struct
  71  * instance.
  72  */
  73 extern inline int
  74 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  75 {
  76 #ifndef CONFIG_SMP
  77         mm->context = 0;
  78 #else
  79         mm->context = (unsigned long)kmalloc(smp_num_cpus *
  80                                 sizeof(unsigned long), GFP_KERNEL);
  81         /*
  82          * Init the "context" values so that a tlbpid allocation
  83          * happens on the first switch.
  84          */
  85         if (mm->context == 0)
  86                 return -ENOMEM;
  87         memset((void *)mm->context, 0, smp_num_cpus * sizeof(unsigned long));
  88 #endif
  89         return 0;
  90 }
  91
  92 extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  93                              struct task_struct *tsk, unsigned cpu)
  94 {
  95         /* Check if our ASID is of an older version and thus invalid */
  96         if ((CPU_CONTEXT(cpu, next) ^ ASID_CACHE(cpu)) & ASID_VERSION_MASK)
  97                 get_new_cpu_mmu_context(next, cpu);
  98
  99         set_entryhi(CPU_CONTEXT(cpu, next) & 0xff);
 100         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 101 }
 102
 103 /*
 104  * Destroy context related info for an mm_struct that is about
 105  * to be put to rest.
 106  */
 107 extern inline void destroy_context(struct mm_struct *mm)
 108 {
 109 #ifdef CONFIG_SMP
 110         if (mm->context)
 111                 kfree((void *)mm->context);
 112 #endif
 113 }
 114
 115 /*
 116  * After we have set current->mm to a new value, this activates
 117  * the context for the new mm so we see the new mappings.
 118  */
 119 extern inline void
 120 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 121 {
 122         /* Unconditionally get a new ASID.  */
 123         get_new_cpu_mmu_context(next, smp_processor_id());
 124
 125         set_entryhi(CPU_CONTEXT(smp_processor_id(), next) & 0xff);
 126         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 127 }
 128
 129 #endif /* _ASM_MMU_CONTEXT_H */