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Ok. I didn't make 2.4.0 in 2000. Tough. I tried, but we had some
[davej-history.git] / drivers / sound / msnd_pinnacle.c
blob305969ff06972ecd41dc7b1bf3c45f9315d416ed
1 /*********************************************************************
2 *
3 * Turtle Beach MultiSound Sound Card Driver for Linux
4 * Linux 2.0/2.2 Version
5 *
6 * msnd_pinnacle.c / msnd_classic.c
7 *
8 * -- If MSND_CLASSIC is defined:
9 *
10 * -> driver for Turtle Beach Classic/Monterey/Tahiti
11 *
12 * -- Else
13 *
14 * -> driver for Turtle Beach Pinnacle/Fiji
15 *
16 * Copyright (C) 1998 Andrew Veliath
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * $Id: msnd_pinnacle.c,v 1.75 1999/03/21 16:50:09 andrewtv Exp $
33 *
34 ********************************************************************/
35
36 #include <linux/kernel.h>
37 #include <linux/config.h>
38 #include <linux/version.h>
39 #include <linux/module.h>
40 #include <linux/malloc.h>
41 #include <linux/types.h>
42 #include <linux/delay.h>
43 #include <linux/init.h>
44 #include <linux/smp_lock.h>
45 #include <asm/irq.h>
46 #include <asm/io.h>
47 #include "sound_config.h"
48 #include "sound_firmware.h"
49 #ifdef MSND_CLASSIC
50 # define SLOWIO
51 #endif
52 #include "msnd.h"
53 #ifdef MSND_CLASSIC
54 # ifdef CONFIG_MSNDCLAS_HAVE_BOOT
55 # define HAVE_DSPCODEH
56 # endif
57 # include "msnd_classic.h"
58 # define LOGNAME "msnd_classic"
59 #else
60 # ifdef CONFIG_MSNDPIN_HAVE_BOOT
61 # define HAVE_DSPCODEH
62 # endif
63 # include "msnd_pinnacle.h"
64 # define LOGNAME "msnd_pinnacle"
65 #endif
66
67 #ifndef CONFIG_MSND_WRITE_NDELAY
68 # define CONFIG_MSND_WRITE_NDELAY 1
69 #endif
70
71 #define get_play_delay_jiffies(size) ((size) * HZ * \
72 dev.play_sample_size / 8 / \
73 dev.play_sample_rate / \
74 dev.play_channels)
75
76 #define get_rec_delay_jiffies(size) ((size) * HZ * \
77 dev.rec_sample_size / 8 / \
78 dev.rec_sample_rate / \
79 dev.rec_channels)
80
81 static multisound_dev_t dev;
82
83 #ifndef HAVE_DSPCODEH
84 static char *dspini, *permini;
85 static int sizeof_dspini, sizeof_permini;
86 #endif
87
88 static int dsp_full_reset(void);
89 static void dsp_write_flush(void);
90
91 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
92 {
93 if (msnd_send_dsp_cmd(dev, cmd) == 0)
94 return 0;
95 dsp_full_reset();
96 return msnd_send_dsp_cmd(dev, cmd);
97 }
98
99 static void reset_play_queue(void)
100 {
101 int n;
102 LPDAQD lpDAQ;
103
104 dev.last_playbank = -1;
105 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
106 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
107
108 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
109 isa_writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
110 isa_writew(0, lpDAQ + DAQDS_wSize);
111 isa_writew(1, lpDAQ + DAQDS_wFormat);
112 isa_writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
113 isa_writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
114 isa_writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
115 isa_writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
116 isa_writew(n, lpDAQ + DAQDS_wFlags);
117 }
118 }
119
120 static void reset_record_queue(void)
121 {
122 int n;
123 LPDAQD lpDAQ;
124 unsigned long flags;
125
126 dev.last_recbank = 2;
127 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
128 isa_writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
129
130 /* Critical section: bank 1 access */
131 spin_lock_irqsave(&dev.lock, flags);
132 outb(HPBLKSEL_1, dev.io + HP_BLKS);
133 isa_memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
134 outb(HPBLKSEL_0, dev.io + HP_BLKS);
135 spin_unlock_irqrestore(&dev.lock, flags);
136
137 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
138 isa_writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
139 isa_writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
140 isa_writew(1, lpDAQ + DAQDS_wFormat);
141 isa_writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
142 isa_writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
143 isa_writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
144 isa_writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
145 isa_writew(n, lpDAQ + DAQDS_wFlags);
146 }
147 }
148
149 static void reset_queues(void)
150 {
151 if (dev.mode & FMODE_WRITE) {
152 msnd_fifo_make_empty(&dev.DAPF);
153 reset_play_queue();
154 }
155 if (dev.mode & FMODE_READ) {
156 msnd_fifo_make_empty(&dev.DARF);
157 reset_record_queue();
158 }
159 }
160
161 static int dsp_set_format(struct file *file, int val)
162 {
163 int data, i;
164 LPDAQD lpDAQ, lpDARQ;
165
166 lpDAQ = dev.base + DAPQ_DATA_BUFF;
167 lpDARQ = dev.base + DARQ_DATA_BUFF;
168
169 switch (val) {
170 case AFMT_U8:
171 case AFMT_S16_LE:
172 data = val;
173 break;
174 default:
175 data = DEFSAMPLESIZE;
176 break;
177 }
178
179 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
180 if (file->f_mode & FMODE_WRITE)
181 isa_writew(data, lpDAQ + DAQDS_wSampleSize);
182 if (file->f_mode & FMODE_READ)
183 isa_writew(data, lpDARQ + DAQDS_wSampleSize);
184 }
185 if (file->f_mode & FMODE_WRITE)
186 dev.play_sample_size = data;
187 if (file->f_mode & FMODE_READ)
188 dev.rec_sample_size = data;
189
190 return data;
191 }
192
193 static int dsp_get_frag_size(void)
194 {
195 int size;
196 size = dev.fifosize / 4;
197 if (size > 32 * 1024)
198 size = 32 * 1024;
199 return size;
200 }
201
202 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
203 {
204 int val, i, data, tmp;
205 LPDAQD lpDAQ, lpDARQ;
206 audio_buf_info abinfo;
207 unsigned long flags;
208
209 lpDAQ = dev.base + DAPQ_DATA_BUFF;
210 lpDARQ = dev.base + DARQ_DATA_BUFF;
211
212 switch (cmd) {
213 case SNDCTL_DSP_SUBDIVIDE:
214 case SNDCTL_DSP_SETFRAGMENT:
215 case SNDCTL_DSP_SETDUPLEX:
216 case SNDCTL_DSP_POST:
217 return 0;
218
219 case SNDCTL_DSP_GETIPTR:
220 case SNDCTL_DSP_GETOPTR:
221 case SNDCTL_DSP_MAPINBUF:
222 case SNDCTL_DSP_MAPOUTBUF:
223 return -EINVAL;
224
225 case SNDCTL_DSP_GETOSPACE:
226 if (!(file->f_mode & FMODE_WRITE))
227 return -EINVAL;
228 spin_lock_irqsave(&dev.lock, flags);
229 abinfo.fragsize = dsp_get_frag_size();
230 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
231 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
232 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
233 spin_unlock_irqrestore(&dev.lock, flags);
234 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
235
236 case SNDCTL_DSP_GETISPACE:
237 if (!(file->f_mode & FMODE_READ))
238 return -EINVAL;
239 spin_lock_irqsave(&dev.lock, flags);
240 abinfo.fragsize = dsp_get_frag_size();
241 abinfo.bytes = dev.DARF.n - dev.DARF.len;
242 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
243 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
244 spin_unlock_irqrestore(&dev.lock, flags);
245 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
246
247 case SNDCTL_DSP_RESET:
248 dev.nresets = 0;
249 reset_queues();
250 return 0;
251
252 case SNDCTL_DSP_SYNC:
253 dsp_write_flush();
254 return 0;
255
256 case SNDCTL_DSP_GETBLKSIZE:
257 tmp = dsp_get_frag_size();
258 if (put_user(tmp, (int *)arg))
259 return -EFAULT;
260 return 0;
261
262 case SNDCTL_DSP_GETFMTS:
263 val = AFMT_S16_LE | AFMT_U8;
264 if (put_user(val, (int *)arg))
265 return -EFAULT;
266 return 0;
267
268 case SNDCTL_DSP_SETFMT:
269 if (get_user(val, (int *)arg))
270 return -EFAULT;
271
272 if (file->f_mode & FMODE_WRITE)
273 data = val == AFMT_QUERY
274 ? dev.play_sample_size
275 : dsp_set_format(file, val);
276 else
277 data = val == AFMT_QUERY
278 ? dev.rec_sample_size
279 : dsp_set_format(file, val);
280
281 if (put_user(data, (int *)arg))
282 return -EFAULT;
283 return 0;
284
285 case SNDCTL_DSP_NONBLOCK:
286 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
287 file->f_mode & FMODE_WRITE)
288 dev.play_ndelay = 1;
289 if (file->f_mode & FMODE_READ)
290 dev.rec_ndelay = 1;
291 return 0;
292
293 case SNDCTL_DSP_GETCAPS:
294 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
295 if (put_user(val, (int *)arg))
296 return -EFAULT;
297 return 0;
298
299 case SNDCTL_DSP_SPEED:
300 if (get_user(val, (int *)arg))
301 return -EFAULT;
302
303 if (val < 8000)
304 val = 8000;
305
306 if (val > 48000)
307 val = 48000;
308
309 data = val;
310
311 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
312 if (file->f_mode & FMODE_WRITE)
313 isa_writew(data, lpDAQ + DAQDS_wSampleRate);
314 if (file->f_mode & FMODE_READ)
315 isa_writew(data, lpDARQ + DAQDS_wSampleRate);
316 }
317 if (file->f_mode & FMODE_WRITE)
318 dev.play_sample_rate = data;
319 if (file->f_mode & FMODE_READ)
320 dev.rec_sample_rate = data;
321
322 if (put_user(data, (int *)arg))
323 return -EFAULT;
324 return 0;
325
326 case SNDCTL_DSP_CHANNELS:
327 case SNDCTL_DSP_STEREO:
328 if (get_user(val, (int *)arg))
329 return -EFAULT;
330
331 if (cmd == SNDCTL_DSP_CHANNELS) {
332 switch (val) {
333 case 1:
334 case 2:
335 data = val;
336 break;
337 default:
338 val = data = 2;
339 break;
340 }
341 } else {
342 switch (val) {
343 case 0:
344 data = 1;
345 break;
346 default:
347 val = 1;
348 case 1:
349 data = 2;
350 break;
351 }
352 }
353
354 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
355 if (file->f_mode & FMODE_WRITE)
356 isa_writew(data, lpDAQ + DAQDS_wChannels);
357 if (file->f_mode & FMODE_READ)
358 isa_writew(data, lpDARQ + DAQDS_wChannels);
359 }
360 if (file->f_mode & FMODE_WRITE)
361 dev.play_channels = data;
362 if (file->f_mode & FMODE_READ)
363 dev.rec_channels = data;
364
365 if (put_user(val, (int *)arg))
366 return -EFAULT;
367 return 0;
368 }
369
370 return -EINVAL;
371 }
372
373 static int mixer_get(int d)
374 {
375 if (d > 31)
376 return -EINVAL;
377
378 switch (d) {
379 case SOUND_MIXER_VOLUME:
380 case SOUND_MIXER_PCM:
381 case SOUND_MIXER_LINE:
382 case SOUND_MIXER_IMIX:
383 case SOUND_MIXER_LINE1:
384 #ifndef MSND_CLASSIC
385 case SOUND_MIXER_MIC:
386 case SOUND_MIXER_SYNTH:
387 #endif
388 return (dev.left_levels[d] >> 8) * 100 / 0xff |
389 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
390 default:
391 return 0;
392 }
393 }
394
395 #define update_volm(a,b) \
396 isa_writew((dev.left_levels[a] >> 1) * \
397 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
398 dev.SMA + SMA_##b##Left); \
399 isa_writew((dev.right_levels[a] >> 1) * \
400 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
401 dev.SMA + SMA_##b##Right);
402
403 #define update_potm(d,s,ar) \
404 isa_writeb((dev.left_levels[d] >> 8) * \
405 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
406 dev.SMA + SMA_##s##Left); \
407 isa_writeb((dev.right_levels[d] >> 8) * \
408 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
409 dev.SMA + SMA_##s##Right); \
410 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
411 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
412
413 #define update_pot(d,s,ar) \
414 isa_writeb(dev.left_levels[d] >> 8, \
415 dev.SMA + SMA_##s##Left); \
416 isa_writeb(dev.right_levels[d] >> 8, \
417 dev.SMA + SMA_##s##Right); \
418 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
419 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
420
421 static int mixer_set(int d, int value)
422 {
423 int left = value & 0x000000ff;
424 int right = (value & 0x0000ff00) >> 8;
425 int bLeft, bRight;
426 int wLeft, wRight;
427 int updatemaster = 0;
428
429 if (d > 31)
430 return -EINVAL;
431
432 bLeft = left * 0xff / 100;
433 wLeft = left * 0xffff / 100;
434
435 bRight = right * 0xff / 100;
436 wRight = right * 0xffff / 100;
437
438 dev.left_levels[d] = wLeft;
439 dev.right_levels[d] = wRight;
440
441 switch (d) {
442 /* master volume unscaled controls */
443 case SOUND_MIXER_LINE: /* line pot control */
444 /* scaled by IMIX in digital mix */
445 isa_writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
446 isa_writeb(bRight, dev.SMA + SMA_bInPotPosRight);
447 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
448 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
449 break;
450 #ifndef MSND_CLASSIC
451 case SOUND_MIXER_MIC: /* mic pot control */
452 /* scaled by IMIX in digital mix */
453 isa_writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
454 isa_writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
455 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
456 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
457 break;
458 #endif
459 case SOUND_MIXER_VOLUME: /* master volume */
460 isa_writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
461 isa_writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
462 /* fall through */
463
464 case SOUND_MIXER_LINE1: /* aux pot control */
465 /* scaled by master volume */
466 /* fall through */
467
468 /* digital controls */
469 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */
470 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */
471 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */
472 /* scaled by master volume */
473 updatemaster = 1;
474 break;
475
476 default:
477 return 0;
478 }
479
480 if (updatemaster) {
481 /* update master volume scaled controls */
482 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
483 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
484 #ifndef MSND_CLASSIC
485 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
486 #endif
487 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
488 }
489
490 return mixer_get(d);
491 }
492
493 static void mixer_setup(void)
494 {
495 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
496 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
497 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
498 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
499 #ifndef MSND_CLASSIC
500 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
501 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
502 #endif
503 }
504
505 static unsigned long set_recsrc(unsigned long recsrc)
506 {
507 if (dev.recsrc == recsrc)
508 return dev.recsrc;
509 #ifdef HAVE_NORECSRC
510 else if (recsrc == 0)
511 dev.recsrc = 0;
512 #endif
513 else
514 dev.recsrc ^= recsrc;
515
516 #ifndef MSND_CLASSIC
517 if (dev.recsrc & SOUND_MASK_IMIX) {
518 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
519 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
520 }
521 else if (dev.recsrc & SOUND_MASK_SYNTH) {
522 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
523 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
524 }
525 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
526 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
527 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
528 }
529 else {
530 #ifdef HAVE_NORECSRC
531 /* Select no input (?) */
532 dev.recsrc = 0;
533 #else
534 dev.recsrc = SOUND_MASK_IMIX;
535 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
536 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
537 #endif
538 }
539 #endif /* MSND_CLASSIC */
540
541 return dev.recsrc;
542 }
543
544 static unsigned long force_recsrc(unsigned long recsrc)
545 {
546 dev.recsrc = 0;
547 return set_recsrc(recsrc);
548 }
549
550 #define set_mixer_info() \
551 strncpy(info.id, "MSNDMIXER", sizeof(info.id)); \
552 strncpy(info.name, "MultiSound Mixer", sizeof(info.name));
553
554 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
555 {
556 if (cmd == SOUND_MIXER_INFO) {
557 mixer_info info;
558 set_mixer_info();
559 info.modify_counter = dev.mixer_mod_count;
560 return copy_to_user((void *)arg, &info, sizeof(info));
561 } else if (cmd == SOUND_OLD_MIXER_INFO) {
562 _old_mixer_info info;
563 set_mixer_info();
564 return copy_to_user((void *)arg, &info, sizeof(info));
565 } else if (cmd == SOUND_MIXER_PRIVATE1) {
566 dev.nresets = 0;
567 dsp_full_reset();
568 return 0;
569 } else if (((cmd >> 8) & 0xff) == 'M') {
570 int val = 0;
571
572 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
573 switch (cmd & 0xff) {
574 case SOUND_MIXER_RECSRC:
575 if (get_user(val, (int *)arg))
576 return -EFAULT;
577 val = set_recsrc(val);
578 break;
579
580 default:
581 if (get_user(val, (int *)arg))
582 return -EFAULT;
583 val = mixer_set(cmd & 0xff, val);
584 break;
585 }
586 ++dev.mixer_mod_count;
587 return put_user(val, (int *)arg);
588 } else {
589 switch (cmd & 0xff) {
590 case SOUND_MIXER_RECSRC:
591 val = dev.recsrc;
592 break;
593
594 case SOUND_MIXER_DEVMASK:
595 case SOUND_MIXER_STEREODEVS:
596 val = SOUND_MASK_PCM |
597 SOUND_MASK_LINE |
598 SOUND_MASK_IMIX |
599 SOUND_MASK_LINE1 |
600 #ifndef MSND_CLASSIC
601 SOUND_MASK_MIC |
602 SOUND_MASK_SYNTH |
603 #endif
604 SOUND_MASK_VOLUME;
605 break;
606
607 case SOUND_MIXER_RECMASK:
608 #ifdef MSND_CLASSIC
609 val = 0;
610 #else
611 val = SOUND_MASK_IMIX |
612 SOUND_MASK_SYNTH;
613 if (test_bit(F_HAVEDIGITAL, &dev.flags))
614 val |= SOUND_MASK_DIGITAL1;
615 #endif
616 break;
617
618 case SOUND_MIXER_CAPS:
619 val = SOUND_CAP_EXCL_INPUT;
620 break;
621
622 default:
623 if ((val = mixer_get(cmd & 0xff)) < 0)
624 return -EINVAL;
625 break;
626 }
627 }
628
629 return put_user(val, (int *)arg);
630 }
631
632 return -EINVAL;
633 }
634
635 static int dev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
636 {
637 int minor = MINOR(inode->i_rdev);
638
639 if (cmd == OSS_GETVERSION) {
640 int sound_version = SOUND_VERSION;
641 return put_user(sound_version, (int *)arg);
642 }
643
644 if (minor == dev.dsp_minor)
645 return dsp_ioctl(file, cmd, arg);
646 else if (minor == dev.mixer_minor)
647 return mixer_ioctl(cmd, arg);
648
649 return -EINVAL;
650 }
651
652 static void dsp_write_flush(void)
653 {
654 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
655 return;
656 set_bit(F_WRITEFLUSH, &dev.flags);
657 interruptible_sleep_on_timeout(
658 &dev.writeflush,
659 get_play_delay_jiffies(dev.DAPF.len));
660 clear_bit(F_WRITEFLUSH, &dev.flags);
661 if (!signal_pending(current)) {
662 current->state = TASK_INTERRUPTIBLE;
663 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
664 }
665 clear_bit(F_WRITING, &dev.flags);
666 }
667
668 static void dsp_halt(struct file *file)
669 {
670 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
671 clear_bit(F_READING, &dev.flags);
672 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
673 msnd_disable_irq(&dev);
674 if (file) {
675 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
676 dev.mode &= ~FMODE_READ;
677 }
678 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
679 }
680 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
681 if (test_bit(F_WRITING, &dev.flags)) {
682 dsp_write_flush();
683 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
684 }
685 msnd_disable_irq(&dev);
686 if (file) {
687 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
688 dev.mode &= ~FMODE_WRITE;
689 }
690 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
691 }
692 }
693
694 static int dsp_release(struct file *file)
695 {
696 dsp_halt(file);
697 return 0;
698 }
699
700 static int dsp_open(struct file *file)
701 {
702 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
703 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
704 clear_bit(F_WRITING, &dev.flags);
705 msnd_fifo_make_empty(&dev.DAPF);
706 reset_play_queue();
707 if (file) {
708 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
709 dev.mode |= FMODE_WRITE;
710 }
711 msnd_enable_irq(&dev);
712 }
713 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
714 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
715 clear_bit(F_READING, &dev.flags);
716 msnd_fifo_make_empty(&dev.DARF);
717 reset_record_queue();
718 if (file) {
719 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
720 dev.mode |= FMODE_READ;
721 }
722 msnd_enable_irq(&dev);
723 }
724 return 0;
725 }
726
727 static void set_default_play_audio_parameters(void)
728 {
729 dev.play_sample_size = DEFSAMPLESIZE;
730 dev.play_sample_rate = DEFSAMPLERATE;
731 dev.play_channels = DEFCHANNELS;
732 }
733
734 static void set_default_rec_audio_parameters(void)
735 {
736 dev.rec_sample_size = DEFSAMPLESIZE;
737 dev.rec_sample_rate = DEFSAMPLERATE;
738 dev.rec_channels = DEFCHANNELS;
739 }
740
741 static void set_default_audio_parameters(void)
742 {
743 set_default_play_audio_parameters();
744 set_default_rec_audio_parameters();
745 }
746
747 static int dev_open(struct inode *inode, struct file *file)
748 {
749 int minor = MINOR(inode->i_rdev);
750 int err = 0;
751
752 if (minor == dev.dsp_minor) {
753 if ((file->f_mode & FMODE_WRITE &&
754 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
755 (file->f_mode & FMODE_READ &&
756 test_bit(F_AUDIO_READ_INUSE, &dev.flags)))
757 return -EBUSY;
758
759 if ((err = dsp_open(file)) >= 0) {
760 dev.nresets = 0;
761 if (file->f_mode & FMODE_WRITE) {
762 set_default_play_audio_parameters();
763 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
764 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
765 else
766 dev.play_ndelay = 0;
767 }
768 if (file->f_mode & FMODE_READ) {
769 set_default_rec_audio_parameters();
770 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
771 }
772 }
773 }
774 else if (minor == dev.mixer_minor) {
775 /* nothing */
776 } else
777 err = -EINVAL;
778
779 return err;
780 }
781
782 static int dev_release(struct inode *inode, struct file *file)
783 {
784 int minor = MINOR(inode->i_rdev);
785 int err = 0;
786
787 lock_kernel();
788 if (minor == dev.dsp_minor)
789 err = dsp_release(file);
790 else if (minor == dev.mixer_minor) {
791 /* nothing */
792 } else
793 err = -EINVAL;
794 unlock_kernel();
795 return err;
796 }
797
798 static __inline__ int pack_DARQ_to_DARF(register int bank)
799 {
800 register int size, n, timeout = 3;
801 register WORD wTmp;
802 LPDAQD DAQD;
803
804 /* Increment the tail and check for queue wrap */
805 wTmp = isa_readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
806 if (wTmp > isa_readw(dev.DARQ + JQS_wSize))
807 wTmp = 0;
808 while (wTmp == isa_readw(dev.DARQ + JQS_wHead) && timeout--)
809 udelay(1);
810 isa_writew(wTmp, dev.DARQ + JQS_wTail);
811
812 /* Get our digital audio queue struct */
813 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
814
815 /* Get length of data */
816 size = isa_readw(DAQD + DAQDS_wSize);
817
818 /* Read data from the head (unprotected bank 1 access okay
819 since this is only called inside an interrupt) */
820 outb(HPBLKSEL_1, dev.io + HP_BLKS);
821 if ((n = msnd_fifo_write(
822 &dev.DARF,
823 (char *)(dev.base + bank * DAR_BUFF_SIZE),
824 size, 0)) <= 0) {
825 outb(HPBLKSEL_0, dev.io + HP_BLKS);
826 return n;
827 }
828 outb(HPBLKSEL_0, dev.io + HP_BLKS);
829
830 return 1;
831 }
832
833 static __inline__ int pack_DAPF_to_DAPQ(register int start)
834 {
835 register WORD DAPQ_tail;
836 register int protect = start, nbanks = 0;
837 LPDAQD DAQD;
838
839 DAPQ_tail = isa_readw(dev.DAPQ + JQS_wTail);
840 while (DAPQ_tail != isa_readw(dev.DAPQ + JQS_wHead) || start) {
841 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
842 register int n;
843 unsigned long flags;
844
845 /* Write the data to the new tail */
846 if (protect) {
847 /* Critical section: protect fifo in non-interrupt */
848 spin_lock_irqsave(&dev.lock, flags);
849 if ((n = msnd_fifo_read(
850 &dev.DAPF,
851 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
852 DAP_BUFF_SIZE, 0)) < 0) {
853 spin_unlock_irqrestore(&dev.lock, flags);
854 return n;
855 }
856 spin_unlock_irqrestore(&dev.lock, flags);
857 } else {
858 if ((n = msnd_fifo_read(
859 &dev.DAPF,
860 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
861 DAP_BUFF_SIZE, 0)) < 0) {
862 return n;
863 }
864 }
865 if (!n)
866 break;
867
868 if (start)
869 start = 0;
870
871 /* Get our digital audio queue struct */
872 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
873
874 /* Write size of this bank */
875 isa_writew(n, DAQD + DAQDS_wSize);
876 ++nbanks;
877
878 /* Then advance the tail */
879 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
880 isa_writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
881 /* Tell the DSP to play the bank */
882 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
883 }
884 return nbanks;
885 }
886
887 static int dsp_read(char *buf, size_t len)
888 {
889 int count = len;
890
891 while (count > 0) {
892 int n;
893 unsigned long flags;
894
895 /* Critical section: protect fifo in non-interrupt */
896 spin_lock_irqsave(&dev.lock, flags);
897 if ((n = msnd_fifo_read(&dev.DARF, buf, count, 1)) < 0) {
898 printk(KERN_WARNING LOGNAME ": FIFO read error\n");
899 spin_unlock_irqrestore(&dev.lock, flags);
900 return n;
901 }
902 spin_unlock_irqrestore(&dev.lock, flags);
903 buf += n;
904 count -= n;
905
906 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
907 dev.last_recbank = -1;
908 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
909 set_bit(F_READING, &dev.flags);
910 }
911
912 if (dev.rec_ndelay)
913 return count == len ? -EAGAIN : len - count;
914
915 if (count > 0) {
916 set_bit(F_READBLOCK, &dev.flags);
917 if (!interruptible_sleep_on_timeout(
918 &dev.readblock,
919 get_rec_delay_jiffies(DAR_BUFF_SIZE)))
920 clear_bit(F_READING, &dev.flags);
921 clear_bit(F_READBLOCK, &dev.flags);
922 if (signal_pending(current))
923 return -EINTR;
924 }
925 }
926
927 return len - count;
928 }
929
930 static int dsp_write(const char *buf, size_t len)
931 {
932 int count = len;
933
934 while (count > 0) {
935 int n;
936 unsigned long flags;
937
938 /* Critical section: protect fifo in non-interrupt */
939 spin_lock_irqsave(&dev.lock, flags);
940 if ((n = msnd_fifo_write(&dev.DAPF, buf, count, 1)) < 0) {
941 printk(KERN_WARNING LOGNAME ": FIFO write error\n");
942 spin_unlock_irqrestore(&dev.lock, flags);
943 return n;
944 }
945 spin_unlock_irqrestore(&dev.lock, flags);
946 buf += n;
947 count -= n;
948
949 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
950 dev.last_playbank = -1;
951 if (pack_DAPF_to_DAPQ(1) > 0)
952 set_bit(F_WRITING, &dev.flags);
953 }
954
955 if (dev.play_ndelay)
956 return count == len ? -EAGAIN : len - count;
957
958 if (count > 0) {
959 set_bit(F_WRITEBLOCK, &dev.flags);
960 interruptible_sleep_on_timeout(
961 &dev.writeblock,
962 get_play_delay_jiffies(DAP_BUFF_SIZE));
963 clear_bit(F_WRITEBLOCK, &dev.flags);
964 if (signal_pending(current))
965 return -EINTR;
966 }
967 }
968
969 return len - count;
970 }
971
972 static ssize_t dev_read(struct file *file, char *buf, size_t count, loff_t *off)
973 {
974 int minor = MINOR(file->f_dentry->d_inode->i_rdev);
975 if (minor == dev.dsp_minor)
976 return dsp_read(buf, count);
977 else
978 return -EINVAL;
979 }
980
981 static ssize_t dev_write(struct file *file, const char *buf, size_t count, loff_t *off)
982 {
983 int minor = MINOR(file->f_dentry->d_inode->i_rdev);
984 if (minor == dev.dsp_minor)
985 return dsp_write(buf, count);
986 else
987 return -EINVAL;
988 }
989
990 static __inline__ void eval_dsp_msg(register WORD wMessage)
991 {
992 switch (HIBYTE(wMessage)) {
993 case HIMT_PLAY_DONE:
994 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
995 break;
996 dev.last_playbank = LOBYTE(wMessage);
997
998 if (pack_DAPF_to_DAPQ(0) <= 0) {
999 if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1000 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1001 wake_up_interruptible(&dev.writeflush);
1002 }
1003 clear_bit(F_WRITING, &dev.flags);
1004 }
1005
1006 if (test_bit(F_WRITEBLOCK, &dev.flags))
1007 wake_up_interruptible(&dev.writeblock);
1008 break;
1009
1010 case HIMT_RECORD_DONE:
1011 if (dev.last_recbank == LOBYTE(wMessage))
1012 break;
1013 dev.last_recbank = LOBYTE(wMessage);
1014
1015 pack_DARQ_to_DARF(dev.last_recbank);
1016
1017 if (test_bit(F_READBLOCK, &dev.flags))
1018 wake_up_interruptible(&dev.readblock);
1019 break;
1020
1021 case HIMT_DSP:
1022 switch (LOBYTE(wMessage)) {
1023 #ifndef MSND_CLASSIC
1024 case HIDSP_PLAY_UNDER:
1025 #endif
1026 case HIDSP_INT_PLAY_UNDER:
1027 /* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1028 clear_bit(F_WRITING, &dev.flags);
1029 break;
1030
1031 case HIDSP_INT_RECORD_OVER:
1032 /* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1033 clear_bit(F_READING, &dev.flags);
1034 break;
1035
1036 default:
1037 /* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1038 LOBYTE(wMessage), LOBYTE(wMessage)); */
1039 break;
1040 }
1041 break;
1042
1043 case HIMT_MIDI_IN_UCHAR:
1044 if (dev.midi_in_interrupt)
1045 (*dev.midi_in_interrupt)(&dev);
1046 break;
1047
1048 default:
1049 /* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1050 break;
1051 }
1052 }
1053
1054 static void intr(int irq, void *dev_id, struct pt_regs *regs)
1055 {
1056 /* Send ack to DSP */
1057 inb(dev.io + HP_RXL);
1058
1059 /* Evaluate queued DSP messages */
1060 while (isa_readw(dev.DSPQ + JQS_wTail) != isa_readw(dev.DSPQ + JQS_wHead)) {
1061 register WORD wTmp;
1062
1063 eval_dsp_msg(isa_readw(dev.pwDSPQData + 2*isa_readw(dev.DSPQ + JQS_wHead)));
1064
1065 if ((wTmp = isa_readw(dev.DSPQ + JQS_wHead) + 1) > isa_readw(dev.DSPQ + JQS_wSize))
1066 isa_writew(0, dev.DSPQ + JQS_wHead);
1067 else
1068 isa_writew(wTmp, dev.DSPQ + JQS_wHead);
1069 }
1070 }
1071
1072 static struct file_operations dev_fileops = {
1073 owner: THIS_MODULE,
1074 read: dev_read,
1075 write: dev_write,
1076 ioctl: dev_ioctl,
1077 open: dev_open,
1078 release: dev_release,
1079 };
1080
1081 static int reset_dsp(void)
1082 {
1083 int timeout = 100;
1084
1085 outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1086 mdelay(1);
1087 #ifndef MSND_CLASSIC
1088 dev.info = inb(dev.io + HP_INFO);
1089 #endif
1090 outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1091 mdelay(1);
1092 while (timeout-- > 0) {
1093 if (inb(dev.io + HP_CVR) == HP_CVR_DEF)
1094 return 0;
1095 mdelay(1);
1096 }
1097 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1098
1099 return -EIO;
1100 }
1101
1102 static int __init probe_multisound(void)
1103 {
1104 #ifndef MSND_CLASSIC
1105 char *xv, *rev = NULL;
1106 char *pin = "Pinnacle", *fiji = "Fiji";
1107 char *pinfiji = "Pinnacle/Fiji";
1108 #endif
1109
1110 if (check_region(dev.io, dev.numio)) {
1111 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1112 return -ENODEV;
1113 }
1114 request_region(dev.io, dev.numio, "probing");
1115
1116 if (reset_dsp() < 0) {
1117 release_region(dev.io, dev.numio);
1118 return -ENODEV;
1119 }
1120
1121 #ifdef MSND_CLASSIC
1122 dev.name = "Classic/Tahiti/Monterey";
1123 printk(KERN_INFO LOGNAME ": %s, "
1124 #else
1125 switch (dev.info >> 4) {
1126 case 0xf: xv = "<= 1.15"; break;
1127 case 0x1: xv = "1.18/1.2"; break;
1128 case 0x2: xv = "1.3"; break;
1129 case 0x3: xv = "1.4"; break;
1130 default: xv = "unknown"; break;
1131 }
1132
1133 switch (dev.info & 0x7) {
1134 case 0x0: rev = "I"; dev.name = pin; break;
1135 case 0x1: rev = "F"; dev.name = pin; break;
1136 case 0x2: rev = "G"; dev.name = pin; break;
1137 case 0x3: rev = "H"; dev.name = pin; break;
1138 case 0x4: rev = "E"; dev.name = fiji; break;
1139 case 0x5: rev = "C"; dev.name = fiji; break;
1140 case 0x6: rev = "D"; dev.name = fiji; break;
1141 case 0x7:
1142 rev = "A-B (Fiji) or A-E (Pinnacle)";
1143 dev.name = pinfiji;
1144 break;
1145 }
1146 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1147 #endif /* MSND_CLASSIC */
1148 "I/O 0x%x-0x%x, IRQ %d, memory mapped to 0x%lX-0x%lX\n",
1149 dev.name,
1150 #ifndef MSND_CLASSIC
1151 rev, xv,
1152 #endif
1153 dev.io, dev.io + dev.numio - 1,
1154 dev.irq,
1155 dev.base, dev.base + 0x7fff);
1156
1157 release_region(dev.io, dev.numio);
1158 return 0;
1159 }
1160
1161 static int init_sma(void)
1162 {
1163 static int initted;
1164 WORD mastVolLeft, mastVolRight;
1165 unsigned long flags;
1166
1167 #ifdef MSND_CLASSIC
1168 outb(dev.memid, dev.io + HP_MEMM);
1169 #endif
1170 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1171 if (initted) {
1172 mastVolLeft = isa_readw(dev.SMA + SMA_wCurrMastVolLeft);
1173 mastVolRight = isa_readw(dev.SMA + SMA_wCurrMastVolRight);
1174 } else
1175 mastVolLeft = mastVolRight = 0;
1176 isa_memset_io(dev.base, 0, 0x8000);
1177
1178 /* Critical section: bank 1 access */
1179 spin_lock_irqsave(&dev.lock, flags);
1180 outb(HPBLKSEL_1, dev.io + HP_BLKS);
1181 isa_memset_io(dev.base, 0, 0x8000);
1182 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1183 spin_unlock_irqrestore(&dev.lock, flags);
1184
1185 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1186 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1187 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1188
1189 /* Motorola 56k shared memory base */
1190 dev.SMA = dev.base + SMA_STRUCT_START;
1191
1192 /* Digital audio play queue */
1193 dev.DAPQ = dev.base + DAPQ_OFFSET;
1194 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1195
1196 /* Digital audio record queue */
1197 dev.DARQ = dev.base + DARQ_OFFSET;
1198 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1199
1200 /* MIDI out queue */
1201 dev.MODQ = dev.base + MODQ_OFFSET;
1202 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1203
1204 /* MIDI in queue */
1205 dev.MIDQ = dev.base + MIDQ_OFFSET;
1206 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1207
1208 /* DSP -> host message queue */
1209 dev.DSPQ = dev.base + DSPQ_OFFSET;
1210 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1211
1212 /* Setup some DSP values */
1213 #ifndef MSND_CLASSIC
1214 isa_writew(1, dev.SMA + SMA_wCurrPlayFormat);
1215 isa_writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1216 isa_writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1217 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1218 #endif
1219 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1220 isa_writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1221 isa_writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1222 #ifndef MSND_CLASSIC
1223 isa_writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1224 isa_writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1225 #endif
1226 isa_writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1227
1228 initted = 1;
1229
1230 return 0;
1231 }
1232
1233 static int __init calibrate_adc(WORD srate)
1234 {
1235 isa_writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1236 if (dev.calibrate_signal == 0)
1237 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1238 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1239 else
1240 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1241 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1242 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1243 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1244 current->state = TASK_INTERRUPTIBLE;
1245 schedule_timeout(HZ / 3);
1246 return 0;
1247 }
1248 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1249
1250 return -EIO;
1251 }
1252
1253 static int upload_dsp_code(void)
1254 {
1255 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1256 #ifndef HAVE_DSPCODEH
1257 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1258 if (!INITCODE) {
1259 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1260 return -EBUSY;
1261 }
1262
1263 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1264 if (!PERMCODE) {
1265 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1266 vfree(INITCODE);
1267 return -EBUSY;
1268 }
1269 #endif
1270 isa_memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1271 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1272 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1273 return -ENODEV;
1274 }
1275 #ifdef HAVE_DSPCODEH
1276 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1277 #else
1278 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1279 #endif
1280
1281 #ifndef HAVE_DSPCODEH
1282 vfree(INITCODE);
1283 vfree(PERMCODE);
1284 #endif
1285
1286 return 0;
1287 }
1288
1289 #ifdef MSND_CLASSIC
1290 static void reset_proteus(void)
1291 {
1292 outb(HPPRORESET_ON, dev.io + HP_PROR);
1293 mdelay(TIME_PRO_RESET);
1294 outb(HPPRORESET_OFF, dev.io + HP_PROR);
1295 mdelay(TIME_PRO_RESET_DONE);
1296 }
1297 #endif
1298
1299 static int initialize(void)
1300 {
1301 int err, timeout;
1302
1303 #ifdef MSND_CLASSIC
1304 outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1305 outb(HPBITMODE_16, dev.io + HP_BITM);
1306
1307 reset_proteus();
1308 #endif
1309 if ((err = init_sma()) < 0) {
1310 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1311 return err;
1312 }
1313
1314 if ((err = reset_dsp()) < 0)
1315 return err;
1316
1317 if ((err = upload_dsp_code()) < 0) {
1318 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1319 return err;
1320 }
1321
1322 timeout = 200;
1323 while (isa_readw(dev.base)) {
1324 mdelay(1);
1325 if (!timeout--) {
1326 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1327 return -EIO;
1328 }
1329 }
1330
1331 mixer_setup();
1332
1333 return 0;
1334 }
1335
1336 static int dsp_full_reset(void)
1337 {
1338 int rv;
1339
1340 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1341 return 0;
1342
1343 set_bit(F_RESETTING, &dev.flags);
1344 printk(KERN_INFO LOGNAME ": DSP reset\n");
1345 dsp_halt(NULL); /* Unconditionally halt */
1346 if ((rv = initialize()))
1347 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1348 force_recsrc(dev.recsrc);
1349 dsp_open(NULL);
1350 clear_bit(F_RESETTING, &dev.flags);
1351
1352 return rv;
1353 }
1354
1355 static int __init attach_multisound(void)
1356 {
1357 int err;
1358
1359 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1360 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1361 return err;
1362 }
1363 request_region(dev.io, dev.numio, dev.name);
1364
1365 if ((err = dsp_full_reset()) < 0) {
1366 release_region(dev.io, dev.numio);
1367 free_irq(dev.irq, &dev);
1368 return err;
1369 }
1370
1371 if ((err = msnd_register(&dev)) < 0) {
1372 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1373 release_region(dev.io, dev.numio);
1374 free_irq(dev.irq, &dev);
1375 return err;
1376 }
1377
1378 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1379 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1380 msnd_unregister(&dev);
1381 release_region(dev.io, dev.numio);
1382 free_irq(dev.irq, &dev);
1383 return dev.dsp_minor;
1384 }
1385
1386 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1387 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1388 unregister_sound_mixer(dev.mixer_minor);
1389 msnd_unregister(&dev);
1390 release_region(dev.io, dev.numio);
1391 free_irq(dev.irq, &dev);
1392 return dev.mixer_minor;
1393 }
1394
1395 dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1396
1397 disable_irq(dev.irq);
1398 calibrate_adc(dev.play_sample_rate);
1399 #ifndef MSND_CLASSIC
1400 force_recsrc(SOUND_MASK_IMIX);
1401 #endif
1402
1403 return 0;
1404 }
1405
1406 #ifdef MODULE
1407 static void __exit unload_multisound(void)
1408 {
1409 release_region(dev.io, dev.numio);
1410 free_irq(dev.irq, &dev);
1411 unregister_sound_mixer(dev.mixer_minor);
1412 unregister_sound_dsp(dev.dsp_minor);
1413 msnd_unregister(&dev);
1414 }
1415 #endif
1416
1417 #ifndef MSND_CLASSIC
1418
1419 /* Pinnacle/Fiji Logical Device Configuration */
1420
1421 static int __init msnd_write_cfg(int cfg, int reg, int value)
1422 {
1423 outb(reg, cfg);
1424 outb(value, cfg + 1);
1425 if (value != inb(cfg + 1)) {
1426 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1427 return -EIO;
1428 }
1429 return 0;
1430 }
1431
1432 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1433 {
1434 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1435 return -EIO;
1436 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1437 return -EIO;
1438 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1439 return -EIO;
1440 return 0;
1441 }
1442
1443 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1444 {
1445 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1446 return -EIO;
1447 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1448 return -EIO;
1449 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1450 return -EIO;
1451 return 0;
1452 }
1453
1454 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1455 {
1456 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1457 return -EIO;
1458 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1459 return -EIO;
1460 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1461 return -EIO;
1462 return 0;
1463 }
1464
1465 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1466 {
1467 WORD wmem;
1468
1469 mem >>= 8;
1470 mem &= 0xfff;
1471 wmem = (WORD)mem;
1472 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1473 return -EIO;
1474 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1475 return -EIO;
1476 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1477 return -EIO;
1478 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1479 return -EIO;
1480 return 0;
1481 }
1482
1483 static int __init msnd_activate_logical(int cfg, int num)
1484 {
1485 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1486 return -EIO;
1487 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1488 return -EIO;
1489 return 0;
1490 }
1491
1492 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1493 {
1494 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1495 return -EIO;
1496 if (msnd_write_cfg_io0(cfg, num, io0))
1497 return -EIO;
1498 if (msnd_write_cfg_io1(cfg, num, io1))
1499 return -EIO;
1500 if (msnd_write_cfg_irq(cfg, num, irq))
1501 return -EIO;
1502 if (msnd_write_cfg_mem(cfg, num, mem))
1503 return -EIO;
1504 if (msnd_activate_logical(cfg, num))
1505 return -EIO;
1506 return 0;
1507 }
1508
1509 typedef struct msnd_pinnacle_cfg_device {
1510 WORD io0, io1, irq;
1511 int mem;
1512 } msnd_pinnacle_cfg_t[4];
1513
1514 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1515 {
1516 int i;
1517
1518 /* Reset devices if told to */
1519 if (reset) {
1520 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1521 for (i = 0; i < 4; ++i)
1522 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1523 return -EIO;
1524 }
1525
1526 /* Configure specified devices */
1527 for (i = 0; i < 4; ++i) {
1528
1529 switch (i) {
1530 case 0: /* DSP */
1531 if (!(device[i].io0 && device[i].irq && device[i].mem))
1532 continue;
1533 break;
1534 case 1: /* MPU */
1535 if (!(device[i].io0 && device[i].irq))
1536 continue;
1537 printk(KERN_INFO LOGNAME
1538 ": Configuring MPU to I/O 0x%x IRQ %d\n",
1539 device[i].io0, device[i].irq);
1540 break;
1541 case 2: /* IDE */
1542 if (!(device[i].io0 && device[i].io1 && device[i].irq))
1543 continue;
1544 printk(KERN_INFO LOGNAME
1545 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1546 device[i].io0, device[i].io1, device[i].irq);
1547 break;
1548 case 3: /* Joystick */
1549 if (!(device[i].io0))
1550 continue;
1551 printk(KERN_INFO LOGNAME
1552 ": Configuring joystick to I/O 0x%x\n",
1553 device[i].io0);
1554 break;
1555 }
1556
1557 /* Configure the device */
1558 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1559 return -EIO;
1560 }
1561
1562 return 0;
1563 }
1564 #endif
1565
1566 #ifdef MODULE
1567 MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>");
1568 MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver");
1569 MODULE_PARM (io, "i");
1570 MODULE_PARM (irq, "i");
1571 MODULE_PARM (mem, "i");
1572 MODULE_PARM (write_ndelay, "i");
1573 MODULE_PARM (major, "i");
1574 MODULE_PARM (fifosize, "i");
1575 MODULE_PARM (calibrate_signal, "i");
1576 #ifndef MSND_CLASSIC
1577 MODULE_PARM (digital, "i");
1578 MODULE_PARM (cfg, "i");
1579 MODULE_PARM (reset, "i");
1580 MODULE_PARM (mpu_io, "i");
1581 MODULE_PARM (mpu_irq, "i");
1582 MODULE_PARM (ide_io0, "i");
1583 MODULE_PARM (ide_io1, "i");
1584 MODULE_PARM (ide_irq, "i");
1585 MODULE_PARM (joystick_io, "i");
1586 #endif
1587
1588 static int io __initdata = -1;
1589 static int irq __initdata = -1;
1590 static int mem __initdata = -1;
1591 static int write_ndelay __initdata = -1;
1592
1593 #ifndef MSND_CLASSIC
1594 /* Pinnacle/Fiji non-PnP Config Port */
1595 static int cfg __initdata = -1;
1596
1597 /* Extra Peripheral Configuration */
1598 static int reset __initdata = 0;
1599 static int mpu_io __initdata = 0;
1600 static int mpu_irq __initdata = 0;
1601 static int ide_io0 __initdata = 0;
1602 static int ide_io1 __initdata = 0;
1603 static int ide_irq __initdata = 0;
1604 static int joystick_io __initdata = 0;
1605
1606 /* If we have the digital daugherboard... */
1607 static int digital __initdata = 0;
1608 #endif
1609
1610 static int fifosize __initdata = DEFFIFOSIZE;
1611 static int calibrate_signal __initdata = 0;
1612
1613 #else /* not a module */
1614
1615 static int write_ndelay __initdata = -1;
1616
1617 #ifdef MSND_CLASSIC
1618 static int io __initdata = CONFIG_MSNDCLAS_IO;
1619 static int irq __initdata = CONFIG_MSNDCLAS_IRQ;
1620 static int mem __initdata = CONFIG_MSNDCLAS_MEM;
1621 #else /* Pinnacle/Fiji */
1622
1623 static int io __initdata = CONFIG_MSNDPIN_IO;
1624 static int irq __initdata = CONFIG_MSNDPIN_IRQ;
1625 static int mem __initdata = CONFIG_MSNDPIN_MEM;
1626
1627 /* Pinnacle/Fiji non-PnP Config Port */
1628 #ifdef CONFIG_MSNDPIN_NONPNP
1629 # ifndef CONFIG_MSNDPIN_CFG
1630 # define CONFIG_MSNDPIN_CFG 0x250
1631 # endif
1632 #else
1633 # ifdef CONFIG_MSNDPIN_CFG
1634 # undef CONFIG_MSNDPIN_CFG
1635 # endif
1636 # define CONFIG_MSNDPIN_CFG -1
1637 #endif
1638 static int cfg __initdata = CONFIG_MSNDPIN_CFG;
1639 /* If not a module, we don't need to bother with reset=1 */
1640 static int reset;
1641
1642 /* Extra Peripheral Configuration (Default: Disable) */
1643 #ifndef CONFIG_MSNDPIN_MPU_IO
1644 # define CONFIG_MSNDPIN_MPU_IO 0
1645 #endif
1646 static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO;
1647
1648 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1649 # define CONFIG_MSNDPIN_MPU_IRQ 0
1650 #endif
1651 static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ;
1652
1653 #ifndef CONFIG_MSNDPIN_IDE_IO0
1654 # define CONFIG_MSNDPIN_IDE_IO0 0
1655 #endif
1656 static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0;
1657
1658 #ifndef CONFIG_MSNDPIN_IDE_IO1
1659 # define CONFIG_MSNDPIN_IDE_IO1 0
1660 #endif
1661 static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1;
1662
1663 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1664 # define CONFIG_MSNDPIN_IDE_IRQ 0
1665 #endif
1666 static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ;
1667
1668 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1669 # define CONFIG_MSNDPIN_JOYSTICK_IO 0
1670 #endif
1671 static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO;
1672
1673 /* Have SPDIF (Digital) Daughterboard */
1674 #ifndef CONFIG_MSNDPIN_DIGITAL
1675 # define CONFIG_MSNDPIN_DIGITAL 0
1676 #endif
1677 static int digital __initdata = CONFIG_MSNDPIN_DIGITAL;
1678
1679 #endif /* MSND_CLASSIC */
1680
1681 #ifndef CONFIG_MSND_FIFOSIZE
1682 # define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE
1683 #endif
1684 static int fifosize __initdata = CONFIG_MSND_FIFOSIZE;
1685
1686 #ifndef CONFIG_MSND_CALSIGNAL
1687 # define CONFIG_MSND_CALSIGNAL 0
1688 #endif
1689 static int
1690 calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL;
1691 #endif /* MODULE */
1692
1693
1694 static int __init msnd_init(void)
1695 {
1696 int err;
1697 #ifndef MSND_CLASSIC
1698 static msnd_pinnacle_cfg_t pinnacle_devs;
1699 #endif /* MSND_CLASSIC */
1700
1701 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1702 VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1703
1704 if (io == -1 || irq == -1 || mem == -1)
1705 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1706
1707 if (io == -1 ||
1708 !(io == 0x290 ||
1709 io == 0x260 ||
1710 io == 0x250 ||
1711 io == 0x240 ||
1712 io == 0x230 ||
1713 io == 0x220 ||
1714 io == 0x210 ||
1715 io == 0x3e0)) {
1716 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1717 return -EINVAL;
1718 }
1719
1720 if (irq == -1 ||
1721 !(irq == 5 ||
1722 irq == 7 ||
1723 irq == 9 ||
1724 irq == 10 ||
1725 irq == 11 ||
1726 irq == 12)) {
1727 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1728 return -EINVAL;
1729 }
1730
1731 if (mem == -1 ||
1732 !(mem == 0xb0000 ||
1733 mem == 0xc8000 ||
1734 mem == 0xd0000 ||
1735 mem == 0xd8000 ||
1736 mem == 0xe0000 ||
1737 mem == 0xe8000)) {
1738 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1739 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1740 return -EINVAL;
1741 }
1742
1743 #ifdef MSND_CLASSIC
1744 switch (irq) {
1745 case 5: dev.irqid = HPIRQ_5; break;
1746 case 7: dev.irqid = HPIRQ_7; break;
1747 case 9: dev.irqid = HPIRQ_9; break;
1748 case 10: dev.irqid = HPIRQ_10; break;
1749 case 11: dev.irqid = HPIRQ_11; break;
1750 case 12: dev.irqid = HPIRQ_12; break;
1751 }
1752
1753 switch (mem) {
1754 case 0xb0000: dev.memid = HPMEM_B000; break;
1755 case 0xc8000: dev.memid = HPMEM_C800; break;
1756 case 0xd0000: dev.memid = HPMEM_D000; break;
1757 case 0xd8000: dev.memid = HPMEM_D800; break;
1758 case 0xe0000: dev.memid = HPMEM_E000; break;
1759 case 0xe8000: dev.memid = HPMEM_E800; break;
1760 }
1761 #else
1762 if (cfg == -1) {
1763 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1764 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1765 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1766 return -EINVAL;
1767 } else {
1768 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1769
1770 /* DSP */
1771 pinnacle_devs[0].io0 = io;
1772 pinnacle_devs[0].irq = irq;
1773 pinnacle_devs[0].mem = mem;
1774
1775 /* The following are Pinnacle specific */
1776
1777 /* MPU */
1778 pinnacle_devs[1].io0 = mpu_io;
1779 pinnacle_devs[1].irq = mpu_irq;
1780
1781 /* IDE */
1782 pinnacle_devs[2].io0 = ide_io0;
1783 pinnacle_devs[2].io1 = ide_io1;
1784 pinnacle_devs[2].irq = ide_irq;
1785
1786 /* Joystick */
1787 pinnacle_devs[3].io0 = joystick_io;
1788
1789 if (check_region(cfg, 2)) {
1790 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1791 return -EIO;
1792 }
1793
1794 request_region(cfg, 2, "Pinnacle/Fiji Config");
1795 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1796 printk(KERN_ERR LOGNAME ": Device configuration error\n");
1797 release_region(cfg, 2);
1798 return -EIO;
1799 }
1800 release_region(cfg, 2);
1801 }
1802 #endif /* MSND_CLASSIC */
1803
1804 if (fifosize < 16)
1805 fifosize = 16;
1806
1807 if (fifosize > 1024)
1808 fifosize = 1024;
1809
1810 set_default_audio_parameters();
1811 #ifdef MSND_CLASSIC
1812 dev.type = msndClassic;
1813 #else
1814 dev.type = msndPinnacle;
1815 #endif
1816 dev.io = io;
1817 dev.numio = DSP_NUMIO;
1818 dev.irq = irq;
1819 dev.base = mem;
1820 dev.fifosize = fifosize * 1024;
1821 dev.calibrate_signal = calibrate_signal ? 1 : 0;
1822 dev.recsrc = 0;
1823 dev.dspq_data_buff = DSPQ_DATA_BUFF;
1824 dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1825 if (write_ndelay == -1)
1826 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1827 if (write_ndelay)
1828 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1829 else
1830 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1831 #ifndef MSND_CLASSIC
1832 if (digital)
1833 set_bit(F_HAVEDIGITAL, &dev.flags);
1834 #endif
1835 init_waitqueue_head(&dev.writeblock);
1836 init_waitqueue_head(&dev.readblock);
1837 init_waitqueue_head(&dev.writeflush);
1838 msnd_fifo_init(&dev.DAPF);
1839 msnd_fifo_init(&dev.DARF);
1840 spin_lock_init(&dev.lock);
1841 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1842 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1843 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1844 return err;
1845 }
1846
1847 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1848 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1849 msnd_fifo_free(&dev.DAPF);
1850 return err;
1851 }
1852
1853 if ((err = probe_multisound()) < 0) {
1854 printk(KERN_ERR LOGNAME ": Probe failed\n");
1855 msnd_fifo_free(&dev.DAPF);
1856 msnd_fifo_free(&dev.DARF);
1857 return err;
1858 }
1859
1860 if ((err = attach_multisound()) < 0) {
1861 printk(KERN_ERR LOGNAME ": Attach failed\n");
1862 msnd_fifo_free(&dev.DAPF);
1863 msnd_fifo_free(&dev.DARF);
1864 return err;
1865 }
1866
1867 return 0;
1868 }
1869
1870 static void __exit msdn_cleanup(void)
1871 {
1872 unload_multisound();
1873 msnd_fifo_free(&dev.DAPF);
1874 msnd_fifo_free(&dev.DARF);
1875 }
1876
1877 module_init(msnd_init);
1878 module_exit(msdn_cleanup);
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