drivers/isdn/hisax/hfc_2bds0.h

   1 /* $Id: hfc_2bds0.h,v 1.4 2000/06/26 08:59:12 keil Exp $
   2  *
   3  *  specific defines for CCD's HFC 2BDS0
   4  *
   5  * Author       Karsten Keil (keil@isdn4linux.de)
   6  *
   7  * This file is (c) under GNU PUBLIC LICENSE
   8  *
   9  */
  10
  11 #define HFCD_CIRM       0x18
  12 #define HFCD_CTMT       0x19
  13 #define HFCD_INT_M1     0x1A
  14 #define HFCD_INT_M2     0x1B
  15 #define HFCD_INT_S1     0x1E
  16 #define HFCD_STAT       0x1C
  17 #define HFCD_STAT_DISB  0x1D
  18 #define HFCD_STATES     0x30
  19 #define HFCD_SCTRL      0x31
  20 #define HFCD_TEST       0x32
  21 #define HFCD_SQ         0x34
  22 #define HFCD_CLKDEL     0x37
  23 #define HFCD_MST_MODE   0x2E
  24 #define HFCD_CONN       0x2F
  25
  26 #define HFCD_FIFO       0x80
  27 #define HFCD_Z1         0x10
  28 #define HFCD_Z2         0x18
  29 #define HFCD_Z_LOW      0x00
  30 #define HFCD_Z_HIGH     0x04
  31 #define HFCD_F1_INC     0x12
  32 #define HFCD_FIFO_IN    0x16
  33 #define HFCD_F1         0x1a
  34 #define HFCD_F2         0x1e
  35 #define HFCD_F2_INC     0x22
  36 #define HFCD_FIFO_OUT   0x26
  37 #define HFCD_REC        0x01
  38 #define HFCD_SEND       0x00
  39
  40 #define HFCB_FIFO       0x80
  41 #define HFCB_Z1         0x00
  42 #define HFCB_Z2         0x08
  43 #define HFCB_Z_LOW      0x00
  44 #define HFCB_Z_HIGH     0x04
  45 #define HFCB_F1_INC     0x28
  46 #define HFCB_FIFO_IN    0x2c
  47 #define HFCB_F1         0x30
  48 #define HFCB_F2         0x34
  49 #define HFCB_F2_INC     0x38
  50 #define HFCB_FIFO_OUT   0x3c
  51 #define HFCB_REC        0x01
  52 #define HFCB_SEND       0x00
  53 #define HFCB_B1         0x00
  54 #define HFCB_B2         0x02
  55 #define HFCB_CHANNEL(ch) (ch ? HFCB_B2 : HFCB_B1)
  56
  57 #define HFCD_STATUS     0
  58 #define HFCD_DATA       1
  59 #define HFCD_DATA_NODEB 2
  60
  61 /* Status (READ) */
  62 #define HFCD_BUSY       0x01
  63 #define HFCD_BUSY_NBUSY 0x04
  64 #define HFCD_TIMER_ELAP 0x10
  65 #define HFCD_STATINT    0x20
  66 #define HFCD_FRAMEINT   0x40
  67 #define HFCD_ANYINT     0x80
  68
  69 /* CTMT (Write) */
  70 #define HFCD_CLTIMER 0x80
  71 #define HFCD_TIM25  0x00
  72 #define HFCD_TIM50  0x08
  73 #define HFCD_TIM400 0x10
  74 #define HFCD_TIM800 0x18
  75 #define HFCD_AUTO_TIMER 0x20
  76 #define HFCD_TRANSB2 0x02
  77 #define HFCD_TRANSB1 0x01
  78
  79 /* CIRM (Write) */
  80 #define HFCD_RESET      0x08
  81 #define HFCD_MEM8K      0x10
  82 #define HFCD_INTA       0x01
  83 #define HFCD_INTB       0x02
  84 #define HFCD_INTC       0x03
  85 #define HFCD_INTD       0x04
  86 #define HFCD_INTE       0x05
  87 #define HFCD_INTF       0x06
  88
  89 /* INT_M1;INT_S1 */
  90 #define HFCD_INTS_B1TRANS       0x01
  91 #define HFCD_INTS_B2TRANS       0x02
  92 #define HFCD_INTS_DTRANS        0x04
  93 #define HFCD_INTS_B1REC         0x08
  94 #define HFCD_INTS_B2REC         0x10
  95 #define HFCD_INTS_DREC          0x20
  96 #define HFCD_INTS_L1STATE       0x40
  97 #define HFCD_INTS_TIMER         0x80
  98
  99 /* INT_M2 */
 100 #define HFCD_IRQ_ENABLE         0x08
 101
 102 /* STATES */
 103 #define HFCD_LOAD_STATE         0x10
 104 #define HFCD_ACTIVATE           0x20
 105 #define HFCD_DO_ACTION          0x40
 106
 107 /* HFCD_MST_MODE */
 108 #define HFCD_MASTER             0x01
 109
 110 /* HFCD_SCTRL */
 111 #define SCTRL_B1_ENA            0x01
 112 #define SCTRL_B2_ENA            0x02
 113 #define SCTRL_LOW_PRIO          0x08
 114 #define SCTRL_SQ_ENA            0x10
 115 #define SCTRL_TEST              0x20
 116 #define SCTRL_NONE_CAP          0x40
 117 #define SCTRL_PWR_DOWN          0x80
 118
 119 /* HFCD_TEST */
 120 #define HFCD_AUTO_AWAKE         0x01
 121
 122 extern void main_irq_2bds0(struct BCState *bcs);
 123 extern void init2bds0(struct IsdnCardState *cs);
 124 extern void release2bds0(struct IsdnCardState *cs);
 125 extern void hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val);
 126 extern void set_cs_func(struct IsdnCardState *cs);