1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*-
2 * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
28 * Rickard E. (Rik) Faith <faith@valinux.com>
31 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
38 #if defined(__linux__)
39 #include <asm/ioctl.h> /* For _IO* macros */
40 #define DRM_IOCTL_NR(n) _IOC_NR(n)
41 #elif defined(__FreeBSD__)
42 #include <sys/ioccom.h>
43 #define DRM_IOCTL_NR(n) ((n) & 0xff)
46 #define DRM_PROC_DEVICES "/proc/devices"
47 #define DRM_PROC_MISC "/proc/misc"
48 #define DRM_PROC_DRM "/proc/drm"
49 #define DRM_DEV_DRM "/dev/drm"
50 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
55 #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
56 #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
57 #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
58 #define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */
60 #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */
61 #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */
62 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
63 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
64 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
66 typedef unsigned long drm_handle_t
;
67 typedef unsigned int drm_context_t
;
68 typedef unsigned int drm_drawable_t
;
69 typedef unsigned int drm_magic_t
;
71 /* Warning: If you change this structure, make sure you change
72 * XF86DRIClipRectRec in the server as well */
74 typedef struct drm_clip_rect
{
81 /* Seperate include files for the i810/mga/r128 specific structures */
86 typedef struct drm_version
{
87 int version_major
; /* Major version */
88 int version_minor
; /* Minor version */
89 int version_patchlevel
;/* Patch level */
90 size_t name_len
; /* Length of name buffer */
91 char *name
; /* Name of driver */
92 size_t date_len
; /* Length of date buffer */
93 char *date
; /* User-space buffer to hold date */
94 size_t desc_len
; /* Length of desc buffer */
95 char *desc
; /* User-space buffer to hold desc */
98 typedef struct drm_unique
{
99 size_t unique_len
; /* Length of unique */
100 char *unique
; /* Unique name for driver instantiation */
103 typedef struct drm_list
{
104 int count
; /* Length of user-space structures */
105 drm_version_t
*version
;
108 typedef struct drm_block
{
112 typedef struct drm_control
{
122 typedef enum drm_map_type
{
123 _DRM_FRAME_BUFFER
= 0, /* WC (no caching), no core dump */
124 _DRM_REGISTERS
= 1, /* no caching, no core dump */
125 _DRM_SHM
= 2, /* shared, cached */
126 _DRM_AGP
= 3 /* AGP/GART */
129 typedef enum drm_map_flags
{
130 _DRM_RESTRICTED
= 0x01, /* Cannot be mapped to user-virtual */
131 _DRM_READ_ONLY
= 0x02,
132 _DRM_LOCKED
= 0x04, /* shared, cached, locked */
133 _DRM_KERNEL
= 0x08, /* kernel requires access */
134 _DRM_WRITE_COMBINING
= 0x10, /* use write-combining if available */
135 _DRM_CONTAINS_LOCK
= 0x20 /* SHM page that contains lock */
138 typedef struct drm_map
{
139 unsigned long offset
; /* Requested physical address (0 for SAREA)*/
140 unsigned long size
; /* Requested physical size (bytes) */
141 drm_map_type_t type
; /* Type of memory to map */
142 drm_map_flags_t flags
; /* Flags */
143 void *handle
; /* User-space: "Handle" to pass to mmap */
144 /* Kernel-space: kernel-virtual address */
145 int mtrr
; /* MTRR slot used */
149 typedef enum drm_lock_flags
{
150 _DRM_LOCK_READY
= 0x01, /* Wait until hardware is ready for DMA */
151 _DRM_LOCK_QUIESCENT
= 0x02, /* Wait until hardware quiescent */
152 _DRM_LOCK_FLUSH
= 0x04, /* Flush this context's DMA queue first */
153 _DRM_LOCK_FLUSH_ALL
= 0x08, /* Flush all DMA queues first */
154 /* These *HALT* flags aren't supported yet
155 -- they will be used to support the
156 full-screen DGA-like mode. */
157 _DRM_HALT_ALL_QUEUES
= 0x10, /* Halt all current and future queues */
158 _DRM_HALT_CUR_QUEUES
= 0x20 /* Halt all current queues */
161 typedef struct drm_lock
{
163 drm_lock_flags_t flags
;
166 typedef enum drm_dma_flags
{ /* These values *MUST* match xf86drm.h */
167 /* Flags for DMA buffer dispatch */
168 _DRM_DMA_BLOCK
= 0x01, /* Block until buffer dispatched.
169 Note, the buffer may not yet have
170 been processed by the hardware --
171 getting a hardware lock with the
172 hardware quiescent will ensure
173 that the buffer has been
175 _DRM_DMA_WHILE_LOCKED
= 0x02, /* Dispatch while lock held */
176 _DRM_DMA_PRIORITY
= 0x04, /* High priority dispatch */
178 /* Flags for DMA buffer request */
179 _DRM_DMA_WAIT
= 0x10, /* Wait for free buffers */
180 _DRM_DMA_SMALLER_OK
= 0x20, /* Smaller-than-requested buffers ok */
181 _DRM_DMA_LARGER_OK
= 0x40 /* Larger-than-requested buffers ok */
184 typedef struct drm_buf_desc
{
185 int count
; /* Number of buffers of this size */
186 int size
; /* Size in bytes */
187 int low_mark
; /* Low water mark */
188 int high_mark
; /* High water mark */
190 _DRM_PAGE_ALIGN
= 0x01, /* Align on page boundaries for DMA */
191 _DRM_AGP_BUFFER
= 0x02 /* Buffer is in agp space */
193 unsigned long agp_start
; /* Start address of where the agp buffers
194 * are in the agp aperture */
197 typedef struct drm_buf_info
{
198 int count
; /* Entries in list */
199 drm_buf_desc_t
*list
;
202 typedef struct drm_buf_free
{
207 typedef struct drm_buf_pub
{
208 int idx
; /* Index into master buflist */
209 int total
; /* Buffer size */
210 int used
; /* Amount of buffer in use (for DMA) */
211 void *address
; /* Address of buffer */
214 typedef struct drm_buf_map
{
215 int count
; /* Length of buflist */
216 void *virtual; /* Mmaped area in user-virtual */
217 drm_buf_pub_t
*list
; /* Buffer information */
220 typedef struct drm_dma
{
221 /* Indices here refer to the offset into
222 buflist in drm_buf_get_t. */
223 int context
; /* Context handle */
224 int send_count
; /* Number of buffers to send */
225 int *send_indices
; /* List of handles to buffers */
226 int *send_sizes
; /* Lengths of data to send */
227 drm_dma_flags_t flags
; /* Flags */
228 int request_count
; /* Number of buffers requested */
229 int request_size
; /* Desired size for buffers */
230 int *request_indices
; /* Buffer information */
232 int granted_count
; /* Number of buffers granted */
236 _DRM_CONTEXT_PRESERVED
= 0x01,
237 _DRM_CONTEXT_2DONLY
= 0x02
240 typedef struct drm_ctx
{
241 drm_context_t handle
;
242 drm_ctx_flags_t flags
;
245 typedef struct drm_ctx_res
{
250 typedef struct drm_draw
{
251 drm_drawable_t handle
;
254 typedef struct drm_auth
{
258 typedef struct drm_irq_busid
{
265 typedef struct drm_agp_mode
{
269 /* For drm_agp_alloc -- allocated a buffer */
270 typedef struct drm_agp_buffer
{
271 unsigned long size
; /* In bytes -- will round to page boundary */
272 unsigned long handle
; /* Used for BIND/UNBIND ioctls */
273 unsigned long type
; /* Type of memory to allocate */
274 unsigned long physical
; /* Physical used by i810 */
277 /* For drm_agp_bind */
278 typedef struct drm_agp_binding
{
279 unsigned long handle
; /* From drm_agp_buffer */
280 unsigned long offset
; /* In bytes -- will round to page boundary */
283 typedef struct drm_agp_info
{
284 int agp_version_major
;
285 int agp_version_minor
;
287 unsigned long aperture_base
; /* physical address */
288 unsigned long aperture_size
; /* bytes */
289 unsigned long memory_allowed
; /* bytes */
290 unsigned long memory_used
;
292 /* PCI information */
293 unsigned short id_vendor
;
294 unsigned short id_device
;
297 #define DRM_IOCTL_BASE 'd'
298 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
299 #define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size)
300 #define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size)
301 #define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size)
304 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
305 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
306 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
307 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
309 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
310 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
311 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
312 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
313 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
314 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
315 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
316 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
317 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
318 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
319 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
321 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
322 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
323 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
324 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
325 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
326 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
327 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
328 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
329 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
330 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
331 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
332 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
333 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
335 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
336 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
337 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
338 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
339 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
340 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
341 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
342 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
344 /* Mga specific ioctls */
345 #define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
346 #define DRM_IOCTL_MGA_SWAP DRM_IOW( 0x41, drm_mga_swap_t)
347 #define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x42, drm_mga_clear_t)
348 #define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t)
349 #define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
350 #define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
351 #define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
353 /* I810 specific ioctls */
354 #define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
355 #define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t)
356 #define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t)
357 #define DRM_IOCTL_I810_FLUSH DRM_IO ( 0x43)
358 #define DRM_IOCTL_I810_GETAGE DRM_IO ( 0x44)
359 #define DRM_IOCTL_I810_GETBUF DRM_IOWR(0x45, drm_i810_dma_t)
360 #define DRM_IOCTL_I810_SWAP DRM_IO ( 0x46)
361 #define DRM_IOCTL_I810_COPY DRM_IOW( 0x47, drm_i810_copy_t)
362 #define DRM_IOCTL_I810_DOCOPY DRM_IO ( 0x48)
364 /* Rage 128 specific ioctls */
365 #define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t)
366 #define DRM_IOCTL_R128_RESET DRM_IO( 0x41)
367 #define DRM_IOCTL_R128_FLUSH DRM_IO( 0x42)
368 #define DRM_IOCTL_R128_IDLE DRM_IO( 0x43)
369 #define DRM_IOCTL_R128_PACKET DRM_IOW( 0x44, drm_r128_packet_t)
370 #define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x45, drm_r128_vertex_t)